Commit ffa5911d authored by cig's avatar cig

RA fixes

parent 903a1ec6
......@@ -1325,13 +1325,8 @@ UE_MODE_t get_nrUE_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t gNB_id){ // TBR gen
return(PHY_vars_UE_g[Mod_id][CC_id]->UE_mode[gNB_id]);
}
void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB){
// 3GPP TS 38.213 p4.2
// scale by the scs numerology
int factor_mu = 1 << mu;
uint16_t get_bw_scaling(uint16_t bwp_ul_NB_RB){
uint16_t bw_scaling;
// scale the 16 factor in N_TA calculation in 38.213 section 4.2 according to the used FFT size
switch (bwp_ul_NB_RB) {
case 106: bw_scaling = 16; break;
......@@ -1340,25 +1335,33 @@ void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_com
case 273: bw_scaling = 32; break;
default: abort();
}
return bw_scaling;
}
void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB){
// 3GPP TS 38.213 p4.2
// scale by the scs numerology
int factor_mu = 1 << mu;
uint16_t bw_scaling = get_bw_scaling(bwp_ul_NB_RB);
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance += (ta_command - 31) * bw_scaling / factor_mu;
LOG_D(PHY, "[UE %d] Got timing advance command %u from MAC, new value is %u\n", Mod_id, ta_command, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
}
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint16_t timing_advance) {
void nr_process_timing_advance_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint16_t ta_command) {
/* TODO TBR FIX THIS
int factor_mu = 1 << ue->frame_parms.numerology_index;
uint16_t bwp_ul_NB_RB = ue->frame_parms.N_RB_UL;
uint16_t bw_scaling = get_bw_scaling(bwp_ul_NB_RB);
ue->timing_advance = timing_advance*4;
// Transmission timing adjustment (TS 38.213 p4.2)
ue->timing_advance = bw_scaling / factor_mu;
#ifdef DEBUG_PHY_PROC
// TODO: fix this log, what is 'HW timing advance'?
//LOG_I(PHY,"[UE %d] AbsoluteSubFrame %d.%d, received (rar) timing_advance %d, HW timing advance %d\n",ue->Mod_id,proc->frame_rx, proc->nr_tti_rx_rx, ue->timing_advance);
LOG_I(PHY,"[UE %d] AbsoluteSubFrame %d.%d, received (rar) timing_advance %d\n",ue->Mod_id,proc->frame_rx, proc->nr_tti_rx, ue->timing_advance);
#endif
*/
// TBR todo handle TA application as per ch 4.2 TS 38.213
LOG_D(PHY, "[UE %d] Frame %d Slot %d, Received (RAR) timing advance command %d new value is %u \n", ue->Mod_id, proc->frame_rx, proc->nr_tti_rx, ta_command, ue->timing_advance);
}
#if 0
......@@ -3149,95 +3152,90 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
}
}
/*void nr_process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmode_t mode, int abstraction_flag) { // TBR todo
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
int timing_advance;
NR_UE_DLSCH_t *dlsch0 = ue->dlsch_ra[eNB_id];
int harq_pid = 0;
uint8_t *rar;
void nr_process_rar(nr_downlink_indication_t *dl_info) {
// uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
// uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
module_id_t module_id = dl_info->module_id;
int cc_id = dl_info->cc_id, frame_rx = dl_info->proc->frame_rx, nr_tti_rx = dl_info->proc->nr_tti_rx, ta_command, harq_pid = 0;
uint8_t gNB_index = dl_info->gNB_index, *rar;
fapi_nr_dci_indication_t *dci_ind = dl_info->dci_ind;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[module_id][cc_id];
NR_UE_DLSCH_t *dlsch0 = ue->dlsch_ra[gNB_index];
UE_MODE_t UE_mode = ue->UE_mode[gNB_index];
NR_PRACH_RESOURCES_t *prach_resources = ue->prach_resources[gNB_index];
LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Received RAR mode %d\n",
ue->Mod_id,
frame_rx,
nr_tti_rx, ue->UE_mode[eNB_id]);
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1); // TBR double check
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1); // TBR double check
LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Received RAR mode %d\n", module_id, frame_rx, nr_tti_rx, UE_mode);
if (ue->mac_enabled == 1) {
if ((ue->UE_mode[eNB_id] != PUSCH) &&
(ue->prach_resources[eNB_id]->Msg3!=NULL)) {
LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Invoking MAC for RAR (current preamble %d)\n",
ue->Mod_id,frame_rx,
nr_tti_rx,
ue->prach_resources[eNB_id]->ra_PreambleIndex);
if ((UE_mode != PUSCH) && (prach_resources->Msg3 != NULL)) {
// TBR restore
// timing_advance = nr_ue_process_rar(ue->Mod_id, ue->CC_id, frame_rx,
// ue->prach_resources[eNB_id]->ra_RNTI, dlsch0->harq_processes[0]->b,
// &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
// ue->prach_resources[eNB_id]->ra_PreambleIndex, dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Invoking MAC for RAR (current preamble %d)\n", module_id, frame_rx, nr_tti_rx, prach_resources->ra_PreambleIndex);
// ue->pdcch_vars[next1_thread_id][eNB_id]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti;
// ue->pdcch_vars[next2_thread_id][eNB_id]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti;
if (timing_advance!=0xffff) {
// TBR restore
// LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Got rnti %x and timing advance %d from RAR\n",
// TBR double check
// fix crnti
// ta_command = nr_ue_process_rar(ue->Mod_id,
// cc_id,
// frame_rx,
// prach_resources->ra_RNTI,
// dlsch0->harq_processes[0]->b,
// &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti,
// prach_resources->ra_PreambleIndex,
// dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
// ue->pdcch_vars[next1_thread_id][gNB_index]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti;
// ue->pdcch_vars[next2_thread_id][gNB_index]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti;
// TBR double check
if (ta_command != 0xffff) {
// LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Got rnti %x and timing advance %d from RAR\n",
// ue->Mod_id,
// frame_rx,
// nr_tti_rx,
// ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
// timing_advance);
// remember this c-rnti is still a tc-rnti
// ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti,
// ta_command);
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti_is_temporary = 1;
// fix TBR : C-RNTI is still a TC-RNTI
// ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->crnti_is_temporary = 1;
nr_process_timing_advance_rar(ue, dl_info->proc, ta_command);
//timing_advance = 0;
nr_process_timing_advance_rar(ue,proc,timing_advance);
if (mode!=debug_prach) {
ue->ulsch_Msg3_active[eNB_id]=1;
// TBR nr_get_Msg3_alloc has to be fixed
if (UE_mode != debug_prach) {
ue->ulsch_Msg3_active[gNB_index] = 1;
// nr_get_Msg3_alloc(&ue->frame_parms,
// nr_tti_rx,
// frame_rx,
// &ue->ulsch_Msg3_frame[eNB_id],
// &ue->ulsch_Msg3_subframe[eNB_id]);
LOG_D(PHY,"[UE %d][RAPROC] Got Msg3_alloc Frame %d nr_tti_rx %d: Msg3_frame %d, Msg3_subframe %d\n",
// &ue->ulsch_Msg3_frame[gNB_index],
// &ue->ulsch_Msg3_subframe[gNB_index]); // TBR
LOG_D(PHY,"[UE %d][RAPROC] Got Msg3_alloc Frame %d subframe %d: Msg3_frame %d, Msg3_subframe %d\n",
ue->Mod_id,
frame_rx,
nr_tti_rx,
ue->ulsch_Msg3_frame[eNB_id],
ue->ulsch_Msg3_subframe[eNB_id]);
harq_pid = nr_subframe2harq_pid(&ue->frame_parms,
ue->ulsch_Msg3_frame[eNB_id],
ue->ulsch_Msg3_subframe[eNB_id]);
//ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0; // TODO TBR fix this when HARQ is ready
ue->UE_mode[eNB_id] = RA_RESPONSE;
// ue->Msg3_timer[eNB_id] = 10;
//ue->ulsch[eNB_id]->power_offset = 6; // TODO TBR fix this
ue->ulsch_no_allocation_counter[eNB_id] = 0;
ue->ulsch_Msg3_frame[gNB_index],
ue->ulsch_Msg3_subframe[gNB_index]);
// todo TBR
// harq_pid = subframe2harq_pid(&ue->frame_parms,
// ue->ulsch_Msg3_frame[gNB_index],
// ue->ulsch_Msg3_subframe[gNB_index]);
// ue->ulsch[gNB_index]->harq_processes[harq_pid]->round = 0;
// ue->UE_mode[gNB_index] = RA_RESPONSE;
// ue->Msg3_timer[gNB_index] = 10;
// ue->ulsch[gNB_index].power_offset = 6;
// ue->ulsch_no_allocation_counter[gNB_index] = 0;
}
} else { // PRACH preamble doesn't match RAR
LOG_W(PHY,"[UE %d][RAPROC] Received RAR preamble (%d) doesn't match !!!\n",
ue->Mod_id,
ue->prach_resources[eNB_id]->ra_PreambleIndex);
prach_resources->ra_PreambleIndex);
}
} // mode != PUSCH
}
else {
} else {
rar = dlsch0->harq_processes[0]->b+1;
timing_advance = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
nr_process_timing_advance_rar(ue,proc,timing_advance);
ta_command = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
nr_process_timing_advance_rar(ue, dl_info->proc, ta_command);
}
}*/
}
void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
......
......@@ -70,12 +70,6 @@
// F: lenght of L is 0:8 or 1:16 bits wide
// R: Reserved bit, set to zero.
typedef enum {
RA_IDLE = 0,
WAIT_RAR = 1,
WAIT_CONTENTION_RESOLUTION = 2
} RA_state_t;
typedef struct {
uint8_t LCID:6; // octet 1 [5:0]
uint8_t F:1; // octet 1 [6]
......
......@@ -74,6 +74,12 @@ typedef enum {
SFN_C_IMPOSSIBLE
} SFN_C_TYPE;
typedef enum {
RA_IDLE = 0,
WAIT_RAR = 1,
WAIT_CONTENTION_RESOLUTION = 2
} RA_state_t;
/*!\brief Top level UE MAC structure */
typedef struct {
......
......@@ -215,5 +215,7 @@ uint16_t nr_ue_process_rar(const module_id_t mod_id,
const uint8_t preamble_index,
uint8_t * selected_rar_buffer);
void nr_process_rar(nr_downlink_indication_t *dl_info);
#endif
/** @}*/
......@@ -54,23 +54,20 @@ uint16_t nr_ue_process_rar(const module_id_t mod_id,
uint8_t * const dlsch_buffer,
rnti_t * const t_crnti,
const uint8_t preamble_index,
uint8_t * selected_rar_buffer/*output argument for storing the selected RAR header and RAR payload*/){
uint8_t * selected_rar_buffer){
NR_UE_MAC_INST_t *nrUE_mac_inst = get_mac_inst(mod_id);
uint16_t ret = 0; // return value
NR_RA_HEADER_RAPID *rarh = (NR_RA_HEADER_RAPID *) dlsch_buffer;
// TODO TBR
uint16_t ret = 0;
// NR_RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
// get the last RAR payload for working with CMW500
uint8_t n_rarpy = 0; // number of RAR payloads
uint8_t n_rarh = 0; // number of MAC RAR subheaders
uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs
AssertFatal(CC_id == 0, "RAR reception on secondary CCs is not supported yet\n");
while (1) {
n_rarh++;
if (rarh->T == 1) {
......@@ -102,11 +99,6 @@ uint16_t nr_ue_process_rar(const module_id_t mod_id,
LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n",
n_rarh, n_rarpy);
if (CC_id > 0) {
LOG_W(MAC, "Should not have received RAR on secondary CCs! \n");
return (0xffff);
}
LOG_I(MAC,
"[UE %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",
mod_id, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2],
......
......@@ -380,7 +380,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
// Phytest scheduling
if (phy_test && slot_txP==1){ // TBR check phy_test
if (phy_test && slot_txP==1){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP,NULL);
// This schedules Random-Access for NR starting in subframeP
nr_schedule_RA(module_idP, frame_txP, slot_txP);
......
......@@ -28,95 +28,62 @@
*/
#include "platform_types.h"
/* MAC */
#include "nr_mac_gNB.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
/* Openair Packet Tracer */
/* Utils */
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
// void nr_add_subframe(uint16_t *frameP, uint16_t *slotP, int offset){
// *frameP = (*frameP + ((*slotP + offset) / 10)) % 1024;
// *slotP = ((*slotP + offset) % 10);
// } // TBR fix
extern RAN_CONTEXT_t RC;
void nr_add_subframe(uint16_t *frameP, uint16_t *slotP, int offset){
*frameP = (*frameP + ((*slotP + offset) / 10)) % 1024;
*slotP = ((*slotP + offset) % 10);
}
// handles the event of MSG1 reception
// TBR remove sub_frame_t
// TBR
// handles the event of msg1 reception
// todo:
// - offset computation
// - fix nr_add_subframe
void nr_initiate_ra_proc(module_id_t module_idP,
int CC_id,
frame_t frameP,
sub_frame_t slotP,
uint16_t preamble_index,
int16_t timing_offset,
uint16_t ra_rnti
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0)) // TBR
, uint8_t rach_resource_type
#endif
){
uint16_t ra_rnti){
uint8_t i;
uint16_t msg2_frame = frameP, msg2_slot = slotP;
int offset;
NR_COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_RA_t *ra = &cc->ra[0];
static uint8_t failure_cnt = 0;
/*#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
struct PRACH_ConfigSIB_v1310 *ext4_prach = NULL;
PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = NULL;
static uint8_t failure_cnt = 0;
if (cc->radioResourceConfigCommon_BR
&& cc->radioResourceConfigCommon_BR->ext4) {
ext4_prach = cc->radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13;
}
#endif // #if (RRC_VERSION >= MAKE_VERSION(14, 0, 0)) */
LOG_D(MAC, "[gNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n",
module_idP, CC_id, frameP, slotP, preamble_index);
/*#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
LOG_D(MAC,
"[gNB %d][RAPROC] CC_id %d Frame %d, Subframe %d PRACH resource type %d\n",
module_idP, CC_id, frameP, slotP, rach_resource_type);
#endif*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
LOG_D(MAC, "[gNB %d][RAPROC] CC_id %d Frame %d, Subframe %d Initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, slotP, preamble_index);
/*#if (RRC_VERSION >= MAKE_VERSION(13, 0, 0))
if (prach_ParametersListCE_r13 && prach_ParametersListCE_r13->list.count < rach_resource_type) {
LOG_E(MAC,"[gNB %d][RAPROC] CC_id %d Received impossible PRACH resource type %d,
only %d CE levels configured\n",
module_idP, CC_id, rach_resource_type,
(int) prach_ParametersListCE_r13->list.count);
return;
}
#endif // #if (RRC_VERSION >= MAKE_VERSION(14, 0, 0)) */
/*VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0);*/
for (i = 0; i < NR_NB_RA_PROC_MAX; i++) {
if (ra[i].state == IDLE) {
if (ra->state == RA_IDLE) {
int loop = 0;
LOG_D(MAC, "Frame %d, Subframe %d: Activating RA process %d\n", frameP, slotP, i);
ra[i].state = MSG2;
ra[i].timing_offset = timing_offset;
ra[i].preamble_subframe = slotP;
/*#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
ra[i].rach_resource_type = rach_resource_type;
ra[i].msg2_mpdcch_repetition_cnt = 0;
ra[i].msg4_mpdcch_repetition_cnt = 0;
#endif*/
/* TBR CHECK Fill in other TDD config. What about nfapi_mode? */
LOG_D(MAC, "Frame %d, Subframe %d: Activating RA process \n", frameP, slotP);
ra->state = Msg2;
ra->timing_offset = timing_offset;
ra->preamble_subframe = slotP;
// if(cc->tdd_Config!=NULL){
// // switch(cc->tdd_Config->subframeAssignment){ // TBR missing tdd_Config
// // default: printf("%s:%d: TODO\n", __FILE__, __LINE__); abort();
// // case 1 :
// // offset = 6;
// // break;
// // }
// switch(cc->tdd_Config->subframeAssignment){ // TBR missing tdd_Config
// default: printf("%s:%d: TODO\n", __FILE__, __LINE__); abort();
// case 1 :
// offset = 6;
// break;
// }
// }else{//FDD
// // DJP - this is because VNF is 2 subframes ahead of PNF and TX needs 4 subframes
// if (nfapi_mode)
......@@ -125,63 +92,41 @@ void nr_initiate_ra_proc(module_id_t module_idP,
// offset = 5;
// }
// nr_add_subframe(&msg2_frame, &msg2_slot, offset); // TBR
nr_add_subframe(&msg2_frame, &msg2_slot, offset);
ra[i].Msg2_frame = msg2_frame;
ra[i].Msg2_subframe = msg2_slot;
ra->Msg2_frame = msg2_frame;
ra->Msg2_subframe = msg2_slot;
LOG_D(MAC,"%s() Msg2[%04d%d] SFN/SF:%04d%d offset:%d\n", __FUNCTION__,ra[i].Msg2_frame,ra[i].Msg2_subframe,frameP,slotP,offset);
LOG_D(MAC, "%s() Msg2[%04d%d] SFN/SF:%04d%d offset:%d\n", __FUNCTION__, ra->Msg2_frame, ra->Msg2_subframe, frameP, slotP, offset);
ra[i].Msg2_subframe = (slotP + offset) % 10;
ra->Msg2_subframe = (slotP + offset) % 10; // TBR this is done twice ?
/* TBR: find better procedure to allocate RNTI */
do {
#if defined(USRP_REC_PLAY) // deterministic rnti in usrp record/playback mode
static int drnti[MAX_MOBILES_PER_GNB] = { 0xbda7, 0x71da, 0x9c40, 0xc350, 0x2710, 0x4e20, 0x7530, 0x1388, 0x3a98, 0x61a8, 0x88b8, 0xafc8, 0xd6d8, 0x1b58, 0x4268, 0x6978 };
int j = 0;
int nb_ue = 0;
for (j = 0; j < MAX_MOBILES_PER_GNB; j++) {
if (UE_RNTI(module_idP, j) > 0) {
nb_ue++;
} else {
break;
}
}
if (nb_ue >= MAX_MOBILES_PER_GNB) {
printf("No more free RNTI available, increase MAX_MOBILES_PER_GNB\n");
abort();
}
ra[i].rnti = drnti[nb_ue];
#else
ra[i].rnti = taus();
#endif
ra->rnti = taus(); // todo 5.1.3 TS 38.321
loop++;
}
/* While loop
** TBR: second condition is not correct, the rnti may be in use without
* being in the MAC yet. To be refined.
** 1024 and 60000 arbirarily chosen, not coming from standard */
while (loop != 100 /*&& !(find_nrUE_id(module_idP, ra[i].rnti) == -1 && ra[i].rnti >= 1024 && ra[i].rnti < 60000)*/);
// TBR nr_find_ue
// Range coming from 5.1.3 TS 38.321
while (loop != 100 && !(find_nr_UE_id(module_idP, ra->rnti) == -1 && ra->rnti >= 1 && ra->rnti <= 17920));
if (loop == 100) {
printf("%s:%d:%s: FATAL ERROR! contact the authors\n",__FILE__, __LINE__, __FUNCTION__);
LOG_E(MAC,"%s:%d:%s: [RAPROC] initialisation random access aborted\n", __FILE__, __LINE__, __FUNCTION__);
abort();
}
ra[i].RA_rnti = ra_rnti;
ra[i].preamble_index = preamble_index;
ra->RA_rnti = ra_rnti;
ra->preamble_index = preamble_index;
failure_cnt = 0;
LOG_D(MAC, "[gNB %d][RAPROC] CC_id %d Frame %d Activating RAR generation in Frame %d, subframe %d for process %d, rnti %x, state %d\n", module_idP, CC_id, frameP, ra[i].Msg2_frame, ra[i].Msg2_subframe, i, ra[i].rnti, ra[i].state);
LOG_D(MAC, "[gNB %d][RAPROC] CC_id %d Frame %d Activating Msg2 generation in frame %d, slot %d for rnti %x\n",
module_idP,
CC_id,
frameP,
ra->Msg2_frame,
ra->Msg2_subframe,
ra->state);
return;
}
}
LOG_E(MAC,
"[gNB %d][RAPROC] FAILURE: CC_id %d Frame %d Initiating RA procedure for preamble index %d\n",
module_idP, CC_id, frameP, preamble_index);
LOG_E(MAC, "[gNB %d][RAPROC] FAILURE: CC_id %d Frame %d initiating RA procedure for preamble index %d\n", module_idP, CC_id, frameP, preamble_index);
failure_cnt++;
......@@ -189,7 +134,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
LOG_E(MAC,"[gNB %d][RAPROC] CC_id %d Frame %d Clear Random access information\n", module_idP, CC_id, frameP);
nr_clear_ra_proc(module_idP, CC_id, frameP);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 0);
}
void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
......@@ -201,46 +146,40 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
start_meas(&mac->schedule_ra);
// for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
for (i = 0; i < NR_NB_RA_PROC_MAX; i++) {
ra = (NR_RA_t *) & cc[CC_id].ra[i];
LOG_D(MAC,"RA[state:%d]\n",ra->state);
switch (ra->state){
case MSG2:
case Msg2:
nr_generate_Msg2(module_idP, CC_id, frameP, slotP, ra);
break;
case MSG4:
generate_Msg4(module_idP, CC_id, frameP, slotP, ra);
case Msg4:
//generate_Msg4(module_idP, CC_id, frameP, slotP, ra); // TBR
break;
case WAITMSG4ACK:
case WAIT_Msg4_ACK:
check_Msg4_retransmission(module_idP, CC_id, frameP, slotP, ra);
break;
}
} // for i=0 .. N_RA_PROC-1
// } // CC_id
}
stop_meas(&mac->schedule_ra);
}
void nr_generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP,
sub_frame_t slotP, NR_RA_t * ra){
int first_rb, N_RB_DL;
gNB_MAC_INST *mac = RC.mac[module_idP];
NR_COMMON_channels_t *cc = mac->common_channels;
uint8_t *vrb_map = cc[CC_idP].vrb_map;
gNB_MAC_INST *mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &mac->common_channels[CC_id];
uint8_t *vrb_map = cc[CC_id].vrb_map;
// /* TBR - MIGRATE TO THE NEW NFAPI */
// nfapi_nr_dl_tti_request_body_t *dl_req = &mac->DL_req[CC_idP].dl_config_request_body;
// nfapi_nr_dl_tti_request_body_t *dl_req = &mac->DL_req[CC_id].dl_config_request_body;
// nfapi_nr_dl_tti_request_pdu_t *dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
// nfapi_tx_request_pdu_t *TX_req;
//
// /* TBR: BW should be retrieved from
// // NR_ServingCellConfigCommonSIB_t -> NR_BWP_DownlinkCommon_t -> NR_BWP_t
// N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth);
// N_RB_DL = to_prb(cc[CC_id].mib->message.dl_Bandwidth);
// // Temporary hardcoded
// */
// N_RB_DL = 106;
......@@ -249,7 +188,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
//
// LOG_D(MAC,"[gNB %d] CC_id %d Frame %d, slotP %d:
// Generating RAR DCI, state %d\n",
// module_idP, CC_idP, frameP, slotP, ra->state);
// module_idP, CC_id, frameP, slotP, ra->state);
//
// // Allocate 4 PRBS starting in RB 0
// // commented out because preprocessor is missing
......@@ -280,7 +219,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
// dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL, first_rb, 4);
//
// // This checks if the above DCI allocation is feasible in current subframe
// if (!nr_CCE_allocation_infeasible(module_idP, CC_idP, 0, slotP,
// if (!nr_CCE_allocation_infeasible(module_idP, CC_id, 0, slotP,
// dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level, ra->RA_rnti)) {
//
// LOG_D(MAC, "Frame %d: Subframe %d : Adding common DCI for RA_RNTI %x\n", frameP, slotP, ra->RA_rnti);
......@@ -292,7 +231,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
// dl_config_pdu->pdu_type = NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE;
// dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_nr_dl_config_dlsch_pdu));
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.tl.tag = NFAPI_NR_DL_CONFIG_REQUEST_DLSCH_PDU_REL15_TAG;
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = mac->pdu_index[CC_idP];
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = mac->pdu_index[CC_id];
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = ra->RA_rnti;
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2; // format 1A/1B/1D
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
......@@ -315,32 +254,32 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
// // dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
// dl_req->number_pdu++;
// mac->DL_req[CC_idP].sfn_sf = frameP<<4 | slotP;
// mac->DL_req[CC_id].sfn_sf = frameP<<4 | slotP;
//
// // Program UL processing for Msg3
// nr_get_Msg3alloc(&cc[CC_idP], slotP, frameP,&ra->Msg3_frame, &ra->Msg3_subframe);
// nr_get_Msg3alloc(&cc[CC_id], slotP, frameP,&ra->Msg3_frame, &ra->Msg3_subframe);
//
// LOG_D(MAC, "Frame %d, Subframe %d: Setting Msg3 reception for Frame %d Subframe %d\n",
// frameP, slotP, ra->Msg3_frame,
// ra->Msg3_subframe);
//
// nr_fill_rar(module_idP, CC_idP, ra, frameP, cc[CC_idP].RAR_pdu.payload, N_RB_DL, 7);
// nr_add_msg3(module_idP, CC_idP, ra, frameP, slotP);
// nr_fill_rar(module_idP, CC_id, ra, frameP, cc[CC_id].RAR_pdu.payload, N_RB_DL, 7);
// nr_add_msg3(module_idP, CC_id, ra, frameP, slotP);
// ra->state = WAITMSG3;
// LOG_D(MAC,"[gNB %d][RAPROC] Frame %d, Subframe %d: state:WAITMSG3\n", module_idP, frameP, slotP);
//
// // DL request
// mac->TX_req[CC_idP].sfn_sf = (frameP << 4) + slotP;
// TX_req = &mac->TX_req[CC_idP].tx_request_body.tx_pdu_list[mac->TX_req[CC_idP].tx_request_body.number_of_pdus];
// mac->TX_req[CC_id].sfn_sf = (frameP << 4) + slotP;
// TX_req = &mac->TX_req[CC_id].tx_request_body.tx_pdu_list[mac->TX_req[CC_id].tx_request_body.number_of_pdus];
// TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble
// TX_req->pdu_index = mac->pdu_index[CC_idP]++;
// TX_req->pdu_index = mac->pdu_index[CC_id]++;
// TX_req->num_segments = 1;
// TX_req->segments[0].segment_length = 7;
// TX_req->segments[0].segment_data = cc[CC_idP].RAR_pdu.payload;
// mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
// TX_req->segments[0].segment_data = cc[CC_id].RAR_pdu.payload;
// mac->TX_req[CC_id].tx_request_body.number_of_pdus++;
//
// /*if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
// set_dl_ue_select_msg2(CC_idP, 4, -1, ra->rnti);
// set_dl_ue_select_msg2(CC_id, 4, -1, ra->rnti);
// }*/
// } // PDCCH CCE allocation is feasible
// } // Msg2 frame/subframe condition
......@@ -349,14 +288,12 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
void nr_clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP){
unsigned char i;
NR_RA_t *ra = (NR_RA_t *) &RC.mac[module_idP]->common_channels[CC_id].ra[0];
for (i = 0; i < NR_NB_RA_PROC_MAX; i++){
LOG_D(MAC,"[gNB %d][RAPROC] CC_id %d Frame %d Clear Random access information rnti %x\n", module_idP, CC_id, frameP, ra[i].rnti);
ra[i].state = IDLE;
ra[i].timing_offset = 0;
ra[i].RRC_timer = 20;
ra[i].rnti = 0;
ra[i].msg3_round = 0;
}
LOG_D(MAC,"[gNB %d][RAPROC] CC_id %d Frame %d Clear Random access information rnti %x\n", module_idP, CC_id, frameP, ra->rnti);
ra->state = IDLE;
ra->timing_offset = 0;
ra->RRC_timer = 20;
ra->rnti = 0;
ra->msg3_round = 0;
}
unsigned short nr_fill_rar(const module_id_t mod_id,
......
......@@ -75,6 +75,14 @@
/*!\brief Maximum number of random access process */
#define NR_NB_RA_PROC_MAX 4
typedef enum {
RA_IDLE = 0,
Msg2 = 1,
WAIT_Msg3 = 2,
Msg4 = 3,
WAIT_Msg4_ACK = 4
} RA_state_t;
/*! \brief gNB template for the Random access information */
typedef struct {
/// Flag to indicate this process is active
......
......@@ -64,11 +64,7 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
NFAPI_SFNSF2SF(UL_info->rach_ind.sfn_sf),
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.preamble,
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.timing_advance,
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.rnti
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0)) // TBR
,0
#endif
);
UL_info->rach_ind.rach_indication_body.preamble_list[0].preamble_rel8.rnti);
}
}
......
......@@ -93,12 +93,15 @@ int8_t handle_dlsch (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_n
*/
}
int8_t handle_rar (module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_indication_t *dci_ind, uint8_t *pduP, uint32_t pdu_len, frame_t frame, int slot, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
if (IS_SOFTMODEM_NOS1 || IS_SOFTMODEM_RFSIM)
//nr_process_rar(ue,proc, gNB_index, mode); TBR
int8_t handle_rar (nr_downlink_indication_t *dl_info,
uint8_t *pduP,
uint32_t pdu_len,
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){ // TBR not used params
LOG_D(MAC, "handling RAR at MAC layer \n");
nr_process_rar (dl_info);
return 0;
}
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
......@@ -260,10 +263,10 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
break;
case FAPI_NR_RX_PDU_TYPE_RAR:
/*ret_mask |= (handle_rar(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index, dl_info->dci_ind,
ret_mask |= (handle_rar(dl_info,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length,
dl_info->frame, dl_info->slot,ul_time_alignment)) << FAPI_NR_RX_PDU_TYPE_RAR;*/ //TODO TBR
ul_time_alignment)) << FAPI_NR_RX_PDU_TYPE_RAR;
break;
default:
......
......@@ -199,7 +199,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc) {
rrc->carrier.pdsch_AntennaPorts,
(NR_ServingCellConfigCommon_t *)rrc->carrier.servingcellconfigcommon,
0,
0,
0, // TBR hardcoded rnti
(NR_CellGroupConfig_t *)NULL
);
......
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