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OpenXG UE
Commit b3a98b89 authored by Cedric Roux's avatar Cedric Roux
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Merge remote-tracking branch 'internal/mac-multi-ue' into develop_integration_w34

parents 30cd4faa a9ec9b0b
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Showing with 225 additions and 64 deletions
cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.10MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
......
cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.20MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
......
cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.5MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
......
cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.10MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
......
cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.20MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
......
cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.5MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -24;
......
cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.10MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.20MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.5MHz.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.10MHz.udp.usrpb210.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.20MHz.udp.usrpb210.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.5MHz.udp.usrpb210.conf
View file @ b3a98b89
......@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
openair1/PHY/LTE_TRANSPORT/dci.c
View file @ b3a98b89
......@@ -2176,6 +2176,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
// printf("dci_alloc[%d].L = %d\n",i,dci_alloc[i].L);
//}
//exit(-1);
exit(1);
return(0);
}
......
openair1/PHY/LTE_TRANSPORT/pucch.c
View file @ b3a98b89
......@@ -2074,12 +2074,12 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
rxptr = (int16_t *)&common_vars->rxdataF[0][aa][symbol_offset];
for (i=0; i<12; i++,j+=2,re_offset++) {
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
if (re_offset==frame_parms->ofdm_symbol_size)
re_offset = 0;
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d (%d,%d,%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,i,re_offset,m,j,
rxptr[re_offset<<1],rxptr[1+(re_offset<<1)],
......@@ -2153,8 +2153,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
} //phase
stat_max *= nsymb; // normalize to energy per symbol
stat_max /= (frame_parms->N_RB_UL*12); //
// stat_max *= nsymb; // normalize to energy per symbol
// stat_max /= (frame_parms->N_RB_UL*12); //
stat_max /= (nsymb*12);
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH: stat %d, stat_max %d, phase_max %d\n", stat,stat_max,phase_max);
#endif
......@@ -2202,7 +2203,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
LOG_I(PHY,"Doing PUCCH detection for format 1a/1b\n");
#endif
for (phase=3;phase<4;phase++){ //phase=0; phase<7; phase++) {
for (phase=0; phase<7; phase++) {
stat=0;
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
......@@ -2339,8 +2340,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
off=(re<<1) + (24*l);
tmp_re = ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
tmp_im = ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15)/4);
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15)/4);
stat_re += (((tmp_re*chest_re)>>15) + ((tmp_im*chest_im)>>15))/4;
stat_im += (((tmp_re*chest_im)>>15) - ((tmp_im*chest_re)>>15))/4;
off+=2;
#ifdef DEBUG_PUCCH_RX
printf("[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)\n",subframe,l,re,
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ b3a98b89
......@@ -290,6 +290,30 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
return(0);
}
int get_ue_rbs(int Mod_id, int CC_id, int rnti, int frame, int subframe, int *start_rb, int *nb_rb)
{
LTE_eNB_ULSCH_t *ULSCH_ptr;
uint8_t ulsch_subframe,ulsch_frame;
int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
int harq_pid;
if (UE_id==-1) {
LOG_E(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
return(-1);
}
ULSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->ulsch[(uint32_t)UE_id];
ulsch_subframe = pdcch_alloc2ul_subframe(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,subframe);
ulsch_frame = pdcch_alloc2ul_frame(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,frame,subframe);
harq_pid = subframe2harq_pid(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,
ulsch_frame,
ulsch_subframe);
*nb_rb = ULSCH_ptr->harq_processes[harq_pid]->nb_rb;
*start_rb = ULSCH_ptr->harq_processes[harq_pid]->first_rb;
return(0);
}
int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
{
return PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUSCH;
......
openair2/LAYER2/MAC/eNB_scheduler.c
View file @ b3a98b89
......@@ -1087,7 +1087,13 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// Allocate CCEs for good after scheduling is done
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++)
allocate_CCEs(module_idP,CC_id,subframeP,0);
if (allocate_CCEs(module_idP,CC_id,subframeP,0)) {
LOG_D(MAC, "eNB %d CC_id %d frame %d subframe %d: CCE allocation failed\n",
module_idP, CC_id, frameP, subframeP);
printf("eNB %d CC_id %d frame %d subframe %d: CCE allocation failed\n",
module_idP, CC_id, frameP, subframeP);
abort();
}
#if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_CONT_STATS
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ b3a98b89
......@@ -452,6 +452,7 @@ schedule_ue_spec(
static int32_t tpc_accumulated=0;
UE_sched_ctrl *ue_sched_ctl;
int i;
DCI_PDU saved_DCI_pdu[MAX_NUM_CCs];
#if 0
if (UE_list->head==-1) {
......@@ -462,6 +463,10 @@ schedule_ue_spec(
start_meas(&eNB->schedule_dlsch);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_IN);
/* save DCI_pdu size */
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
saved_DCI_pdu[CC_id].Num_dci = eNB->common_channels[CC_id].DCI_pdu.Num_dci;
//weight = get_ue_weight(module_idP,UE_id);
aggregation = 2;
......@@ -496,7 +501,6 @@ schedule_ue_spec(
stop_meas(&eNB->schedule_dlsch_preprocessor);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,VCD_FUNCTION_OUT);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
......@@ -571,6 +575,18 @@ schedule_ue_spec(
continue;
}
/* add "fake" DCI to have CCE_allocation_infeasible work properly for next allocations */
/* if we don't add it, next allocations may succeed but overall allocations may fail */
/* will be removed at the end of this function */
add_ue_spec_dci(&eNB->common_channels[CC_id].DCI_pdu,
&(char[]){0},
rnti,
1,
aggregation,
1,
format1,
0);
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
......@@ -632,6 +648,7 @@ schedule_ue_spec(
while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) {
if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
if (UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j]) printf("WARN: rballoc_subband not free for retrans?\n");
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
if((j == frame_parms[CC_id]->N_RBG-1) &&
......@@ -798,7 +815,7 @@ schedule_ue_spec(
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=eNB_UE_stats->dlsch_mcs1;
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=eNB_UE_stats->dlsch_mcs1;
} else {
LOG_D(MAC,"[eNB %d] Frame %d CC_id %d : don't schedule UE %d, its retransmission takes more resources than we have\n",
LOG_E(MAC,"[eNB %d] Frame %d CC_id %d : don't schedule UE %d, its retransmission takes more resources than we have\n",
module_idP, frameP, CC_id, UE_id);
}
} else { /* This is a potentially new SDU opportunity */
......@@ -1645,6 +1662,10 @@ schedule_ue_spec(
} // UE_id loop
} // CC_id loop
/* restore DCI_pdu size */
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
eNB->common_channels[CC_id].DCI_pdu.Num_dci = saved_DCI_pdu[CC_id].Num_dci;
stop_meas(&eNB->schedule_dlsch);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH,VCD_FUNCTION_OUT);
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ b3a98b89
......@@ -670,6 +670,16 @@ void schedule_ulsch(module_id_t module_idP,
}
}
/* TODO: this is a hack to disable scheduling in the PRACH.
* We need to get the information from config/phy/wherever
* as done in the commented code below.
* For the moment, we hardcode for the config used by default.
* Only tested with FDD.
*/
int frame_ul = (frameP + (subframeP >= 6)) & 1023;
int subframe_ul = (subframeP + 4) % 10;
if ((frame_ul & 1) == 0 && subframe_ul == 1) first_rb[CC_id] = 8;
/*
if (mac_xface->is_prach_subframe(&(mac_xface->lte_frame_parms),frameP,subframeP)) {
first_rb[CC_id] = (mac_xface->get_prach_prb_offset(&(mac_xface->lte_frame_parms),
......@@ -677,6 +687,65 @@ void schedule_ulsch(module_id_t module_idP,
}
/* TODO: remove this hack which is to avoid scheduling new uplink where there is a
* retransmission. It increases first_rb to move after the retransmission RBs,
* which can skip a lot of free RBs (say the UE 2 has a retransmission
* in RBs 45..47, we would skip RBs 1..47, but RBs 1..44 are free and
* won't be used for scheduling)
*/
int UE_id;
int rnti;
UE_list_t *UE_list=&eNB->UE_list;
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
int drop_ue=0;
uint8_t harq_pid = 0;
uint8_t round = 0;
int n;
// loop over all UEs
for (UE_id=0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
rnti = UE_RNTI(module_idP,UE_id);
if (rnti==NOT_A_RNTI) continue;
if (UE_list->UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured==FALSE) continue;
drop_ue = 0;
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
CC_id = UE_list->ordered_ULCCids[n][UE_id];
if (mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti) == NULL) {
drop_ue = 1;
break;
}
}
if (drop_ue == 1) continue;
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
// This is the actual CC_id in the list
CC_id = UE_list->ordered_ULCCids[n][UE_id];
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
int start_rb;
int nb_rb;
//DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
//UE_template = &UE_list->UE_template[CC_id][UE_id];
//UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
if (mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL) == -1 ) continue;
int get_ue_rbs(int module_idP, int CC_id, int rnti, int frameP, int subframeP, int *start_rb, int *nb_rb);
if (get_ue_rbs(module_idP,CC_id,rnti,frameP,subframeP,&start_rb,&nb_rb) == -1 ) continue;
if (round > 0)
{
if (start_rb < first_rb[CC_id]) {
LOG_E(MAC, "scheduled retransmission in forbidden RBs\n");
// printf("scheduled retransmission in forbidden RBs\n");
}
if (first_rb[CC_id] < start_rb + nb_rb)
first_rb[CC_id] = start_rb + nb_rb;
}
} // UE is in PUSCH
} // loop over CC
} // loop over UE
schedule_ulsch_rnti(module_idP, cooperation_flag, frameP, subframeP, sched_subframe,first_rb);
#ifdef CBA
......@@ -802,6 +871,13 @@ abort();
module_idP,frameP,subframeP,UE_id,rnti,CC_id, mode_string[eNB_UE_stats->mode], 1<<aggregation);
}
/* be sure that there are some free RBs */
if (first_rb[CC_id] >= frame_parms->N_RB_UL-1) {
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d mode %s: dropping, not enough RBs\n",
module_idP,frameP,subframeP,UE_id,rnti,CC_id, mode_string[eNB_UE_stats->mode]);
continue;
}
if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
......@@ -891,9 +967,11 @@ abort();
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=mcs;
// buffer_occupancy = UE_template->ul_total_buffer;
while (((rb_table[rb_table_index]>(frame_parms->N_RB_UL-1-first_rb[CC_id])) ||
(rb_table[rb_table_index]>45)) &&
(rb_table_index>0)) {
while (rb_table_index > 0 &&
(rb_table[rb_table_index] > frame_parms->N_RB_UL-1-first_rb[CC_id] ||
rb_table[rb_table_index]>45 ||
(UE_template->pre_allocated_rb_table_index_ul >= 0 &&
rb_table[rb_table_index] > UE_template->pre_allocated_nb_rb_ul))) {
rb_table_index--;
}
......
openair2/LAYER2/MAC/pre_processor.c
View file @ b3a98b89
......@@ -672,9 +672,12 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,i); ii++) {
CC_id = UE_list->ordered_CCids[ii][i];
ue_sched_ctl = &UE_list->UE_sched_ctrl[i];
round = ue_sched_ctl->round[CC_id];
// control channel
if (mac_eNB_get_rrc_status(Mod_id,rnti) < RRC_RECONFIGURED) {
// control channel or retransmission
/* TODO: do we have to check for retransmission? */
if (mac_eNB_get_rrc_status(Mod_id,rnti) < RRC_RECONFIGURED || round > 0) {
nb_rbs_required_remaining_1[CC_id][i] = nb_rbs_required[CC_id][i];
} else {
nb_rbs_required_remaining_1[CC_id][i] = cmin(average_rbs_per_user[CC_id],nb_rbs_required[CC_id][i]);
......@@ -696,6 +699,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
nb_rbs_required_remaining[CC_id][i] = nb_rbs_required_remaining_1[CC_id][i];
} else { // rb required based only on the buffer - rb allloctaed in the 1st round + extra reaming rb form the 1st round
nb_rbs_required_remaining[CC_id][i] = nb_rbs_required[CC_id][i]-nb_rbs_required_remaining_1[CC_id][i]+nb_rbs_required_remaining[CC_id][i];
if (nb_rbs_required_remaining[CC_id][i]<0) abort();
}
if (nb_rbs_required[CC_id][i]> 0 )
......@@ -901,7 +905,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
}
}
#define SF05_LIMIT 1
#define SF0_LIMIT 1
void dlsch_scheduler_pre_processor_reset (int module_idP,
int UE_id,
......@@ -920,10 +924,10 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
rnti_t rnti = UE_RNTI(module_idP,UE_id);
uint8_t *vrb_map = eNB_mac_inst[module_idP].common_channels[CC_id].vrb_map;
int RBGsize = PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL/N_RBG;
#ifdef SF05_LIMIT
//int subframe05_limit=0;
int sf05_upper=-1,sf05_lower=-1;
int RBGsize;
int RBGsize_last;
#ifdef SF0_LIMIT
int sf0_upper=-1,sf0_lower=-1;
#endif
LTE_eNB_UE_stats *eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
if (eNB_UE_stats == NULL) return;
......@@ -986,44 +990,60 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
ue_sched_ctl->dl_pow_off[CC_id] = 2;
nb_rbs_required_remaining[CC_id][UE_id] = 0;
#ifdef SF05_LIMIT
switch (PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL) {
case 6: RBGsize = 1; RBGsize_last = 1; break;
case 15: RBGsize = 2; RBGsize_last = 1; break;
case 25: RBGsize = 2; RBGsize_last = 1; break;
case 50: RBGsize = 3; RBGsize_last = 2; break;
case 75: RBGsize = 4; RBGsize_last = 3; break;
case 100: RBGsize = 4; RBGsize_last = 4; break;
default: printf("unsupported RBs (%d)\n", PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL); fflush(stdout); abort();
}
#ifdef SF0_LIMIT
switch (N_RBG) {
case 6:
sf05_lower=0;
sf05_upper=5;
sf0_lower=0;
sf0_upper=5;
break;
case 8:
sf05_lower=2;
sf05_upper=5;
sf0_lower=2;
sf0_upper=5;
break;
case 13:
sf05_lower=4;
sf05_upper=7;
sf0_lower=4;
sf0_upper=7;
break;
case 17:
sf05_lower=7;
sf05_upper=9;
sf0_lower=7;
sf0_upper=9;
break;
case 25:
sf05_lower=11;
sf05_upper=13;
sf0_lower=11;
sf0_upper=13;
break;
default: printf("unsupported RBs (%d)\n", PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.N_RB_DL); fflush(stdout); abort();
}
#endif
// Initialize Subbands according to VRB map
for (i=0; i<N_RBG; i++) {
int rb_size = i==N_RBG-1 ? RBGsize_last : RBGsize;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 0;
rballoc_sub[CC_id][i] = 0;
#ifdef SF05_LIMIT
// for avoiding 6+ PRBs around DC in subframe 0-5 (avoid excessive errors)
if ((subframeP==0 || subframeP==5) &&
(i>=sf05_lower && i<=sf05_upper))
#ifdef SF0_LIMIT
// for avoiding 6+ PRBs around DC in subframe 0 (avoid excessive errors)
/* TODO: make it proper - allocate those RBs, do not "protect" them, but
* compute number of available REs and limit MCS according to the
* TBS table 36.213 7.1.7.2.1-1 (can be done after pre-processor)
*/
if (subframeP==0 &&
i >= sf0_lower && i <= sf0_upper)
rballoc_sub[CC_id][i]=1;
#endif
// for SI-RNTI,RA-RNTI and P-RNTI allocations
for (j=0;j<RBGsize;j++) {
if (vrb_map[j+(i*RBGsize)]!=0) {
for (j = 0; j < rb_size; j++) {
if (vrb_map[j+(i*RBGsize)] != 0) {
rballoc_sub[CC_id][i] = 1;
LOG_D(MAC,"Frame %d, subframe %d : vrb %d allocated\n",frameP,subframeP,j+(i*RBGsize));
break;
......@@ -1063,6 +1083,7 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
if (ue_sched_ctl->dl_pow_off[CC_id] != 0 ) {
if ((i == N_RBG-1) && ((N_RB_DL == 25) || (N_RB_DL == 50))) {
if (nb_rbs_required_remaining[CC_id][UE_id] >= min_rb_unit-1){
rballoc_sub[CC_id][i] = 1;
ue_sched_ctl->rballoc_sub_UE[CC_id][i] = 1;
MIMO_mode_indicator[CC_id][i] = 1;
......@@ -1071,6 +1092,7 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
}
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit+1;
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit - 1;
}
} else {
if (nb_rbs_required_remaining[CC_id][UE_id] >= min_rb_unit){
rballoc_sub[CC_id][i] = 1;
......@@ -1086,7 +1108,6 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
} // dl_pow_off[CC_id][UE_id] ! = 0
}
}
}
......@@ -1335,6 +1356,8 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
// if this UE has UL traffic
if (UE_template->ul_total_buffer > 0 ) {
/* start with 3 RB => rb_table_index = 2 */
rb_table_index = 2;
tbs = mac_xface->get_TBS_UL(mcs,3); // 1 or 2 PRB with cqi enabled does not work well!
// fixme: set use_srs flag
tx_power= mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,frame_parms->Ncp,0);
......@@ -1377,12 +1400,19 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
UE_template->pre_allocated_rb_table_index_ul,
UE_template->pre_allocated_nb_rb_ul,
UE_template->phr_info,tx_power);
} else {
/* if UE has pending scheduling request then pre-allocate 3 RBs */
//if (UE_template->ul_active == 1 && UE_template->ul_SR == 1) {
if (UE_is_to_be_scheduled(module_idP, CC_id, i)) {
UE_template->pre_allocated_rb_table_index_ul = 2;
UE_template->pre_allocated_nb_rb_ul = 3;
} else {
UE_template->pre_allocated_rb_table_index_ul=-1;
UE_template->pre_allocated_nb_rb_ul=0;
}
}
}
}
}
struct sort_ue_ul_params {
......
openair2/RRC/LITE/MESSAGES/asn1_msg.c
View file @ b3a98b89
......@@ -1680,7 +1680,7 @@ do_RRCConnectionSetup(
// SchedulingRequestConfig
physicalConfigDedicated2->schedulingRequestConfig->present = SchedulingRequestConfig_PR_setup;
physicalConfigDedicated2->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex = 3;//ue_context_pP->local_uid;
physicalConfigDedicated2->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex = 71 - ue_context_pP->local_uid/10;//ue_context_pP->local_uid;
if (frame_parms->frame_type == 0) { // FDD
physicalConfigDedicated2->schedulingRequestConfig->choice.setup.sr_ConfigIndex = 5+(ue_context_pP->local_uid%10); // Isr = 5 (every 10 subframes, offset=2+UE_id mod3)
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band7.tm1.50PRB.if4p5-ercom.conf
View file @ b3a98b89
......@@ -48,7 +48,7 @@ eNBs =
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -29;
......
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