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lizhongxiao
OpenXG UE
Commits
c3f1cf9d
Commit
c3f1cf9d
authored
Apr 27, 2021
by
rmagueta
Browse files
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Plain Diff
Fix build issues after merge
parent
d5a79e6b
Changes
6
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6 changed files
with
12 additions
and
16 deletions
+12
-16
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+0
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+3
-6
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+6
-6
No files found.
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
c3f1cf9d
...
...
@@ -70,7 +70,6 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
uint16_t
monitoringSymbolsWithinSlot
=
0
;
uint8_t
coreset_id
=
1
;
int
sps
=
0
;
def_dci_pdu_rel15
=
calloc
(
1
,
2
*
sizeof
(
dci_pdu_rel15_t
));
AssertFatal
(
mac
->
scc
==
NULL
||
mac
->
scc_SIB
==
NULL
,
"both scc and scc_SIB cannot be non-null
\n
"
);
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
c3f1cf9d
...
...
@@ -430,7 +430,7 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
LOG_D
(
MAC
,
"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)
\n
"
,
dci
->
rnti
,
dci
->
dci_format
,
dci
->
n_CCE
,
dci
->
payloadSize
,
*
(
unsigned
long
long
*
)
dci
->
payloadBits
);
int8_t
ret
=
nr_extract_dci_info
(
mac
,
dci
->
dci_format
,
dci
->
payloadSize
,
dci
->
rnti
,
(
uint64_t
*
)
dci
->
payloadBits
,
&
mac
->
def_dci_pdu_rel15
[
dci
->
dci_format
])
)
;
int8_t
ret
=
nr_extract_dci_info
(
mac
,
dci
->
dci_format
,
dci
->
payloadSize
,
dci
->
rnti
,
(
uint64_t
*
)
dci
->
payloadBits
,
&
mac
->
def_dci_pdu_rel15
[
dci
->
dci_format
]);
if
((
ret
&
1
)
==
1
)
return
-
1
;
else
if
(
ret
==
2
)
dci
->
dci_format
=
NR_UL_DCI_FORMAT_0_0
;
return
(
nr_ue_process_dci
(
module_id
,
cc_id
,
gNB_index
,
frame
,
slot
,
&
mac
->
def_dci_pdu_rel15
[
dci
->
dci_format
],
dci
->
rnti
,
dci
->
dci_format
));
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
c3f1cf9d
...
...
@@ -71,8 +71,8 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
const
int
symb_dlMixed
=
tdd
?
(
1
<<
tdd
->
nrofDownlinkSymbols
)
-
1
:
0
;
const
int
target_ss
=
NR_SearchSpace__searchSpaceType_PR_ue_Specific
;
const
NR_SearchSpace_t
*
search_space
=
get_searchspace
(
bwp
,
target_ss
);
const
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
bwp
,
search_space
,
1
/* dedicated */
);
const
NR_SearchSpace_t
*
search_space
=
get_searchspace
(
scc
,
bwp
->
bwp_Dedicated
,
target_ss
);
const
NR_ControlResourceSet_t
*
coreset
=
get_coreset
(
scc
,
bwp
,
search_space
,
1
/* dedicated */
);
// get coreset symbol "map"
const
uint16_t
symb_coreset
=
(
1
<<
coreset
->
duration
)
-
1
;
...
...
@@ -510,7 +510,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
* allocation after CCE alloc fail would be more complex) */
const
bool
alloc
=
nr_acknack_scheduling
(
module_id
,
UE_id
,
frame
,
slot
);
const
bool
alloc
=
nr_acknack_scheduling
(
module_id
,
UE_id
,
frame
,
slot
,
-
1
);
if
(
!
alloc
)
{
LOG_D
(
MAC
,
"%s(): could not find PUCCH for UE %d/%04x@%d.%d
\n
"
,
...
...
@@ -1211,8 +1211,5 @@ void nr_schedule_ue_spec(module_id_t module_id,
gNB_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
++
;
gNB_mac
->
TX_req
[
CC_id
].
SFN
=
frame
;
gNB_mac
->
TX_req
[
CC_id
].
Slot
=
slot
;
/* mark UE as scheduled */
memset
(
sched_pdsch
,
0
,
sizeof
(
*
sched_pdsch
));
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
c3f1cf9d
...
...
@@ -1842,7 +1842,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
const
int
bwp_id
=
1
;
sched_ctrl
->
active_bwp
=
bwpList
?
bwpList
->
list
.
array
[
bwp_id
-
1
]
:
NULL
;
const
int
target_ss
=
NR_SearchSpace__searchSpaceType_PR_ue_Specific
;
sched_ctrl
->
search_space
=
get_searchspace
(
sched_ctrl
->
active_bwp
,
target_ss
);
sched_ctrl
->
search_space
=
get_searchspace
(
NULL
,
sched_ctrl
->
active_bwp
,
target_ss
);
sched_ctrl
->
coreset
=
get_coreset
(
NULL
,
sched_ctrl
->
active_bwp
,
sched_ctrl
->
search_space
,
1
/* dedicated */
);
const
struct
NR_UplinkConfig__uplinkBWP_ToAddModList
*
ubwpList
=
servingCellConfig
?
servingCellConfig
->
uplinkConfig
->
uplinkBWP_ToAddModList
:
NULL
;
if
(
ubwpList
)
AssertFatal
(
ubwpList
->
list
.
count
==
1
,
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
View file @
c3f1cf9d
...
...
@@ -1283,7 +1283,7 @@ bool nr_acknack_scheduling(int mod_id,
memset
(
pucch
,
0
,
sizeof
(
*
pucch
));
pucch
->
frame
=
s
==
n_slots_frame
-
1
?
(
f
+
1
)
%
1024
:
f
;
pucch
->
ul_slot
=
(
s
+
1
)
%
n_slots_frame
;
return
nr_acknack_scheduling
(
mod_id
,
UE_id
,
frame
,
slot
);
return
nr_acknack_scheduling
(
mod_id
,
UE_id
,
frame
,
slot
,
-
1
);
}
// Find the right timing_indicator value.
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
c3f1cf9d
...
...
@@ -117,7 +117,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
const
struct
NR_PUSCH_TimeDomainResourceAllocationList
*
tdaList
=
ubwp
->
bwp_Common
->
pusch_ConfigCommon
->
choice
.
setup
->
pusch_TimeDomainAllocationList
;
AssertFatal
(
tdaList
->
list
.
count
>=
3
,
"need to have at least three TDAs for UL slots
\n
"
);
const
NR_PUSCH_TimeDomainResourceAllocation_t
*
tdaP_UL
=
tdaList
->
list
.
array
[
0
];
const
int
k2
=
get_K2
(
ubwp
,
/* tda = */
0
,
mu
);
const
int
k2
=
get_K2
(
scc
,
ubwp
,
/* tda = */
0
,
mu
);
int
start
,
len
;
SLIV2SL
(
tdaP_UL
->
startSymbolAndLength
,
&
start
,
&
len
);
const
uint16_t
symb_tda
=
((
1
<<
len
)
-
1
)
<<
start
;
...
...
@@ -129,10 +129,10 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
// get largest time domain allocation (TDA) for UL slot and UL in mixed slot
int
tdaMi
=
-
1
;
const
NR_PUSCH_TimeDomainResourceAllocation_t
*
tdaP_Mi
=
tdaList
->
list
.
array
[
1
];
AssertFatal
(
k2
==
get_K2
(
ubwp
,
/* tda = */
1
,
mu
),
AssertFatal
(
k2
==
get_K2
(
scc
,
ubwp
,
/* tda = */
1
,
mu
),
"scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)
\n
"
,
k2
,
get_K2
(
ubwp
,
/* tda = */
1
,
mu
));
get_K2
(
scc
,
ubwp
,
/* tda = */
1
,
mu
));
SLIV2SL
(
tdaP_Mi
->
startSymbolAndLength
,
&
start
,
&
len
);
const
uint16_t
symb_tda_mi
=
((
1
<<
len
)
-
1
)
<<
start
;
// check whether PUCCH and TDA overlap: then, we cannot use it. Also, check
...
...
@@ -368,9 +368,9 @@ void nr_process_mac_pdu(module_id_t module_idP,
mac_sdu_len
=
(
uint16_t
)((
NR_MAC_SUBHEADER_SHORT
*
)
pdu_ptr
)
->
L
;
mac_subheader_len
=
2
;
}
LOG_
D
(
NR_MAC
,
"[UE %d] Frame %d : ULSCH -> UL-DCCH %d (gNB %d, %d bytes), rnti: %d
\n
"
,
module_idP
,
frameP
,
rx_lcid
,
module_idP
,
mac_sdu_len
,
rnti
);
LOG_
E
(
NR_MAC
,
"[UE %d] Frame %d : ULSCH -> UL-DCCH %d (gNB %d, %d bytes), rnti: %d
\n
"
,
module_idP
,
frameP
,
rx_lcid
,
module_idP
,
mac_sdu_len
,
*
UE_info
->
rnti
);
mac_rlc_data_ind
(
module_idP
,
rnti
,
*
UE_info
->
rnti
,
module_idP
,
frameP
,
ENB_FLAG_YES
,
...
...
@@ -1147,7 +1147,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const
int
tda
=
nr_mac
->
preferred_ul_tda
[
sched_ctrl
->
active_ubwp
->
bwp_Id
][
slot
];
if
(
tda
<
0
)
return
false
;
int
K2
=
get_K2
(
sched_ctrl
->
active_ubwp
,
tda
,
mu
);
int
K2
=
get_K2
(
sc
c
,
sc
hed_ctrl
->
active_ubwp
,
tda
,
mu
);
const
int
sched_frame
=
frame
+
(
slot
+
K2
>=
nr_slots_per_frame
[
mu
]);
const
int
sched_slot
=
(
slot
+
K2
)
%
nr_slots_per_frame
[
mu
];
if
(
!
is_xlsch_in_slot
(
nr_mac
->
ulsch_slot_bitmap
[
slot
/
64
],
sched_slot
))
...
...
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