Commit 07349091 authored by Raymond Knopp's avatar Raymond Knopp

Merge branch 'l1-sidelink' of https://gitlab.eurecom.fr/matzakos/LTE-D2D into l1-sidelink

parents 6aeae39a 039232ba
This diff is collapsed.
......@@ -60,6 +60,13 @@ int initial_syncSL(PHY_VARS_UE *ue) {
if (rx_psbch(ue) == -1) {
ue->slbch_errors++;
/*
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata_syncSL[0][0],40*ue->frame_parms.samples_per_tti,1,1);
write_output("corr0.m","rxsync0",sync_corr_ue0,40*ue->frame_parms.samples_per_tti,1,2);
write_output("corr1.m","rxsync1",sync_corr_ue1,40*ue->frame_parms.samples_per_tti,1,2);
exit(-1);
*/
return(-1);
}
else {
......@@ -80,7 +87,8 @@ int initial_syncSL(PHY_VARS_UE *ue) {
}
}
else {
write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][ue->frame_parms.samples_per_tti*subframe],ue->frame_parms.samples_per_tti,1,1);
/*write_output("rxsig0.m","rxs0",&ue->common_vars.rxdata[0][ue->frame_parms.samples_per_tti*subframe],ue->frame_parms.samples_per_tti,1,1);
exit(-1);
*/
}
}
......@@ -42,7 +42,7 @@
#define PSBCH_A 40
#define PSBCH_E 1008 //12REs/PRB*6PRBs*7symbols*2 bits/RB
#define PSBCH_DEBUG 1
//#define PSBCH_DEBUG 1
......@@ -149,7 +149,7 @@ int rx_psbch(PHY_VARS_UE *ue) {
ru_tmp.N_TA_offset=0;
ru_tmp.common.rxdata_7_5kHz = (int32_t**)malloc16(ue->frame_parms.nb_antennas_rx*sizeof(int32_t*));
for (int aa=0;aa<ue->frame_parms.nb_antennas_rx;aa++)
ru_tmp.common.rxdata_7_5kHz[aa] = (int32_t*)&ue->common_vars.rxdata_syncSL[aa][ue->rx_offsetSL*2];
ru_tmp.common.rxdata_7_5kHz[aa] = ue->sl_rxdata_7_5kHz[aa];//(int32_t*)&ue->common_vars.rxdata_syncSL[aa][ue->rx_offsetSL*2];
ru_tmp.common.rxdataF = (int32_t**)rxdataF;
ru_tmp.nb_rx = ue->frame_parms.nb_antennas_rx;
......
......@@ -96,12 +96,14 @@ int slpss_ch_est(PHY_VARS_UE *ue,
int32_t sss0_ext[4][72],
int32_t pss1_ext[4][72],
int32_t sss1_ext[4][72],
int64_t sss0_comp[72],
int64_t sss1_comp[72],
int Nid2)
{
int16_t *pss;
int16_t *pss0_ext2,*sss0_ext2,*sss0_ext3,*sss1_ext3,tmp0_re,tmp0_im,tmp1_re,tmp1_im,tmp0_re2,tmp0_im2,tmp1_re2,tmp1_im2;
int16_t *pss0_ext2,*sss0_ext2,tmp0_re,tmp0_im,tmp1_re,tmp1_im;
int32_t *sss0comp,*sss1comp,tmp0_re2,tmp0_im2,tmp1_re2,tmp1_im2;
int16_t *pss1_ext2,*sss1_ext2;
uint8_t aarx,i;
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
......@@ -121,8 +123,8 @@ int slpss_ch_est(PHY_VARS_UE *ue,
break;
}
sss0_ext3 = (int16_t*)&sss0_ext[0][5];
sss1_ext3 = (int16_t*)&sss1_ext[0][5];
sss0comp = (int32_t*)&sss0_comp[5];
sss1comp = (int32_t*)&sss1_comp[5];
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
......@@ -139,31 +141,33 @@ int slpss_ch_est(PHY_VARS_UE *ue,
tmp1_re = (int16_t)((((pss1_ext2[i<<1]) * (int32_t)pss[i<<1])>>15) + (((pss1_ext2[1+(i<<1)]) * (int32_t)pss[1+(i<<1)])>>15));
tmp1_im = (int16_t)((((pss1_ext2[i<<1]) * (int32_t)pss[1+(i<<1)])>>15) - (((pss1_ext2[1+(i<<1)]) * (int32_t)pss[(i<<1)])>>15));
// printf("H*(%d,%d) : (%d,%d)\n",aarx,i,tmp_re,tmp_im);
//printf("H*(%d,%d) : (%d,%d)\n",aarx,i,tmp0_re,tmp0_im);
// This is R(SSS0) \cdot H*(PSS)
tmp0_re2 = (int16_t)(((tmp0_re * (int32_t)sss0_ext2[i<<1])>>12) -
((tmp0_im * (int32_t)sss0_ext2[1+(i<<1)])>>12));
tmp0_im2 = (int16_t)(((tmp0_re * (int32_t)sss0_ext2[1+(i<<1)])>>12) +
((tmp0_im * (int32_t)sss0_ext2[(i<<1)])>>12));
tmp0_re2 = (tmp0_re * (int32_t)sss0_ext2[i<<1]) -
(tmp0_im * (int32_t)sss0_ext2[1+(i<<1)]);
tmp0_im2 = (tmp0_re * (int32_t)sss0_ext2[1+(i<<1)]) +
(tmp0_im * (int32_t)sss0_ext2[(i<<1)]);
// This is R(SSS1) \cdot H*(PSS)
tmp1_re2 = (int16_t)(((tmp1_re * (int32_t)sss1_ext2[i<<1])>>12) -
((tmp1_im * (int32_t)sss1_ext2[1+(i<<1)])>>12));
tmp1_im2 = (int16_t)(((tmp1_re * (int32_t)sss1_ext2[1+(i<<1)])>>12) +
((tmp1_im * (int32_t)sss1_ext2[(i<<1)])>>12));
tmp1_re2 = (tmp1_re * (int32_t)sss1_ext2[i<<1]) -
(tmp1_im * (int32_t)sss1_ext2[1+(i<<1)]);
tmp1_im2 = (tmp1_re * (int32_t)sss1_ext2[1+(i<<1)]) +
(tmp1_im * (int32_t)sss1_ext2[(i<<1)]);
// printf("SSSi(%d,%d) : (%d,%d)\n",aarx,i,sss_ext2[i<<1],sss_ext2[1+(i<<1)]);
// printf("SSSo(%d,%d) : (%d,%d)\n",aarx,i,tmp_re2,tmp_im2);
//printf("SSScomp0(%d,%d) : (%d,%d)\n",aarx,i,tmp0_re2,tmp0_im2);
//printf("SSScomp1(%d,%d) : (%d,%d)\n",aarx,i,tmp1_re2,tmp1_im2);
// MRC on RX antennas
if (aarx==0) {
sss0_ext3[i<<1] = tmp0_re2;
sss0_ext3[1+(i<<1)] = tmp0_im2;
sss1_ext3[i<<1] = tmp1_re2;
sss1_ext3[1+(i<<1)] = tmp1_im2;
sss0comp[i<<1] = tmp0_re2;
sss0comp[1+(i<<1)] = tmp0_im2;
sss1comp[i<<1] = tmp1_re2;
sss1comp[1+(i<<1)] = tmp1_im2;
} else {
sss0_ext3[i<<1] += tmp0_re2;
sss0_ext3[1+(i<<1)] += tmp0_im2;
sss1_ext3[i<<1] += tmp1_re2;
sss1_ext3[1+(i<<1)] += tmp1_im2;
sss0comp[i<<1] += tmp0_re2;
sss0comp[1+(i<<1)] += tmp0_im2;
sss1comp[i<<1] += tmp1_re2;
sss1comp[1+(i<<1)] += tmp1_im2;
}
}
}
......@@ -207,7 +211,8 @@ int _do_slpss_sss_extract(PHY_VARS_UE *ue,
pss1_symb = 2;
sss0_symb = 11;
sss1_symb = 12;
rxdataF = ue->sl_rxdataF;
rxdataF = (int32_t**)ue->sl_rxdataF;
pss0_rxF = &rxdataF[aarx][(rx_offset + (pss0_symb*(frame_parms->ofdm_symbol_size)))];
sss0_rxF = &rxdataF[aarx][(rx_offset + (sss0_symb*(frame_parms->ofdm_symbol_size)))];
pss1_rxF = &rxdataF[aarx][(rx_offset + (pss1_symb*(frame_parms->ofdm_symbol_size)))];
......@@ -292,6 +297,9 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
uint8_t i;
int32_t pss0_ext[4][72],pss1_ext[4][72];
int32_t sss0_ext[4][72],sss1_ext[4][72];
int64_t sss0_comp[72],sss1_comp[72];
int16_t sss0_comp16[144],sss1_comp16[144];
uint8_t phase;
uint16_t Nid1;
int16_t *sss0,*sss1;
......@@ -319,12 +327,17 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
memcpy((void*)&ru_tmp.frame_parms,(void*)&ue->frame_parms,sizeof(LTE_DL_FRAME_PARMS));
ru_tmp.N_TA_offset=0;
ru_tmp.common.rxdata_7_5kHz = (int32_t**)malloc16(ue->frame_parms.nb_antennas_rx*sizeof(int32_t*));
for (int aa=0;aa<ue->frame_parms.nb_antennas_rx;aa++)
ru_tmp.common.rxdata_7_5kHz[aa] = (int32_t*)&ue->common_vars.rxdata_syncSL[aa][ue->rx_offsetSL*2];
ru_tmp.common.rxdata = (int32_t**)malloc16(ue->frame_parms.nb_antennas_rx*sizeof(int32_t*));
for (int aa=0;aa<ue->frame_parms.nb_antennas_rx;aa++) {
ru_tmp.common.rxdata_7_5kHz[aa] = (int32_t*)ue->sl_rxdata_7_5kHz[aa];
ru_tmp.common.rxdata[aa] = (int32_t*)ue->common_vars.rxdata_syncSL[aa];
}
ru_tmp.common.rxdataF = (int32_t**)rxdataF;
ru_tmp.nb_rx = ue->frame_parms.nb_antennas_rx;
remove_7_5_kHz(&ru_tmp,0);
remove_7_5_kHz(&ru_tmp,1);
// PSS
slot_fep_ul(&ru_tmp,1,0,0);
slot_fep_ul(&ru_tmp,2,0,0);
......@@ -333,6 +346,7 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
slot_fep_ul(&ru_tmp,5,1,0);
free(ru_tmp.common.rxdata_7_5kHz);
free(ru_tmp.common.rxdata);
} else { // TDD
AssertFatal(1==0,"TDD not supported for Sidelink\n");
}
......@@ -345,8 +359,12 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
0);
// write_output("rxdataF0.m","rxF0",&rxdataF[0][0],2*14*ue->frame_parms.ofdm_symbol_size,1,1);
write_output("pss0_ext.m","pss0ext",pss0_ext,72,1,1);
/* write_output("pss0_ext.m","pss0ext",pss0_ext,72,1,1);
write_output("sss0_ext.m","sss0ext",sss0_ext,72,1,1);
write_output("pss1_ext.m","pss1ext",pss1_ext,72,1,1);
write_output("sss1_ext.m","sss1ext",sss1_ext,72,1,1); */
// exit(-1);
......@@ -358,18 +376,40 @@ int rx_slsss(PHY_VARS_UE *ue,int32_t *tot_metric,uint8_t *phase_max,int Nid2)
sss0_ext,
pss1_ext,
sss1_ext,
sss0_comp,
sss1_comp,
Nid2);
write_output("sss0_comp0.m","sss0comp0",sss0_ext,72,1,1);
write_output("sss1_comp0.m","sss1comp0",sss1_ext,72,1,1);
// rescale from 64 to 16 bit resolution keeping 8 bits of dynamic range
uint32_t maxval=0;
int32_t *sss0comp=(int32_t*)sss0_comp,*sss1comp=(int32_t*)sss1_comp;
for (i=10;i<134;i++) {
if (sss0comp[i] >=0) maxval=(uint64_t)max(maxval,sss0comp[i]);
else maxval=(uint64_t)max(maxval,-sss0comp[i]);
if (sss1comp[i] >=0) maxval=(uint64_t)max(maxval,sss1comp[i]);
else maxval=(uint64_t)max(maxval,-sss1comp[i]);
}
uint8_t log2maxval = log2_approx64(maxval);
uint8_t shift;
if (log2maxval < 8) shift = 0; else shift = log2maxval-8;
for (i=0;i<144;i++) {
sss0_comp16[i] = (int16_t)(sss0comp[i]>>shift);
sss1_comp16[i] = (int16_t)(sss1comp[i]>>shift);
}
/*write_output("sss0_comp0.m","sss0comp0",sss0_comp16,72,1,1);
write_output("sss1_comp0.m","sss1comp0",sss1_comp16,72,1,1);*/
// exit(-1);
// now do the SSS detection based on the precomputed sequences in PHY/LTE_TRANSPORT/sss.h
*tot_metric = -99999999;
sss0 = (int16_t*)&sss0_ext[0][5];
sss1 = (int16_t*)&sss1_ext[0][5];
sss0 = &sss0_comp16[10];
sss1 = &sss1_comp16[10];
for (phase=0; phase<7; phase++) { // phase offset between PSS and SSS
......
......@@ -65,6 +65,9 @@ extern const int16_t *primary_synch1_time; //!< index: [0..ofdm_symbol_size*2[
extern const int16_t *primary_synch2_time; //!< index: [0..ofdm_symbol_size*2[
extern const int16_t *primary_synch0SL_time;
extern const int16_t *primary_synch1SL_time;
extern int16_t *primary_synch0SL_time_rx;
extern int16_t *primary_synch1SL_time_rx;
extern int *sync_corr_ue0; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue1; //!< index [0..10*samples_per_tti[
extern int *sync_corr_ue2; //!< index [0..10*samples_per_tti[
......
......@@ -40,6 +40,8 @@ const int16_t *primary_synch2_time;
const int16_t *primary_synch0SL_time;
const int16_t *primary_synch1SL_time;
int16_t *primary_synch0SL_time_rx;
int16_t *primary_synch1SL_time_rx;
#include "PHY/CODING/vars.h"
......
......@@ -354,14 +354,15 @@ int main(int argc, char **argv) {
UE->slss_generated=0;
frame = absSF/10;
subframe= absSF%10;
if (do_SLSS==0) {
check_and_generate_psdch(UE,frame,subframe);
UE->slsch_active = 1;
check_and_generate_pscch(UE,frame,subframe);
proc.subframe_tx = subframe;
proc.frame_tx = frame;
check_and_generate_pssch(UE,&proc,frame,subframe);
}
check_and_generate_slss(UE,frame,subframe);
if (UE->psdch_generated>0 || UE->pscch_generated > 0 || UE->pssch_generated > 0 || UE->slss_generated > 0) {
AssertFatal(UE->pscch_generated<3,"Illegal pscch_generated %d\n",UE->pscch_generated);
// FEP
......
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