Commit 22d43925 authored by cig's avatar cig Committed by Thomas Schlichter

Changes to the logic in nr_ue_dl_indication and nr_ue_prach_scheduler

parent 0d6e8ea0
...@@ -408,8 +408,6 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -408,8 +408,6 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers; scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid; scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
//nr_ue_prach_scheduler(mod_id, proc->frame_rx, proc->nr_tti_rx);
nr_ue_scheduled_response(&scheduled_response); nr_ue_scheduled_response(&scheduled_response);
if (UE->mode != loop_through_memory) { if (UE->mode != loop_through_memory) {
...@@ -474,23 +472,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) { ...@@ -474,23 +472,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
pdcp_fifo_flush_sdus(&ctxt); pdcp_fifo_flush_sdus(&ctxt);
} }
} }
// no UL for now
/*
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
*/
} }
/*! /*!
...@@ -507,11 +488,15 @@ typedef struct processingData_s { ...@@ -507,11 +488,15 @@ typedef struct processingData_s {
} processingData_t; } processingData_t;
void UE_processing(void *arg) { void UE_processing(void *arg) {
processingData_t *rxtxD=(processingData_t *) arg; processingData_t *rxtxD = (processingData_t *) arg;
UE_nr_rxtx_proc_t *proc = &rxtxD->proc; UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE; PHY_VARS_NR_UE *UE = rxtxD->UE;
uint8_t gNB_id = 0; uint8_t gNB_id = 0, CC_id = 0;
module_id_t mod_id = 0;
nr_uplink_indication_t ul_indication;
memset((void*)&ul_indication, 0, sizeof(ul_indication));
// params for UL time alignment procedure // params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id]; NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
...@@ -538,6 +523,19 @@ void UE_processing(void *arg) { ...@@ -538,6 +523,19 @@ void UE_processing(void *arg) {
processSlotRX(UE, proc); processSlotRX(UE, proc);
if (UE->mac_enabled == 1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
ul_indication.module_id = mod_id;
ul_indication.gNB_index = gNB_id;
ul_indication.cc_id = CC_id;
ul_indication.frame = proc->frame_rx;
ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&ul_indication);
}
}
processSlotTX(UE, proc); processSlotTX(UE, proc);
} }
......
...@@ -766,9 +766,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -766,9 +766,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric; NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
config_index = rach_ConfigGeneric->prach_ConfigurationIndex; config_index = rach_ConfigGeneric->prach_ConfigurationIndex;
////nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0]; if (is_nr_UL_slot(scc, slotP)) {
if (is_nr_DL_slot(scc, slotP) == 1) {
if (setup->msg1_SubcarrierSpacing) if (setup->msg1_SubcarrierSpacing)
mu = *setup->msg1_SubcarrierSpacing; mu = *setup->msg1_SubcarrierSpacing;
...@@ -810,7 +808,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -810,7 +808,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PRACH; ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PRACH;
prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu; prach_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].prach_config_pdu;
memset(prach_config_pdu,0,sizeof(fapi_nr_ul_config_prach_pdu)); memset(prach_config_pdu, 0, sizeof(fapi_nr_ul_config_prach_pdu));
ul_config->number_pdus += 1; ul_config->number_pdus += 1;
ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig); ncs = get_NCS(rach_ConfigGeneric->zeroCorrelationZoneConfig, format0, setup->restrictedSetConfig);
...@@ -886,6 +884,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s ...@@ -886,6 +884,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
} }
} }
} }
mac->scheduled_response.ul_config = ul_config;
} }
} }
......
...@@ -122,6 +122,9 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ ...@@ -122,6 +122,9 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
ul_info->ssb_index, ul_info->ssb_index,
0, 0); // TODO check tx/rx frame/slot is need for NR version 0, 0); // TODO check tx/rx frame/slot is need for NR version
/*if (is_nr_UL_slot(mac->scc, ul_info->slot))
nr_ue_prach_scheduler(module_id, ul_info->frame, ul_info->slot);*/ // WIP TbD set tx frame/slot
switch(ret){ switch(ret){
case UE_CONNECTION_OK: case UE_CONNECTION_OK:
break; break;
...@@ -135,7 +138,6 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){ ...@@ -135,7 +138,6 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
break; break;
} }
mac->if_module->scheduled_response(&mac->scheduled_response); mac->if_module->scheduled_response(&mac->scheduled_response);
return 0; return 0;
......
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