Commit 39c0a57c authored by Nick Ho's avatar Nick Ho

Warning fixed, Add new rx_tx scheme

parent b46c3399
......@@ -166,79 +166,18 @@ struct DCIFormatN2_Pag{
typedef struct DCIFormatN2_Pag DCIFormatN2_Pag_t;
#define sizeof_DCIFormatN2_Pag_t 15
// struct DCI0_5MHz_TDD0 {
// /// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
// uint32_t type:1;
// /// Hopping flag
// uint32_t hopping:1;
// /// RB Assignment (ceil(log2(N_RB_UL*(N_RB_UL+1)/2)) bits)
// uint32_t rballoc:9;
// /// Modulation and Coding Scheme and Redundancy Version
// uint32_t mcs:5;
// /// New Data Indicator
// uint32_t ndi:1;
// /// Power Control
// uint32_t TPC:2;
// /// Cyclic shift
// uint32_t cshift:3;
// /// DAI (TDD)
// uint32_t ulindex:2;
// /// CQI Request
// uint32_t cqi_req:1;
// /// Padding to get to size of DCI1A
// uint32_t padding:2;
// } __attribute__ ((__packed__));
// typedef struct DCI0_5MHz_TDD0 DCI0_5MHz_TDD0_t;
// #define sizeof_DCI0_5MHz_TDD_0_t 27
//Not sure if needed in NB-IoT
// struct DCI_INFO_EXTRACTED {
// /// type = 0 => DCI Format 0, type = 1 => DCI Format 1A
// uint8_t type;
// /// Resource Allocation Header
// uint8_t rah;
// /// HARQ Process
// uint8_t harq_pid;
// /// CQI Request
// uint8_t cqi_req;
// /// SRS Request
// uint8_t srs_req;
// /// Power Control
// uint8_t TPC;
// /// Localized/Distributed VRB
// uint8_t vrb_type;
// /// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
// uint32_t rballoc;
// // Applicable only when vrb_type = 1
// uint8_t Ngap;
// /// Cyclic shift
// uint8_t cshift;
// /// Hopping flag
// uint8_t hopping;
// /// Downlink Assignment Index
// uint8_t dai;
// /// DAI (TDD)
// uint8_t ulindex;
// /// TB swap
// uint8_t tb_swap;
// /// TPMI information for precoding
// uint8_t tpmi;
// /// Redundancy version 2
// uint8_t rv2;
// /// New Data Indicator 2
// uint8_t ndi2;
// /// Modulation and Coding Scheme and Redundancy Version 2
// uint8_t mcs2;
// /// Redundancy version 1
// uint8_t rv1;
// /// New Data Indicator 1
// uint8_t ndi1;
// /// Modulation and Coding Scheme and Redundancy Version 1
// uint8_t mcs1;
// /// Scrambling ID
// uint64_t ap_si_nl_id:3;
// };
// typedef struct DCI_INFO_EXTRACTED DCI_INFO_EXTRACTED_t;
typedef union DCI_CONTENT {
//
DCIFormatN0_t DCIN0;
//
DCIFormatN1_t DCIN1;
//
DCIFormatN1_RA_t DCIN1_RA;
//
DCIFormatN1_RAR_t DCIN1_RAR;
//
DCIFormatN2_Ind_t DCIN2_Ind;
//
DCIFormatN2_Pag_t DCIN2_Pag;
}DCI_CONTENT;
\ No newline at end of file
......@@ -680,30 +680,26 @@ void NB_phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,con
}
#endif
//}
#ifdef EMOS
phy_procedures_emos_eNB_RX(subframe,eNB);
#endif
#if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_SF_TRIGGER
//Send subframe trigger to the controller
if (mac_agent_registered[eNB->Mod_id]) {
agent_mac_xface[eNB->Mod_id]->flexran_agent_send_sf_trigger(eNB->Mod_id);
}
#endif
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX_UESPEC+offset, 0 );
stop_meas(&eNB->phy_proc_rx);
/*Exact not here, but use to debug*/
UL_INDICATION(UL_Info);
UL_indication(UL_Info);
}
#undef DEBUG_PHY_PROC
void NB_phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
PHY_VARS_RN *rn,
int do_meas)
{
}
\ No newline at end of file
......@@ -10,6 +10,8 @@
#include "platform_types.h"
#include "openair1/PHY/LTE_TRANSPORT/dci_nb_iot.h"
#define NUMBER_OF_UE_MAX 20
typedef struct{
......@@ -62,6 +64,7 @@ typedef struct{
}UL_IND_t;
typedef struct{
/*Common part*/
......@@ -83,19 +86,8 @@ typedef struct{
/*DCI start*/
// Format of DCI
uint8_t DCI_Format;
//
DCIFormatN0_t DCIN0;
//
DCIFormatN1_t DCIN1;
//
DCIFormatN1_RA_t DCIN1_RA;
//
DCIFormatN1_RAR_t DCIN1_RAR;
//
DCIFormatN2_Ind_t DCIN2_Ind;
//
DCIFormatN2_Pag_t DCIN2_Pag;
// Content of DCI
DCI_CONTENT DCI_Content;
}Sched_Rsp_t;
......
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