Commit 440e820f authored by cig's avatar cig Committed by Thomas Schlichter

Moved code for timing alignment procedures to PHY UE procedures

- new function called ue_ta_procedures
- this makes the code more easier to read
- small cleanup was also done
parent da9dde5b
...@@ -462,32 +462,13 @@ void UE_processing(void *arg) { ...@@ -462,32 +462,13 @@ void UE_processing(void *arg) {
processingData_t *rxtxD = (processingData_t *) arg; processingData_t *rxtxD = (processingData_t *) arg;
UE_nr_rxtx_proc_t *proc = &rxtxD->proc; UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE; PHY_VARS_NR_UE *UE = rxtxD->UE;
processSlotRX(UE, proc);
processSlotTX(UE, proc);
/* UL time alignment
// If the current tx frame and slot match the TA configuration in ul_time_alignment
// then timing advance is processed and set to be applied in the next UL transmission */
if (UE->mac_enabled == 1) {
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &UE->ul_time_alignment[gNB_id];
int slot_tx = proc->nr_slot_tx; int slot_tx = proc->nr_slot_tx;
int frame_tx = proc->frame_tx; int frame_tx = proc->frame_tx;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) { processSlotRX(UE, proc);
uint8_t numerology = UE->frame_parms.numerology_index; processSlotTX(UE, proc);
uint16_t bwp_ul_NB_RB = UE->frame_parms.N_RB_UL; ue_ta_procedures(UE, slot_tx, frame_tx);
LOG_D(PHY,"Applying timing advance -- frame %d -- slot %d\n", frame_tx, slot_tx);
//if (nfapi_mode!=3){
nr_process_timing_advance(UE->Mod_id, UE->CC_id, ul_time_alignment->ta_command, numerology, bwp_ul_NB_RB);
ul_time_alignment->ta_frame = -1;
ul_time_alignment->ta_slot = -1;
//}
}
}
} }
void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) { void dummyWrite(PHY_VARS_NR_UE *UE,openair0_timestamp timestamp, int writeBlockSize) {
......
...@@ -296,6 +296,13 @@ uint16_t nr_get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1); ...@@ -296,6 +296,13 @@ uint16_t nr_get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1);
int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB); int8_t nr_find_ue(uint16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
/*! \brief UL time alignment procedures for TA application
@param PHY_VARS_NR_UE ue
@param int slot_tx
@param int frame_tx
*/
void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx);
/*! \brief Compute the timing adjustment at UE side from the old TA offset and the new received TA command /*! \brief Compute the timing adjustment at UE side from the old TA offset and the new received TA command
@param Mod_id Local UE index on which to act @param Mod_id Local UE index on which to act
@param CC_id Component Carrier Index @param CC_id Component Carrier Index
......
...@@ -149,6 +149,32 @@ uint16_t get_bw_scaling(uint16_t nb_rb){ ...@@ -149,6 +149,32 @@ uint16_t get_bw_scaling(uint16_t nb_rb){
return bw_scaling; return bw_scaling;
} }
/* UL time alignment
// If the current tx frame and slot match the TA configuration in ul_time_alignment
// then timing advance is processed and set to be applied in the next UL transmission */
void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx){
if (ue->mac_enabled == 1) {
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
uint8_t numerology = ue->frame_parms.numerology_index;
uint16_t bwp_ul_NB_RB = ue->frame_parms.N_RB_UL;
LOG_D(PHY, "In %s: applying timing advance -- frame %d -- slot %d\n", __FUNCTION__, frame_tx, slot_tx);
nr_process_timing_advance(ue->Mod_id, ue->CC_id, ul_time_alignment->ta_command, numerology, bwp_ul_NB_RB);
ul_time_alignment->ta_frame = -1;
ul_time_alignment->ta_slot = -1;
}
}
}
void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB){ void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t ta_command, uint8_t mu, uint16_t bwp_ul_NB_RB){
// 3GPP TS 38.213 p4.2 // 3GPP TS 38.213 p4.2
......
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