Commit 4715308b authored by cig's avatar cig

Msg3 implementation

- extraction of resource allocation from Msg2
- configuration of Msg3 PDU
- Msg3 scheduling
- MAC/PHY interface adaptations
parent 8f09cc6c
...@@ -2974,7 +2974,7 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB ...@@ -2974,7 +2974,7 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
void nr_process_rar(nr_downlink_indication_t *dl_info) { void nr_process_rar(nr_downlink_indication_t *dl_info) {
module_id_t module_id = dl_info->module_id; module_id_t module_id = dl_info->module_id;
int cc_id = dl_info->cc_id, frame_rx = dl_info->proc->frame_rx, nr_tti_rx = dl_info->proc->nr_tti_rx, ta_command, k2, delta; int cc_id = dl_info->cc_id, frame_rx = dl_info->proc->frame_rx, nr_tti_rx = dl_info->proc->nr_tti_rx, ta_command, delta;
uint8_t gNB_index = dl_info->gNB_index; // *rar; uint8_t gNB_index = dl_info->gNB_index; // *rar;
//fapi_nr_dci_indication_t *dci_ind = dl_info->dci_ind; //fapi_nr_dci_indication_t *dci_ind = dl_info->dci_ind;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[module_id][cc_id]; PHY_VARS_NR_UE *ue = PHY_vars_UE_g[module_id][cc_id];
...@@ -3015,6 +3015,7 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) { ...@@ -3015,6 +3015,7 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) {
ta_command = nr_ue_process_rar(ue->Mod_id, ta_command = nr_ue_process_rar(ue->Mod_id,
cc_id, cc_id,
frame_rx, frame_rx,
nr_tti_rx,
dlsch0->harq_processes[0]->b, dlsch0->harq_processes[0]->b,
&ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->pdcch_config[0].rnti, &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][gNB_index]->pdcch_config[0].rnti,
prach_resources->ra_PreambleIndex, prach_resources->ra_PreambleIndex,
...@@ -3031,13 +3032,6 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) { ...@@ -3031,13 +3032,6 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) {
nr_process_timing_advance_rar(ue, dl_info->proc, ta_command); nr_process_timing_advance_rar(ue, dl_info->proc, ta_command);
if (ue->mode != debug_prach) { if (ue->mode != debug_prach) {
ue->ulsch_Msg3_active[gNB_index] = 1;
// TS 38.213 ch 8.3 Msg3 PUSCH
// PUSCH time domain resource allocation A for normal CP
// TS 38.214 ch 6.1.2.1.1
k2 = table_6_1_2_1_1_2_time_dom_res_alloc_A[0][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[0][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[0][2];
switch (mu_pusch) { switch (mu_pusch) {
case 0: case 0:
...@@ -3054,28 +3048,10 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) { ...@@ -3054,28 +3048,10 @@ void nr_process_rar(nr_downlink_indication_t *dl_info) {
break; break;
} }
ue->Msg3_startSymbol[gNB_index] = sliv_S; #ifdef DEBUG_RA
ue->Msg3_Length[gNB_index] = sliv_L; LOG_D(PHY,"[UE %d][RAPROC] Msg3 nr_tti_rx %d delta %d\n", ue->Mod_id, nr_tti_rx, delta);
ue->ulsch_Msg3_subframe[gNB_index] = (nr_tti_rx + k2 + delta) % slots_per_frame; #endif
if (nr_tti_rx + k2 + delta > slots_per_frame){
ue->ulsch_Msg3_frame[gNB_index] = (frame_rx + 1) % 1024;
} else {
ue->ulsch_Msg3_frame[gNB_index] = frame_rx;
}
LOG_D(PHY,"[UE %d][RAPROC] Got Msg3_alloc Frame %d subframe %d: Msg3_frame %d, Msg3_subframe %d\n",
ue->Mod_id,
frame_rx,
nr_tti_rx,
ue->ulsch_Msg3_frame[gNB_index],
ue->ulsch_Msg3_subframe[gNB_index]);
// harq_pid = subframe2harq_pid(&ue->frame_parms,
// ue->ulsch_Msg3_frame[gNB_index],
// ue->ulsch_Msg3_subframe[gNB_index]);
// ue->ulsch[gNB_index]->harq_processes[harq_pid]->round = 0;
// ue->Msg3_timer[gNB_index] = 10;
// ue->ulsch[gNB_index].power_offset = 6;
// ue->ulsch_no_allocation_counter[gNB_index] = 0;
ue->UE_mode[gNB_index] = RA_RESPONSE; ue->UE_mode[gNB_index] = RA_RESPONSE;
} }
} else { } else {
......
...@@ -221,6 +221,10 @@ typedef struct { ...@@ -221,6 +221,10 @@ typedef struct {
uint32_t RA_tx_frame; uint32_t RA_tx_frame;
/// Random-access variable for window calculation (subframe of last change in window counter) /// Random-access variable for window calculation (subframe of last change in window counter)
uint8_t RA_tx_subframe; uint8_t RA_tx_subframe;
/// Scheduled TX frame for RA Msg3
frame_t msg3_frame;
/// Scheduled TX slot for RA Msg3
slot_t msg3_slot;
/// Random-access variable for backoff (frame of last change in backoff counter) /// Random-access variable for backoff (frame of last change in backoff counter)
uint32_t RA_backoff_frame; uint32_t RA_backoff_frame;
/// Random-access variable for backoff (subframe of last change in backoff counter) /// Random-access variable for backoff (subframe of last change in backoff counter)
......
...@@ -197,6 +197,17 @@ and fills the PRACH PDU per each FD occasion. ...@@ -197,6 +197,17 @@ and fills the PRACH PDU per each FD occasion.
*/ */
void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP); void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
/* \brief This function schedules the Msg3 transmission
@param
@param
@param
@returns void
*/
void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
frame_t current_frame,
sub_frame_t current_slot,
uint8_t Msg3_tda_id);
/* \brief Function called by PHY to process the received RAR and check that the preamble matches what was sent by the gNB. It provides the timing advance and t-CRNTI. /* \brief Function called by PHY to process the received RAR and check that the preamble matches what was sent by the gNB. It provides the timing advance and t-CRNTI.
@param Mod_id Index of UE instance @param Mod_id Index of UE instance
@param CC_id Index to a component carrier @param CC_id Index to a component carrier
...@@ -212,6 +223,7 @@ random-access procedure ...@@ -212,6 +223,7 @@ random-access procedure
uint16_t nr_ue_process_rar(module_id_t mod_id, uint16_t nr_ue_process_rar(module_id_t mod_id,
int CC_id, int CC_id,
frame_t frameP, frame_t frameP,
sub_frame_t slotP,
uint8_t * dlsch_buffer, uint8_t * dlsch_buffer,
rnti_t * t_crnti, rnti_t * t_crnti,
uint8_t preamble_index, uint8_t preamble_index,
......
...@@ -895,7 +895,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -895,7 +895,6 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
scheduled_response.slot = rx_slot; scheduled_response.slot = rx_slot;
scheduled_response.ul_config->slot = ul_info->slot_tx; scheduled_response.ul_config->slot = ul_info->slot_tx;
scheduled_response.ul_config->number_pdus = 1;
scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH; scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rnti = rnti; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rnti = rnti;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rb_size = rb_size; scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.rb_size = rb_size;
...@@ -929,11 +928,122 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in ...@@ -929,11 +928,122 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
// Note: Contention resolution is currently not active // Note: Contention resolution is currently not active
if (mac->RA_contention_resolution_timer_active == 1) if (mac->RA_contention_resolution_timer_active == 1)
ue_contention_resolution(mod_id, gNB_index, cc_id, ul_info->frame_tx); ue_contention_resolution(mod_id, gNB_index, cc_id, ul_info->frame_tx);
} else if (get_softmodem_params()->do_ra){
NR_UE_MAC_INST_t *mac = get_mac_inst(ul_info->module_id);
if (ul_info->slot_tx == mac->msg3_slot && ul_info->frame_tx == mac->msg3_frame){
uint8_t ulsch_input_buffer[MAX_ULSCH_PAYLOAD_BYTES];
nr_scheduled_response_t scheduled_response;
scheduled_response.ul_config = &mac->ul_config_request;
scheduled_response.dl_config = NULL;
scheduled_response.ul_config->number_pdus++; //TBR fix
fapi_nr_ul_config_request_pdu_t *ul_config_list = &scheduled_response.ul_config->ul_config_list[scheduled_response.ul_config->number_pdus - 1];
fapi_nr_tx_request_t tx_req;
fapi_nr_tx_request_body_t tx_req_body;
uint16_t TBS_bytes = scheduled_response.ul_config->ul_config_list[scheduled_response.ul_config->number_pdus - 1].pusch_config_pdu.pusch_data.tb_size;
//if (IS_SOFTMODEM_NOS1){
// // Getting IP traffic to be transmitted
// data_existing = nr_ue_get_sdu(mod_id,
// cc_id,
// frame_tx,
// slot_tx,
// 0,
// ulsch_input_buffer,
// TBS_bytes,
// &access_mode);
//}
//Random traffic to be transmitted if there is no IP traffic available for this Tx opportunity
//if (!IS_SOFTMODEM_NOS1 || !data_existing) {
//Use zeros for the header bytes in noS1 mode, in order to make sure that the LCID is not valid
//and block this traffic from being forwarded to the upper layers at the gNB
printf("[DEBUG_MSG3] Random data to be tranmsitted (TBS_bytes %d, pdu_index %d ul_config (%p) list (%p): \n", TBS_bytes, scheduled_response.ul_config->number_pdus - 1, scheduled_response.ul_config, ul_config_list);
//Give the first byte a dummy value (a value not corresponding to any valid LCID based on 38.321, Table 6.2.1-2)
//in order to distinguish the PHY random packets at the MAC layer of the gNB receiver from the normal packets that should
//have a valid LCID (nr_process_mac_pdu function)
ulsch_input_buffer[0] = 0x31;
for (int i = 1; i < TBS_bytes; i++) {
ulsch_input_buffer[i] = (unsigned char) rand();
//printf(" input encoder a[%d]=0x%02x\n",i,harq_process_ul_ue->a[i]);
}
//}
LOG_D(MAC, "[UE %d] Frame %d, Subframe %d Adding Msg3 UL Config Request for rnti: %x\n",
ul_info->module_id,
ul_info->frame_tx,
ul_info->slot_tx,
mac->t_crnti);
// Config UL TX PDU
tx_req.slot = ul_info->slot_tx;
tx_req.sfn = ul_info->frame_tx;
tx_req.number_of_pdus = 1;
tx_req_body.pdu_length = TBS_bytes;
tx_req_body.pdu_index = 0;
tx_req_body.pdu = ulsch_input_buffer;
ul_config_list->pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
scheduled_response.tx_request = &tx_req;
scheduled_response.tx_request->tx_request_body = &tx_req_body;
scheduled_response.module_id = ul_info->module_id;
scheduled_response.CC_id = ul_info->cc_id;
scheduled_response.frame = ul_info->frame_rx;
scheduled_response.slot = ul_info->slot_rx;
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
mac->if_module->scheduled_response(&scheduled_response);
}
}
} }
} }
return UE_CONNECTION_OK; return UE_CONNECTION_OK;
} }
// Scheduling the Msg3 transmission according to according to TS 38.213
// Note: Msg3 tx in the uplink symbols of mixed slot
void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
frame_t current_frame,
sub_frame_t current_slot,
uint8_t Msg3_tda_id){
int delta;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
int mu = ubwp->bwp_Common->genericParameters.subcarrierSpacing;
struct NR_PUSCH_TimeDomainResourceAllocationList *pusch_TimeDomainAllocationList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
// k2 as per 3GPP TS 38.214 version 15.9.0 Release 15 ch 6.1.2.1.1
// PUSCH time domain resource allocation is higher layer configured from uschTimeDomainAllocationList in either pusch-ConfigCommon
uint8_t k2 = *pusch_TimeDomainAllocationList->list.array[Msg3_tda_id]->k2;
switch (mu) {
case 0:
delta = 2;
break;
case 1:
delta = 3;
break;
case 2:
delta = 4;
break;
case 3:
delta = 6;
break;
}
mac->msg3_slot = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
if (current_slot + k2 + delta > nr_slots_per_frame[mu])
mac->msg3_frame = (current_frame + 1) % 1024;
else
mac->msg3_frame = current_frame;
#ifdef DEBUG_MSG3
LOG_D(MAC, "[DEBUG_MSG3] current_slot %d k2 %d delta %d temp_slot %d mac->msg3_frame %d mac->msg3_slot %d \n", current_slot, k2, delta, current_slot + k2 + delta, mac->msg3_frame, mac->msg3_slot);
#endif
}
// This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x // This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211, tables 6.3.3.2.x
// It fills the PRACH PDU per each FD occasion. // It fills the PRACH PDU per each FD occasion.
// PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3. // PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3.
......
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