Commit 4d369a69 authored by Raghavendra Dinavahi's avatar Raghavendra Dinavahi

Sidelink config MAC->PHY, PSBCH scheduler and supporting functions

	- Phy config update and Sidelink frame parameters initialisation
	- PSBCH scheduler to trigger TX PSBCH/RX PSBCH actions
	- Sidelink indication with rx ind to trigger send SL-MIB to MAC
parent 70f586cb
...@@ -312,13 +312,15 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){ ...@@ -312,13 +312,15 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
} }
void init_openair0(void) { void init_openair0(uint8_t is_sidelink) {
int card; int card;
int freq_off = 0; int freq_off = 0;
NR_DL_FRAME_PARMS *frame_parms = &PHY_vars_UE_g[0][0]->frame_parms; NR_DL_FRAME_PARMS *frame_parms = &PHY_vars_UE_g[0][0]->frame_parms;
if (is_sidelink)
frame_parms = &PHY_vars_UE_g[0][0]->SL_UE_PHY_PARAMS.sl_frame_params;
for (card=0; card<MAX_CARDS; card++) { for (card=0; card<MAX_CARDS; card++) {
uint64_t dl_carrier, ul_carrier, sl_carrier; uint64_t dl_carrier, ul_carrier;
openair0_cfg[card].configFilename = NULL; openair0_cfg[card].configFilename = NULL;
openair0_cfg[card].threequarter_fs = frame_parms->threequarter_fs; openair0_cfg[card].threequarter_fs = frame_parms->threequarter_fs;
openair0_cfg[card].sample_rate = frame_parms->samples_per_subframe * 1e3; openair0_cfg[card].sample_rate = frame_parms->samples_per_subframe * 1e3;
...@@ -344,15 +346,14 @@ void init_openair0(void) { ...@@ -344,15 +346,14 @@ void init_openair0(void) {
openair0_cfg[card].rx_num_channels, openair0_cfg[card].rx_num_channels,
duplex_mode[openair0_cfg[card].duplex_mode]); duplex_mode[openair0_cfg[card].duplex_mode]);
if (is_sidelink) {
dl_carrier = frame_parms->dl_CarrierFreq;
ul_carrier = frame_parms->ul_CarrierFreq;
} else
nr_get_carrier_frequencies(PHY_vars_UE_g[0][0], &dl_carrier, &ul_carrier); nr_get_carrier_frequencies(PHY_vars_UE_g[0][0], &dl_carrier, &ul_carrier);
nr_rf_card_config_freq(&openair0_cfg[card], ul_carrier, dl_carrier, freq_off); nr_rf_card_config_freq(&openair0_cfg[card], ul_carrier, dl_carrier, freq_off);
if (get_softmodem_params()->sl_mode == 2) {
nr_get_carrier_frequencies_sl(PHY_vars_UE_g[0][0], &sl_carrier);
nr_rf_card_config_freq(&openair0_cfg[card], sl_carrier, sl_carrier, freq_off);
}
nr_rf_card_config_gain(&openair0_cfg[card], rx_gain_off); nr_rf_card_config_gain(&openair0_cfg[card], rx_gain_off);
openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file; openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file;
...@@ -503,10 +504,6 @@ int main( int argc, char **argv ) { ...@@ -503,10 +504,6 @@ int main( int argc, char **argv ) {
if (!get_softmodem_params()->nsa && get_softmodem_params()->emulate_l1) if (!get_softmodem_params()->nsa && get_softmodem_params()->emulate_l1)
start_oai_nrue_threads(); start_oai_nrue_threads();
if (get_softmodem_params()->sl_mode) {
nr_UE_configure_Sidelink(0, get_softmodem_params()->sync_ref);
}
if (!get_softmodem_params()->emulate_l1) { if (!get_softmodem_params()->emulate_l1) {
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_UE_g[0][CC_id] = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE)); PHY_vars_UE_g[0][CC_id] = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE));
...@@ -536,10 +533,26 @@ int main( int argc, char **argv ) { ...@@ -536,10 +533,26 @@ int main( int argc, char **argv ) {
*mac->scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]); *mac->scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
} }
UE[CC_id]->sl_mode = get_softmodem_params()->sl_mode;
init_nr_ue_vars(UE[CC_id], 0, abstraction_flag); init_nr_ue_vars(UE[CC_id], 0, abstraction_flag);
if (UE[CC_id]->sl_mode) {
AssertFatal(UE[CC_id]->sl_mode == 2, "Only Sidelink mode 2 supported. Mode 1 not yet supported\n");
nr_UE_configure_Sidelink(0, get_softmodem_params()->sync_ref);
DevAssert(mac->if_module != NULL && mac->if_module->sl_phy_config_request != NULL);
sl_nr_ue_phy_params_t *sl_phy = &UE[CC_id]->SL_UE_PHY_PARAMS;
mac->if_module->sl_phy_config_request(&mac->SL_MAC_PARAMS->sl_phy_config);
nr_init_frame_parms_ue_sl(&sl_phy->sl_frame_params,&sl_phy->sl_config,
get_nrUE_params()->threequarter_fs,
get_nrUE_params()->ofdm_offset_divisor);
sl_ue_phy_init(UE[CC_id]);
} }
init_openair0(); }
uint8_t is_sl = (get_softmodem_params()->sl_mode) ? 1 : 0;
init_openair0(is_sl);
// init UE_PF_PO and mutex lock // init UE_PF_PO and mutex lock
pthread_mutex_init(&ue_pf_po_mutex, NULL); pthread_mutex_init(&ue_pf_po_mutex, NULL);
memset (&UE_PF_PO[0][0], 0, sizeof(UE_PF_PO_t)*NUMBER_OF_UE_MAX*MAX_NUM_CCs); memset (&UE_PF_PO[0][0], 0, sizeof(UE_PF_PO_t)*NUMBER_OF_UE_MAX*MAX_NUM_CCs);
......
...@@ -297,8 +297,12 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB) ...@@ -297,8 +297,12 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
// init RX buffers // init RX buffers
common_vars->rxdata = malloc16(fp->nb_antennas_rx * sizeof(c16_t *)); common_vars->rxdata = malloc16(fp->nb_antennas_rx * sizeof(c16_t *));
int num_samples = 2 * fp->samples_per_frame + fp->ofdm_symbol_size;
if (ue->sl_mode == 2)
num_samples = (SL_NR_PSBCH_REPETITION_IN_FRAMES * fp->samples_per_frame) + fp->ofdm_symbol_size;
for (i=0; i<fp->nb_antennas_rx; i++) { for (i=0; i<fp->nb_antennas_rx; i++) {
common_vars->rxdata[i] = malloc16_clear((2 * (fp->samples_per_frame) + fp->ofdm_symbol_size) * sizeof(c16_t)); common_vars->rxdata[i] = malloc16_clear(num_samples * sizeof(c16_t));
} }
// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK) // ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
...@@ -646,7 +650,8 @@ void init_N_TA_offset(PHY_VARS_NR_UE *ue){ ...@@ -646,7 +650,8 @@ void init_N_TA_offset(PHY_VARS_NR_UE *ue){
NR_DL_FRAME_PARMS *fp = &ue->frame_parms; NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
if (fp->frame_type == FDD) { // No timing offset for Sidelink, refer to 3GPP 38.211 Section 8.5
if (fp->frame_type == FDD || ue->sl_mode == 2) {
ue->N_TA_offset = 0; ue->N_TA_offset = 0;
} else { } else {
int N_TA_offset = fp->ul_CarrierFreq < 6e9 ? 400 : 431; // reference samples for 25600Tc @ 30.72 Ms/s for FR1, same @ 61.44 Ms/s for FR2 int N_TA_offset = fp->ul_CarrierFreq < 6e9 ? 400 : 431; // reference samples for 25600Tc @ 30.72 Ms/s for FR1, same @ 61.44 Ms/s for FR2
...@@ -940,6 +945,4 @@ void sl_ue_phy_init(PHY_VARS_NR_UE *UE) { ...@@ -940,6 +945,4 @@ void sl_ue_phy_init(PHY_VARS_NR_UE *UE) {
// Generate PSS time domain samples used for correlation during SLSS reception. // Generate PSS time domain samples used for correlation during SLSS reception.
sl_generate_pss_ifft_samples(&UE->SL_UE_PHY_PARAMS, &UE->SL_UE_PHY_PARAMS.init_params); sl_generate_pss_ifft_samples(&UE->SL_UE_PHY_PARAMS, &UE->SL_UE_PHY_PARAMS.init_params);
init_symbol_rotation(sl_fp);
init_timeshift_rotation(sl_fp);
} }
\ No newline at end of file
This diff is collapsed.
...@@ -29,7 +29,10 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp,uint8_t i_ssb); ...@@ -29,7 +29,10 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp,uint8_t i_ssb);
int nr_init_frame_parms(nfapi_nr_config_request_scf_t *config, NR_DL_FRAME_PARMS *frame_parms); int nr_init_frame_parms(nfapi_nr_config_request_scf_t *config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms, fapi_nr_config_request_t *config, uint16_t nr_band); int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms, fapi_nr_config_request_t *config, uint16_t nr_band);
void nr_init_frame_parms_ue_sa(NR_DL_FRAME_PARMS *frame_parms, uint64_t downlink_frequency, int32_t uplink_frequency_offset, uint8_t mu, uint16_t nr_band); void nr_init_frame_parms_ue_sa(NR_DL_FRAME_PARMS *frame_parms, uint64_t downlink_frequency, int32_t uplink_frequency_offset, uint8_t mu, uint16_t nr_band);
void nr_init_frame_parms_ue_sl(NR_DL_FRAME_PARMS *frame_parms, uint64_t sidelink_frequency, uint16_t nr_band); int nr_init_frame_parms_ue_sl(NR_DL_FRAME_PARMS *fp,
sl_nr_phy_config_request_t* config,
int threequarter_fs,
uint32_t ofdm_offset_divisor);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB); int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB);
void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB); void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB);
void init_nr_ue_transport(PHY_VARS_NR_UE *ue); void init_nr_ue_transport(PHY_VARS_NR_UE *ue);
...@@ -58,5 +61,4 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue); ...@@ -58,5 +61,4 @@ void phy_init_nr_top(PHY_VARS_NR_UE *ue);
void phy_term_nr_top(void); void phy_term_nr_top(void);
void sl_ue_phy_init(PHY_VARS_NR_UE *UE); void sl_ue_phy_init(PHY_VARS_NR_UE *UE);
void sl_ue_phy_init(PHY_VARS_NR_UE *UE);
#endif #endif
...@@ -601,7 +601,7 @@ void init_symbol_rotation(NR_DL_FRAME_PARMS *fp) { ...@@ -601,7 +601,7 @@ void init_symbol_rotation(NR_DL_FRAME_PARMS *fp) {
uint64_t dl_CarrierFreq = fp->dl_CarrierFreq; uint64_t dl_CarrierFreq = fp->dl_CarrierFreq;
uint64_t ul_CarrierFreq = fp->ul_CarrierFreq; uint64_t ul_CarrierFreq = fp->ul_CarrierFreq;
uint64_t sl_CarrierFreq = fp->sl_CarrierFreq; uint64_t sl_CarrierFreq = fp->sl_CarrierFreq;
double f[2] = {(double)dl_CarrierFreq, (double)ul_CarrierFreq}; double f[3] = {(double)dl_CarrierFreq, (double)ul_CarrierFreq, (double)sl_CarrierFreq};
const int nsymb = fp->symbols_per_slot * fp->slots_per_frame/10; const int nsymb = fp->symbols_per_slot * fp->slots_per_frame/10;
const double Tc=(1/480e3/4096); const double Tc=(1/480e3/4096);
...@@ -609,15 +609,12 @@ void init_symbol_rotation(NR_DL_FRAME_PARMS *fp) { ...@@ -609,15 +609,12 @@ void init_symbol_rotation(NR_DL_FRAME_PARMS *fp) {
const double Ncp0=16*64 + (144*64*(1/(float)(1<<fp->numerology_index))); const double Ncp0=16*64 + (144*64*(1/(float)(1<<fp->numerology_index)));
const double Ncp1=(144*64*(1/(float)(1<<fp->numerology_index))); const double Ncp1=(144*64*(1/(float)(1<<fp->numerology_index)));
for (uint8_t ll = 0; ll < 2; ll++){ for (uint8_t ll = 0; ll < 3; ll++){
double f0 = f[ll]; double f0 = f[ll];
if (f0 == 0) continue;
LOG_D(PHY, "Doing symbol rotation calculation for gNB TX/RX, f0 %f Hz, Nsymb %d\n", f0, nsymb); LOG_D(PHY, "Doing symbol rotation calculation for gNB TX/RX, f0 %f Hz, Nsymb %d\n", f0, nsymb);
c16_t *symbol_rotation = fp->symbol_rotation[ll]; c16_t *symbol_rotation = fp->symbol_rotation[ll];
if (get_softmodem_params()->sl_mode == 2) {
f0 = (double)sl_CarrierFreq;
symbol_rotation = fp->symbol_rotation[link_type_sl];
}
double tl = 0.0; double tl = 0.0;
double poff = 0.0; double poff = 0.0;
......
...@@ -362,7 +362,7 @@ void nr_sl_psbch_rsrp_measurements(sl_nr_ue_phy_params_t *sl_phy_params, ...@@ -362,7 +362,7 @@ void nr_sl_psbch_rsrp_measurements(sl_nr_ue_phy_params_t *sl_phy_params,
dB_fixed(fp->ofdm_symbol_size); dB_fixed(fp->ofdm_symbol_size);
LOG_I(PHY, "PSBCH RSRP (DMRS REs): numREs:%d RSRP :%d dB/RE ,RSRP:%d dBm/RE\n", LOG_D(PHY, "PSBCH RSRP (DMRS REs): numREs:%d RSRP :%d dB/RE ,RSRP:%d dBm/RE\n",
num_re, psbch_rx->rsrp_dB_per_RE, psbch_rx->rsrp_dBm_per_RE); num_re, psbch_rx->rsrp_dB_per_RE, psbch_rx->rsrp_dBm_per_RE);
} }
\ No newline at end of file
...@@ -47,15 +47,7 @@ void nr_get_carrier_frequencies(PHY_VARS_NR_UE *ue, uint64_t *dl_carrier, uint64 ...@@ -47,15 +47,7 @@ void nr_get_carrier_frequencies(PHY_VARS_NR_UE *ue, uint64_t *dl_carrier, uint64
} }
void nr_get_carrier_frequencies_sl(PHY_VARS_NR_UE *ue, uint64_t *sl_carrier) {
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
if (ue->if_freq!=0) {
*sl_carrier = ue->if_freq;
} else {
*sl_carrier = fp->sl_CarrierFreq;
}
}
void nr_rf_card_config_gain(openair0_config_t *openair0_cfg, void nr_rf_card_config_gain(openair0_config_t *openair0_cfg,
double rx_gain_off){ double rx_gain_off){
......
...@@ -75,6 +75,7 @@ ...@@ -75,6 +75,7 @@
#define SL_NR_NUM_IDs_IN_PSS 2 #define SL_NR_NUM_IDs_IN_PSS 2
#define SL_NR_NUM_IDs_IN_SSS 336 #define SL_NR_NUM_IDs_IN_SSS 336
#define SL_NR_NUM_SLSS_IDs 672 #define SL_NR_NUM_SLSS_IDs 672
#define SL_NR_PSBCH_REPETITION_IN_FRAMES 16
typedef enum sl_nr_sidelink_mode { typedef enum sl_nr_sidelink_mode {
SL_NOT_SUPPORTED = 0, SL_NOT_SUPPORTED = 0,
......
...@@ -98,6 +98,7 @@ SystemInformationBlockType1_nr_t; ...@@ -98,6 +98,7 @@ SystemInformationBlockType1_nr_t;
#define NR_DOWNLINK_SLOT (0x01) #define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x02) #define NR_UPLINK_SLOT (0x02)
#define NR_MIXED_SLOT (0x03) #define NR_MIXED_SLOT (0x03)
#define NR_SIDELINK_SLOT NR_UPLINK_SLOT
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */ #define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
......
...@@ -198,5 +198,14 @@ void psbch_pscch_processing(PHY_VARS_NR_UE *ue, ...@@ -198,5 +198,14 @@ void psbch_pscch_processing(PHY_VARS_NR_UE *ue,
int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue, int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc, UE_nr_rxtx_proc_t *proc,
nr_phy_data_tx_t *phy_data); nr_phy_data_tx_t *phy_data);
/*! \brief This function prepares the sl indication to pass to the MAC
*/
void nr_fill_sl_indication(nr_sidelink_indication_t *sl_ind,
sl_nr_rx_indication_t *rx_ind,
sl_nr_sci_indication_t *sci_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
void *phy_data);
#endif #endif
...@@ -391,6 +391,11 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){ ...@@ -391,6 +391,11 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
bool found = false; bool found = false;
if(scheduled_response != NULL){ if(scheduled_response != NULL){
if (scheduled_response->sl_rx_config || scheduled_response->sl_tx_config) {
sl_handle_scheduled_response(scheduled_response);
return 0;
}
module_id_t module_id = scheduled_response->module_id; module_id_t module_id = scheduled_response->module_id;
uint8_t cc_id = scheduled_response->CC_id; uint8_t cc_id = scheduled_response->CC_id;
int slot = scheduled_response->slot; int slot = scheduled_response->slot;
...@@ -661,3 +666,84 @@ void nr_ue_synch_request(nr_synch_request_t *synch_request) ...@@ -661,3 +666,84 @@ void nr_ue_synch_request(nr_synch_request_t *synch_request)
PHY_vars_UE_g[synch_request->Mod_id][synch_request->CC_id]->synch_request.received_synch_request = 1; PHY_vars_UE_g[synch_request->Mod_id][synch_request->CC_id]->synch_request.received_synch_request = 1;
} }
int8_t nr_ue_sl_phy_config_request(nr_sl_phy_config_t *phy_config)
{
sl_nr_phy_config_request_t *sl_config = &PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->SL_UE_PHY_PARAMS.sl_config;
if(phy_config != NULL) {
memcpy(sl_config,&phy_config->sl_config_req,sizeof(sl_nr_phy_config_request_t));
}
return 0;
}
/*
* MAC sends the scheduled response with either TX configrequest for Sidelink Transmission requests
* or RX config request for Sidelink Reception requests.
* This procedure handles these TX/RX config requests received in this slot and configures PHY
* with a TTI action to be performed in this slot(TTI)
*/
int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response) {
module_id_t module_id = scheduled_response->module_id;
uint32_t slot = scheduled_response->slot;
uint32_t frame = scheduled_response->frame;
const char *sl_rx_action[]={"NONE", "RX_PSBCH", "RX_PSCCH", "RX_SCI2_ON_PSSCH", "RX_SLSCH_ON_PSSCH"};
const char *sl_tx_action[]={"TX_PSBCH", "TX_PSCCH_PSSCH", "TX_PSFCH"};
if(scheduled_response->sl_rx_config != NULL) {
sl_nr_rx_config_request_t *sl_rx_config = scheduled_response->sl_rx_config;
nr_phy_data_t *phy_data = (nr_phy_data_t *)scheduled_response->phy_data;
AssertFatal(sl_rx_config->number_pdus == SL_NR_RX_CONFIG_LIST_NUM,
"sl_rx_config->number_pdus incorrect\n");
switch(sl_rx_config->sl_rx_config_list[0].pdu_type) {
case SL_NR_CONFIG_TYPE_RX_PSBCH:
phy_data->sl_rx_action = SL_NR_CONFIG_TYPE_RX_PSBCH;
LOG_D(PHY, "Recvd CONFIG_TYPE_RX_PSBCH\n");
break;
default:
AssertFatal(0,"Incorrect sl_rx config req pdutype \n");
break;
}
LOG_D(PHY, "[UE%d] TTI %d:%d, SL-RX action:%s\n",
module_id,frame,slot,
sl_rx_action[phy_data->sl_rx_action]);
} else if(scheduled_response->sl_tx_config != NULL) {
sl_nr_tx_config_request_t *sl_tx_config = scheduled_response->sl_tx_config;
nr_phy_data_tx_t *phy_data_tx = (nr_phy_data_tx_t *)scheduled_response->phy_data;
AssertFatal(sl_tx_config->number_pdus == SL_NR_TX_CONFIG_LIST_NUM,
"sl_tx_config->number_pdus incorrect \n");
switch(sl_tx_config->tx_config_list[0].pdu_type) {
case SL_NR_CONFIG_TYPE_TX_PSBCH:
phy_data_tx->sl_tx_action = SL_NR_CONFIG_TYPE_TX_PSBCH;
LOG_D(PHY, "Recvd CONFIG_TYPE_TX_PSBCH\n");
*((uint32_t *)phy_data_tx->psbch_vars.psbch_payload) =
*((uint32_t *) sl_tx_config->tx_config_list[0].tx_psbch_config_pdu.psbch_payload);
phy_data_tx->psbch_vars.psbch_tx_power =
sl_tx_config->tx_config_list[0].tx_psbch_config_pdu.psbch_tx_power;
phy_data_tx->psbch_vars.tx_slss_id =
sl_tx_config->tx_config_list[0].tx_psbch_config_pdu.tx_slss_id;
break;
default:
AssertFatal(0,"Incorrect sl_tx config req pdutype \n");
break;
}
LOG_D(PHY, "[UE%d] TTI %d:%d, SL-TX action:%s slss_id:%d, sl-mib:%x, psbch pwr:%d\n",
module_id,frame,slot,
sl_tx_action[phy_data_tx->sl_tx_action - 6],
phy_data_tx->psbch_vars.tx_slss_id,
*((uint32_t *)phy_data_tx->psbch_vars.psbch_payload),
phy_data_tx->psbch_vars.psbch_tx_power);
}
return 0;
}
\ No newline at end of file
...@@ -40,12 +40,14 @@ ...@@ -40,12 +40,14 @@
/**\brief NR UE FAPI-like P7 messages, scheduled response from L2 indicating L1 /**\brief NR UE FAPI-like P7 messages, scheduled response from L2 indicating L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/ \param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response); int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response);
int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response);
int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response); int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response);
/**\brief NR UE FAPI-like P5 message, physical configuration from L2 to configure L1 /**\brief NR UE FAPI-like P5 message, physical configuration from L2 to configure L1
\param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/ \param scheduled_response including transmission config(dl_config, ul_config) and data transmission (tx_req)*/
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config); int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config);
int8_t nr_ue_sl_phy_config_request(nr_sl_phy_config_t *phy_config);
/**\brief NR UE FAPI message to schedule a synchronization with target gNB /**\brief NR UE FAPI message to schedule a synchronization with target gNB
\param synch_request including target_Nid_cell*/ \param synch_request including target_Nid_cell*/
......
...@@ -99,3 +99,66 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot) ...@@ -99,3 +99,66 @@ int nr_ue_slot_select(fapi_nr_config_request_t *cfg, int nr_frame, int nr_slot)
} }
} }
} }
/*
* This function determines if the mixed slot is a Sidelink slot
*/
uint8_t sl_determine_if_sidelink_slot(uint8_t sl_startsym, uint8_t sl_lensym, uint8_t num_ulsym) {
uint8_t ul_startsym = NR_NUMBER_OF_SYMBOLS_PER_SLOT - num_ulsym;
if ((sl_startsym >= ul_startsym) && (sl_lensym <= NR_NUMBER_OF_SYMBOLS_PER_SLOT)) {
LOG_D(MAC,"MIXED SLOT is a SIDELINK SLOT. Sidelink Symbols: %d-%d, Uplink Symbols: %d-%d\n",
sl_startsym,sl_lensym-1,
ul_startsym, ul_startsym+num_ulsym-1);
return NR_SIDELINK_SLOT;
}
else {
LOG_D(MAC,"MIXED SLOT is NOT SIDELINK SLOT. Sidelink Symbols: %d-%d, Uplink Symbols: %d-%d\n",
sl_startsym,sl_lensym-1,
ul_startsym, ul_startsym+num_ulsym-1);
return 0;
}
}
/*
* This function determines if the Slot is a SIDELINK SLOT
* Every Uplink Slot is a Sidelink slot
* Mixed Slot is a sidelink slot if the uplink symbols in Mixed slot
* overlaps with Sidelink start symbol and number of symbols.
*/
int sl_nr_ue_slot_select(sl_nr_phy_config_request_t *cfg,
int nr_frame, int nr_slot,
uint8_t frame_duplex_type)
{
int mu = cfg->sl_bwp_config.sl_scs, ul_sym = 0, slot_type = 0;
//All PC5 bands are TDD bands , hence handling only TDD in this function.
AssertFatal(frame_duplex_type == TDD, "No Sidelink operation defined for FDD in 3GPP rel16\n");
if (cfg->tdd_table.max_tdd_periodicity_list == NULL) { // this happens before receiving TDD configuration
return 0;
}
int slot = (nr_frame%2 == 0) ? nr_slot : ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot;
for(int symbol_count=0; symbol_count<NR_NUMBER_OF_SYMBOLS_PER_SLOT; symbol_count++) {
if (cfg->tdd_table.max_tdd_periodicity_list[slot].max_num_of_symbol_per_slot_list[symbol_count].slot_config == 1) {
ul_sym++;
}
}
if(ul_sym == NR_NUMBER_OF_SYMBOLS_PER_SLOT) {
slot_type = NR_SIDELINK_SLOT;
} else if (ul_sym){
slot_type = sl_determine_if_sidelink_slot(cfg->sl_bwp_config.sl_start_symbol,
cfg->sl_bwp_config.sl_num_symbols,
ul_sym);
}
return slot_type;
}
\ No newline at end of file
...@@ -49,6 +49,7 @@ void nr_fill_sl_indication(nr_sidelink_indication_t *sl_ind, ...@@ -49,6 +49,7 @@ void nr_fill_sl_indication(nr_sidelink_indication_t *sl_ind,
sl_ind->frame_tx = proc->frame_tx; sl_ind->frame_tx = proc->frame_tx;
sl_ind->slot_tx = proc->nr_slot_tx; sl_ind->slot_tx = proc->nr_slot_tx;
sl_ind->phy_data = phy_data; sl_ind->phy_data = phy_data;
sl_ind->slot_type = SIDELINK_SLOT_TYPE_RX;
if (rx_ind) { if (rx_ind) {
sl_ind->rx_ind = rx_ind; // hang on rx_ind instance sl_ind->rx_ind = rx_ind; // hang on rx_ind instance
......
...@@ -49,3 +49,12 @@ int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id, ...@@ -49,3 +49,12 @@ int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id,
const channel_t channel, const channel_t channel,
const uint8_t* pduP, const uint8_t* pduP,
const sdu_size_t pdu_len) { return 0; } const sdu_size_t pdu_len) { return 0; }
int8_t nr_mac_rrc_sl_mib_ind(const module_id_t module_id,
const int CC_id,
const uint8_t gNB_index,
const frame_t frame,
const int slot,
const int channel,
const uint8_t* pduP,
const sdu_size_t pdu_len,
const uint16_t rx_slss_id) {return 1;}
...@@ -65,6 +65,10 @@ int8_t nr_mac_rrc_data_req_ue(const module_id_t Mod_idP, ...@@ -65,6 +65,10 @@ int8_t nr_mac_rrc_data_req_ue(const module_id_t Mod_idP,
nr_bler_struct nr_bler_data[NR_NUM_MCS]; nr_bler_struct nr_bler_data[NR_NUM_MCS];
void get_nrUE_params(void) { return;} void get_nrUE_params(void) { return;}
uint8_t check_if_ue_is_sl_syncsource() {return 0;} uint8_t check_if_ue_is_sl_syncsource() {return 0;}
void nr_rrc_mac_config_req_sl_mib(module_id_t module_id,
NR_SL_SSB_TimeAllocation_r16_t *ssb_ta,
uint16_t rx_slss_id,
uint8_t *sl_mib) {}
////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////
static void prepare_mib_bits(uint8_t *buf, uint32_t frame_tx, uint32_t slot_tx) { static void prepare_mib_bits(uint8_t *buf, uint32_t frame_tx, uint32_t slot_tx) {
......
...@@ -86,7 +86,7 @@ static int sl_set_tdd_config_nr_ue(sl_nr_phy_config_request_t *cfg, ...@@ -86,7 +86,7 @@ static int sl_set_tdd_config_nr_ue(sl_nr_phy_config_request_t *cfg,
if (nrofDownlinkSymbols) nrofDownlinkSlots -= 1; if (nrofDownlinkSymbols) nrofDownlinkSlots -= 1;
} }
LOG_I(NR_MAC,"Set Phy Sidelink TDD Config: scs:%d,dl:%d-%d, ul:%d-%d, nb_periods_per_frame:%d, nb_slots_to_set:%d\n", LOG_I(NR_MAC,"Set Phy Sidelink TDD Config: scs:%d,dl:%d-%d, ul:%d-%d, nb_periods_per_frame:%d, nb_slots_per_period:%d\n",
mu, nrofDownlinkSlots, nrofDownlinkSymbols, nrofUplinkSlots, nrofUplinkSymbols, nb_periods_per_frame, nb_slots_per_period); mu, nrofDownlinkSlots, nrofDownlinkSymbols, nrofUplinkSlots, nrofUplinkSymbols, nb_periods_per_frame, nb_slots_per_period);
if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 ) if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 )
...@@ -436,6 +436,9 @@ int nr_rrc_mac_config_req_sl_preconfig(module_id_t module_id, ...@@ -436,6 +436,9 @@ int nr_rrc_mac_config_req_sl_preconfig(module_id_t module_id,
AssertFatal((tdd_uldl_config->pattern2 == NULL), "Sidelink MAC CFG: pattern2 not yet supported"); AssertFatal((tdd_uldl_config->pattern2 == NULL), "Sidelink MAC CFG: pattern2 not yet supported");
sl_mac->sl_TDD_config = sl_preconfig->sl_PreconfigGeneral_r16->sl_TDD_Configuration_r16; sl_mac->sl_TDD_config = sl_preconfig->sl_PreconfigGeneral_r16->sl_TDD_Configuration_r16;
//Sync source is identified, timing needs to be adjusted.
sl_mac->adjust_timing = 1;
} }
//Do not copy TDD config yet as SYNC source is not yet found //Do not copy TDD config yet as SYNC source is not yet found
...@@ -538,12 +541,13 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id, ...@@ -538,12 +541,13 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id,
sl_nr_phy_config_request_t *sl_config = &sl_mac->sl_phy_config.sl_config_req; sl_nr_phy_config_request_t *sl_config = &sl_mac->sl_phy_config.sl_config_req;
//Update configs if Sync source is not set else nothing to be done //Update configs if Sync source is not set else nothing to be done
if ( sl_config->sl_sync_source.sync_source == SL_SYNC_SOURCE_NONE) { if (sl_config->sl_sync_source.sync_source == SL_SYNC_SOURCE_NONE) {
//Set SYNC source as SYNC REF UE and send the remaining config to PHY //Set SYNC source as SYNC REF UE and send the remaining config to PHY
sl_config->config_mask = 0xF;//all configs done. sl_config->config_mask = 0xF;//all configs done.
sl_config->sl_sync_source.sync_source = SL_SYNC_SOURCE_SYNC_REF_UE; sl_config->sl_sync_source.sync_source = SL_SYNC_SOURCE_SYNC_REF_UE;
sl_config->sl_sync_source.rx_slss_id = rx_slss_id; sl_config->sl_sync_source.rx_slss_id = rx_slss_id;
sl_mac->adjust_timing = 1;
sl_mac->rx_sl_bch.status = 1; sl_mac->rx_sl_bch.status = 1;
sl_mac->rx_sl_bch.slss_id = rx_slss_id; sl_mac->rx_sl_bch.slss_id = rx_slss_id;
...@@ -603,6 +607,8 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id, ...@@ -603,6 +607,8 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id,
sl_mac->sl_TDD_config->pattern1.nrofDownlinkSlots, sl_mac->sl_TDD_config->pattern1.nrofUplinkSlots, sl_mac->sl_TDD_config->pattern1.nrofDownlinkSlots, sl_mac->sl_TDD_config->pattern1.nrofUplinkSlots,
sl_mac->sl_TDD_config->pattern1.nrofDownlinkSymbols,sl_mac->sl_TDD_config->pattern1.nrofUplinkSymbols); sl_mac->sl_TDD_config->pattern1.nrofDownlinkSymbols,sl_mac->sl_TDD_config->pattern1.nrofUplinkSymbols);
DevAssert(mac->if_module != NULL && mac->if_module->sl_phy_config_request != NULL);
mac->if_module->sl_phy_config_request(&sl_mac->sl_phy_config);
} }
} }
\ No newline at end of file
...@@ -33,10 +33,15 @@ ...@@ -33,10 +33,15 @@
#define SL_NR_MAC_NUM_TX_RESOURCE_POOLS 1 #define SL_NR_MAC_NUM_TX_RESOURCE_POOLS 1
#define SL_NUM_BYTES_TIMERESOURCEBITMAP 20 #define SL_NUM_BYTES_TIMERESOURCEBITMAP 20
//every 16 frames, SSB is repeated.
#define SL_NR_SSB_REPETITION_IN_FRAMES 16
#define SL_FRAME_NUMBER_CYCLE 1024
// Size of Fixed fields prio (3), sci_2ndstage(2), // Size of Fixed fields prio (3), sci_2ndstage(2),
// betaoffsetindicator(2), num dmrs ports (1), mcs (5bits) // betaoffsetindicator(2), num dmrs ports (1), mcs (5bits)
#define SL_SCI_FORMAT_1A_LEN_IN_BITS_FIXED_FIELDS 13 #define SL_SCI_FORMAT_1A_LEN_IN_BITS_FIXED_FIELDS 13
#define sci_field_t dci_field_t #define sci_field_t dci_field_t
typedef struct sidelink_sci_format_1a_fields { typedef struct sidelink_sci_format_1a_fields {
...@@ -150,6 +155,22 @@ typedef struct sl_nr_ue_mac_params { ...@@ -150,6 +155,22 @@ typedef struct sl_nr_ue_mac_params {
//Holds Broadcast params incase UE receives SL-SSB //Holds Broadcast params incase UE receives SL-SSB
sl_bch_params_t rx_sl_bch; sl_bch_params_t rx_sl_bch;
//SSB RSRP in dBm
int16_t ssb_rsrp_dBm;
//Bitmap indicating which slots belong to sidelink
//Right now supports 30Khz and 15Khz
uint32_t sl_slot_bitmap;
//adjust timing after new timing from sync is acquired.
uint8_t adjust_timing;
//Sidelink slots per frame
uint16_t N_SL_SLOTS_perframe;
uint16_t decoded_DFN;
uint16_t decoded_slot;
} sl_nr_ue_mac_params_t; } sl_nr_ue_mac_params_t;
......
...@@ -113,6 +113,8 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info); ...@@ -113,6 +113,8 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info);
@param fapi_nr_dl_config_request_t* pointer to dl_config, @param fapi_nr_dl_config_request_t* pointer to dl_config,
@param fapi_nr_ul_config_request_t* pointer to ul_config, @param fapi_nr_ul_config_request_t* pointer to ul_config,
@param fapi_nr_tx_request_t* pointer to tx_request; @param fapi_nr_tx_request_t* pointer to tx_request;
@param sl_nr_rx_config_request_t* pointer to sl_rx_config,
@param sl_nr_tx_config_request_t* pointer to sl_tx_config,
@param module_id_t mod_id module ID @param module_id_t mod_id module ID
@param int cc_id CC ID @param int cc_id CC ID
@param frame_t frame frame number @param frame_t frame frame number
...@@ -122,6 +124,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response, ...@@ -122,6 +124,8 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
fapi_nr_dl_config_request_t *dl_config, fapi_nr_dl_config_request_t *dl_config,
fapi_nr_ul_config_request_t *ul_config, fapi_nr_ul_config_request_t *ul_config,
fapi_nr_tx_request_t *tx_request, fapi_nr_tx_request_t *tx_request,
sl_nr_rx_config_request_t *sl_rx_config,
sl_nr_tx_config_request_t *sl_tx_config,
module_id_t mod_id, module_id_t mod_id,
int cc_id, int cc_id,
frame_t frame, frame_t frame,
...@@ -443,6 +447,7 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id, ...@@ -443,6 +447,7 @@ void nr_rrc_mac_config_req_sl_mib(module_id_t module_id,
NR_SL_SSB_TimeAllocation_r16_t *ssb_ta, NR_SL_SSB_TimeAllocation_r16_t *ssb_ta,
uint16_t rx_slss_id, uint16_t rx_slss_id,
uint8_t *sl_mib); uint8_t *sl_mib);
void sl_prepare_psbch_payload(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config, void sl_prepare_psbch_payload(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config,
uint8_t *bits_0_to_7, uint8_t *bits_8_to_11, uint8_t *bits_0_to_7, uint8_t *bits_8_to_11,
uint8_t mu, uint8_t L, uint8_t Y); uint8_t mu, uint8_t L, uint8_t Y);
...@@ -454,5 +459,26 @@ uint8_t sl_decode_sl_TDD_Config(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config, ...@@ -454,5 +459,26 @@ uint8_t sl_decode_sl_TDD_Config(NR_TDD_UL_DL_ConfigCommon_t *TDD_UL_DL_Config,
uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels, uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels,
NR_SL_ResourcePool_r16_t *rpool, NR_SL_ResourcePool_r16_t *rpool,
sidelink_sci_format_1a_fields_t *sci_1a); sidelink_sci_format_1a_fields_t *sci_1a);
/** \brief This function checks nr UE slot for Sidelink direction : Sidelink
* @param cfg : Sidelink config request
* @param nr_frame : frame number
* @param nr_slot : slot number
* @param frame duplex type : Frame type
@returns int : 0 or Sidelink slot type */
int sl_nr_ue_slot_select(sl_nr_phy_config_request_t *cfg,
int nr_frame, int nr_slot,
uint8_t frame_duplex_type);
void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind);
void nr_mac_rrc_sl_mib_ind(const module_id_t module_id,
const int CC_id,
const uint8_t gNB_index,
const frame_t frame,
const int slot,
const channel_t channel,
uint8_t* pduP,
const sdu_size_t pdu_len,
const uint16_t rx_slss_id);
#endif #endif
/** @}*/ /** @}*/
...@@ -19,7 +19,8 @@ ...@@ -19,7 +19,8 @@
* contact@openairinterface.org * contact@openairinterface.org
*/ */
#include "mac_defs_sl.h" #include "mac_defs.h"
#include "mac_proto.h"
#define SL_DEBUG #define SL_DEBUG
...@@ -474,7 +475,7 @@ uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels, ...@@ -474,7 +475,7 @@ uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels,
} }
LOG_D(NR_MAC,"sci 1A - additional_table:%ld, sci 1a len:%d, additional table nbits:%d\n", LOG_D(NR_MAC,"sci 1A - additional_table:%ld, sci 1a len:%d, additional table nbits:%d\n",
*rpool->sl_Additional_MCS_Table_r16, rpool->sl_Additional_MCS_Table_r16 ? *rpool->sl_Additional_MCS_Table_r16 : 0,
sci_1a_len, sci_1a_len,
sci_1a->additional_mcs_table_indicator.nbits); sci_1a->additional_mcs_table_indicator.nbits);
...@@ -521,3 +522,56 @@ uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels, ...@@ -521,3 +522,56 @@ uint8_t sl_determine_sci_1a_len(uint16_t *num_subchannels,
return sci_1a_len; return sci_1a_len;
} }
/* This function determines the number of sidelink slots in 1024 frames - DFN cycle
* which can be used for determining reserved slots and REsource pool slots according to bitmap.
* Sidelink slots are the uplink and mixed slots with sidelink support except the SSB slots.
*/
uint32_t sl_determine_num_sidelink_slots(uint8_t mod_id, uint16_t *N_SSB_16frames, uint16_t *N_SL_SLOTS_perframe)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
sl_nr_ue_mac_params_t *sl_mac = mac->SL_MAC_PARAMS;
uint32_t N_SSB_1024frames = 0;
uint32_t N_SL_SLOTS = 0;
*N_SL_SLOTS_perframe = 0;
*N_SSB_16frames = 0;
if (sl_mac->rx_sl_bch.status) {
sl_ssb_timealloc_t *ssb_timealloc = &sl_mac->rx_sl_bch.ssb_time_alloc;
*N_SSB_16frames += ssb_timealloc->sl_NumSSB_WithinPeriod;
LOG_D(MAC, "RX SSB Slots:%d\n", *N_SSB_16frames);
}
if (sl_mac->tx_sl_bch.status) {
sl_ssb_timealloc_t *ssb_timealloc = &sl_mac->tx_sl_bch.ssb_time_alloc;
*N_SSB_16frames += ssb_timealloc->sl_NumSSB_WithinPeriod;
LOG_D(MAC, "TX SSB Slots:%d\n", *N_SSB_16frames);
}
//Total SSB slots in SFN cycle (1024 frames)
N_SSB_1024frames = SL_FRAME_NUMBER_CYCLE/SL_NR_SSB_REPETITION_IN_FRAMES * (*N_SSB_16frames);
sl_nr_phy_config_request_t *sl_cfg = &sl_mac->sl_phy_config.sl_config_req;
uint8_t sl_scs = sl_cfg->sl_bwp_config.sl_scs;
uint8_t num_slots_per_frame = 10*(1<<sl_scs);
uint8_t slot_type = 0;
for (int i=0; i<num_slots_per_frame;i++) {
slot_type = sl_nr_ue_slot_select(sl_cfg, 0, i, TDD);
if (slot_type == NR_SIDELINK_SLOT) {
*N_SL_SLOTS_perframe = *N_SL_SLOTS_perframe + 1;
sl_mac->sl_slot_bitmap |= (1<<i);
}
}
//Determine total number of Valid Sidelink slots which can be used for Respool in a SFN cycle (1024 frames)
N_SL_SLOTS = (*N_SL_SLOTS_perframe * SL_FRAME_NUMBER_CYCLE) - N_SSB_1024frames;
LOG_I(MAC, "[UE%d]SL-MAC:SSB slots in 1024 frames:%d, N_SL_SLOTS_perframe:%d, N_SL_SLOTs in 1024 frames:%d, SL SLOT bitmap:%x\n",
mod_id,N_SSB_1024frames, *N_SL_SLOTS_perframe,
N_SL_SLOTS, sl_mac->sl_slot_bitmap);
return N_SL_SLOTS;
}
This diff is collapsed.
...@@ -1183,7 +1183,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info) ...@@ -1183,7 +1183,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info)
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" ); AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is NULL!\n" );
AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" ); AssertFatal( nr_ue_if_module_inst[module_id]->scheduled_response != NULL, "scheduled_response is NULL!\n" );
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, dl_info->slot); fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, dl_info->slot);
fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->phy_data); fill_scheduled_response(&scheduled_response, dl_config, NULL, NULL, NULL, NULL,dl_info->module_id, dl_info->cc_id, dl_info->frame, dl_info->slot, dl_info->phy_data);
nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response); nr_ue_if_module_inst[module_id]->scheduled_response(&scheduled_response);
memset(def_dci_pdu_rel15, 0, sizeof(*def_dci_pdu_rel15)); memset(def_dci_pdu_rel15, 0, sizeof(*def_dci_pdu_rel15));
} }
...@@ -1262,6 +1262,10 @@ nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){ ...@@ -1262,6 +1262,10 @@ nr_ue_if_module_t *nr_ue_if_module_init(uint32_t module_id){
nr_ue_if_module_inst[module_id]->current_slot = 0; nr_ue_if_module_inst[module_id]->current_slot = 0;
nr_ue_if_module_inst[module_id]->phy_config_request = nr_ue_phy_config_request; nr_ue_if_module_inst[module_id]->phy_config_request = nr_ue_phy_config_request;
nr_ue_if_module_inst[module_id]->synch_request = nr_ue_synch_request; nr_ue_if_module_inst[module_id]->synch_request = nr_ue_synch_request;
if (get_softmodem_params()->sl_mode) {
nr_ue_if_module_inst[module_id]->sl_phy_config_request = nr_ue_sl_phy_config_request;
nr_ue_if_module_inst[module_id]->sl_indication = nr_ue_sl_indication;
}
if (get_softmodem_params()->emulate_l1) if (get_softmodem_params()->emulate_l1)
nr_ue_if_module_inst[module_id]->scheduled_response = nr_ue_scheduled_response_stub; nr_ue_if_module_inst[module_id]->scheduled_response = nr_ue_scheduled_response_stub;
else else
...@@ -1324,3 +1328,109 @@ void RCconfig_nr_ue_macrlc(void) { ...@@ -1324,3 +1328,109 @@ void RCconfig_nr_ue_macrlc(void) {
} }
} }
} }
static void handle_sl_bch(module_id_t module_id,uint8_t *const sl_mib,
const uint8_t len, uint16_t frame_rx,
uint16_t slot_rx,
uint16_t rx_slss_id)
{
LOG_D(NR_MAC," decode SL-MIB %d\n",rx_slss_id);
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
sl_nr_ue_mac_params_t *sl_mac = mac->SL_MAC_PARAMS;
uint8_t sl_tdd_config[2] = {0,0};
sl_tdd_config[0] = sl_mib[0];
sl_tdd_config[1] = sl_mib[1] & 0xF0;
uint8_t incov = sl_mib[1] & 0x08;
uint16_t frame_0 = (sl_mib[2] & 0xFE) >> 1;
uint16_t frame_1 = sl_mib[1] & 0x07;
frame_0 |= (frame_1 & 0x01) << 7;
frame_1 = ((frame_1 & 0x06) >> 1) << 8;
uint16_t frame = frame_1 | frame_0;
uint8_t slot = ((sl_mib[2] & 0x01) << 6) | ((sl_mib[3] & 0xFC) >> 2);
LOG_I(NR_MAC, "[UE%d]In %d:%d Received SL-MIB:%x .Contents- SL-TDD config:%x, Incov:%d, FN:%d, Slot:%d\n",
module_id, frame_rx, slot_rx,*((uint32_t *)sl_mib),
*((uint16_t *)sl_tdd_config), incov,frame, slot);
sl_mac->decoded_DFN = frame;
sl_mac->decoded_slot = slot;
#define NR_SBCCH_SL_BCH 5
nr_mac_rrc_sl_mib_ind(module_id,0,0,frame_rx, slot_rx, NR_SBCCH_SL_BCH, sl_mib, len, rx_slss_id);
return ;
}
/*
if PSBCH rx - handle_psbch()
- Extract FN, Slot
- Extract TDD configuration from the 12 bits
- SEND THE SL-MIB to RRC
if PSSCH DATa rx - handle slsch()
*/
void sl_nr_process_rx_ind(uint16_t mod_id,
uint32_t frame, uint32_t slot,
sl_nr_ue_mac_params_t *sl_mac,
sl_nr_rx_indication_t *rx_ind)
{
uint8_t num_pdus = rx_ind->number_pdus;
uint8_t pdu_type = rx_ind->rx_indication_body[num_pdus-1].pdu_type;
switch (pdu_type){
case SL_NR_RX_PDU_TYPE_SSB:
if (rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.decode_status) {
LOG_I(NR_MAC, "[UE%d]SL-MAC Received SL-SSB: RSRP:%d dBm/RE, rx_psbch_payload:%x, rx_slss_id:%d\n",
mod_id,rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.rsrp_dbm,
*((uint32_t *)rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.psbch_payload),
rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.rx_slss_id);
handle_sl_bch(mod_id, rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.psbch_payload, 4, frame, slot,
rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.rx_slss_id);
sl_mac->ssb_rsrp_dBm = rx_ind->rx_indication_body[num_pdus - 1].ssb_pdu.rsrp_dbm;
} else {
LOG_I(NR_MAC, "[UE%d]SL-MAC - NO SL-SSB Received\n",mod_id);
}
break;
case SL_NR_RX_PDU_TYPE_SLSCH:
break;
default :
AssertFatal(1==0, "Incorrect type received. %s\n", __FUNCTION__);
break;
}
}
/*
* Sidelink indication is sent from PHY->MAC.
* This interface function handles these
* - rx_ind (SSB on PSBCH/SLSCH on PSSCH).
* - sci_ind (received scis during rxpool reception/txpool sensing)
*/
int nr_ue_sl_indication(nr_sidelink_indication_t *sl_indication)
{
//NR_UE_L2_STATE_t ret;
module_id_t module_id = sl_indication->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
uint16_t slot = sl_indication->slot_rx;
uint16_t frame = sl_indication->frame_rx;
sl_nr_ue_mac_params_t *sl_mac = mac->SL_MAC_PARAMS;
if (sl_indication->rx_ind) {
sl_nr_process_rx_ind(module_id, frame, slot, sl_mac, sl_indication->rx_ind);
} else {
nr_ue_sidelink_scheduler(sl_indication);
}
return 0;
}
...@@ -42,6 +42,16 @@ ...@@ -42,6 +42,16 @@
#include "NR_Packet_Drop.h" #include "NR_Packet_Drop.h"
#include "nfapi/open-nFAPI/nfapi/public_inc/sidelink_nr_ue_interface.h" #include "nfapi/open-nFAPI/nfapi/public_inc/sidelink_nr_ue_interface.h"
typedef enum sl_sidelink_slot_type {
SIDELINK_SLOT_TYPE_NONE = 0,
SIDELINK_SLOT_TYPE_RX,
SIDELINK_SLOT_TYPE_TX,
SIDELINK_SLOT_TYPE_BOTH
} sl_sidelink_slot_type_t;
extern slot_rnti_mcs_s slot_rnti_mcs[NUM_NFAPI_SLOT]; extern slot_rnti_mcs_s slot_rnti_mcs[NUM_NFAPI_SLOT];
typedef struct NR_UL_TIME_ALIGNMENT NR_UL_TIME_ALIGNMENT_t; typedef struct NR_UL_TIME_ALIGNMENT NR_UL_TIME_ALIGNMENT_t;
...@@ -126,6 +136,8 @@ typedef struct { ...@@ -126,6 +136,8 @@ typedef struct {
frame_t frame_tx; frame_t frame_tx;
/// slot tx /// slot tx
uint32_t slot_tx; uint32_t slot_tx;
//slot type rx or tx
sl_sidelink_slot_type_t slot_type;
/// NR UE FAPI-like P7 message, direction: L1 to L2 /// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure /// data reception indication structure
...@@ -244,7 +256,7 @@ typedef int8_t (nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config); ...@@ -244,7 +256,7 @@ typedef int8_t (nr_ue_phy_config_request_f)(nr_phy_config_t *phy_config);
* -1: Failed to consume bytes. Abort the mission. * -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored. * Non-negative return values indicate success, and ignored.
*/ */
typedef int8_t (nr_sl_ue_phy_config_request_f)(nr_sl_phy_config_t *sl_phy_config); typedef int8_t (nr_ue_sl_phy_config_request_f)(nr_sl_phy_config_t *sl_phy_config);
/* /*
* Generic type of an application-defined callback to return various * Generic type of an application-defined callback to return various
...@@ -285,6 +297,7 @@ typedef int (nr_ue_sl_indication_f)(nr_sidelink_indication_t *sl_info); ...@@ -285,6 +297,7 @@ typedef int (nr_ue_sl_indication_f)(nr_sidelink_indication_t *sl_info);
typedef struct nr_ue_if_module_s { typedef struct nr_ue_if_module_s {
nr_ue_scheduled_response_f *scheduled_response; nr_ue_scheduled_response_f *scheduled_response;
nr_ue_phy_config_request_f *phy_config_request; nr_ue_phy_config_request_f *phy_config_request;
nr_ue_sl_phy_config_request_f *sl_phy_config_request;
nr_ue_synch_request_f *synch_request; nr_ue_synch_request_f *synch_request;
nr_ue_dl_indication_f *dl_indication; nr_ue_dl_indication_f *dl_indication;
nr_ue_ul_indication_f *ul_indication; nr_ue_ul_indication_f *ul_indication;
...@@ -333,6 +346,8 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info); ...@@ -333,6 +346,8 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info); int nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
int nr_ue_sl_indication(nr_sidelink_indication_t *sl_indication);
int nr_ue_dcireq(nr_dcireq_t *dcireq); int nr_ue_dcireq(nr_dcireq_t *dcireq);
// TODO check // TODO check
......
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