Commit 5344e5ee authored by Raymond Knopp's avatar Raymond Knopp Committed by francescomani

power control changes for deltaMCS mode.

parent c599e172
......@@ -1240,11 +1240,14 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
config.do_CSIRS = *GNBParamList.paramarray[0][GNB_DO_CSIRS_IDX].iptr;
config.do_SRS = *GNBParamList.paramarray[0][GNB_DO_SRS_IDX].iptr;
config.force_256qam_off = *GNBParamList.paramarray[0][GNB_FORCE256QAMOFF_IDX].iptr;
config.force_UL256qam_off = *GNBParamList.paramarray[0][GNB_FORCEUL256QAMOFF_IDX].iptr;
config.use_deltaMCS = *GNBParamList.paramarray[0][GNB_USE_DELTA_MCS_IDX].iptr;
LOG_I(GNB_APP,
"CSI-RS %d, SRS %d, 256 QAM %s\n",
"CSI-RS %d, SRS %d, 256 QAM %s, delta_MCS %s\n",
config.do_CSIRS,
config.do_SRS,
config.force_256qam_off ? "force off" : "may be on");
config.force_256qam_off ? "force off" : "may be on",
config.use_deltaMCS ? "on" : "off");
NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME);
//xer_fprint(stdout, &asn_DEF_NR_ServingCellConfigCommon, scc);
......
......@@ -128,6 +128,10 @@ typedef enum {
#define GNB_CONFIG_STRING_FORCE256QAMOFF "force_256qam_off"
#define GNB_CONFIG_STRING_ENABLE_SDAP "enable_sdap"
#define GNB_CONFIG_STRING_DRBS "drbs"
#define GNB_CONFIG_STRING_USE_DELTA_MCS "use_deltaMCS"
#define GNB_CONFIG_HLP_USE_DELTA_MCS "Use deltaMCS-based power headroom reporting in PUSCH-Config"
#define GNB_CONFIG_HLP_FORCEUL256QAMOFF "suppress activation of UL 256 QAM despite UE support"
#define GNB_CONFIG_STRING_FORCEUL256QAMOFF "force_UL256qam_off"
#define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID"
#define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID"
......@@ -173,6 +177,8 @@ typedef enum {
{GNB_CONFIG_STRING_DRBS, GNB_CONFIG_HLP_STRING_DRBS, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_GNB_DU_ID, GNB_CONFIG_HLP_GNB_DU_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_GNB_CU_UP_ID, GNB_CONFIG_HLP_GNB_CU_UP_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_USE_DELTA_MCS, GNB_CONFIG_HLP_USE_DELTA_MCS, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_FORCEUL256QAMOFF, GNB_CONFIG_HLP_FORCEUL256QAMOFF, 0, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
}
// clang-format on
......@@ -207,6 +213,8 @@ typedef enum {
#define GNB_DRBS 27
#define GNB_GNB_DU_ID_IDX 28
#define GNB_GNB_CU_UP_ID_IDX 29
#define GNB_USE_DELTA_MCS_IDX 30
#define GNB_FORCEUL256QAMOFF_IDX 31
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define GNBPARAMS_CHECK { \
......@@ -224,6 +232,8 @@ typedef enum {
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
}
/*-------------------------------------------------------------------------------------------------------------------------------------------------*/
......
......@@ -2580,9 +2580,10 @@ void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti)
delete_nr_ue_data(UE, nr_mac->common_channels, &UE_info->uid_allocator);
}
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr) {
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr, int tx_power) {
// al values passed to this function are x10
int snrx10 = (cqi*5) - 640;
int snrx10 = (cqi*5) - 640 - (tx_power*10);
LOG_D(NR_MAC, "tpc : target %d, cqi %d, snrx10 %d, tx_power %d\n", target, ((int)cqi * 5) - 640, snrx10, tx_power);
if (snrx10 > target + incr) return 0; // decrease 1dB
if (snrx10 < target - (3*incr)) return 3; // increase 3dB
if (snrx10 < target - incr) return 2; // increase 1dB
......
......@@ -1043,7 +1043,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
// tpc (power control) only if we received AckNack
if (uci_01->harq.harq_confidence_level==0)
sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, uci_01->ul_cqi, 30);
sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, uci_01->ul_cqi, 30, 0);
else
sched_ctrl->tpc1 = 3;
sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640;
......
......@@ -65,22 +65,21 @@ int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
}
static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS)
static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS, int include_bw,int dump)
{
// 38.213 7.1.1
// if the PUSCH transmission is over more than one layer delta_tf = 0
int delta_tf = 0;
float delta_tf = 0;
if(deltaMCS != NULL && n_layers == 1) {
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
const float BPRE = (float) tbs_bits/n_re; //TODO change for PUSCH with CSI
const float f = pow(2, BPRE * 1.25);
const float beta = 1.0f; //TODO change for PUSCH with CSI
delta_tf = (10 * log10((f - 1) * beta));
if (dump==1) LOG_I(NR_MAC,"compute_ph_factor delta_tf %f (n_re %d, n_rb %d, n_dmrs %d, n_symbols %d, tbs %d BPRE %f f %f)\n",delta_tf,n_re,rb, n_dmrs, n_symbols, tbs_bits, BPRE,f);
}
const int bw_factor = 10 * log10(rb << mu);
return (delta_tf + bw_factor);
const float bw_factor = (include_bw>0) ? 10 * log10(rb << mu) : 0;
return ((int)roundf(delta_tf + bw_factor));
}
// For both UL-SCH except:
......@@ -265,14 +264,16 @@ static int nr_process_mac_pdu(instance_t module_idP,
PH = phr->PH - 32 + (phr->PH - 54);
// in sched_ctrl we set normalized PH wrt MCS and PRBs
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_ctrl->ph = PH +
compute_ph_factor(ul_bwp->scs,
sched_pusch->tb_size<<3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, //n_symbols
sched_pusch->dmrs_info.num_dmrs_symb*sched_pusch->dmrs_info.N_PRB_DMRS, //n_dmrs
deltaMCS);
sched_ctrl->ph = PH
+ compute_ph_factor(ul_bwp->scs,
sched_pusch->tb_size << 3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, // n_symbols
sched_pusch->dmrs_info.num_dmrs_symb * sched_pusch->dmrs_info.N_PRB_DMRS, // n_dmrs
deltaMCS,
1,0);
sched_ctrl->ph0 = PH;
/* 38.133 Table10.1.18.1-1 */
sched_ctrl->pcmax = PCMAX - 29;
LOG_D(NR_MAC, "SINGLE ENTRY PHR R1 %d PH %d (%d dB) R2 %d PCMAX %d (%d dBm)\n",
......@@ -625,12 +626,23 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
// if not missed detection (10dB threshold for now)
if (rssi>0) {
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30);
int txpower_calc = UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.phr_txpower_calc;
UE->mac_stats.deltaMCS = txpower_calc;
UE->mac_stats.NPRB = UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.rbSize;
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10,ul_cqi,30,txpower_calc);
if (UE_scheduling_control->ph <0 && UE_scheduling_control->tpc0 > 1)
UE_scheduling_control->tpc0 = 1;
if (timing_advance != 0xffff)
UE_scheduling_control->ta_update = timing_advance;
UE_scheduling_control->raw_rssi = rssi;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - (txpower_calc*10);
if (UE_scheduling_control->tpc0 > 1) LOG_D(NR_MAC, "[UE %04x] %d.%d. PUSCH TPC %d and TA %d pusch_snrx10 %d rssi %d phrx_tx_power %d PHR (1PRB) %d mcs %d, nb_rb %d\n",UE->rnti,frameP,slotP,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update,UE_scheduling_control->pusch_snrx10,UE_scheduling_control->raw_rssi,txpower_calc,UE_scheduling_control->ph,UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.mcs,UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.rbSize);
NR_UE_ul_harq_t *cur_harq = &UE_scheduling_control->ul_harq_processes[harq_pid];
if (cur_harq->round == 0)
UE->mac_stats.pusch_snrx10 = UE_scheduling_control->pusch_snrx10;
LOG_D(NR_MAC, "[UE %04x] PUSCH TPC %d and TA %d\n",UE->rnti,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
}
else{
......@@ -755,12 +767,11 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
ra->rnti);
NR_UE_sched_ctrl_t *UE_scheduling_control = &UE_msg3_stage->UE_sched_ctrl;
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30);
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30,UE_scheduling_control->sched_pusch.phr_txpower_calc);
if (timing_advance != 0xffff)
UE_scheduling_control->ta_update = timing_advance;
UE_scheduling_control->raw_rssi = rssi;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - UE_scheduling_control->sched_pusch.phr_txpower_calc*10;
LOG_D(NR_MAC, "[UE %04x] PUSCH TPC %d and TA %d\n", UE_msg3_stage->rnti, UE_scheduling_control->tpc0, UE_scheduling_control->ta_update);
if (ra->cfra) {
LOG_A(NR_MAC, "(rnti 0x%04x) CFRA procedure succeeded!\n", ra->rnti);
......@@ -1436,13 +1447,21 @@ static void nr_ue_max_mcs_min_rb(int mu,
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
tbs_bits = nr_compute_tbs(Qm, R, *Rb,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers);
int tx_power = compute_ph_factor(mu,
tbs_bits,
*Rb,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS);
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
1,0);
while (ph_limit < tx_power && *Rb > minRb) {
(*Rb)--;
......@@ -1458,7 +1477,8 @@ static void nr_ue_max_mcs_min_rb(int mu,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS);
deltaMCS,1,0);
LOG_D(NR_MAC, "Checking %d RBs, MCS %d, ph_limit %d, tx_power %d\n",*Rb,*mcs,ph_limit,tx_power);
}
while (ph_limit < tx_power && *mcs > 0) {
......@@ -1476,7 +1496,8 @@ static void nr_ue_max_mcs_min_rb(int mu,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS);
deltaMCS,1,0);
LOG_D(NR_MAC, "Checking %d RBs, MCS %d, ph_limit %d, tx_power %d\n",*Rb,*mcs,ph_limit,tx_power);
}
if (ph_limit < tx_power)
......@@ -1645,7 +1666,7 @@ static void pf_ul(module_id_t module_id,
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
const int min_rb = 5;
const int min_rb = 1;
// UEs that could be scheduled
UEsched_t UE_sched[MAX_MOBILES_PER_GNB] = {0};
int remainUEs = max_num_ue;
......@@ -1719,11 +1740,13 @@ static void pf_ul(module_id_t module_id,
const NR_bler_options_t *bo = &nrmac->ul_bler;
const int max_mcs_table = (current_BWP->mcs_table == 0 || current_BWP->mcs_table == 2) ? 28 : 27;
const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
if (bo->harq_round_max == 1)
sched_pusch->mcs = max_mcs;
else
else {
sched_pusch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame);
LOG_D(NR_MAC,"%d.%d starting mcs %d bleri %f\n",frame,slot,sched_pusch->mcs,sched_ctrl->ul_bler_stats.bler);
}
/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
* based on data to transmit) */
if (B == 0 && do_sched) {
......@@ -1792,6 +1815,25 @@ static void pf_ul(module_id_t module_id,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers) >> 3;
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
sched_pusch->tb_size << 3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
0,0);
LOG_D(NR_MAC,
"pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n",
frame,
slot,
UE->rnti,
sched_pusch->rbSize,
sched_pusch->mcs,
sched_pusch->tb_size << 3,
sched_pusch->phr_txpower_calc);
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
......@@ -1908,6 +1950,19 @@ static void pf_ul(module_id_t module_id,
&TBS,
&rbSize);
// Calacualte the normalized tx_power for PHR
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tbs_bits = TBS << 3;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
tbs_bits,
rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
0,0);
sched_pusch->rbSize = rbSize;
sched_pusch->tb_size = TBS;
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
......@@ -2295,6 +2350,19 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R);
// Calacualte the normalized tx_power for PHR
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tbs_bits = pusch_pdu->pusch_data.tb_size << 3;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
tbs_bits,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
0,0);
NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info;
if (sc_info->rateMatching_PUSCH) {
// TBS_LBRM according to section 5.4.2.1 of 38.212
......
......@@ -272,7 +272,7 @@ NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_tda_info_t *tda_info,
const int Layers);
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr);
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr, int tx_power);
int get_spf(nfapi_nr_config_request_scf_t *cfg);
......
......@@ -156,15 +156,23 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
for (int i = 1; i < gNB->ul_bler.harq_round_max; i++)
output += snprintf(output, end - output, "/%"PRIu64, stats->ul.rounds[i]);
char deltaMCS_str[100]="\0";
if (UE->current_UL_BWP.pusch_Config && UE->current_UL_BWP.pusch_Config->pusch_PowerControl->deltaMCS) {
sprintf(deltaMCS_str,"deltaMCS %d\n",UE->mac_stats.deltaMCS);
}
output += snprintf(output,
end - output,
", ulsch_errors %"PRIu64", ulsch_DTX %d, BLER %.5f MCS (%d) %d\n",
", ulsch_errors %"PRIu64", ulsch_DTX %d, BLER %.5f MCS (%d) %d (Qm %d %s dB) NPRB %d SNR %d.%d dB\n",
stats->ul.errors,
stats->ulsch_DTX,
sched_ctrl->ul_bler_stats.bler,
UE->current_UL_BWP.mcs_table,
sched_ctrl->ul_bler_stats.mcs);
sched_ctrl->ul_bler_stats.mcs,
nr_get_Qm_ul(sched_ctrl->ul_bler_stats.mcs, UE->current_UL_BWP.mcs_table),
deltaMCS_str,UE->mac_stats.NPRB,
sched_ctrl->pusch_snrx10 / 10,
sched_ctrl->pusch_snrx10 % 10);
output += snprintf(output,
end - output,
"UE %04x: MAC: TX %14"PRIu64" RX %14"PRIu64" bytes\n",
......
......@@ -135,6 +135,8 @@ typedef struct nr_mac_config_t {
int do_CSIRS;
int do_SRS;
bool force_256qam_off;
bool force_UL256qam_off;
bool use_deltaMCS;
//int pusch_TargetSNRx10;
//int pucch_TargetSNRx10;
} nr_mac_config_t;
......@@ -407,6 +409,7 @@ typedef struct NR_sched_pusch {
int time_domain_allocation;
NR_tda_info_t tda_info;
NR_pusch_dmrs_t dmrs_info;
int phr_txpower_calc;
} NR_sched_pusch_t;
typedef struct NR_sched_srs {
......@@ -575,6 +578,9 @@ typedef struct {
/// PHR info: power headroom level (dB)
int ph;
/// PHR info: power headroom level (dB) for 1 PRB
int ph0;
/// PHR info: nominal UE transmit power levels (dBm)
int pcmax;
......@@ -673,6 +679,9 @@ typedef struct NR_mac_stats {
int cumul_rsrp;
uint8_t num_rsrp_meas;
char srs_stats[50]; // Statistics may differ depending on SRS usage
int pusch_snrx10;
int deltaMCS;
int NPRB;
} NR_mac_stats_t;
typedef struct NR_bler_options {
......
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