Commit 5cc6d9e5 authored by Raymond Knopp's avatar Raymond Knopp

Merge branch 'sl-eurecom2' of https://gitlab.eurecom.fr/oai/openairinterface5g into sl-eurecom2

parents 1a815f7e 05cb48d2
...@@ -890,6 +890,7 @@ void *UE_thread(void *arg) ...@@ -890,6 +890,7 @@ void *UE_thread(void *arg)
if (is_sidelink) { if (is_sidelink) {
fp = &UE->SL_UE_PHY_PARAMS.sl_frame_params; fp = &UE->SL_UE_PHY_PARAMS.sl_frame_params;
sl_cfg = &UE->SL_UE_PHY_PARAMS.sl_config; sl_cfg = &UE->SL_UE_PHY_PARAMS.sl_config;
openair0_cfg[0].gpio_controller = RU_GPIO_CONTROL_GENERIC;
} }
AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), ""); AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
UE->rfdevice.host_type = RAU_HOST; UE->rfdevice.host_type = RAU_HOST;
......
...@@ -261,8 +261,8 @@ static int sync_to_gps(openair0_device *device) { ...@@ -261,8 +261,8 @@ static int sync_to_gps(openair0_device *device) {
} }
#define ATR_MASK 0x7f //pins controlled by ATR #define ATR_MASK 0x7f //pins controlled by ATR
#define ATR_RX 0x50 //data[4] and data[6] #define ATR_RX 0x70 //data[4],data[5] and data[6]
#define ATR_XX 0x20 //data[5] #define ATR_XX 0x08 //data[3]
#define MAN_MASK ATR_MASK ^ 0xFFF // manually controlled pins #define MAN_MASK ATR_MASK ^ 0xFFF // manually controlled pins
static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state_t *s) static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state_t *s)
...@@ -286,6 +286,7 @@ static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state ...@@ -286,6 +286,7 @@ static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state
static void trx_usrp_start_generic_gpio(openair0_device *device, usrp_state_t *s) static void trx_usrp_start_generic_gpio(openair0_device *device, usrp_state_t *s)
{ {
LOG_I(HW,"Setting Generic GPIO\n");
// setup GPIO for TDD, GPIO(4) = ATR_RX // setup GPIO for TDD, GPIO(4) = ATR_RX
// set data direction register (DDR) to output // set data direction register (DDR) to output
s->usrp->set_gpio_attr(s->gpio_bank, "DDR", 0xfff, 0xfff); s->usrp->set_gpio_attr(s->gpio_bank, "DDR", 0xfff, 0xfff);
......
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