first version of reworking scheduling function, including UL scheduling

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -288,6 +288,26 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
 }
 */
 
+void nr_schedule_ulsch(int Mod_idP,
+                       int UE_id,
+                       frame_t frameP,
+                       sub_frame_t slotP) {
+
+  nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
+  NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
+  NR_sched_pusch *pusch = UE_list->UE_sched_ctrl[UE_id].sched_pusch;
+
+  if ((pusch->active == true) && (frameP == pusch->frame) && (slotP == pusch->slot)) {
+    UL_tti_req->SFN = pusch->frame;
+    UL_tti_req->Slot = pusch->slot;
+    UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
+    UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
+    UL_tti_req->pdus_list[UL_tti_req->n_pdus].pusch_pdu = pusch->pusch_pdu;
+    UL_tti_req->n_pdus+=1;
+    pusch->active = false;
+  }
+}
+
 void nr_schedule_pucch(int Mod_idP,
                        int UE_id,
                        frame_t frameP,
@@ -378,6 +398,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     nr_ulmix_slots++;
 
   if (slot_txP== 0 && (UE_list->fiveG_connected[UE_id] || get_softmodem_params()->phy_test)) {
+    memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pusch,
+           0,
+           sizeof(NR_sched_pusch));
     for (int k=0; k<nr_ulmix_slots; k++) {
       memset((void *) &UE_list->UE_sched_ctrl[UE_id].sched_pucch[k],
              0,
@@ -413,8 +436,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
       *ulsch_in_slot_bitmap = 0x00;
   }
 
-  // Check if there are downlink symbols in the slot, 
-  if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_txP)) {
+
   memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
   memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
   for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
@@ -446,19 +468,30 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     schedule_nr_mib(module_idP, frame_txP, slot_txP);
   }
 
+  // This schedule PRACH if we are not in phy_test mode
   if (get_softmodem_params()->phy_test == 0)
+    schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
+
+  // This schedule SR
+  // TODO
+
+  // This schedule CSI
+  // TODO
+
+  // This schedule RA procedure if not in phy_test mode
+  // Otherwise already consider 5G already connected
+  if (get_softmodem_params()->phy_test == 0) {
     nr_schedule_RA(module_idP, frame_txP, slot_txP);
+    nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
+  }
   else
     UE_list->fiveG_connected[UE_id] = true;
 
-    // Phytest scheduling
-
   if (get_softmodem_params()->phy_test) {
 
     // TbD once RACH is available, start ta_timer when UE is connected
     if (ue_sched_ctl->ta_timer)
       ue_sched_ctl->ta_timer--;
-
     if (ue_sched_ctl->ta_timer == 0) {
       gNB->ta_command = ue_sched_ctl->ta_update;
       /* if time is up, then set the timer to not send it for 5 frames
@@ -471,6 +504,14 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     }
   }
 
+
+  // This schedules the DCI for Uplink and subsequently PUSCH
+  if (UE_list->fiveG_connected[UE_id]) {
+    int tda = 1; // time domain assignment hardcoded for now
+    schedule_fapi_ul_pdu(module_idP, frame_txP, slot_txP, num_slots_per_tdd, tda);
+    nr_schedule_ulsch(module_idP, UE_id, frame_rxP, slot_rxP);
+  }
+
   if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
     ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
     nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,&pucch_sched);
@@ -479,30 +520,15 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     gNB->ta_len = 0;
   }
 
+  if (UE_list->fiveG_connected[UE_id])
+    nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
+
     /*
     // Allocate CCEs for good after scheduling is done
     for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
       allocate_CCEs(module_idP, CC_id, subframeP, 0);
     */
 
-  } //is_nr_DL_slot
-
-  if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) { 
-
-    if (get_softmodem_params()->phy_test == 0) {
-      if (UE_list->fiveG_connected[UE_id])
-        nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
-      schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
-      nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
-    }
-    if (get_softmodem_params()->phy_test){
-      nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
-      if (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%num_slots_per_tdd)){
-        nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
-      }
-    }
-  }
-
   stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
   
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c

@@ -54,6 +54,8 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
   NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
   nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0];
 
+  if (is_nr_UL_slot(scc,slotP)) {
+
     uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
     uint8_t mu,N_dur,N_t_slot,start_symbol;
     uint16_t format;
@@ -160,9 +162,9 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
         }
       }
     }
+  }
 }
 
-
 void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
                       uint16_t *msg2_frame, uint16_t *msg2_slot,
                       NR_ServingCellConfigCommon_t *scc,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -773,9 +773,11 @@ void nr_schedule_uss_dlsch_phytest(module_id_t   module_idP,
 }
 
 
-void nr_schedule_uss_ulsch_phytest(int Mod_idP,
+void schedule_fapi_ul_pdu(int Mod_idP,
                           frame_t frameP,
-                                   sub_frame_t   slotP) {
+                          sub_frame_t slotP,
+                          int num_slots_per_tdd,
+                          int time_domain_assignment) {
 
   gNB_MAC_INST                      *nr_mac    = RC.nrmac[Mod_idP];
   NR_COMMON_channels_t                  *cc    = nr_mac->common_channels;
@@ -795,23 +797,36 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
   int n_ubwp = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count;
   NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
   NR_PUSCH_Config_t *pusch_Config = ubwp->bwp_Dedicated->pusch_Config->choice.setup;
-  nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
+
+  int K2;
+  if (ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->k2 != NULL)
+   K2 = *ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->k2;
+  else {
+    if (mu<2) K2=1;
+    else if(mu==2) K2=2;
+         else K2=3;
+  }
+
+  if (is_xlsch_in_slot(UE_list->UE_sched_ctrl[UE_id].ulsch_in_slot_bitmap,(slotP+K2)%num_slots_per_tdd)) {
+
+    //nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
     nfapi_nr_ul_dci_request_t *UL_dci_req = &RC.nrmac[Mod_idP]->UL_dci_req[0];
+    UL_dci_req->SFN = frameP;
+    UL_dci_req->Slot = slotP;
+    nfapi_nr_ul_dci_request_pdus_t  *ul_dci_request_pdu;
 
     AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList!=NULL,"searchPsacesToAddModList is null\n");
     AssertFatal(bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count>0,
                 "searchPsacesToAddModList is empty\n");
 
     uint16_t rnti = UE_list->rnti[UE_id];
-  nfapi_nr_ul_dci_request_pdus_t  *ul_dci_request_pdu;
 
-  UL_tti_req->SFN = frameP;
-  UL_tti_req->Slot = slotP;
-  UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
-  UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
-  nfapi_nr_pusch_pdu_t  *pusch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pusch_pdu;
+    NR_sched_pusch *pusch_sched = UE_list->UE_sched_ctrl[UE_id].sched_pusch;
+    pusch_sched->frame = frameP;
+    pusch_sched->slot = slotP + K2;
+    pusch_sched->active = true;
+    nfapi_nr_pusch_pdu_t  *pusch_pdu = &pusch_sched->pusch_pdu;
     memset(pusch_pdu,0,sizeof(nfapi_nr_pusch_pdu_t));
-  UL_tti_req->n_pdus+=1;  
 
     LOG_D(MAC, "Scheduling UE specific PUSCH\n");
     //UL_tti_req = &nr_mac->UL_tti_req[CC_id];
@@ -819,7 +834,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
     //Resource Allocation in time domain
     int startSymbolAndLength=0;
     int time_domain_assignment=1;
-  int StartSymbolIndex,NrOfSymbols,K2,mapping_type;
+    int StartSymbolIndex,NrOfSymbols,mapping_type;
 
     AssertFatal(time_domain_assignment<ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count,
                 "time_domain_assignment %d>=%d\n",time_domain_assignment,ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.count);
@@ -829,13 +844,6 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
     pusch_pdu->nr_of_symbols = NrOfSymbols;
 
     mapping_type = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
-  if (ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->k2 != NULL)
-   K2 = *ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[time_domain_assignment]->k2;
-  else {
-    if (mu<2) K2=1;
-    else if(mu==2) K2=2;
-         else K2=3;
-  }
 
     pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
     pusch_pdu->rnti = rnti;
@@ -918,8 +926,8 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
         pusch_pdu->pusch_identity = *scc->physCellId;
     }
     pusch_dmrs_AdditionalPosition_t additional_pos;
-  if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL){printf("%d\n",2);
-    additional_pos = 2;}
+    if (NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NULL)
+      additional_pos = 2;
     else {
       if (*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition == NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos3)
         additional_pos = 3;
@@ -956,7 +964,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
       pusch_pdu->pdu_bit_map &= PUSCH_PDU_BITMAP_PUSCH_PTRS; // enable PUSCH PTRS
     }
     else{
-//    if(1<<pusch_pdu->pusch_ptrs.ptrs_time_density >= pusch_pdu->nr_of_symbols)
+  //    if(1<<pusch_pdu->pusch_ptrs.ptrs_time_density >= pusch_pdu->nr_of_symbols)
       pusch_pdu->pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
     }
 
@@ -1006,6 +1014,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
     ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
     ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
     nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
+    UL_dci_req->numPdus+=1;
 
     int dci_formats[2];
     int rnti_types[2];
@@ -1048,7 +1057,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
 
     if (ret < 0) {
       LOG_I(MAC,"CCE list not empty, couldn't schedule PUSCH\n");
-   UL_tti_req->n_pdus-=1;
+      pusch_sched->active = false;
       return;
     }
     else {
@@ -1056,5 +1065,6 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
       config_uldci(ubwp,pusch_pdu,pdcch_pdu_rel15,&dci_pdu_rel15[0],dci_formats,rnti_types,n_ubwp,bwp_id);
       fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15,dci_pdu_rel15,dci_formats,rnti_types,pusch_pdu->bwp_size,bwp_id);
     }
+  }
 }
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -1468,6 +1468,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
            0,
            sizeof(NR_UE_sched_ctrl_t));
     UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
+    UE_list->UE_sched_ctrl[UE_id].sched_pusch = (NR_sched_pusch *)malloc(sizeof(NR_sched_pusch));
     LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
           mod_idP,
           UE_id,

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -153,7 +153,8 @@ void nr_schedule_uss_dlsch_phytest(module_id_t   module_idP,
                                    NR_sched_pucch *pucch_sched,
                                    nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_config);
 
-void nr_schedule_uss_ulsch_phytest(int Mod_idP,
+void nr_schedule_ulsch(int Mod_idP,
+                       int UE_id,
                        frame_t       frameP,
                        sub_frame_t   slotP);
 
@@ -287,6 +288,11 @@ void nr_generate_Msg2(module_id_t module_idP,
 
 void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP);
 
+void schedule_fapi_ul_pdu(int Mod_idP,
+                          frame_t frameP,
+                          sub_frame_t slotP,
+                          int num_slots_per_tdd,
+                          int time_domain_assignment);
 
 void nr_process_mac_pdu(
     module_id_t module_idP,
@@ -297,6 +303,8 @@ void nr_process_mac_pdu(
 
 int binomial(int n, int k);
 
+bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot);
+
 
 /* \brief Function to indicate a received SDU on ULSCH.
 @param Mod_id Instance ID of gNB

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -253,6 +253,13 @@ typedef struct NR_sched_pucch {
   uint8_t resource_indicator;
 } NR_sched_pucch;
 
+typedef struct NR_sched_pusch {
+  int frame;
+  int slot;
+  bool active;
+  nfapi_nr_pusch_pdu_t pusch_pdu;
+} NR_sched_pusch;
+
 typedef struct NR_UE_harq {
   uint8_t is_waiting;
   uint8_t ndi;
@@ -265,6 +272,7 @@ typedef struct {
   uint64_t dlsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains dlsch
   uint64_t ulsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains ulsch
   NR_sched_pucch *sched_pucch;
+  NR_sched_pusch *sched_pusch;
   uint16_t ta_timer;
   int16_t ta_update;
   uint8_t current_harq_pid;