Merge remote-tracking branch 'origin/NR_CSI_reporting' into integration_2020_wk44

cmake_targets/CMakeLists.txt

@@ -1593,6 +1593,7 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
   ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
+  ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_csi_rs.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/scrambling_luts.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gen_mod_table.c

nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h

@@ -1260,7 +1260,7 @@ typedef struct
 
 typedef struct 
 {
-  uint8_t  pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 65535
+  uint8_t  pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 255
 
 } nfapi_nr_ul_tti_request_number_of_ue_t;
 
@@ -1541,7 +1541,7 @@ typedef struct
 }nfapi_nr_uci_pucch_pdu_format_2_3_4_t;
 
 typedef enum {
-  NFAPI_NR_UCI_PDCCH_PDU_TYPE  = 0,
+  NFAPI_NR_UCI_PUSCH_PDU_TYPE  = 0,
   NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE  = 1,
   NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE = 2,
 } nfapi_nr_uci_pdu_type_e;

openair1/PHY/CODING/crc_byte.c

@@ -260,7 +260,7 @@ crc6 (unsigned char * inptr, int bitlen)
   }
 
   if (resbit > 0)
-    crc = (crc << resbit) ^ (crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
+    crc = (crc << resbit) ^ (crc6Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
 
   return crc;
 }

openair1/PHY/INIT/nr_init.c

@@ -181,9 +181,27 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
   LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
   nr_gold_pusch(gNB, &Nid_pusch[0]);
 
+  //CSI RS init
+  gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
+  uint32_t ***csi_rs = gNB->nr_gold_csi_rs;
+  AssertFatal(csi_rs!=NULL, "NR init: csi reference signal malloc failed\n");
+
+  for (int slot=0; slot<fp->slots_per_frame; slot++) {
+    csi_rs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
+    AssertFatal(csi_rs[slot]!=NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot);
+
+    for (int symb=0; symb<fp->symbols_per_slot; symb++) {
+      csi_rs[slot][symb] = (uint32_t *)malloc16(NR_MAX_CSI_RS_INIT_LENGTH_DWORD*sizeof(uint32_t));
+      AssertFatal(csi_rs[slot][symb]!=NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
+    }
+  }
+
+  nr_init_csi_rs(gNB, 0); // TODO scramblingID currently hardcoded to 0, to be taken from higher layer parameter scramblingID when implemented
+
   /// Transport init necessary for NR synchro
   init_nr_transport(gNB);
 
+
   gNB->first_run_I0_measurements = 1;
 
   common_vars->rxdata  = (int32_t **)malloc16(Prx*sizeof(int32_t*));

openair1/PHY/NR_REFSIG/nr_gold.c

@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
     for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
 
       reset = 1;
-      x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1)) + (Nid<<1);
+      x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
 
       for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
         pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
@@ -130,3 +130,26 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
     }
   }
 }
+
+
+void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid)
+{
+  NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
+  uint32_t ***csi_rs = gNB->nr_gold_csi_rs;
+  uint32_t x1, x2;
+  uint8_t reset;
+
+  for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
+    for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
+
+      reset = 1;
+      x2 = ((1<<10) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
+
+      for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
+        csi_rs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
+        reset = 0;
+      }
+    }  
+  }
+
+}

openair1/PHY/NR_REFSIG/nr_refsig.h

@@ -38,6 +38,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
  */
 void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
 void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
+void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
 
 void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
 

openair1/PHY/NR_TRANSPORT/nr_transport_proto.h

@@ -327,6 +327,13 @@ int nr_find_pucch(uint16_t rnti,
 void init_prach_list(PHY_VARS_gNB *gNB);
 void init_prach_ru_list(RU_t *ru);
 void free_nr_ru_prach_entry(RU_t *ru, int prach_id);
+
+int nr_generate_csi_rs(uint32_t **gold_csi_rs,
+                       int32_t **txdataF,
+                       int16_t amp,
+                       NR_DL_FRAME_PARMS frame_parms,
+                       nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params);
+
 void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id);
 
 void nr_decode_pucch1(int32_t **rxdataF,
@@ -354,5 +361,10 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
                       nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu,
                       nfapi_nr_pucch_pdu_t* pucch_pdu);
 
+void nr_decode_pucch2(PHY_VARS_gNB *gNB,
+                      int slot,
+                      nfapi_nr_uci_pucch_pdu_format_2_3_4_t* uci_pdu,
+                      nfapi_nr_pucch_pdu_t* pucch_pdu);
+
 
 #endif /*__NR_TRANSPORT__H__*/

openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c

@@ -1136,8 +1136,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
                                 rel15_ul);
 
     for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
-      gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
-                                                                   rel15_ul->rb_size*12);
+      gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
+                                                                        rel15_ul->rb_size*12);
       if (gNB->pusch_vars[ulsch_id]->ulsch_power[aarx]==1) return (1);
     }
 

openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h

@@ -87,6 +87,10 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
                         unsigned char rank_adaptation,
                         uint8_t subframe);
 
+void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
+						uint8_t slot,
+						uint8_t abstraction_flag);
+
 void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
                         uint32_t rx_power_fil_dB,
                         uint8_t eNB_id);
@@ -94,4 +98,6 @@ void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
 int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index);
 
 
+float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
+
 #endif

openair1/PHY/NR_UE_ESTIMATION/nr_ue_measurements.c

@@ -23,6 +23,7 @@
 #include "PHY/phy_extern_nr_ue.h"
 #include "common/utils/LOG/log.h"
 #include "PHY/sse_intrin.h"
+#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
 
 //#define k1 1000
 #define k1 ((long long int) 1000)
@@ -76,6 +77,35 @@ int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index){
                     //(ue->frame_parms.pdsch_config_common.referenceSignalPower*10))/10));
 }
 
+uint32_t get_nr_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
+{
+
+  PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
+
+  if (ue)
+    return ue->rx_total_gain_dB;
+
+  return 0xFFFFFFFF;
+}
+
+
+float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
+{
+
+  AssertFatal(PHY_vars_UE_g!=NULL,"PHY_vars_UE_g is null\n");
+  AssertFatal(PHY_vars_UE_g[Mod_id]!=NULL,"PHY_vars_UE_g[%d] is null\n",Mod_id);
+  AssertFatal(PHY_vars_UE_g[Mod_id][CC_id]!=NULL,"PHY_vars_UE_g[%d][%d] is null\n",Mod_id,CC_id);
+
+  PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
+
+  if (ue)
+    return (10*log10(ue->measurements.rsrp[gNB_index])-
+	    get_nr_rx_total_gain_dB(Mod_id,0) -
+	    10*log10(20*12));
+  return -140.0;
+}
+
+
 void nr_ue_measurements(PHY_VARS_NR_UE *ue,
                          unsigned int subframe_offset,
                          unsigned char N0_symbol,
@@ -191,4 +221,74 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
   _mm_empty();
   _m_empty();
 #endif
-}
\ No newline at end of file
+}
+
+void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
+    uint8_t slot,
+    uint8_t abstraction_flag)
+{
+	int aarx,rb, symbol_offset;
+	int16_t *rxF;
+
+	uint16_t Nid_cell = ue->frame_parms.Nid_cell;
+	uint8_t eNB_offset=0,l,nushift;
+	uint16_t off,nb_rb;
+//	NR_UE_MAC_INST_t *mac = get_mac_inst(0);
+	int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF;
+
+	nushift =  ue->frame_parms.Nid_cell%4;
+	ue->frame_parms.nushift = nushift;
+	unsigned int  ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
+	if (ssb_offset>= ue->frame_parms.ofdm_symbol_size) ssb_offset-=ue->frame_parms.ofdm_symbol_size;
+	
+	symbol_offset = ue->frame_parms.ofdm_symbol_size*(ue->symbol_offset+1);
+
+    ue->measurements.rsrp[eNB_offset] = 0;
+
+    //if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){ 
+		nb_rb = 20;
+	//} else{
+	//	LOG_E(PHY,"report quantity not supported \n");
+	//}
+
+    if (abstraction_flag == 0) {
+
+      for (l=0; l<1; l++) {
+
+        LOG_D(PHY,"[UE %d]  slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, l %d)\n",ue->Mod_id,slot,Nid_cell,nushift,
+              eNB_offset,l);
+
+        for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
+          rxF   = (int16_t *)&rxdataF[aarx][(symbol_offset+ssb_offset+nushift)];
+          off  = 0; 
+
+          if (l==0) {
+            for (rb=0; rb<nb_rb; rb++) {
+
+              ue->measurements.rsrp[eNB_offset] += (((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1]));
+                      //printf("rb %d, off %d : %d\n",rb,off,((((int32_t)rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1])));
+
+              off = (off+4) % ue->frame_parms.ofdm_symbol_size;
+            }
+          }
+        }
+      }
+
+	  ue->measurements.rsrp[eNB_offset]/=nb_rb;
+
+	} else { 
+
+      ue->measurements.rsrp[eNB_offset] = -93 ;
+    }
+
+
+      if (eNB_offset == 0)
+
+      LOG_I(PHY,"[UE %d] slot %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d)\n",
+            ue->Mod_id,
+            slot,eNB_offset,
+            (eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
+            10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
+            ue->measurements.rsrp[eNB_offset]);
+
+}

openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c

@@ -1045,7 +1045,11 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
   for (int l=0; l<nrofSymbols; l++) {
     x2 = (((1<<17)*((14*nr_tti_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
 
-    s = lte_gold_generic(&x1, &x2, 1);
+    int reset = 1;
+    for (int ii=0; ii<=(startingPRB>>2); ii++) {
+      s = lte_gold_generic(&x1, &x2, reset);
+      reset = 0;
+    }
     m = 0;
     for (int rb=0; rb<nrofPRB; rb++) {
       //startingPRB = startingPRB + rb;

openair1/PHY/defs_gNB.h

@@ -752,6 +752,9 @@ typedef struct PHY_VARS_gNB_s {
   uint32_t rb_mask_ul[9];
   int ulmask_symb;
 
+  /// CSI  RS sequence
+  uint32_t ***nr_gold_csi_rs;
+
   /// Indicator set to 0 after first SR
   uint8_t first_sr[NUMBER_OF_NR_SR_MAX];
 

openair1/PHY/defs_nr_common.h

@@ -82,6 +82,9 @@
 #define NR_MAX_PDSCH_DMRS_LENGTH 3300      //275*6(k)*2(QPSK real+imag) 
 #define NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD 104  // ceil(NR_MAX_PDSCH_DMRS_LENGTH/32)
 
+#define NR_MAX_CSI_RS_LENGTH 4400 //275*8(max allocation per RB)*2(QPSK)
+#define NR_MAX_CSI_RS_INIT_LENGTH_DWORD 138  // ceil(NR_MAX_CSI_RS_LENGTH/32)
+
 #define NR_MAX_PUSCH_DMRS_LENGTH NR_MAX_PDSCH_DMRS_LENGTH 
 #define NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD
 

openair1/SCHED_NR/phy_procedures_nr_gNB.c

@@ -136,8 +136,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
   int offset = gNB->CC_id;
   uint8_t ssb_frame_periodicity = 1;  // every how many frames SSB are generated
   int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
-
-  
   
   if (cfg->ssb_table.ssb_period.value > 1) 
     ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ; 
@@ -518,7 +516,6 @@ void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
                      0);
     }
   }
-
 }
 
 void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
@@ -538,10 +535,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
 
         nfapi_nr_pucch_pdu_t  *pucch_pdu = &pucch->pucch_pdu;
         uint16_t num_ucis;
-
         switch (pucch_pdu->format_type) {
         case 0:
-
           num_ucis = gNB->UL_INFO.uci_ind.num_ucis;
           gNB->UL_INFO.uci_ind.uci_list = &gNB->uci_pdu_list[0];
           gNB->UL_INFO.uci_ind.sfn = frame_rx;
@@ -558,8 +553,25 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
           gNB->UL_INFO.uci_ind.num_ucis += 1;
           pucch->active = 0;
 	  break;
+        case 2:
+          num_ucis = gNB->UL_INFO.uci_ind.num_ucis;
+          gNB->UL_INFO.uci_ind.uci_list = &gNB->uci_pdu_list[0];
+          gNB->UL_INFO.uci_ind.sfn = frame_rx;
+          gNB->UL_INFO.uci_ind.slot = slot_rx;
+          gNB->uci_pdu_list[num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE;
+          gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_2_3_4_t);
+          nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu_format2 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_2_3_4;
+
+          nr_decode_pucch2(gNB,
+                           slot_rx,
+                           uci_pdu_format2,
+                           pucch_pdu);
+
+          gNB->UL_INFO.uci_ind.num_ucis += 1;
+          pucch->active = 0;
+          break;
         default:
-	  AssertFatal(1==0,"Only PUCCH format 0 is currently supported\n");
+	  AssertFatal(1==0,"Only PUCCH formats 0 and 2 are currently supported\n");
         }
       }
     }

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -50,7 +50,9 @@
 #include "SCHED/phy_procedures_emos.h"
 #endif
 #include "executables/softmodem-common.h"
+#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
 
+//#define DEBUG_PHY_PROC
 #define NR_PDCCH_SCHED
 //#define NR_PDCCH_SCHED_DEBUG
 //#define NR_PUCCH_SCHED
@@ -1649,6 +1651,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
   uint8_t dci_cnt = 0;
   NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
 
+  //NR_UE_MAC_INST_t *mac = get_mac_inst(0);
+  
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
 
   LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ******  \n", frame_rx%1024, nr_tti_rx);
@@ -1687,6 +1691,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
 #endif
       
       }
+      
+      //if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){ 
+        nr_ue_rsrp_measurements(ue,nr_tti_rx,0);
+      //}
+	
+
       nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
 
       if (ue->no_timing_correction==0) {

openair1/SCHED_NR_UE/pucch_uci_ue_nr.h

@@ -60,6 +60,111 @@
 
 /************** VARIABLES *****************************************/
 
+float RSRP_meas_mapping_nr[98] 
+#ifdef INIT_VARIABLES_PUCCH_UE_NR_H 
+= {
+  -140,
+    -139,
+    -138,
+    -137,
+    -136,
+    -135,
+    -134,
+    -133,
+    -132,
+    -131,
+    -130,
+    -129,
+    -128,
+    -127,
+    -126,
+    -125,
+    -124,
+    -123,
+    -122,
+    -121,
+    -120,
+    -119,
+    -118,
+    -117,
+    -116,
+    -115,
+    -114,
+    -113,
+    -112,
+    -111,
+    -110,
+    -109,
+    -108,
+    -107,
+    -106,
+    -105,
+    -104,
+    -103,
+    -102,
+    -101,
+    -100,
+    -99,
+    -98,
+    -97,
+    -96,
+    -95,
+    -94,
+    -93,
+    -92,
+    -91,
+    -90,
+    -89,
+    -88,
+    -87,
+    -86,
+    -85,
+    -84,
+    -83,
+    -82,
+    -81,
+    -80,
+    -79,
+    -78,
+    -77,
+    -76,
+    -75,
+    -74,
+    -73,
+    -72,
+    -71,
+    -70,
+    -69,
+    -68,
+    -67,
+    -66,
+    -65,
+    -64,
+    -63,
+    -62,
+    -61,
+    -60,
+    -59,
+    -58,
+    -57,
+    -56,
+    -55,
+    -54,
+    -53,
+    -52,
+    -51,
+    -50,
+    -49,
+    -48,
+    -47,
+    -46,
+    -45,
+    -44,
+    -43
+  }
+  #endif
+  ;
+  
 /* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
 const initial_pucch_resource_t initial_pucch_resource[NB_INITIAL_PUCCH_RESOURCE]
 #ifdef INIT_VARIABLES_PUCCH_UE_NR_H
@@ -226,12 +331,14 @@ int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_n
     @param csi_payload is updated with CSI
     @returns number of bits of CSI */
 
-int get_csi_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload);
+int get_csi_nr(NR_UE_MAC_INST_t *mac, PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload);
 
 /** \brief This dummy function sets current CSI for simulation
     @param csi_status
     @param csi_payload is updated with CSI
     @returns none */
+    
+uint16_t get_nr_csi_bitlen(NR_UE_MAC_INST_t *mac);
 
 void set_csi_nr(int csi_status, uint32_t csi_payload);
 

openair1/SIMULATION/NR_PHY/dlsim.c

@@ -537,13 +537,14 @@ int main(int argc, char **argv)
   uint64_t ssb_bitmap;
   fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
 
+  fix_scc(scc,ssb_bitmap);
+
   fill_default_secondaryCellGroup(scc,
 				  secondaryCellGroup,
 				  0,
 				  1,
 				  n_tx,
 				  0);
-  fix_scc(scc,ssb_bitmap);
 
   xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
 

openair1/SIMULATION/NR_PHY/pbchsim.c

@@ -35,6 +35,7 @@
 #include "PHY/NR_REFSIG/refsig_defs_ue.h"
 #include "PHY/MODULATION/modulation_eNB.h"
 #include "PHY/MODULATION/modulation_UE.h"
+#include "PHY/MODULATION/nr_modulation.h"
 #include "PHY/INIT/phy_init.h"
 #include "PHY/NR_TRANSPORT/nr_transport_proto.h"
 #include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"

openair1/SIMULATION/NR_PHY/ulsim.c

@@ -565,13 +565,14 @@ int main(int argc, char **argv)
   uint64_t ssb_bitmap;
   fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
 
+  fix_scc(scc,ssb_bitmap);
+
   fill_default_secondaryCellGroup(scc,
 				  secondaryCellGroup,
 				  0,
 				  1,
 				  n_tx,
 				  0);
-  fix_scc(scc,ssb_bitmap);
 
   // xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
 

openair2/LAYER2/NR_MAC_UE/mac_defs.h

@@ -63,7 +63,11 @@
 #include "NR_PhysicalCellGroupConfig.h"
 #include "NR_CellGroupConfig.h"
 #include "NR_ServingCellConfig.h"
-
+#include "NR_MeasConfig.h"
+#include "fapi_nr_ue_interface.h"
+#include "NR_IF_Module.h"
+#include "PHY/defs_nr_common.h"
+#include "openair2/LAYER2/NR_MAC_COMMON/nr_mac.h"
 
 #define NB_NR_UE_MAC_INST 1
 /*!\brief Maximum number of logical channl group IDs */
@@ -158,6 +162,7 @@ typedef struct {
   NR_CellGroupConfig_t            *scg;
   NR_RACH_ConfigDedicated_t       *rach_ConfigDedicated;
   int                             servCellIndex;
+  NR_CSI_ReportConfig_t           *csirc;
   ////  MAC config
   NR_DRX_Config_t                 *drx_Config;
   NR_SchedulingRequestConfig_t    *schedulingRequestConfig;

openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c

@@ -538,7 +538,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
       first_symbol_index = 0;
     }
     //  38.213 chapter 13: over two consecutive slots
-    search_space_duration = 2;
+    //search_space_duration = 2;
   }
 
   /// MUX PATTERN 2

openair2/LAYER2/NR_MAC_gNB/config.c

@@ -315,6 +315,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
 }
 
 
+
 int rrc_mac_config_req_gNB(module_id_t Mod_idP, 
 			   int ssb_SubcarrierOffset,
                            int pdsch_AntennaPorts,
@@ -367,6 +368,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
     if (add_ue == 1 && get_softmodem_params()->phy_test) {
       const int UE_id = add_new_nr_ue(Mod_idP,rnti);
       UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup;
+      compute_csi_bitlen (secondaryCellGroup, UE_info, UE_id);
       struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList =
           secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
       AssertFatal(bwpList->list.count == 1,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -344,9 +344,8 @@ void nr_schedule_pucch(int Mod_idP,
                        frame_t frameP,
                        sub_frame_t slotP) {
 
-  uint16_t O_uci;
-  uint16_t O_ack;
-  uint8_t SR_flag = 0; // no SR in PUCCH implemented for now
+  uint16_t O_csi, O_ack, O_uci;
+  uint8_t O_sr = 0; // no SR in PUCCH implemented for now
   NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
   NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
   AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id);
@@ -359,31 +358,36 @@ void nr_schedule_pucch(int Mod_idP,
   NR_sched_pucch *curr_pucch;
 
   for (int k=0; k<nr_ulmix_slots; k++) {
-    curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k];
-    if ((curr_pucch->dai_c > 0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
-      UL_tti_req->SFN = curr_pucch->frame;
-      UL_tti_req->Slot = curr_pucch->ul_slot;
-      UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
-      UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
-      nfapi_nr_pucch_pdu_t  *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
-      memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
-      UL_tti_req->n_pdus+=1;
+    for (int l=0; l<2; l++) {
+      curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
       O_ack = curr_pucch->dai_c;
-      O_uci = O_ack; // for now we are just sending acknacks in pucch
-
-      LOG_D(MAC, "Scheduling pucch reception for frame %d slot %d\n", frameP, slotP);
-
-      nr_configure_pucch(pucch_pdu,
-			 scc,
-			 ubwp,
-                         curr_pucch->resource_indicator,
-                         O_uci,
-                         O_ack,
-                         SR_flag);
-
-      memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k],
-             0,
-             sizeof(NR_sched_pucch));
+      O_csi = curr_pucch->csi_bits;
+      O_uci = O_ack + O_csi + O_sr;
+      if ((O_uci>0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
+        UL_tti_req->SFN = curr_pucch->frame;
+        UL_tti_req->Slot = curr_pucch->ul_slot;
+        UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
+        UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
+        nfapi_nr_pucch_pdu_t  *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
+        memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
+        UL_tti_req->n_pdus+=1;
+
+        LOG_I(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n",
+              frameP,slotP,O_sr,O_ack,curr_pucch->csi_bits);
+
+        nr_configure_pucch(pucch_pdu,
+                           scc,
+                           ubwp,
+                           UE_info->rnti[UE_id],
+                           curr_pucch->resource_indicator,
+                           O_csi,
+                           O_ack,
+                           O_sr);
+
+        memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
+               0,
+               sizeof(NR_sched_pucch));
+      }
     }
   }
 }
@@ -395,6 +399,7 @@ bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
 void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
                                frame_t frame,
                                sub_frame_t slot){
+
   protocol_ctxt_t   ctxt;
   PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
  
@@ -411,19 +416,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
   const int nr_ulmix_slots = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
 
-  if (slot == 0 && UE_info->active[UE_id]) {
-    for (int k=0; k<nr_ulmix_slots; k++) {
-      /* Seems to be covered 384? */
-      /*memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k],
-             0,
-             sizeof(NR_sched_pucch));*/
-      /* Seems to be covered in line 335? */
-      /*memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k],
-             0,
-             sizeof(NR_sched_pusch));*/
-    }
-  }
-
   start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
   VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
 
@@ -466,8 +458,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   // This schedule SR
   // TODO
 
-  // This schedule CSI
-  // TODO
+  // This schedule CSI measurement reporting
+  if (UE_info->active[UE_id])
+    nr_csi_meas_reporting(module_idP, UE_id, frame, slot, num_slots_per_tdd, nr_ulmix_slots, slots_per_frame[*scc->ssbSubcarrierSpacing]);
 
   // This schedule RA procedure if not in phy_test mode
   // Otherwise already consider 5G already connected

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c

@@ -343,68 +343,98 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
   return offset;
 }
 
-void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) {
+void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
+                   nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
+                   nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
+                   NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) {
+
   // TODO
   int max_harq_rounds = 4; // TODO define macro
-  int num_ucis = UL_info->uci_ind.num_ucis;
-  nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
-
-  for (int i = 0; i < num_ucis; i++) {
-    switch (uci_list[i].pdu_type) {
-      case NFAPI_NR_UCI_PDCCH_PDU_TYPE: break;
-
-      case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
-        //if (get_softmodem_params()->phy_test == 0) {
-          nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
-          // handle harq
-          int harq_idx_s = 0;
-          // tpc (power control)
-          sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
-          // iterate over received harq bits
-          for (int harq_bit = 0; harq_bit < uci_pdu->harq->num_harq; harq_bit++) {
-            // search for the right harq process
-            for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
-              // if the gNB received ack with a good confidence
-              if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
-                if ((uci_pdu->harq->harq_list[harq_bit].harq_value == 1) &&
-                    (uci_pdu->harq->harq_confidence_level == 0)) {
-                  // toggle NDI and reset round
-                  sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
-                  sched_ctrl->harq_processes[harq_idx].round = 0;
-                }
-                else
-                  sched_ctrl->harq_processes[harq_idx].round++;
-                sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
-                harq_idx_s = harq_idx + 1;
-                // if the max harq rounds was reached
-                if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
-                  sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
-                  sched_ctrl->harq_processes[harq_idx].round = 0;
-                  stats->dlsch_errors++;
-                }
-                break;
-              }
-              // if feedback slot processing is aborted
-              else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
-                      (sched_ctrl->harq_processes[harq_idx].is_waiting)) {
-                sched_ctrl->harq_processes[harq_idx].round++;
-                if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
-                  sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
-                  sched_ctrl->harq_processes[harq_idx].round = 0;
-                }
-                sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
-              }
-            }
+
+  if (uci_01 != NULL) {
+    // handle harq
+    int harq_idx_s = 0;
+
+    // iterate over received harq bits
+    for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) {
+      // search for the right harq process
+      for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
+        // if the gNB received ack with a good confidence
+        if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
+          if ((uci_01->harq->harq_list[harq_bit].harq_value == 1) &&
+              (uci_01->harq->harq_confidence_level == 0)) {
+            // toggle NDI and reset round
+            sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+            sched_ctrl->harq_processes[harq_idx].round = 0;
+          }
+          else
+            sched_ctrl->harq_processes[harq_idx].round++;
+          sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
+          harq_idx_s = harq_idx + 1;
+          // if the max harq rounds was reached
+          if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
+            sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+            sched_ctrl->harq_processes[harq_idx].round = 0;
+            stats->dlsch_errors++;
+          }
+          break;
+        }
+        // if feedback slot processing is aborted
+        else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
+                 (sched_ctrl->harq_processes[harq_idx].is_waiting)) {
+          sched_ctrl->harq_processes[harq_idx].round++;
+          if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
+            sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+            sched_ctrl->harq_processes[harq_idx].round = 0;
           }
-        //}
-        break;
+          sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
+        }
       }
-
-      case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: break;
     }
   }
 
-  UL_info->uci_ind.num_ucis = 0;
+
+  if (uci_234 != NULL) {
+    int harq_idx_s = 0;
+    int acknack;
+
+    // iterate over received harq bits
+    for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) {
+      acknack = ((uci_234->harq.harq_payload[harq_bit>>3])>>harq_bit)&0x01;
+      for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
+        // if the gNB received ack with a good confidence or if the max harq rounds was reached
+        if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
+          // TODO add some confidence level for when there is no CRC
+          if ((uci_234->harq.harq_crc != 1) && acknack) {
+            // toggle NDI and reset round
+            sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+            sched_ctrl->harq_processes[harq_idx].round = 0;
+          }
+          else
+            sched_ctrl->harq_processes[harq_idx].round++;
+          sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
+          harq_idx_s = harq_idx + 1;
+          // if the max harq rounds was reached
+          if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
+            sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+            sched_ctrl->harq_processes[harq_idx].round = 0;
+            stats->dlsch_errors++;
+          }
+          break;
+        }
+        // if feedback slot processing is aborted
+        else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
+                 (sched_ctrl->harq_processes[harq_idx].is_waiting)) {
+          sched_ctrl->harq_processes[harq_idx].round++;
+          if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
+            sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
+            sched_ctrl->harq_processes[harq_idx].round = 0;
+          }
+          sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
+        }
+      }
+    }
+  }
 }
 
 int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda) {
@@ -505,8 +535,14 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
   UE_info->num_pdcch_cand[UE_id][cid]++;
 
   /* Find PUCCH occasion */
-  nr_update_pucch_scheduling(
-      module_id, UE_id, frame, slot, num_slots_per_tdd, &sched_ctrl->pucch_sched_idx);
+  nr_acknack_scheduling(module_id,
+                        UE_id,
+                        frame,
+                        slot,
+                        num_slots_per_tdd,
+                        &sched_ctrl->pucch_sched_idx,
+                        &sched_ctrl->pucch_occ_idx);
+
   AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
 
   uint8_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
@@ -634,7 +670,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
 
     const int current_harq_pid = sched_ctrl->current_harq_pid;
     NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
-    NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx];
+    NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx];
     harq->feedback_slot = pucch->ul_slot;
     harq->is_waiting = 1;
     UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -369,7 +369,6 @@ int configure_fapi_dl_pdu_phytest(int Mod_idP,
   dci_pdu_rel15[0].ndi = UE_info->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].ndi;
   // DAI
   dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3;
-
   // TPC for PUCCH
   dci_pdu_rel15[0].tpc = UE_info->UE_sched_ctrl[UE_id].tpc1; // table 7.2.1-1 in 38.213
   // PUCCH resource indicator

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c

@@ -340,6 +340,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
       LOG_I(MAC, "reset RA state information for RA-RNTI %04x\n", ra->rnti);
       const int UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti);
       UE_info->secondaryCellGroup[UE_id] = ra->secondaryCellGroup;
+      compute_csi_bitlen (ra->secondaryCellGroup, UE_info, UE_id);
       UE_info->UE_beam_index[UE_id] = ra->beam_id;
       struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
       AssertFatal(bwpList->list.count == 1,

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -36,8 +36,6 @@
 #include "LAYER2/NR_MAC_gNB/nr_mac_gNB.h"
 #include "NR_TAG-Id.h"
 
-#define MAX_ACK_BITS 2 //only format 0 is available for now
-
 void set_cset_offset(uint16_t);
 
 void mac_top_init_gNB(void);
@@ -163,6 +161,11 @@ int configure_fapi_dl_pdu_phytest(int Mod_id,
                                   uint16_t *rbSize,
                                   uint16_t *rbStart);
 
+void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
+                   nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
+                   nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
+                   NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats);
+
 void config_uldci(NR_BWP_Uplink_t *ubwp,
                   nfapi_nr_pusch_pdu_t *pusch_pdu,
                   nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
@@ -198,12 +201,23 @@ void nr_schedule_pucch(int Mod_idP,
                        frame_t frameP,
                        sub_frame_t slotP);
 
-void nr_update_pucch_scheduling(int Mod_idP,
-                                int UE_id,
-                                frame_t frameP,
-                                sub_frame_t slotP,
-                                int slots_per_tdd,
-                                int *pucch_id);
+void nr_csi_meas_reporting(int Mod_idP,
+                           int UE_id,
+                           frame_t frameP,
+                           sub_frame_t slotP,
+                           int slots_per_tdd,
+                           int ul_slots,
+                           int n_slots_frame);
+
+void nr_acknack_scheduling(int Mod_idP,
+                           int UE_id,
+                           frame_t frameP,
+                           sub_frame_t slotP,
+                           int slots_per_tdd,
+                           int *pucch_id,
+                           int *pucch_occ);
+
+int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l);
 
 void get_pdsch_to_harq_feedback(int Mod_idP,
                                 int UE_id,
@@ -232,10 +246,11 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
 void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
 			NR_ServingCellConfigCommon_t *scc,
 			NR_BWP_Uplink_t *bwp,
+                        uint16_t rnti,
                         uint8_t pucch_resource,
-                        uint16_t O_uci,
+                        uint16_t O_csi,
                         uint16_t O_ack,
-                        uint8_t SR_flag);
+                        uint8_t O_sr);
 
 void find_search_space(int ss_type,
                        NR_BWP_Downlink_t *bwp,
@@ -320,6 +335,17 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
                      int m,
                      int nr_of_candidates);
 
+uint16_t compute_pucch_prb_size(uint8_t format,
+                                uint8_t nr_prbs,
+                                uint16_t O_tot,
+                                uint16_t O_csi,
+                                NR_PUCCH_MaxCodeRate_t *maxCodeRate,
+                                uint8_t Qm,
+                                uint8_t n_symb,
+                                uint8_t n_re_ctrl);
+
+void compute_csi_bitlen (NR_CellGroupConfig_t *secondaryCellGroup, NR_UE_info_t *UE_info, int UE_id);
+
 int get_dlscs(nfapi_nr_config_request_t *cfg);
 
 int get_ulscs(nfapi_nr_config_request_t *cfg);

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -274,10 +274,12 @@ typedef struct UE_info {
 typedef struct NR_sched_pucch {
   int frame;
   int ul_slot;
+  bool sr_flag;
+  int csi_bits;
+  bool simultaneous_harqcsi;
   uint8_t dai_c;
   uint8_t timing_indicator;
   uint8_t resource_indicator;
-  bool active;
 } NR_sched_pucch;
 
 typedef struct NR_sched_pusch {
@@ -315,6 +317,25 @@ typedef struct NR_UE_ul_harq {
   NR_UL_harq_states_t state;
 } NR_UE_ul_harq_t;
 
+
+typedef struct {
+  uint8_t nb_ssbri_cri;
+  uint8_t cri_ssbri_bitlen;
+  uint8_t rsrp_bitlen;
+  uint8_t diff_rsrp_bitlen;
+}CRI_SSBRI_RSRP_bitlen_t;
+
+
+#define MAX_CSI_RESOURCE_SET_IN_CSI_RESOURCE_CONFIG 16
+typedef struct nr_csi_report {
+  NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type;
+  NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR CSI_Resource_type;
+  uint8_t nb_of_nzp_csi_report;
+  uint8_t nb_of_csi_ssb_report;
+  CRI_SSBRI_RSRP_bitlen_t CSI_report_bitlen[MAX_CSI_RESOURCE_SET_IN_CSI_RESOURCE_CONFIG];
+} nr_csi_report_t;
+
+
 /*! \brief scheduling control information set through an API */
 typedef struct {
   /// total amount of data awaiting for this UE
@@ -324,9 +345,10 @@ typedef struct {
 
   /// the currently active BWP in DL
   NR_BWP_Downlink_t *active_bwp;
-  NR_sched_pucch *sched_pucch;
+  NR_sched_pucch **sched_pucch;
   /// selected PUCCH index, if scheduled
   int pucch_sched_idx;
+  int pucch_occ_idx;
   NR_sched_pusch *sched_pusch;
 
   /// CCE index and aggregation, should be coherent with cce_list
@@ -385,9 +407,11 @@ typedef struct {
 } NR_UE_list_t;
 
 /*! \brief UE list used by gNB to order UEs/CC for scheduling*/
+#define MAX_CSI_REPORTCONFIG 48
 typedef struct {
   DLSCH_PDU DLSCH_pdu[4][MAX_MOBILES_PER_GNB];
   /// scheduling control info
+  nr_csi_report_t csi_report_template[MAX_MOBILES_PER_GNB][MAX_CSI_REPORTCONFIG];
   NR_UE_sched_ctrl_t UE_sched_ctrl[MAX_MOBILES_PER_GNB];
   NR_mac_stats_t mac_stats[MAX_MOBILES_PER_GNB];
   NR_UE_list_t list;

openair2/NR_PHY_INTERFACE/NR_IF_Module.c

@@ -79,6 +79,44 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
 }
 
 
+void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) {
+
+  int num_ucis = UL_info->uci_ind.num_ucis;
+  nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
+
+  for (int i = 0; i < num_ucis; i++) {
+    switch (uci_list[i].pdu_type) {
+      case NFAPI_NR_UCI_PUSCH_PDU_TYPE: break;
+
+      case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
+        nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
+
+        // tpc (power control)
+        sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
+
+        if( (uci_pdu->pduBitmap>>1) & 0x01)
+          nr_rx_acknack(NULL,uci_pdu,NULL,UL_info,sched_ctrl,stats);
+
+        break;
+      }
+      case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
+        nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
+
+        // tpc (power control)
+        sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
+
+        if( (uci_pdu->pduBitmap>>1) & 0x01)
+          nr_rx_acknack(NULL,NULL,uci_pdu,UL_info,sched_ctrl,stats);
+
+        break;
+      }
+    }
+  }
+
+  UL_info->uci_ind.num_ucis = 0;
+}
+
+
 void handle_nr_ulsch(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) {
 
   if(nfapi_mode == 1) {