Commit 81c1e1b3 authored by Raymond Knopp's avatar Raymond Knopp

tested with slot-based processing for 40 and 80 MHz channels

parent ae180291
......@@ -74,10 +74,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_RU",
"frame_number_RX0_RU",
"frame_number_RX1_RU",
"subframe_number_TX0_RU",
"subframe_number_TX1_RU",
"subframe_number_RX0_RU",
"subframe_number_RX1_RU",
"tti_number_TX0_RU",
"tti_number_TX1_RU",
"tti_number_RX0_RU",
"tti_number_RX1_RU",
"runtime_TX_eNB",
"runtime_RX_eNB",
"frame_number_TX0_UE",
......@@ -196,10 +196,10 @@ const char* eurecomVariablesNames[] = {
"frame_number_TX1_gNB",
"frame_number_RX0_gNB",
"frame_number_RX1_gNB",
"subframe_number_TX0_gNB",
"subframe_number_TX1_gNB",
"subframe_number_RX0_gNB",
"subframe_number_RX1_gNB"
"slot_number_TX0_gNB",
"slot_number_TX1_gNB",
"slot_number_RX0_gNB",
"slot_number_RX1_gNB"
};
const char* eurecomFunctionsNames[] = {
......
......@@ -51,10 +51,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU,
VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX1_RU,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_TX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_RUNTIME_RX_ENB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_UE,
......@@ -173,10 +173,10 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,
VCD_SIGNAL_DUMPER_VARIABLES_END
} vcd_signal_dump_variables;
......
......@@ -1099,26 +1099,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_RU
DESC = VCD variable SUBFRAME_NUMBER_TX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_TX0_RU
DESC = VCD variable TTI_NUMBER_TX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX0_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_RU
DESC = VCD variable SUBFRAME_NUMBER_TX1_RU
VCD_NAME = tti_number_TX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_TX1_RU
DESC = VCD variable TTI_NUMBER_TX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX1_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_RU
DESC = VCD variable SUBFRAME_NUMBER_RX0_RU
VCD_NAME = tti_number_TX1_RU
ID = VCD_VARIABLE_TTI_NUMBER_RX0_RU
DESC = VCD variable TTI_NUMBER_RX0_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX0_RU
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_RU
DESC = VCD variable SUBFRAME_NUMBER_RX1_RU
VCD_NAME = tti_number_RX0_RU
ID = VCD_VARIABLE_TTI_NUMBER_RX1_RU
DESC = VCD variable TTI_NUMBER_RX1_RU
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX1_RU
VCD_NAME = tti_number_RX1_RU
ID = VCD_VARIABLE_RUNTIME_TX_ENB
DESC = VCD variable RUNTIME_TX_ENB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
......@@ -1701,26 +1701,26 @@ ID = VCD_VARIABLE_FRAME_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = frame_number_RX1_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX0_GNB
DESC = VCD variable SUBFRAME_NUMBER_TX0_GNB
ID = VCD_VARIABLE_SLOT_NUMBER_TX0_GNB
DESC = VCD variable SLOT_NUMBER_TX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX0_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_TX1_GNB
DESC = VCD variable SUBFRAME_NUMBER_TX1_GNB
VCD_NAME = slot_number_TX0_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_TX1_GNB
DESC = VCD variable SLOT_NUMBER_TX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_TX1_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX0_GNB
DESC = VCD variable SUBFRAME_NUMBER_RX0_GNB
VCD_NAME = slot_number_TX1_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_RX0_GNB
DESC = VCD variable SLOT_NUMBER_RX0_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX0_gNB
ID = VCD_VARIABLE_SUBFRAME_NUMBER_RX1_GNB
DESC = VCD variable SUBFRAME_NUMBER_RX1_GNB
VCD_NAME = slot_number_RX0_gNB
ID = VCD_VARIABLE_SLOT_NUMBER_RX1_GNB
DESC = VCD variable SLOT_NUMBER_RX1_GNB
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
VCD_NAME = subframe_number_RX1_gNB
VCD_NAME = slot_number_RX1_gNB
#functions
......
......@@ -149,8 +149,6 @@ typedef struct {
#define NFAPI_NR_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x5006
typedef struct {
nfapi_uint16_tlv_t tx_antenna_ports;
nfapi_uint16_tlv_t rx_antenna_ports;
nfapi_uint16_tlv_t dl_carrier_bandwidth;
nfapi_uint16_tlv_t ul_carrier_bandwidth;
nfapi_uint16_tlv_t dl_bwp_subcarrierspacing;
......@@ -161,18 +159,17 @@ typedef struct {
nfapi_uint16_tlv_t ul_absolutefrequencypointA;
nfapi_uint16_tlv_t dl_offsettocarrier;
nfapi_uint16_tlv_t ul_offsettocarrier;
nfapi_uint16_tlv_t dl_scs_subcarrierspacing;
nfapi_uint16_tlv_t ul_scs_subcarrierspacing;
nfapi_uint16_tlv_t dl_scs_specificcarrier_k0;
nfapi_uint16_tlv_t ul_scs_specificcarrier_k0;
nfapi_uint16_tlv_t dl_subcarrierspacing;
nfapi_uint16_tlv_t ul_subcarrierspacing;
nfapi_uint16_tlv_t dl_specificcarrier_k0;
nfapi_uint16_tlv_t ul_specificcarrier_k0;
nfapi_uint16_tlv_t NIA_subcarrierspacing;
} nfapi_nr_rf_config_t;
#define NFAPI_NR_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG 0x500A
#define NFAPI_NR_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG 0x500B
#define NFAPI_NR_RF_CONFIG_REFERENCE_SIGNAL_POWER_TAG 0x500C
#define NFAPI_NR_RF_CONFIG_TX_ANTENNA_PORTS_TAG 0x500D
#define NFAPI_NR_RF_CONFIG_RX_ANTENNA_PORTS_TAG 0x500E
#define NFAPI_NR_RF_CONFIG_DL_CARRIER_BANDWIDTH_TAG 0x500A
#define NFAPI_NR_RF_CONFIG_UL_CARRIER_BANDWIDTH_TAG 0x500B
#define NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG 0x500C
#define NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG 0x500D
typedef struct {
nfapi_uint16_tlv_t physical_cell_id;
......
......@@ -165,20 +165,16 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
common_vars->rxdata = (int32_t **)NULL;
common_vars->txdataF = (int32_t **)malloc16(NB_ANTENNA_PORTS_ENB*sizeof(int32_t*));
common_vars->txdataF = (int32_t **)malloc16(15*sizeof(int32_t*));
common_vars->rxdataF = (int32_t **)malloc16(64*sizeof(int32_t*));
LOG_D(PHY,"[INIT] NB_ANTENNA_PORTS_ENB:%d fp->nb_antenna_ports_gNB:%d\n", NB_ANTENNA_PORTS_ENB, cfg->rf_config.tx_antenna_ports.value);
for (i=0; i<NB_ANTENNA_PORTS_ENB; i++) {
if (i<cfg->rf_config.tx_antenna_ports.value || i==5) {
for (i=0;i<15;i++){
common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t) );
LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
i,common_vars->txdataF[i],
fp->samples_per_frame_wCP*sizeof(int32_t));
}
}
}
// Channel estimates for SRS
......@@ -306,11 +302,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
int i, UE_id;
for (i = 0; i < NB_ANTENNA_PORTS_ENB; i++) {
if (i < cfg->rf_config.tx_antenna_ports.value || i == 5) {
free_and_zero(common_vars->txdataF[i]);
for (i = 0; i < 15; i++) {
free_and_zero(common_vars->txdataF[i]);
/* rxdataF[i] is not allocated -> don't free */
}
}
free_and_zero(common_vars->txdataF);
free_and_zero(common_vars->rxdataF);
......@@ -381,7 +375,6 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,int N_RB_DL,int N_RB_UL,int mu)
gNB_config->nfapi_config.nrarfcn.value = 620000;
gNB_config->subframe_config.numerology_index_mu.value = mu;
gNB_config->subframe_config.duplex_mode.value = TDD;
gNB_config->rf_config.tx_antenna_ports.value = 1;
gNB_config->rf_config.dl_carrier_bandwidth.value = N_RB_DL;
gNB_config->rf_config.ul_carrier_bandwidth.value = N_RB_UL;
gNB_config->sch_config.half_frame_index.value = 0;
......@@ -416,7 +409,6 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
gNB_config->nfapi_config.rf_bands.rf_band[0] = phy_config->cfg->nfapi_config.rf_bands.rf_band[0]; //22
gNB_config->nfapi_config.nrarfcn.value = phy_config->cfg->nfapi_config.nrarfcn.value; //6600
gNB_config->subframe_config.numerology_index_mu.value = phy_config->cfg->subframe_config.numerology_index_mu.value;//1
gNB_config->rf_config.tx_antenna_ports.value = phy_config->cfg->rf_config.tx_antenna_ports.value; //1
gNB_config->rf_config.dl_carrier_bandwidth.value = phy_config->cfg->rf_config.dl_carrier_bandwidth.value;//106;
gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
gNB_config->sch_config.half_frame_index.value = 0;
......@@ -437,14 +429,13 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
fp->ul_CarrierFreq = fp->dl_CarrierFreq - (get_uldl_offset(gNB_config->nfapi_config.rf_bands.rf_band[0])*100000);
fp->threequarter_fs = 0;
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,gNB_tx_antenna_ports %d,DL freq %u)\n",
LOG_I(PHY,"Configuring MIB for instance %d, CCid %d : (band %d,N_RB_DL %d, N_RB_UL %d, Nid_cell %d,DL freq %u)\n",
Mod_id,
CC_id,
gNB_config->nfapi_config.rf_bands.rf_band[0],
gNB_config->rf_config.dl_carrier_bandwidth.value,
gNB_config->rf_config.ul_carrier_bandwidth.value,
gNB_config->sch_config.physical_cell_id.value,
gNB_config->rf_config.tx_antenna_ports.value,
fp->dl_CarrierFreq );
nr_init_frame_parms(gNB_config, fp);
......
......@@ -107,9 +107,7 @@ int nr_phy_init_RU(RU_t *ru) {
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<15;p++) {
LOG_D(PHY,"[INIT] %s() nb_antenna_ports_eNB:%d \n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value);
if (p<ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p==5) {
LOG_D(PHY,"[INIT] %s() DO BEAM WEIGHTS nb_antenna_ports_eNB:%d nb_tx:%d\n", __FUNCTION__, ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value, ru->nb_tx);
if (p == 0|| p==5) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
......@@ -180,7 +178,7 @@ void nr_phy_free_RU(RU_t *ru)
for (i = 0; i < RC.nb_nr_L1_inst; i++) {
for (p = 0; p < 15; p++) {
if (p < ru->gNB_list[i]->gNB_config.rf_config.tx_antenna_ports.value || p == 5) {
if (p == 0 || p == 5) {
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
free_and_zero(ru->beam_weights[i][p]);
}
......
......@@ -162,7 +162,7 @@ void nr_pdcch_scrambling(uint32_t *in,
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
int32_t** txdataF,
int32_t* txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config)
......@@ -216,14 +216,13 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
#ifdef PDCCH_TEST_POLAR_TEMP_FIX
t_nrPolar_paramsPtr currentPtr = NULL;//, polarParams = NULL;
nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
//#ifdef PDCCH_TEST_POLAR_TEMP_FIX
// nr_polar_init(&currentPtr, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
// t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#else
//#else
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
#endif
//#endif
//polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, pdcch_params.rnti);
polar_encoder_fast(dci_alloc.dci_pdu, encoder_output, pdcch_params.rnti,currentPtr);
......@@ -261,10 +260,7 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
}
/// Resource mapping
a = (config.rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config.rf_config.tx_antenna_ports.value; aa++)
{
if (cset_start_sc >= frame_parms.ofdm_symbol_size)
cset_start_sc -= frame_parms.ofdm_symbol_size;
......@@ -293,8 +289,8 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
dmrs_idx = 0;
k = cset_start_sc + 1;
while (dmrs_idx<3*pdcch_params.n_rb) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("symbol %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
......@@ -319,8 +315,8 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_params.precoder_granularity == NFAPI_NR_CSET_SAME_AS_REG_BUNDLE) {
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
printf("l %d position %d => (%d,%d)\n",l,k,((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] , ((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
......@@ -329,8 +325,8 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
}
}
else { // DCI payload
((int16_t*)txdataF[aa])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (a * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (a * mod_dci[(dci_idx<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
//printf("dci output %d %d\n",(a * mod_dci[dci_idx<<1]) >> 15, (a * mod_dci[(dci_idx<<1) + 1]) >> 15);
dci_idx++;
}
......@@ -339,7 +335,6 @@ printf("scrambled output: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%0
k -= frame_parms.ofdm_symbol_size;
}
}
}
#ifdef DEBUG_DCI
write_output("txdataF_dci.m", "txdataF_dci", txdataF[0], frame_parms.samples_per_frame_wCP>>1, 1, 1);
......
......@@ -35,7 +35,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
int32_t** txdataF,
int32_t* txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
......
......@@ -46,7 +46,7 @@ uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
......@@ -72,10 +72,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
}
/// Resource mapping
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// PBCH DMRS are mapped within the SSB block on every fourth subcarrier starting from nushift of symbols 1, 2, 3
///symbol 1 [0+nushift:4:236+nushift] -- 60 mod symbols
......@@ -86,12 +83,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
......@@ -107,12 +104,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=(m==71)?148:4; // Jump from 44+nu to 192+nu
......@@ -128,12 +125,12 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
#ifdef DEBUG_PBCH_DMRS
printf("m %d at k %d of l %d\n", m, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_dmrs[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[(m<<1) + 1]) >> 15;
#ifdef DEBUG_PBCH_DMRS
printf("(%d,%d)\n",
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1],
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1)+1]);
#endif
k+=4;
......@@ -141,7 +138,6 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef DEBUG_PBCH_DMRS
......@@ -232,7 +228,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
......@@ -337,10 +333,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Resource mapping
nushift = config->sch_config.physical_cell_id.value &3;
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// PBCH modulated symbols are mapped within the SSB block on symbols 1, 2, 3 excluding the subcarriers used for the PBCH DMRS
///symbol 1 [0:239] -- 180 mod symbols
......@@ -358,8 +351,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
......@@ -383,8 +376,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
......@@ -409,8 +402,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
......@@ -434,8 +427,8 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#ifdef DEBUG_PBCH
printf("m %d ssb_sc_idx %d at k %d of l %d\n", m, ssb_sc_idx, k, l);
#endif
((int16_t*)txdataF[aa])[(l*frame_parms->ofdm_symbol_size + k)<<1] = (a * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF[aa])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (a * mod_pbch_e[(m<<1) + 1]) >> 15;
((int16_t*)txdataF)[(l*frame_parms->ofdm_symbol_size + k)<<1] = (amp * mod_pbch_e[m<<1]) >> 15;
((int16_t*)txdataF)[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = (amp * mod_pbch_e[(m<<1) + 1]) >> 15;
k++;
m++;
}
......@@ -444,7 +437,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef DEBUG_PBCH
......
......@@ -25,7 +25,7 @@
//#define NR_PSS_DEBUG
int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
......@@ -57,10 +57,8 @@ int nr_generate_pss( int16_t *d_pss,
#endif
/// Resource mapping
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
a = amp;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
......@@ -70,13 +68,12 @@ int nr_generate_pss( int16_t *d_pss,
for (m = 0; m < NR_PSS_LENGTH; m++) {
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_pss[m]) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef NR_PSS_DEBUG
LOG_M("pss_0.m", "pss_0",
......
......@@ -24,7 +24,7 @@
//#define NR_SSS_DEBUG
int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
......@@ -65,23 +65,18 @@ int nr_generate_sss( int16_t *d_sss,
#endif
/// Resource mapping
a = (config->rf_config.tx_antenna_ports.value == 1) ? amp : (amp*ONE_OVER_SQRT2_Q15)>>15;
for (int aa = 0; aa < config->rf_config.tx_antenna_ports.value; aa++)
{
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56; //and
l = ssb_start_symbol + 2;
for (int m = 0; m < NR_SSS_LENGTH; m++) {
((int16_t*)txdataF[aa])[2*(l*frame_parms->ofdm_symbol_size + k)] = (a * d_sss[m]) >> 15;
((int16_t*)txdataF)[2*(l*frame_parms->ofdm_symbol_size + k)] = (amp * d_sss[m]) >> 15;
k++;
if (k >= frame_parms->ofdm_symbol_size)
k-=frame_parms->ofdm_symbol_size;
}
}
#ifdef NR_SSS_DEBUG
// write_output("sss_0.m", "sss_0", (void*)txdataF[0][l*frame_parms->ofdm_symbol_size], frame_parms->ofdm_symbol_size, 1, 1);
#endif
......
......@@ -33,7 +33,7 @@
@returns 0 on success
*/
int nr_generate_pss( int16_t *d_pss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
......@@ -46,7 +46,7 @@ int nr_generate_pss( int16_t *d_pss,
@returns 0 on success
*/
int nr_generate_sss( int16_t *d_sss,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
......@@ -59,7 +59,7 @@ int nr_generate_sss( int16_t *d_sss,
@returns 0 on success
*/
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
......@@ -88,7 +88,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t **txdataF,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
uint8_t n_hf,
......
......@@ -222,7 +222,7 @@ typedef struct NR_DL_FRAME_PARMS {
uint32_t samples_per_slot_wCP;
/// Number of samples in a radio frame without CP
uint32_t samples_per_frame_wCP;
/// Number of samples in a tti (same as subrame in LTE, depending on numerology in NR)
/// Number of samples in a tti (same as subrame in LTE, slot in NR)
uint32_t samples_per_tti;
/// NR numerology index [0..5] as specified in 38.211 Section 4 (mu). 0=15khZ SCS, 1=30khZ, 2=60kHz, etc
uint8_t numerology_index;
......
......@@ -62,12 +62,12 @@ void handle_nfapi_nr_dci_dl_pdu(PHY_VARS_gNB *gNB,
int idx = slot&1;
NR_gNB_PDCCH *pdcch_vars = &gNB->pdcch_vars;
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
LOG_I(PHY,"Frame %d, Slot %d: DCI processing - populating pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",frame,slot, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
// copy dci configuration into gNB structure
nr_fill_dci_and_dlsch(gNB,frame,slot,proc,&pdcch_vars->dci_alloc[pdcch_vars->num_dci],dl_config_pdu);
LOG_D(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->slot_tx, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
LOG_I(PHY,"Frame %d, Slot %d: DCI processing - populated pdcch_vars->dci_alloc[%d] proc:slot_tx:%d idx:%d pdcch_vars->num_dci:%d\n",proc->frame_tx,proc->slot_tx, pdcch_vars->num_dci, proc->slot_tx, idx, pdcch_vars->num_dci);
}
......@@ -80,7 +80,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
nfapi_nr_dl_config_request_t *DL_req = Sched_INFO->DL_req;
nfapi_tx_request_t *TX_req = Sched_INFO->TX_req;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
sub_frame_t slot = Sched_INFO->slot;
AssertFatal(RC.gNB!=NULL,"RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
......@@ -103,6 +103,8 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
int do_oai =0;
int dont_send =0;
gNB->pdcch_vars.num_dci=0;
for (i=0;i<number_dl_pdu;i++) {
dl_config_pdu = &DL_req->dl_config_request_body.dl_config_pdu_list[i];
LOG_D(PHY,"NFAPI: dl_pdu %d : type %d\n",i,dl_config_pdu->pdu_type);
......
......@@ -66,7 +66,7 @@ void nr_feptx0(RU_t *ru,int first_symbol, int num_symbols) {
int slot = ru->proc.tti_tx;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM, 1 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0) , 1 );
slot_offset = slot*fp->samples_per_slot;
slot_offsetF = first_symbol*fp->ofdm_symbol_size;
......@@ -109,7 +109,7 @@ void nr_feptx0(RU_t *ru,int first_symbol, int num_symbols) {
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM, 0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+(first_symbol!=0?1:0), 0);
}
void nr_feptx_ofdm_2thread(RU_t *ru) {
......
......@@ -137,20 +137,20 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
// Current implementation is based on SSB in first half frame, first candidate
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(gNB->d_pss, txdataF, AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
nr_generate_pss(gNB->d_pss, txdataF[0], AMP, ssb_start_symbol, cfg, fp);
nr_generate_sss(gNB->d_sss, txdataF[0], AMP_OVER_2, ssb_start_symbol, cfg, fp);
if (!(frame&7)){
LOG_D(PHY,"%d.%d : pbch_configured %d\n",frame,slot,gNB->pbch_configured);
if (gNB->pbch_configured != 1)return;
gNB->pbch_configured = 0;
}
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF[0], AMP_OVER_2, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch,
gNB->nrPolar_params,
pbch_pdu,
gNB->nr_pbch_interleaver,
txdataF,
txdataF[0],
AMP_OVER_2,
ssb_start_symbol,
n_hf,Lmax,ssb_index,
......@@ -179,7 +179,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (do_meas==1) start_meas(&gNB->phy_proc_tx);
// clear the transmit data array for the current subframe
for (aa=0; aa<cfg->rf_config.tx_antenna_ports.value; aa++) {
for (aa=0; aa<1/*15*/; aa++) {
memset(gNB->common_vars.txdataF[aa],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
......@@ -199,7 +199,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
nr_generate_dci_top(gNB->pdcch_vars,
&gNB->nrPolar_params,
gNB->nr_gold_pdcch_dmrs[slot],
gNB->common_vars.txdataF,
gNB->common_vars.txdataF[0],
AMP, *fp, *cfg);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX+offset,0);
......
......@@ -1650,7 +1650,7 @@ int main(int argc, char **argv)
start_meas(&eNB->ofdm_mod_stats);
ru->proc.subframe_tx=subframe;
ru->proc.tti_tx=subframe;
memcpy((void*)ru->frame_parms,(void*)&eNB->frame_parms,sizeof(LTE_DL_FRAME_PARMS));
feptx_prec(ru);
feptx_ofdm(ru);
......@@ -1670,7 +1670,7 @@ int main(int argc, char **argv)
phy_procedures_eNB_TX(eNB,proc_eNB,0);
ru->proc.subframe_tx=(subframe+1)%10;
ru->proc.tti_tx=(subframe+1)%10;
feptx_prec(ru);
feptx_ofdm(ru);
......
......@@ -1158,7 +1158,7 @@ int main(int argc, char **argv) {
eNB->proc.frame_rx = 1;
eNB->proc.subframe_rx = subframe;
ru->proc.frame_rx = 1;
ru->proc.subframe_rx = subframe;
ru->proc.tti_rx = subframe;
proc_rxtx_ue->frame_tx = proc_rxtx->frame_rx;
proc_rxtx_ue->frame_rx = proc_rxtx->frame_tx;
proc_rxtx_ue->subframe_tx = proc_rxtx->subframe_rx;
......
......@@ -310,8 +310,8 @@ typedef struct NRRrcConfigurationReq_s {
uint8_t tdd_config_s[MAX_NUM_CCs];
lte_prefix_type_t DL_prefix_type[MAX_NUM_CCs];
lte_prefix_type_t UL_prefix_type[MAX_NUM_CCs];
int16_t eutra_band[MAX_NUM_CCs];
uint32_t downlink_frequency[MAX_NUM_CCs];
int16_t nr_band[MAX_NUM_CCs];
uint64_t downlink_frequency[MAX_NUM_CCs];
int32_t uplink_frequency_offset[MAX_NUM_CCs];
int16_t Nid_cell[MAX_NUM_CCs];// for testing, change later
int16_t N_RB_DL[MAX_NUM_CCs];// for testing, change later
......
......@@ -39,7 +39,7 @@
#define GNB_CONFIG_STRING_FRAME_TYPE "frame_type"
#define GNB_CONFIG_STRING_DL_PREFIX_TYPE "DL_prefix_type"
#define GNB_CONFIG_STRING_UL_PREFIX_TYPE "UL_prefix_type"
#define GNB_CONFIG_STRING_EUTRA_BAND "eutra_band"
#define GNB_CONFIG_STRING_NR_BAND "nr_band"
#define GNB_CONFIG_STRING_DOWNLINK_FREQUENCY "downlink_frequency"
#define GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET "uplink_frequency_offset"
#define GNB_CONFIG_STRING_NID_CELL "Nid_cell"
......
......@@ -118,9 +118,9 @@ void RCconfig_nr_flexran()
*SearchSpace_searchSpaceType, *ue_Specific__dci_Formats,
*RateMatchPatternLTE_CRS_subframeAllocation_choice;
long long int downlink_frequency;
uint64_t downlink_frequency;
int32_t eutra_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
int32_t nr_band, uplink_frequency_offset, N_RB_DL, nb_antenna_ports,
MIB_subCarrierSpacingCommon, MIB_ssb_SubcarrierOffset, MIB_dmrs_TypeA_Position,
pdcch_ConfigSIB1, SIB1_ssb_PeriodicityServingCell, SIB1_ss_PBCH_BlockPower,
absoluteFrequencySSB, DL_FreqBandIndicatorNR,
......@@ -431,8 +431,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
char* DL_prefix_type = NULL;
char* UL_prefix_type = NULL;
int32_t eutra_band = 0;
long long int downlink_frequency = 0;
int32_t nr_band = 0;
uint64_t downlink_frequency = 0;
int32_t uplink_frequency_offset = 0;
int32_t Nid_cell = 0;
int32_t N_RB_DL = 0;
......@@ -788,8 +788,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, UL_prefix_type);
}
NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j] = eutra_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint32_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j] = nr_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint64_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j] = (unsigned int) uplink_frequency_offset;
NRRRC_CONFIGURATION_REQ (msg_p).Nid_cell[j]= Nid_cell;
......@@ -844,12 +844,12 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
RC.config_file_name, i, UL_prefix_type);
}
NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j] = eutra_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint32_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j] = nr_band;
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j] = (uint64_t) downlink_frequency;
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j] = (unsigned int) uplink_frequency_offset;
if (config_check_band_frequencies(j,
NRRRC_CONFIGURATION_REQ (msg_p).eutra_band[j],
NRRRC_CONFIGURATION_REQ (msg_p).nr_band[j],
NRRRC_CONFIGURATION_REQ (msg_p).downlink_frequency[j],
NRRRC_CONFIGURATION_REQ (msg_p).uplink_frequency_offset[j],
NRRRC_CONFIGURATION_REQ (msg_p).frame_type[j])) {
......
......@@ -602,12 +602,12 @@ typedef enum {
/* optname helpstr paramflags XXXptr defXXXval type numelt checked_param */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define NRCCPARAMS_DESC { \
{GNB_CONFIG_STRING_FRAME_TYPE, NULL, 0, strptr:&frame_type, defstrval:"FDD", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_FRAME_TYPE, NULL, 0, strptr:&frame_type, defstrval:"TDD", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_DL_PREFIX_TYPE, NULL, 0, strptr:&DL_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_UL_PREFIX_TYPE, NULL, 0, strptr:&UL_prefix_type, defstrval:"NORMAL", TYPE_STRING, 0}, \
{GNB_CONFIG_STRING_EUTRA_BAND, NULL, 0, iptr:&eutra_band, defintval:7, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_DOWNLINK_FREQUENCY, NULL, 0, i64ptr:(int64_t *)&downlink_frequency, defint64val:2680000000, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET, NULL, 0, iptr:&uplink_frequency_offset, defintval:-120000000, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NR_BAND, NULL, 0, iptr:&nr_band, defintval:78, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_DOWNLINK_FREQUENCY, NULL, 0, i64ptr:(int64_t *)&downlink_frequency, defint64val:3600000000, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_UPLINK_FREQUENCY_OFFSET, NULL, 0, iptr:&uplink_frequency_offset, defintval:0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_NID_CELL, NULL, 0, iptr:&Nid_cell, defintval:0, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_N_RB_DL, NULL, 0, iptr:&N_RB_DL, defintval:25, TYPE_UINT, 0}, \
{GNB_CONFIG_STRING_NB_ANT_PORTS, NULL, 0, iptr:&nb_antenna_ports, defintval:15, TYPE_UINT, 0}, \
......@@ -751,7 +751,7 @@ typedef enum {
#define GNB_CONFIG_FRAME_TYPE_IDX 0
#define GNB_CONFIG_DL_PREFIX_TYPE_IDX 1
#define GNB_CONFIG_UL_PREFIX_TYPE_IDX 2
#define GNB_CONFIG_EUTRA_BAND_IDX 3
#define GNB_CONFIG_NR_BAND_IDX 3
#define GNB_CONFIG_DOWNLINK_FREQUENCY_IDX 4
#define GNB_CONFIG_UPLINK_FREQUENCY_OFFSET_IDX 5
#define GNB_CONFIG_NID_CELL_IDX 6
......
......@@ -111,6 +111,7 @@ uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw)
int i;
LOG_I(MAC,"Searching for nr band %d DL Carrier frequency %llu bw %u\n",nr_bandP,(long long unsigned int)dl_CarrierFreq,bw);
AssertFatal(nr_bandP < 86, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 30 && nr_bandtable[i].band != nr_bandP; i++);
......@@ -147,7 +148,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint32_t dl_nrarfcn)
AssertFatal(nr_bandP < 87, "nr_band %d > 86\n", nr_bandP);
for (i = 0; i < 31 && nr_bandtable[i].band != nr_bandP; i++);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %d < N_OFFs_DL %d\n",dl_nrarfcn, nr_bandtable[i].N_OFFs_DL);
AssertFatal(dl_nrarfcn>=nr_bandtable[i].N_OFFs_DL,"dl_nrarfcn %u < N_OFFs_DL %llu\n",dl_nrarfcn, (long long unsigned int)nr_bandtable[i].N_OFFs_DL);
return 1000*(nr_bandtable[i].dl_min + (dl_nrarfcn - nr_bandtable[i].N_OFFs_DL) * deltaFglobal);
......@@ -167,13 +168,18 @@ void config_nr_mib(int Mod_idP,
cfg->num_tlv=0;
cfg->rf_config.tx_antenna_ports.value = p_gNBP;
cfg->rf_config.tx_antenna_ports.tl.tag = NFAPI_RF_CONFIG_TX_ANTENNA_PORTS_TAG;
cfg->rf_config.dl_subcarrierspacing.value = subCarrierSpacingCommon;
cfg->rf_config.dl_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_DL_SUBCARRIERSPACING_TAG;
cfg->num_tlv++;
cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
cfg->rf_config.ul_subcarrierspacing.value = subCarrierSpacingCommon;
cfg->rf_config.ul_subcarrierspacing.tl.tag = NFAPI_NR_RF_CONFIG_UL_SUBCARRIERSPACING_TAG;
cfg->num_tlv++;
cfg->sch_config.ssb_subcarrier_offset.value = ssb_SubcarrierOffset;
cfg->sch_config.ssb_subcarrier_offset.tl.tag = NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG;
cfg->num_tlv++;
}
void config_common(int Mod_idP,
......@@ -228,7 +234,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_idP,
int p_gNB,
int nr_bandP,
int dl_CarrierFreqP,
uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
NR_ServingCellConfigCommon_t *servingcellconfigcommon
......
......@@ -71,7 +71,7 @@ uint16_t nr_pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP,
frame_t frameP,
sub_frame_t subframeP){
sub_frame_t slotP){
nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0];
......@@ -87,7 +87,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
//DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = slotP + (frameP<<7);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
......@@ -104,7 +104,7 @@ void check_nr_ul_failure(module_id_t module_idP,
int CC_id,
int UE_id,
frame_t frameP,
sub_frame_t subframeP) {
sub_frame_t slotP) {
UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list;
nfapi_nr_dl_config_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0];
......@@ -259,14 +259,14 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
}
}
*/
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
{
int CC_id;
gNB_MAC_INST *mac = RC.nrmac[module_idP];
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][subframeP];
nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][slotP];
nfapi_ul_config_request_t *ul_req = &mac->UL_req[CC_id];
nfapi_ul_config_request_pdu_t *ul_req_pdu = ul_req->ul_config_request_body.ul_config_pdu_list;
......@@ -274,12 +274,12 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
// Restore the pointer
ul_req->ul_config_request_body.ul_config_pdu_list = ul_req_pdu;
ul_req->sfn_sf = (frameP<<4) + subframeP;
ul_req->sfn_sf = (frameP<<7) + slotP;
ul_req_tmp->ul_config_request_body.number_of_pdus = 0;
if (ul_req->ul_config_request_body.number_of_pdus>0)
{
LOG_D(PHY, "%s() active NOW (frameP:%d subframeP:%d) pdus:%d\n", __FUNCTION__, frameP, subframeP, ul_req->ul_config_request_body.number_of_pdus);
LOG_D(PHY, "%s() active NOW (frameP:%d slotP:%d) pdus:%d\n", __FUNCTION__, frameP, slotP, ul_req->ul_config_request_body.number_of_pdus);
}
memcpy((void*)ul_req->ul_config_request_body.ul_config_pdu_list,
......@@ -290,7 +290,7 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP){
sub_frame_t slotP){
protocol_ctxt_t ctxt;
int CC_id, i = -1;
......@@ -303,7 +303,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
RC.nrmac[module_idP]->frame = frameP;
RC.nrmac[module_idP]->subframe = subframeP;
RC.nrmac[module_idP]->slot = slotP;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
//mbsfn_status[CC_id] = 0;
......@@ -312,17 +313,20 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL, 0, 100);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, subframeP);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frameP, slotP);
}
// refresh UE list based on UEs dropped by PHY in previous subframe
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i);
if (((frameP&127) == 0) && (subframeP == 0)) {
int spf = get_spf(cfg);
if (((frameP&127) == 0) && (slotP == 0)) {
LOG_I(MAC,
"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
rnti,
......@@ -334,11 +338,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
(UE_list->UE_sched_ctrl[i].pucch1_snr[CC_id] - 128) / 2);
}
RC.gNB[module_idP][CC_id]->pusch_stats_bsr[i][(frameP * 10) + subframeP] = -63;
RC.gNB[module_idP][CC_id]->pusch_stats_bsr[i][to_absslot(cfg,frameP,slotP)] = -63;
if (i == UE_list->head)
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BSR,RC.gNB[module_idP][CC_id]->
pusch_stats_bsr[i][(frameP * 10) + subframeP]);
pusch_stats_bsr[i][to_absslot(cfg,frameP,slotP)]);
// increment this, it is cleared when we receive an sdu
RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer++;
......@@ -407,19 +411,19 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, subframeP,module_idP);
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,NOT_A_RNTI, frameP, slotP,module_idP);
pdcp_run(&ctxt);
//rrc_rx_tx(&ctxt, CC_id);
// This schedules MIB
if((subframeP == 0) && (frameP & 7) == 0){
schedule_nr_mib(module_idP, frameP, subframeP);
if((slotP == 0) && (frameP & 7) == 0){
schedule_nr_mib(module_idP, frameP, slotP);
}
// Phytest scheduling/ option not activated because of pending bug
nr_schedule_css_dlsch_phytest(module_idP, frameP, subframeP);
nr_schedule_css_dlsch_phytest(module_idP, frameP, slotP);
/*
......
......@@ -57,7 +57,7 @@
extern RAN_CONTEXT_t RC;
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP){
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc;
......@@ -70,9 +70,9 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
int mib_sdu_length;
int CC_id;
uint16_t sfn_sf = frameP << 4 | subframeP;
uint16_t sfn_sf = frameP << 7 | slotP;
AssertFatal(subframeP == 0, "Subframe must be 0\n");
AssertFatal(slotP == 0, "Subframe must be 0\n");
AssertFatal((frameP & 7) == 0, "Frame must be a multiple of 8\n");
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
......@@ -83,11 +83,11 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
mib_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, MIBCH, 1, &cc->MIB_pdu.payload[0]); // not used in this case
LOG_D(MAC, "Frame %d, subframe %d: BCH PDU length %d\n", frameP, subframeP, mib_sdu_length);
LOG_D(MAC, "Frame %d, slot %d: BCH PDU length %d\n", frameP, slotP, mib_sdu_length);
if (mib_sdu_length > 0) {
LOG_D(MAC, "Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n", frameP, subframeP, dl_req->number_pdu, mib_sdu_length);
LOG_D(MAC, "Frame %d, slot %d: Adding BCH PDU in position %d (length %d)\n", frameP, slotP, dl_req->number_pdu, mib_sdu_length);
if ((frameP & 1023) < 80){
LOG_D(MAC,"[gNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes\n",module_idP, frameP, CC_id, mib_sdu_length);
......
......@@ -30,6 +30,7 @@
#include "nr_mac_gNB.h"
#include "SCHED_NR/sched_nr.h"
#include "mac_proto.h"
extern RAN_CONTEXT_t RC;
......@@ -48,13 +49,12 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
nfapi_tx_request_pdu_t *TX_req;
nfapi_nr_config_request_t *cfg = &nr_mac->config[0];
uint16_t sfn_sf = frameP << 4 | slotP;
uint16_t sfn_sf = frameP << 7 | slotP;
int dl_carrier_bandwidth = cfg->rf_config.dl_carrier_bandwidth.value;
// everything here is hard-coded to 30 kHz
int scs = kHz30;
int mu = 1;
int slots_per_frame = 10 * (1<<mu);
int scs = get_dlscs(cfg);
int slots_per_frame = get_spf(cfg);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_I(MAC, "Scheduling common search space DCI type 1 for CC_id %d\n",CC_id);
......
......@@ -83,61 +83,9 @@ uint8_t nr_ss_param_M_type_0_mux1_FR2[14] = {1,0.5,1,0.5,1,0.5,0.5,0.5,0.5,1,0.5
/// LUT for SS first symbol index indexed by ss index
uint8_t nr_ss_first_symb_idx_type_0_mux1_FR1[8] = {0,0,1,2,1,2,1,2};
int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP){
// if FDD return dummy value
if (ccP->tdd_Config == NULL)
return (0);
int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slot){
switch (ccP->tdd_Config->subframeAssignment) {
case 1:
switch (subframeP) {
case 0:
case 4:
case 5:
case 9:
return (0);
break;
case 2:
case 3:
case 7:
case 8:
return (1);
break;
default:
return (0);
break;
}
break;
case 3:
if ((subframeP <= 1) || (subframeP >= 5))
return (0);
else if ((subframeP > 1) && (subframeP < 5))
return (1);
else
AssertFatal(1 == 0, "Unknown subframe number\n");
break;
case 4:
if ((subframeP <= 1) || (subframeP >= 4))
return (0);
else if ((subframeP > 1) && (subframeP < 4))
return (1);
else
AssertFatal(1 == 0, "Unknown subframe number\n");
break;
case 5:
if ((subframeP <= 1) || (subframeP >= 3))
return (0);
else if ((subframeP > 1) && (subframeP < 3))
return (1);
else
AssertFatal(1 == 0, "Unknown subframe number\n");
break;
default:
AssertFatal(1 == 0,
"subframe %d Unsupported TDD configuration %d\n",
subframeP, (int) ccP->tdd_Config->subframeAssignment);
break;
}
return (0);
}
void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* pdcch_params,
......@@ -167,6 +115,7 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
if (N_RB < 106) { // Minimum 40Mhz bandwidth not satisfied
switch(pdcch_scs) {
case kHz15:
AssertFatal(1==0,"kHz15 not supported yet\n");
break;
case kHz30:
......@@ -185,6 +134,7 @@ void nr_configure_css_dci_initial(nfapi_nr_dl_config_pdcch_parameters_rel15_t* p
AssertFatal(ss_idx<10 ,"Invalid scs_common/pdcch_scs combination %d/%d \n", scs_common, pdcch_scs);
switch(pdcch_scs) {
case kHz15:
AssertFatal(1==0,"15 kHz SCS not supported yet\n");
break;
case kHz30:
......@@ -262,3 +212,28 @@ void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_
}
int get_dlscs(nfapi_nr_config_request_t *cfg) {
return(cfg->rf_config.dl_subcarrierspacing.value);
}
int get_ulscs(nfapi_nr_config_request_t *cfg) {
return(cfg->rf_config.ul_subcarrierspacing.value);
}
int get_spf(nfapi_nr_config_request_t *cfg) {
int mu = cfg->rf_config.dl_subcarrierspacing.value;
AssertFatal(mu>=0&&mu<4,"Illegal scs %d\n",mu);
return(10 * (1<<mu));
}
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot) {
return(get_spf(cfg)*frame) + slot;
}
......@@ -39,14 +39,14 @@ void mac_top_init_gNB(void);
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int CC_id,
int p_gNB,
int eutra_bandP,
int dl_CarrierFreqP,
int nr_bandP,
uint64_t dl_CarrierFreqP,
int dl_BandwidthP,
NR_BCCH_BCH_Message_t *mib,
NR_ServingCellConfigCommon_t *servingcellconfigcommon
);
int is_nr_UL_sf(NR_COMMON_channels_t * ccP, sub_frame_t subframeP);
int is_nr_UL_slot(NR_COMMON_channels_t * ccP, int slotP);
void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
int CC_idP,
......@@ -80,4 +80,12 @@ void nr_configure_css_dci_from_pdcch_config(nfapi_nr_dl_config_pdcch_parameters_
nfapi_nr_coreset_t* coreset,
nfapi_nr_search_space_t* search_space);
int get_dlscs(nfapi_nr_config_request_t *cfg);
int get_ulscs(nfapi_nr_config_request_t *cfg);
int get_spf(nfapi_nr_config_request_t *cfg);
int to_absslot(nfapi_nr_config_request_t *cfg,int frame,int slot);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/
......@@ -67,7 +67,7 @@ typedef struct {
int physCellId;
int p_gNB;
int Ncp;
int eutra_band;
int nr_band;
uint32_t dl_CarrierFreq;
NR_BCCH_BCH_Message_t *mib;
TDD_Config_t *tdd_Config;
......@@ -107,8 +107,8 @@ typedef struct gNB_MAC_INST_s {
module_id_t Mod_id;
/// frame counter
frame_t frame;
/// subframe counter
sub_frame_t subframe;
/// slot counter
int slot;
/// Pointer to IF module instance for PHY
NR_IF_Module_t *if_inst;
/// Common cell resources
......
......@@ -295,7 +295,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
// clear DL/UL info for new scheduling round
clear_nr_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->slot);
clear_nr_nfapi_information(mac,CC_id,UL_info->frame,UL_info->slot);
handle_nr_rach(UL_info);
......@@ -318,21 +318,23 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
(UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%10);
*/
nfapi_nr_config_request_t *cfg = &mac->config[CC_id];
int spf = get_spf(cfg);
gNB_dlsch_ulsch_scheduler(module_id,
(UL_info->frame+((UL_info->slot>(9-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%10);
(UL_info->frame+((UL_info->slot>(spf-1-sf_ahead))?1:0)) % 1024,
(UL_info->slot+sf_ahead)%spf);
ifi->CC_mask = 0;
sched_info->module_id = module_id;
sched_info->CC_id = CC_id;
sched_info->frame = (UL_info->frame + ((UL_info->slot>(9-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->slot = (UL_info->slot+sf_ahead)%10;
sched_info->frame = (UL_info->frame + ((UL_info->slot>(spf-1-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->slot = (UL_info->slot+sf_ahead)%spf;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_nr_UL_sf(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%10)>0))
(is_nr_UL_slot(&mac->common_channels[CC_id],(sched_info->slot+sf_ahead)%spf)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
......
......@@ -385,8 +385,8 @@ typedef struct {
int Ncp_UL; //cyclic prefix for UL
int p_gNB; //number of tx antenna port
int p_rx_gNB; //number of receiving antenna ports
uint32_t dl_CarrierFreq; //detected by the UE
uint32_t ul_CarrierFreq; //detected by the UE
uint64_t dl_CarrierFreq; //detected by the UE
uint64_t ul_CarrierFreq; //detected by the UE
//are the only static one (memory has been already allocated)
NR_BCCH_BCH_Message_t mib;
......
......@@ -265,7 +265,7 @@ static void init_NR_SI(const protocol_ctxt_t* const ctxt_pP,
rrc_mac_config_req_gNB(ctxt_pP->module_id,
CC_id,
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].p_gNB,
configuration->eutra_band[CC_id],
configuration->nr_band[CC_id],
RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].dl_CarrierFreq,
configuration->N_RB_DL[CC_id],
(NR_BCCH_BCH_Message_t *)&RC.nrrrc[ctxt_pP->module_id]->carrier[CC_id].mib,
......
......@@ -118,8 +118,8 @@ extern openair0_config_t openair0_cfg[MAX_CARDS];
extern int transmission_mode;
uint16_t sl_ahead=4;
uint16_t sf_ahead=4;
//pthread_t main_gNB_thread;
time_stats_t softmodem_stats_mt; // main thread
......@@ -225,7 +225,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc, char *thread_
/// end
// *****************************************
// TX processing for subframe n+sf_ahead
// TX processing for subframe n+sl_ahead
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// *****************************************
......@@ -311,8 +311,8 @@ static void* gNB_L1_thread_tx(void* param) {
// (may be relaxed in the future for performance reasons)
// *****************************************
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_GNB,proc->slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX1_GNB,proc->slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX1_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_GNB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_GNB,proc->frame_rx);
......@@ -364,8 +364,8 @@ static void* gNB_L1_thread( void* param ) {
if (wait_on_condition(&proc->mutex,&proc->cond,&proc->instance_cnt,thread_name)<0) break;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX0, 1 );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_GNB,proc->slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_TX0_GNB,proc->slot_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SLOT_NUMBER_RX0_GNB,proc->slot_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_GNB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_GNB,proc->frame_rx);
......@@ -433,11 +433,11 @@ void gNB_top(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, char *string, struct
if (!oai_exit) {
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->slot_rx));
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sl_ahead*fp->samples_per_slot);
L1_proc->frame_rx = ru_proc->frame_rx;
L1_proc->slot_rx = ru_proc->tti_rx;
L1_proc->frame_tx = (L1_proc->slot_rx > (9-sf_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->slot_tx = (L1_proc->slot_rx + sf_ahead)%10;
L1_proc->frame_tx = (L1_proc->slot_rx > (fp->slots_per_frame-1-sl_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->slot_tx = (L1_proc->slot_rx + sl_ahead)%fp->slots_per_frame;
if (rxtx(gNB,L1_proc,string) < 0) LOG_E(PHY,"gNB %d CC_id %d failed during execution\n",gNB->Mod_id,gNB->CC_id);
ru_proc->timestamp_tx = L1_proc->timestamp_tx;
......@@ -485,7 +485,7 @@ int wakeup_txfh(gNB_L1_rxtx_proc_t *proc,PHY_VARS_gNB *gNB) {
ru_proc->tti_tx = proc->slot_tx;
ru_proc->frame_tx = proc->frame_tx;
LOG_I(PHY,"Signaling tx_thread_fh for %d.%d\n",ru_proc->frame_tx,ru_proc->tti_tx);
// the thread can now be woken up
if (pthread_cond_signal(&ru_proc->cond_gNBs) != 0) {
LOG_E( PHY, "[gNB] ERROR pthread_cond_signal for gNB TXnp4 thread\n");
......@@ -576,16 +576,16 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
wait.tv_nsec=5000000L;
/* accept some delay in processing - up to 5ms */
for (i = 0; i < 10 && L1_proc->instance_cnt == 0; i++) {
LOG_W( PHY,"[gNB] Frame %d Subframe %d, gNB RXn-TXnp4 thread busy!! (cnt %i)\n", L1_proc->frame_tx, L1_proc->slot_tx, L1_proc->instance_cnt);
usleep(500);
for (i = 0; i < fp->slots_per_frame && L1_proc->instance_cnt == 0; i++) {
LOG_W( PHY,"[gNB] SFN.SL %d.%d, gNB RXn-TXnp4 thread busy!! (i %d, cnt %i)\n", L1_proc->frame_tx, L1_proc->slot_tx, i,L1_proc->instance_cnt);
usleep(100);
}
if (L1_proc->instance_cnt == 0) {
exit_fun( "TX thread busy" );
return(-1);
}
// wake up TX for subframe n+sf_ahead
// wake up TX for subframe n+sl_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) {
LOG_E( PHY, "[gNB] ERROR pthread_mutex_lock for gNB RXTX thread %d (IC %d)\n", L1_proc->slot_rx&1,L1_proc->instance_cnt );
......@@ -599,15 +599,15 @@ int wakeup_rxtx(PHY_VARS_gNB *gNB,RU_t *ru) {
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
// transmitted timestamp of the next TX slot (first).
// The last (TS_rx mod samples_per_frame) was n*samples_per_tti,
// we want to generate subframe (n+sf_ahead), so TS_tx = TX_rx+sf_ahead*samples_per_tti,
// and proc->slot_tx = proc->slot_rx+sf_ahead
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_subframe);
// we want to generate subframe (n+sl_ahead), so TS_tx = TX_rx+sl_ahead*samples_per_tti,
// and proc->slot_tx = proc->slot_rx+sl_ahead
L1_proc->timestamp_tx = ru_proc->timestamp_rx + (sl_ahead*fp->samples_per_slot);
L1_proc->frame_rx = ru_proc->frame_rx;
L1_proc->slot_rx = ru_proc->tti_rx;
L1_proc->frame_tx = (L1_proc->slot_rx > (9-sf_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->slot_tx = (L1_proc->slot_rx + sf_ahead)%10;
L1_proc->frame_tx = (L1_proc->slot_rx > (fp->slots_per_frame-1-sl_ahead)) ? (L1_proc->frame_rx+1)&1023 : L1_proc->frame_rx;
L1_proc->slot_tx = (L1_proc->slot_rx + sl_ahead)%fp->slots_per_frame;
//printf("~~~~~~~~~~~~~~~~~~~~~~passing parameter IC = %d, RX: %d.%d, TX: %d.%d to L1 sf_ahead = %d\n", L1_proc->instance_cnt, L1_proc->frame_rx, L1_proc->slot_rx, L1_proc->frame_tx, L1_proc->slot_tx, sf_ahead);
LOG_I(PHY,"wakeupL1: passing parameter IC = %d, RX: %d.%d, TX: %d.%d to L1 sl_ahead = %d\n", L1_proc->instance_cnt, L1_proc->frame_rx, L1_proc->slot_rx, L1_proc->frame_tx, L1_proc->slot_tx, sl_ahead);
// the thread can now be woken up
if (pthread_cond_signal(&L1_proc->cond) != 0) {
......@@ -1005,7 +1005,6 @@ void init_eNB_afterRU(void) {
// map antennas and PRACH signals to gNB RX
if (0) AssertFatal(gNB->num_RU>0,"Number of RU attached to gNB %d is zero\n",gNB->Mod_id);
LOG_I(PHY,"Mapping RX ports from %d RUs to gNB %d\n",gNB->num_RU,gNB->Mod_id);
gNB->gNB_config.rf_config.tx_antenna_ports.value = 0;
//LOG_I(PHY,"Overwriting gNB->prach_vars.rxsigF[0]:%p\n", gNB->prach_vars.rxsigF[0]);
......@@ -1014,7 +1013,6 @@ void init_eNB_afterRU(void) {
LOG_I(PHY,"gNB->num_RU:%d\n", gNB->num_RU);
for (ru_id=0,aa=0;ru_id<gNB->num_RU;ru_id++) {
gNB->gNB_config.rf_config.tx_antenna_ports.value += gNB->RU_list[ru_id]->nb_rx;
AssertFatal(gNB->RU_list[ru_id]->common.rxdataF!=NULL,
"RU %d : common.rxdataF is NULL\n",
......@@ -1037,29 +1035,6 @@ void init_eNB_afterRU(void) {
* In monolithic mode, we come here with nb_antennas_rx == 0
* (not tested in other modes).
*/
if (gNB->gNB_config.rf_config.tx_antenna_ports.value < 1)
{
LOG_I(PHY, "%s() ************* DJP ***** gNB->gNB_config.rf_config.tx_antenna_ports:%d - GOING TO HARD CODE TO 1", __FUNCTION__, gNB->gNB_config.rf_config.tx_antenna_ports.value);
gNB->gNB_config.rf_config.tx_antenna_ports.value = 1;
}
else
{
//LOG_I(PHY," Delete code\n");
}
if (gNB->gNB_config.rf_config.tx_antenna_ports.value < 1)
{
LOG_I(PHY, "%s() ************* DJP ***** gNB->gNB_config.rf_config.tx_antenna_ports:%d - GOING TO HARD CODE TO 1", __FUNCTION__, gNB->gNB_config.rf_config.tx_antenna_ports.value);
gNB->gNB_config.rf_config.tx_antenna_ports.value = 1;
}
else
{
//LOG_I(PHY," Delete code\n");
}
AssertFatal(gNB->gNB_config.rf_config.tx_antenna_ports.value >0,
"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,gNB->gNB_config.rf_config.tx_antenna_ports.value);
LOG_I(PHY,"inst %d, CC_id %d : nb_antennas_rx %d\n",inst,CC_id,gNB->gNB_config.rf_config.tx_antenna_ports.value);
/// Transport init necessary for NR synchro
//init_transport(gNB);
//init_precoding_weights(RC.gNB[inst][CC_id]);
......
......@@ -7,7 +7,6 @@
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
......@@ -135,7 +134,7 @@ int attach_rru(RU_t *ru);
int connect_rau(RU_t *ru);
extern uint16_t sf_ahead;
extern uint16_t sl_ahead;
extern int emulate_rf;
extern int numerology;
......@@ -337,8 +336,8 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *tti) {
recv_IF5(ru, &proc->timestamp_rx, *tti, IF5_RRH_GW_UL);
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_subframe)%10;
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*20))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%20;
if (proc->first_rx == 0) {
if (proc->tti_rx != *tti){
......@@ -361,49 +360,49 @@ void fh_if5_south_in(RU_t *ru,int *frame, int *tti) {
}
// Synchronous if4p5 from south
void fh_if4p5_south_in(RU_t *ru,int *frame,int *tti) {
void fh_if4p5_south_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
int f,sf;
int f,sl;
uint16_t packet_type;
uint32_t symbol_number=0;
uint32_t symbol_mask_full=0;
/*
if ((fp->frame_type == TDD) && (subframe_select(fp,*tti)==SF_S))
if ((fp->frame_type == TDD) && (subframe_select(fp,*slot)==SF_S))
symbol_mask_full = (1<<fp->ul_symbols_in_S_subframe)-1;
else
symbol_mask_full = (1<<fp->symbols_per_tti)-1;
symbol_mask_full = (1<<fp->symbols_per_slot)-1;
AssertFatal(proc->symbol_mask[*tti]==0,"rx_fh_if4p5: proc->symbol_mask[%d] = %x\n",*tti,proc->symbol_mask[*tti]);*/
AssertFatal(proc->symbol_mask[*slot]==0,"rx_fh_if4p5: proc->symbol_mask[%d] = %x\n",*slot,proc->symbol_mask[*slot]);*/
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
recv_IF4p5(ru, &f, &sf, &packet_type, &symbol_number);
recv_IF4p5(ru, &f, &sl, &packet_type, &symbol_number);
if (packet_type == IF4p5_PULFFT) proc->symbol_mask[sf] = proc->symbol_mask[sf] | (1<<symbol_number);
if (packet_type == IF4p5_PULFFT) proc->symbol_mask[sl] = proc->symbol_mask[sl] | (1<<symbol_number);
else if (packet_type == IF4p5_PULTICK) {
if ((proc->first_rx==0) && (f!=*frame)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received frame %d != expected %d\n",f,*frame);
if ((proc->first_rx==0) && (sf!=*tti)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received subframe %d != expected %d (first_rx %d)\n",sf,*tti,proc->first_rx);
if ((proc->first_rx==0) && (sl!=*slot)) LOG_E(PHY,"rx_fh_if4p5: PULTICK received subframe %d != expected %d (first_rx %d)\n",sl,*slot,proc->first_rx);
break;
} else if (packet_type == IF4p5_PRACH) {
// nothing in RU for RAU
}
LOG_D(PHY,"rx_fh_if4p5: subframe %d symbol mask %x\n",*tti,proc->symbol_mask[*tti]);
} while(proc->symbol_mask[*tti] != symbol_mask_full);
LOG_D(PHY,"rx_fh_if4p5: subframe %d symbol mask %x\n",*slot,proc->symbol_mask[sl]);
} while(proc->symbol_mask[sl] != symbol_mask_full);
//caculate timestamp_rx, timestamp_tx based on frame and subframe
proc->tti_rx = sf;
proc->tti_rx = sl;
proc->frame_rx = f;
proc->timestamp_rx = ((proc->frame_rx * 10) + proc->tti_rx ) * fp->samples_per_subframe ;
proc->timestamp_rx = ((proc->frame_rx * fp->slots_per_frame) + proc->tti_rx ) * fp->samples_per_slot ;
// proc->timestamp_tx = proc->timestamp_rx + (4*fp->samples_per_subframe);
proc->tti_tx = (sf+sf_ahead)%10;
proc->frame_tx = (sf>(9-sf_ahead)) ? (f+1)&1023 : f;
proc->tti_tx = (sl+sl_ahead)%fp->slots_per_frame;
proc->frame_tx = (sl>(fp->slots_per_frame-sl_ahead)) ? (f+1)&1023 : f;
if (proc->first_rx == 0) {
if (proc->tti_rx != *tti){
LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*tti);
if (proc->tti_rx != *slot){
LOG_E(PHY,"Received Timestamp (IF4p5) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",proc->tti_rx,*slot);
exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
......@@ -413,81 +412,23 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *tti) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*tti = proc->tti_rx;
*slot = proc->tti_rx;
}
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, f );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, sf );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, sl);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->tti_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
}
proc->symbol_mask[sf] = 0;
proc->symbol_mask[proc->tti_rx] = 0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
LOG_D(PHY,"RU %d: fh_if4p5_south_in sleeping ...\n",ru->idx);
usleep(100);
}
// Dummy FH from south for getting synchronization from master RU
void fh_slave_south_in(RU_t *ru,int *frame,int *tti) {
// This case is for synchronization to another thread
// it just waits for an external event. The actual rx_fh is handle by the asynchronous RX thread
RU_proc_t *proc=&ru->proc;
if (wait_on_condition(&proc->mutex_FH,&proc->cond_FH,&proc->instance_cnt_FH,"fh_slave_south_in") < 0)
return;
release_thread(&proc->mutex_FH,&proc->instance_cnt_FH,"rx_fh_slave_south_in");
}
// asynchronous inbound if5 fronthaul from south (Mobipass)
void fh_if5_south_asynch_in_mobipass(RU_t *ru,int *frame,int *tti) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
recv_IF5(ru, &proc->timestamp_rx, *tti, IF5_MOBIPASS);
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
int offset_mobipass = 40120;
pthread_mutex_lock(&proc->mutex_asynch_rxtx);
proc->tti_rx = ((proc->timestamp_rx-offset_mobipass)/fp->samples_per_subframe)%10;
proc->frame_rx = ((proc->timestamp_rx-offset_mobipass)/(fp->samples_per_subframe*10))&1023;
proc->tti_rx = (proc->timestamp_rx/fp->samples_per_subframe)%10;
proc->frame_rx = (proc->timestamp_rx/(10*fp->samples_per_subframe))&1023;
if (proc->first_rx == 1) {
proc->first_rx =2;
*tti = proc->tti_rx;
*frame = proc->frame_rx;
LOG_E(PHY,"[Mobipass]timestamp_rx:%llu, frame_rx %d, subframe: %d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,proc->tti_rx);
}
else {
if (proc->tti_rx != *tti) {
proc->first_rx++;
LOG_E(PHY,"[Mobipass]timestamp:%llu, tti_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx, proc->tti_rx,*tti, proc->first_rx);
//exit_fun("Exiting");
}
if (proc->frame_rx != *frame) {
proc->first_rx++;
LOG_E(PHY,"[Mobipass]timestamp:%llu, frame_rx %d is not what we expect %d, first_rx:%d\n",(unsigned long long int)proc->timestamp_rx,proc->frame_rx,*frame, proc->first_rx);
// exit_fun("Exiting");
}
// temporary solution
*tti = proc->tti_rx;
*frame = proc->frame_rx;
}
pthread_mutex_unlock(&proc->mutex_asynch_rxtx);
} // gNodeB_3GPP_BBU
// asynchronous inbound if4p5 fronthaul from south
void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *tti) {
void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
......@@ -497,7 +438,7 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *tti) {
// uint32_t got_prach_info=0;
symbol_number = 0;
symbol_mask = (1<<(fp->symbols_per_slot * fp->slots_per_subframe))-1;
symbol_mask = (1<<(fp->symbols_per_slot))-1;
prach_rx = 0;
do { // Blocking, we need a timeout on this !!!!!!!!!!!!!!!!!!!!!!!
......@@ -509,7 +450,7 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *tti) {
}*/
if (proc->first_rx != 0) {
*frame = proc->frame_rx;
*tti = proc->tti_rx;
*slot = proc->tti_rx;
proc->first_rx = 0;
}
else {
......@@ -517,8 +458,8 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *tti) {
LOG_E(PHY,"frame_rx %d is not what we expect %d\n",proc->frame_rx,*frame);
exit_fun("Exiting");
}
if (proc->tti_rx != *tti) {
LOG_E(PHY,"tti_rx %d is not what we expect %d\n",proc->tti_rx,*tti);
if (proc->tti_rx != *slot) {
LOG_E(PHY,"tti_rx %d is not what we expect %d\n",proc->tti_rx,*slot);
exit_fun("Exiting");
}
}
......@@ -536,7 +477,7 @@ void fh_if4p5_south_asynch_in(RU_t *ru,int *frame,int *tti) {
// RRU IF4p5 TX fronthaul receiver. Assumes an if_device on input and if or rf device on output
// receives one subframe's worth of IF4p5 OFDM symbols and OFDM modulates
void fh_if4p5_north_in(RU_t *ru,int *frame,int *tti) {
void fh_if4p5_north_in(RU_t *ru,int *frame,int *slot) {
uint32_t symbol_number=0;
uint32_t symbol_mask, symbol_mask_full;
......@@ -549,44 +490,44 @@ void fh_if4p5_north_in(RU_t *ru,int *frame,int *tti) {
symbol_mask_full = (1<<(ru->nr_frame_parms->symbols_per_slot))-1;
do {
recv_IF4p5(ru, frame, tti, &packet_type, &symbol_number);
recv_IF4p5(ru, frame, slot, &packet_type, &symbol_number);
symbol_mask = symbol_mask | (1<<symbol_number);
} while (symbol_mask != symbol_mask_full);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, *frame );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, *tti );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, *slot );
}
}
void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *tti) {
void fh_if5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
RU_proc_t *proc = &ru->proc;
int tti_tx,frame_tx;
openair0_timestamp timestamp_tx;
recv_IF5(ru, &timestamp_tx, *tti, IF5_RRH_GW_DL);
recv_IF5(ru, &timestamp_tx, *slot, IF5_RRH_GW_DL);
// printf("Received subframe %d (TS %llu) from RCC\n",tti_tx,timestamp_tx);
tti_tx = (timestamp_tx/fp->samples_per_subframe)%10;
frame_tx = (timestamp_tx/(fp->samples_per_subframe*10))&1023;
tti_tx = (timestamp_tx/fp->samples_per_slot)%fp->slots_per_frame;
frame_tx = (timestamp_tx/(fp->samples_per_slot*fp->slots_per_frame))&1023;
if (proc->first_tx != 0) {
*tti = tti_tx;
*slot = tti_tx;
*frame = frame_tx;
proc->first_tx = 0;
}
else {
AssertFatal(tti_tx == *tti,
"tti_tx %d is not what we expect %d\n",tti_tx,*tti);
AssertFatal(tti_tx == *slot,
"tti_tx %d is not what we expect %d\n",tti_tx,*slot);
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
}
}
void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *tti) {
void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
nfapi_nr_config_request_t *cfg = &ru->gNB_list[0]->gNB_config;
......@@ -594,28 +535,28 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *tti) {
uint16_t packet_type;
uint32_t symbol_number,symbol_mask,symbol_mask_full=0;
int tti_tx,frame_tx;
int slot_tx,frame_tx;
LOG_D(PHY, "%s(ru:%p frame, subframe)\n", __FUNCTION__, ru);
symbol_number = 0;
symbol_mask = 0;
// symbol_mask_full = ((subframe_select(fp,*tti) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
// symbol_mask_full = ((subframe_select(fp,*slot) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_slot))-1;
do {
recv_IF4p5(ru, &frame_tx, &tti_tx, &packet_type, &symbol_number);
if ((nr_slot_select(cfg,tti_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
recv_IF4p5(ru, &frame_tx, &slot_tx, &packet_type, &symbol_number);
if ((nr_slot_select(cfg,slot_tx) == SF_DL) && (symbol_number == 0)) start_meas(&ru->rx_fhaul);
LOG_D(PHY,"subframe %d (%d): frame %d, subframe %d, symbol %d\n",
*tti,nr_slot_select(cfg,*tti),frame_tx,tti_tx,symbol_number);
*slot,nr_slot_select(cfg,*slot),frame_tx,slot_tx,symbol_number);
if (proc->first_tx != 0) {
*frame = frame_tx;
*tti = tti_tx;
*frame = frame_tx;
*slot = slot_tx;
proc->first_tx = 0;
//symbol_mask_full = ((subframe_select(fp,*tti) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_tti))-1;
//symbol_mask_full = ((subframe_select(fp,*slot) == SF_S) ? (1<<fp->dl_symbols_in_S_subframe) : (1<<fp->symbols_per_slot))-1;
}
else {
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
AssertFatal(tti_tx == *tti,
"tti_tx %d is not what we expect %d\n",tti_tx,*tti);
AssertFatal(slot_tx == *slot,
"slot_tx %d is not what we expect %d\n",slot_tx,*slot);
}
if (packet_type == IF4p5_PDLFFT) {
symbol_mask = symbol_mask | (1<<symbol_number);
......@@ -623,20 +564,20 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *tti) {
else AssertFatal(1==0,"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d\n",packet_type);
} while (symbol_mask != symbol_mask_full);
if (nr_slot_select(cfg,tti_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
if (nr_slot_select(cfg,slot_tx) == SF_DL) stop_meas(&ru->rx_fhaul);
proc->tti_tx = tti_tx;
proc->tti_tx = slot_tx;
proc->frame_tx = frame_tx;
if ((frame_tx == 0)&&(tti_tx == 0)) proc->frame_tx_unwrap += 1024;
if ((frame_tx == 0)&&(slot_tx == 0)) proc->frame_tx_unwrap += 1024;
proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * 10) + (uint64_t)tti_tx) * (uint64_t)fp->samples_per_subframe;
proc->timestamp_tx = ((((uint64_t)frame_tx + (uint64_t)proc->frame_tx_unwrap) * fp->slots_per_frame) + (uint64_t)slot_tx) * (uint64_t)fp->samples_per_slot;
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,tti_tx);
LOG_D(PHY,"RU %d/%d TST %llu, frame %d, subframe %d\n",ru->idx,0,(long long unsigned int)proc->timestamp_tx,frame_tx,slot_tx);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, tti_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, slot_tx );
}
if (ru->feptx_ofdm) ru->feptx_ofdm(ru);
......@@ -661,7 +602,7 @@ void fh_if4p5_north_out(RU_t *ru) {
RU_proc_t *proc=&ru->proc;
//NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
//const int subframe = proc->tti_rx;
if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->tti_rx );
if (ru->idx==0) VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
/*
if ((fp->frame_type == TDD) && (subframe_select(fp,subframe)!=SF_UL)) {
/// **** in TDD during DL send_IF4 of ULTICK to RCC **** ///
......@@ -703,7 +644,7 @@ static void* emulatedRF_thread(void* param) {
return 0;
}
void rx_rf(RU_t *ru,int *frame,int *tti) {
void rx_rf(RU_t *ru,int *frame,int *slot) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
......@@ -711,25 +652,28 @@ void rx_rf(RU_t *ru,int *frame,int *tti) {
unsigned int rxs;
int i;
openair0_timestamp ts,old_ts;
AssertFatal(*slot<fp->slots_per_frame && *slot>=0, "slot %d is illegal (%d)\n",*slot,fp->slots_per_frame);
for (i=0; i<ru->nb_rx; i++)
rxp[i] = (void*)&ru->common.rxdata[i][*tti*fp->samples_per_subframe];
rxp[i] = (void*)&ru->common.rxdata[i][*slot*fp->samples_per_slot];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1 );
old_ts = proc->timestamp_rx;
LOG_I(PHY,"Reading %d samples for slot %d (%p)\n",fp->samples_per_slot,*slot,rxp[0]);
if(emulate_rf){
wait_on_condition(&proc->mutex_emulateRF,&proc->cond_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
release_thread(&proc->mutex_emulateRF,&proc->instance_cnt_emulateRF,"emulatedRF_thread");
rxs = fp->samples_per_subframe;
rxs = fp->samples_per_slot;
ts = old_ts + rxs;
}
else{
rxs = ru->rfdevice.trx_read_func(&ru->rfdevice,
&ts,
rxp,
fp->samples_per_subframe,
fp->samples_per_slot,
ru->nb_rx);
}
......@@ -739,43 +683,43 @@ void rx_rf(RU_t *ru,int *frame,int *tti) {
//AssertFatal(rxs == fp->samples_per_subframe,
//"rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_subframe,rxs);
if (rxs != fp->samples_per_subframe) LOG_E(PHY, "rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_subframe,rxs);
if (rxs != fp->samples_per_slot) LOG_E(PHY, "rx_rf: Asked for %d samples, got %d from USRP\n",fp->samples_per_slot,rxs);
if (proc->first_rx == 1) {
ru->ts_offset = proc->timestamp_rx;
proc->timestamp_rx = 0;
}
else {
if (proc->timestamp_rx - old_ts != fp->samples_per_subframe) {
LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_subframe,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_subframe);
if (proc->timestamp_rx - old_ts != fp->samples_per_slot) {
LOG_I(PHY,"rx_rf: rfdevice timing drift of %"PRId64" samples (ts_off %"PRId64")\n",proc->timestamp_rx - old_ts - fp->samples_per_slot,ru->ts_offset);
ru->ts_offset += (proc->timestamp_rx - old_ts - fp->samples_per_slot);
proc->timestamp_rx = ts-ru->ts_offset;
}
}
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_subframe*10))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_subframe)%10;
proc->frame_rx = (proc->timestamp_rx / (fp->samples_per_slot*fp->slots_per_frame))&1023;
proc->tti_rx = (proc->timestamp_rx / fp->samples_per_slot)%fp->slots_per_frame;
// synchronize first reception to frame 0 subframe 0
proc->timestamp_tx = proc->timestamp_rx+(sf_ahead*fp->samples_per_subframe);
proc->tti_tx = (proc->tti_rx+sf_ahead)%10;
proc->frame_tx = (proc->tti_rx>(9-sf_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
proc->timestamp_tx = proc->timestamp_rx+(sl_ahead*fp->samples_per_slot);
proc->tti_tx = (proc->tti_rx+sl_ahead)%fp->slots_per_frame;
proc->frame_tx = (proc->tti_rx>(fp->slots_per_frame-1-sl_ahead)) ? (proc->frame_rx+1)&1023 : proc->frame_rx;
LOG_D(PHY,"RU %d/%d TS %llu (off %d), frame %d, subframe %d\n",
LOG_I(PHY,"RU %d/%d TS %llu (off %d), frame %d, slot %d.%d / %d\n",
ru->idx,
0,
(unsigned long long int)proc->timestamp_rx,
(int)ru->ts_offset,proc->frame_rx,proc->tti_rx);
(int)ru->ts_offset,proc->frame_rx,proc->tti_rx,proc->tti_tx,fp->slots_per_frame);
// dump VCD output for first RU in list
if (ru == RC.ru[0]) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_RU, proc->frame_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_RU, proc->tti_rx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_RX0_RU, proc->tti_rx );
}
if (proc->first_rx == 0) {
if (proc->tti_rx != *tti){
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->tti_rx,*tti);
if (proc->tti_rx != *slot){
LOG_E(PHY,"Received Timestamp (%llu) doesn't correspond to the time we think it is (proc->tti_rx %d, subframe %d)\n",(long long unsigned int)proc->timestamp_rx,proc->tti_rx,*slot);
exit_fun("Exiting");
}
......@@ -786,14 +730,14 @@ void rx_rf(RU_t *ru,int *frame,int *tti) {
} else {
proc->first_rx = 0;
*frame = proc->frame_rx;
*tti = proc->tti_rx;
*slot = proc->tti_rx;
}
//printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",ru->timestamp_rx,proc->frame_rx,frame,proc->tti_rx,subframe);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
if (rxs != fp->samples_per_subframe)
if (rxs != fp->samples_per_slot)
{
//exit_fun( "problem receiving samples" );
LOG_E(PHY, "problem receiving samples\n");
......@@ -811,17 +755,15 @@ void tx_rf(RU_t *ru) {
int i;
T(T_ENB_PHY_OUTPUT_SIGNAL, T_INT(0), T_INT(0), T_INT(proc->frame_tx), T_INT(proc->tti_tx),
T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->tti_tx * fp->samples_per_subframe], fp->samples_per_subframe * 4));
T_INT(0), T_BUFFER(&ru->common.txdata[0][proc->tti_tx * fp->samples_per_slot], fp->samples_per_slot * 4));
nr_subframe_t SF_type = nr_slot_select(cfg,proc->tti_tx%10);
/*nr_subframe_t prevSF_type = nr_slot_select(cfg,(proc->tti_tx+9)%10);
nr_subframe_t nextSF_type = nr_slot_select(cfg,(proc->tti_tx+1)%10);*/
nr_subframe_t SF_type = nr_slot_select(cfg,proc->tti_tx%fp->slots_per_frame);
int sf_extension = 0;
if ((SF_type == SF_DL) ||
(SF_type == SF_S)) {
int siglen=fp->samples_per_subframe,flags=1;
int siglen=fp->samples_per_slot,flags=1;
/*
if (SF_type == SF_S) {
siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0);
......@@ -843,10 +785,10 @@ void tx_rf(RU_t *ru) {
sf_extension = ru->N_TA_offset<<1;
} */
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->tti_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
for (i=0; i<ru->nb_tx; i++)
txp[i] = (void*)&ru->common.txdata[i][(proc->tti_tx*fp->samples_per_subframe)-sf_extension];
txp[i] = (void*)&ru->common.txdata[i][(proc->tti_tx*fp->samples_per_slot)-sf_extension];
/*
if (proc->tti_tx == 0){
write_output("txdataF_frame.m","txdataF_frame",&ru->common.txdataF_BF[i],fp->samples_per_subframe_wCP, 1, 1);
......@@ -934,47 +876,6 @@ static void* ru_thread_asynch_rxtx( void* param ) {
void wakeup_slaves(RU_proc_t *proc) {
int i;
struct timespec wait;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
for (i=0;i<proc->num_slaves;i++) {
RU_proc_t *slave_proc = proc->slave_proc[i];
// wake up slave FH thread
// lock the FH mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&slave_proc->mutex_FH,&wait) != 0) {
LOG_E( PHY, "ERROR pthread_mutex_lock for RU %d slave %d (IC %d)\n",proc->ru->idx,slave_proc->ru->idx,slave_proc->instance_cnt_FH);
exit_fun( "error locking mutex_rxtx" );
break;
}
int cnt_slave = ++slave_proc->instance_cnt_FH;
slave_proc->frame_rx = proc->frame_rx;
slave_proc->tti_rx = proc->tti_rx;
slave_proc->timestamp_rx = proc->timestamp_rx;
slave_proc->timestamp_tx = proc->timestamp_tx;
pthread_mutex_unlock( &slave_proc->mutex_FH );
if (cnt_slave == 0) {
// the thread was presumably waiting where it should and can now be woken up
if (pthread_cond_signal(&slave_proc->cond_FH) != 0) {
LOG_E( PHY, "ERROR pthread_cond_signal for RU %d, slave RU %d\n",proc->ru->idx,slave_proc->ru->idx);
exit_fun( "ERROR pthread_cond_signal" );
break;
}
} else {
LOG_W( PHY,"[RU] Frame %d, slave %d thread busy!! (cnt_FH %i)\n",slave_proc->frame_rx,slave_proc->ru->idx, cnt_slave);
exit_fun( "FH thread busy" );
break;
}
}
}
/*!
* \brief The prach receive thread of RU.
* \param param is a \ref RU_proc_t structure which contains the info what to process.
......@@ -1417,7 +1318,7 @@ static void* ru_thread_tx( void* param ) {
//printf("~~~~~~~~~~~~~~~~start process for ru_thread_tx %d.%d\n", proc->frame_tx, proc->tti_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, proc->frame_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, proc->tti_tx );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TTI_NUMBER_TX0_RU, proc->tti_tx );
// do TX front-end processing if needed (precoding and/or IDFTs)
if (ru->feptx_prec) ru->feptx_prec(ru);
......@@ -1502,7 +1403,7 @@ static void* ru_thread( void* param ) {
RU_proc_t *proc = &ru->proc;
NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
int ret;
int subframe =9;
int slot = fp->slots_per_frame-1;
int frame =1023;
char filename[40];
int print_frame = 2;
......@@ -1594,20 +1495,20 @@ static void* ru_thread( void* param ) {
// these are local subframe/frame counters to check that we are in synch with the fronthaul timing.
// They are set on the first rx/tx in the underly FH routines.
if (subframe==9) {
subframe=0;
if (slot==(fp->slots_per_frame-1)) {
slot=0;
frame++;
frame&=1023;
} else {
subframe++;
slot++;
}
// synchronization on input FH interface, acquire signals/data and block
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&subframe);
if (ru->fh_south_in) ru->fh_south_in(ru,&frame,&slot);
else AssertFatal(1==0, "No fronthaul interface at south port");
LOG_D(PHY,"AFTER fh_south_in - SFN/SF:%d%d RU->proc[RX:%d%d TX:%d%d] RC.gNB[0][0]:[RX:%d%d TX(SFN):%d]\n",
frame,subframe,
LOG_I(PHY,"AFTER fh_south_in - SFN/SL:%d%d RU->proc[RX:%d.%d TX:%d.%d] RC.gNB[0][0]:[RX:%d%d TX(SFN):%d]\n",
frame,slot,
proc->frame_rx,proc->tti_rx,
proc->frame_tx,proc->tti_tx,
RC.gNB[0][0]->proc.frame_rx,RC.gNB[0][0]->proc.slot_rx,
......@@ -1631,8 +1532,6 @@ static void* ru_thread( void* param ) {
if (ru->feprx) ru->feprx(ru);
// At this point, all information for subframe has been received on FH interface
// If this proc is to provide synchronization, do so
wakeup_slaves(proc);
// wakeup all gNB processes waiting for this RU
if (ru->num_gNB>0) wakeup_gNB_L1s(ru);
......@@ -1658,7 +1557,7 @@ static void* ru_thread( void* param ) {
for (i=0; i<ru->nb_tx; i++)
{
sprintf(filename,"tx%ddataF_frame%d_sf%d.m", i, print_frame, proc->tti_tx);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_subframe_wCP, 1, 1);
LOG_M(filename,"txdataF_frame",&ru->common.txdataF_BF[i][0],fp->samples_per_slot_wCP, 1, 1);
if(proc->tti_tx == 9)
{
sprintf(filename,"tx%ddata_frame%d.m", i, print_frame);
......@@ -2247,16 +2146,9 @@ void set_function_spec_param(RU_t *ru)
ru->feprx = (get_nprocs()<=2) ? fep_full : fep_full; // this is frequency-shift + DFTs
ru->feptx_prec = feptx_prec; // need to do transmit Precoding + IDFTs
ru->feptx_ofdm = (get_nprocs()<=2) ? nr_feptx_ofdm : nr_feptx_ofdm_2thread; // need to do transmit Precoding + IDFTs
if (ru->if_timing == synch_to_other) {
ru->fh_south_in = fh_slave_south_in; // synchronize to master
ru->fh_south_out = fh_if5_mobipass_south_out; // use send_IF5 for mobipass
ru->fh_south_asynch_in = fh_if5_south_asynch_in_mobipass; // UL is asynchronous
}
else {
ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
ru->fh_south_asynch_in = NULL; // no asynchronous UL
}
ru->fh_south_in = fh_if5_south_in; // synchronous IF5 reception
ru->fh_south_out = fh_if5_south_out; // synchronous IF5 transmission
ru->fh_south_asynch_in = NULL; // no asynchronous UL
ru->start_rf = NULL; // no local RF
ru->stop_rf = NULL;
ru->start_if = start_if; // need to start if interface for IF5
......
......@@ -609,8 +609,6 @@ void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.tx_antenna_ports.value = 1;
config[CC_id]->rf_config.rx_antenna_ports.value = 1;
config[CC_id]->sch_config.physical_cell_id.value = 0;
///dl frequency to be filled in
......
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