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Commit 9c84ab93 authored by Fang-WANG's avatar Fang-WANG
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add OXGRF support 

oxgrf ok

update build script for oxgrf

del logs
parent 27e998ce
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Showing with 1324 additions and 43 deletions
cmake_targets/CMakeLists.txt
View file @ 9c84ab93
...@@ -786,7 +786,7 @@ add_library(F1AP ${F1AP_C_FILES} ) ...@@ -786,7 +786,7 @@ add_library(F1AP ${F1AP_C_FILES} )
add_list1_option(NB_ANTENNAS_RX "4" "Number of antennas in reception" "1" "2" "4") add_list1_option(NB_ANTENNAS_RX "4" "Number of antennas in reception" "1" "2" "4")
add_list1_option(NB_ANTENNAS_TX "4" "Number of antennas in transmission" "1" "2" "4") add_list1_option(NB_ANTENNAS_TX "4" "Number of antennas in transmission" "1" "2" "4")
add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "OAI_USRP" "OAI_BLADERF" "OAI_LMSSDR" "OAI_SIMU") add_list2_option(RF_BOARD "EXMIMO" "RF head type" "None" "OAI_USRP" "OAI_BLADERF" "OAI_LMSSDR" "OAI_SIMU" "OAI_OXGRF")
add_list2_option(TRANSP_PRO "None" "Transport protocol type" "None" "ETHERNET") add_list2_option(TRANSP_PRO "None" "Transport protocol type" "None" "ETHERNET")
#NOKIA config enhancement #NOKIA config enhancement
...@@ -825,6 +825,13 @@ set(HWLIB_BLADERF_SOURCE ...@@ -825,6 +825,13 @@ set(HWLIB_BLADERF_SOURCE
add_library(oai_bladerfdevif MODULE ${HWLIB_BLADERF_SOURCE} ) add_library(oai_bladerfdevif MODULE ${HWLIB_BLADERF_SOURCE} )
target_link_libraries(oai_bladerfdevif bladeRF) target_link_libraries(oai_bladerfdevif bladeRF)
include_directories("${OPENAIR_TARGETS}/ARCH/OXGRF/USERSPACE/LIB/")
set(HWLIB_OXGRF_SOURCE
${OPENAIR_TARGETS}/ARCH/OXGRF/USERSPACE/LIB/oxgrf_lib.c
)
add_library(oai_oxgrfdevif MODULE ${HWLIB_OXGRF_SOURCE} )
target_link_libraries(oai_oxgrfdevif oxgrf_ss)
include_directories("${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/") include_directories("${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/")
set(HWLIB_LMSSDR_SOURCE set(HWLIB_LMSSDR_SOURCE
...@@ -3041,7 +3048,7 @@ target_link_libraries (ocp-gnb ${LIBXML2_LIBRARIES} ) ...@@ -3041,7 +3048,7 @@ target_link_libraries (ocp-gnb ${LIBXML2_LIBRARIES} )
target_link_libraries (ocp-gnb pthread m ${CONFIG_LIB} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES} ${ATLAS_LIBRARIES}) target_link_libraries (ocp-gnb pthread m ${CONFIG_LIB} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES} ${ATLAS_LIBRARIES})
target_link_libraries (ocp-gnb ${LIB_LMS_LIBRARIES}) target_link_libraries (ocp-gnb ${LIB_LMS_LIBRARIES})
target_link_libraries (ocp-gnb ${T_LIB}) target_link_libraries (ocp-gnb ${T_LIB})
add_dependencies(ocp-gnb ldpc_orig ldpc_optim ldpc_optim8seg ldpc params_libconfig rfsimulator oai_usrpdevif rfsimulator nrscope) add_dependencies(ocp-gnb ldpc_orig ldpc_optim ldpc_optim8seg ldpc params_libconfig rfsimulator oai_usrpdevif oai_oxgrfdevif rfsimulator nrscope)
# nr-uesoftmodem is UE implementation # nr-uesoftmodem is UE implementation
...@@ -3386,8 +3393,8 @@ if (${T_TRACER}) ...@@ -3386,8 +3393,8 @@ if (${T_TRACER})
syncsim nr_ulsim nr_dlsim nr_dlschsim nr_pbchsim nr_pucchsim syncsim nr_ulsim nr_dlsim nr_dlschsim nr_pbchsim nr_pucchsim
nr_ulschsim ldpctest polartest smallblocktest cu_test du_test nr_ulschsim ldpctest polartest smallblocktest cu_test du_test
#all "add_library" definitions #all "add_library" definitions
ITTI RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB X2AP_ENB M2AP_LIB M2AP_ENB M3AP_LIB M3AP_ENB F1AP_LIB F1AP ITTI RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB X2AP_ENB M2AP_LIB M2AP_ENB M3AP_LIB M3AP_ENB F1AP_LIB F1AP
params_libconfig oai_exmimodevif oai_usrpdevif oai_bladerfdevif oai_lmssdrdevif oai_iqplayer params_libconfig oai_exmimodevif oai_usrpdevif oai_bladerfdevif oai_lmssdrdevif oai_iqplayer oai_oxgrfdevif
oai_eth_transpro oai_mobipass tcp_bridge tcp_bridge_oai oai_eth_transpro oai_mobipass tcp_bridge tcp_bridge_oai
coding FLPT_MSG ASYNC_IF FLEXRAN_AGENT HASHTABLE MSC UTIL OMG_SUMO coding FLPT_MSG ASYNC_IF FLEXRAN_AGENT HASHTABLE MSC UTIL OMG_SUMO
SECU_OSA SECU_CN SCHED_LIB SCHED_NR_LIB SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB default_sched remote_sched RAL SECU_OSA SECU_CN SCHED_LIB SCHED_NR_LIB SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB default_sched remote_sched RAL
......
cmake_targets/build_oai
View file @ 9c84ab93
...@@ -112,7 +112,7 @@ Options ...@@ -112,7 +112,7 @@ Options
--UE-gen-nvram [output path] --UE-gen-nvram [output path]
Specify gen_nvram_path (default \"$gen_nvram_path\") Specify gen_nvram_path (default \"$gen_nvram_path\")
-w | --hardware -w | --hardware
EXMIMO, USRP, BLADERF, LMSSDR, IRIS, ADRV9371_ZC706, SIMU, AW2SORI, None (Default) EXMIMO, USRP, BLADERF, LMSSDR, IRIS, OXGRF, ADRV9371_ZC706, SIMU, NAW2SORI, one (Default)
Adds this RF board support (in external packages installation and in compilation) Adds this RF board support (in external packages installation and in compilation)
-t | --transport -t | --transport
Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g
...@@ -290,7 +290,7 @@ function main() { ...@@ -290,7 +290,7 @@ function main() {
"EXMIMO") "EXMIMO")
HW="EXMIMO" HW="EXMIMO"
;; ;;
"USRP" | "BLADERF" | "LMSSDR" | "IRIS" | "ADRV9371_ZC706" | "SIMU" | "AW2SORI") "USRP" | "BLADERF" | "LMSSDR" | "IRIS" | "ADRV9371_ZC706" | "SIMU" | "OXGRF" | "AW2SORI")
HW="OAI_"$2 HW="OAI_"$2
;; ;;
"None") "None")
...@@ -849,8 +849,7 @@ function main() { ...@@ -849,8 +849,7 @@ function main() {
#################################################### ####################################################
# Build RF device and transport protocol libraries # # Build RF device and transport protocol libraries #
#################################################### ####################################################
if [ "$eNB" = "1" -o "$eNBocp" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$RU" = "1" -o "$nrUE" = "1" -o "$HWLAT" = "1" ] ; then if [ "$HW" != "None" ] ; then
# build RF device libraries # build RF device libraries
if [ "$HW" != "None" ] ; then if [ "$HW" != "None" ] ; then
rm -f liboai_device.so rm -f liboai_device.so
...@@ -883,6 +882,20 @@ function main() { ...@@ -883,6 +882,20 @@ function main() {
ln -sf liboai_bladerfdevif.so liboai_device.so ln -sf liboai_bladerfdevif.so liboai_device.so
ln -sf $dbin/liboai_bladerfdevif.so.$REL $dbin/liboai_device.so ln -sf $dbin/liboai_bladerfdevif.so.$REL $dbin/liboai_device.so
echo_info "liboai_device.so is linked to BLADERF device library" echo_info "liboai_device.so is linked to BLADERF device library"
elif [ "$HW" == "OAI_OXGRF" ] ; then
if [ ! -f "/usr/local/include/oxgrf_api_ss.h" ] ; then
sudo cp $THIS_SCRIPT_PATH/../targets/ARCH/OXGRF/USERSPACE/LIB/oxgrf_api_ss.h /usr/local/include/oxgrf_api_ss.h
sudo cp $THIS_SCRIPT_PATH/../targets/ARCH/OXGRF/USERSPACE/LIB/liboxgrf_ss.so /usr/local/lib/liboxgrf_ss.so
sudo chmod +x /usr/local/lib/liboxgrf_ss.so
sudo ldconfig /usr/local/lib
fi
compilations \
$build_dir oai_oxgrfdevif \
liboai_oxgrfdevif.so $dbin/liboai_oxgrfdevif.so.$REL
echo_info "before link"
ln -sf liboai_oxgrfdevif.so liboai_device.so
ln -sf $dbin/liboai_oxgrfdevif.so.$REL $dbin/liboai_device.so
echo_info "liboai_device.so is linked to OXGRF device library"
elif [ "$HW" == "OAI_LMSSDR" ] ; then elif [ "$HW" == "OAI_LMSSDR" ] ; then
# if [ -f "/usr/include/libbladeRF.h" ] ; then # if [ -f "/usr/include/libbladeRF.h" ] ; then
compilations \ compilations \
......
cmake_targets/tools/build_helper
View file @ 9c84ab93
...@@ -442,33 +442,6 @@ install_usrp_uhd_driver() { ...@@ -442,33 +442,6 @@ install_usrp_uhd_driver() {
fi fi
} }
install_bladerf_driver_from_source(){
bladerf_install_log=$OPENAIR_DIR/cmake_targets/log/bladerf_install_log.txt
echo_info "\nInstalling BladeRF driver from sources. The log file for BladeRF driver installation is here: $bladerf_install_log "
(
cd /tmp
echo "Downloading BladeRF driver"
rm -rf /tmp/bladeRF
git clone https://github.com/Nuand/bladeRF.git
cd bladeRF
git checkout tags/2016.06
mkdir -p build
cd build
$CMAKE ../
echo "Compiling BladeRF driver"
make
$SUDO make install
$SUDO ldconfig
echo "Downloading FPGA and firmware images"
cd /tmp/bladeRF
wget --tries=3 --retry-connrefused https://www.nuand.com/fx3/bladeRF_fw_latest.img
wget --tries=3 --retry-connrefused https://www.nuand.com/fpga/hostedx40-latest.rbf
sudo mkdir -p /usr/share/Nuand/bladeRF
sudo mv bladeRF_fw_latest.img /usr/share/Nuand/bladeRF/bladeRF_fw.img
sudo mv hostedx40-latest.rbf /usr/share/Nuand/bladeRF/hostedx40.rbf
) >& $bladerf_install_log
}
check_install_bladerf_driver(){ check_install_bladerf_driver(){
if [[ "$OS_DISTRO" == "ubuntu" ]]; then if [[ "$OS_DISTRO" == "ubuntu" ]]; then
if [ "$(get_distribution_release)" == "ubuntu14.04" ] ; then if [ "$(get_distribution_release)" == "ubuntu14.04" ] ; then
...@@ -862,7 +835,8 @@ check_install_oai_software() { ...@@ -862,7 +835,8 @@ check_install_oai_software() {
install_asn1c_from_source $1 install_asn1c_from_source $1
$SUDO rm -fr /opt/ssh $SUDO rm -fr /opt/ssh
$SUDO git clone https://gist.github.com/2190472.git /opt/ssh #$SUDO git clone https://gist.github.com/2190472.git /opt/ssh
$SUDO git clone https://gitlab.eurecom.fr/oai/ssh.git /opt/ssh
} }
install_asn1c_from_source(){ install_asn1c_from_source(){
......
executables/nr-softmodem-common.h
View file @ 9c84ab93
...@@ -100,6 +100,8 @@ ...@@ -100,6 +100,8 @@
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n" #define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_OXGRF_ARGS "set the arguments to identify OXGRF\n"
#define CONFIG_HLP_FLOG "Enable online log \n" #define CONFIG_HLP_FLOG "Enable online log \n"
#define CONFIG_HLP_LOGL "Set the global log level, valid options: (4:trace, 3:debug, 2:info, 1:warn, (0:error))\n" #define CONFIG_HLP_LOGL "Set the global log level, valid options: (4:trace, 3:debug, 2:info, 1:warn, (0:error))\n"
#define CONFIG_HLP_LOGV "Set the global log verbosity \n" #define CONFIG_HLP_LOGV "Set the global log verbosity \n"
......
executables/nr-uesoftmodem.c
View file @ 9c84ab93
...@@ -117,6 +117,7 @@ int vcdflag = 0; ...@@ -117,6 +117,7 @@ int vcdflag = 0;
double rx_gain_off = 0.0; double rx_gain_off = 0.0;
char *usrp_args = NULL; char *usrp_args = NULL;
char *oxgrf_args = NULL;
char *rrc_config_path = NULL; char *rrc_config_path = NULL;
char *uecap_file = NULL; char *uecap_file = NULL;
int dumpframe = 0; int dumpframe = 0;
...@@ -367,6 +368,7 @@ void init_openair0(void) { ...@@ -367,6 +368,7 @@ void init_openair0(void) {
openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file; openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file;
if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args; if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args;
else if (oxgrf_args) openair0_cfg[card].sdr_addrs = oxgrf_args;
} }
} }
......
executables/nr-uesoftmodem.h
View file @ 9c84ab93
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
/*------------------------------------------------------------------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_NRUEPARAMS_DESC { \ #define CMDLINE_NRUEPARAMS_DESC { \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \ {"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \
{"oxgrf-args", CONFIG_HLP_OXGRF_ARGS, 0, strptr:(char **)&oxgrf_args, defstrval:"dev=pciex:0", TYPE_STRING, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \ {"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, iptr:(int32_t *)&nrUE_params.nr_dlsch_parallel, defintval:0, TYPE_UINT8, 0}, \ {"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, iptr:(int32_t *)&nrUE_params.nr_dlsch_parallel, defintval:0, TYPE_UINT8, 0}, \
{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, uptr:(uint32_t *)&nrUE_params.ofdm_offset_divisor, defuintval:UINT_MAX, TYPE_UINT32, 0}, \ {"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, uptr:(uint32_t *)&nrUE_params.ofdm_offset_divisor, defuintval:UINT_MAX, TYPE_UINT32, 0}, \
......
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
View file @ 9c84ab93
...@@ -430,7 +430,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -430,7 +430,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
phich_string[fp->phich_config_common.phich_resource], phich_string[fp->phich_config_common.phich_resource],
fp->nb_antenna_ports_gNB);*/ fp->nb_antenna_ports_gNB);*/
#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) #if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) || defined(OAI_OXGRF)
LOG_I(PHY, "[UE %d] Measured Carrier Frequency %.0f Hz (offset %d Hz)\n", LOG_I(PHY, "[UE %d] Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id, ue->Mod_id,
openair0_cfg[0].rx_freq[0]+ue->common_vars.freq_offset, openair0_cfg[0].rx_freq[0]+ue->common_vars.freq_offset,
...@@ -480,10 +480,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -480,10 +480,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
#ifndef OAI_BLADERF #ifndef OAI_BLADERF
#ifndef OAI_LMSSDR #ifndef OAI_LMSSDR
#ifndef OAI_ADRV9371_ZC706 #ifndef OAI_ADRV9371_ZC706
#ifndef OAI_OXGRF
//phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0); //phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
#endif #endif
#endif #endif
#endif #endif
#endif
#endif #endif
} }
...@@ -493,10 +495,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, ...@@ -493,10 +495,12 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
#ifndef OAI_BLADERF #ifndef OAI_BLADERF
#ifndef OAI_LMSSDR #ifndef OAI_LMSSDR
#ifndef OAI_ADRV9371_ZC706 #ifndef OAI_ADRV9371_ZC706
#ifndef OAI_OXGRF
//phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0); //phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
#endif #endif
#endif #endif
#endif #endif
#endif
#endif #endif
} }
......
openair1/PHY/impl_defs_top.h
View file @ 9c84ab93
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
* @defgroup _GENERIC_PHY_RF_INTERFACE_ Generic PHY - RF Interface * @defgroup _GENERIC_PHY_RF_INTERFACE_ Generic PHY - RF Interface
* @defgroup _USRP_PHY_RF_INTERFACE_ PHY - USRP RF Interface * @defgroup _USRP_PHY_RF_INTERFACE_ PHY - USRP RF Interface
* @defgroup _BLADERF_PHY_RF_INTERFACE_ PHY - BLADERF RF Interface * @defgroup _BLADERF_PHY_RF_INTERFACE_ PHY - BLADERF RF Interface
* @defgroup _OXGRF_PHY_RF_INTERFACE_ PHY - OXGRF RF Interface
* @defgroup _LMSSDR_PHY_RF_INTERFACE_ PHY - LMSSDR RF Interface * @defgroup _LMSSDR_PHY_RF_INTERFACE_ PHY - LMSSDR RF Interface
* @} * @}
* *
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ 9c84ab93
...@@ -76,7 +76,9 @@ fifo_dump_emos_UE emos_dump_UE; ...@@ -76,7 +76,9 @@ fifo_dump_emos_UE emos_dump_UE;
char nr_mode_string[NUM_UE_MODE][20] = {"NOT SYNCHED","PRACH","RAR","RA_WAIT_CR", "PUSCH", "RESYNCH"}; char nr_mode_string[NUM_UE_MODE][20] = {"NOT SYNCHED","PRACH","RAR","RA_WAIT_CR", "PUSCH", "RESYNCH"};
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) const uint8_t nr_rv_round_map_ue[4] = {0, 2, 1, 3};
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) || defined(OAI_OXGRF)
extern uint64_t downlink_frequency[MAX_NUM_CCs][4]; extern uint64_t downlink_frequency[MAX_NUM_CCs][4];
#endif #endif
...@@ -1778,8 +1780,8 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t ...@@ -1778,8 +1780,8 @@ void nr_ue_prach_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
ue->prach_vars[gNB_id]->amp = AMP; ue->prach_vars[gNB_id]->amp = AMP;
/* #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) /* #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) || defined(OAI_OXGRF)
tx_amp = get_tx_amp_prach(ue->tx_power_dBm[nr_slot_tx], ue->tx_power_max_dBm, ue->frame_parms.N_RB_UL); tx_amp = get_tx_amp_prach(ue->tx_power_dBm[nr_tti_tx], ue->tx_power_max_dBm, ue->frame_parms.N_RB_UL);
if (tx_amp != -1) if (tx_amp != -1)
ue->prach_vars[gNB_id]->amp = tx_amp; ue->prach_vars[gNB_id]->amp = tx_amp;
#else #else
......
targets/ARCH/COMMON/common_lib.h
View file @ 9c84ab93
...@@ -94,6 +94,8 @@ typedef enum { ...@@ -94,6 +94,8 @@ typedef enum {
USRP_N300_DEV, USRP_N300_DEV,
/*!\brief device is BLADE RF*/ /*!\brief device is BLADE RF*/
BLADERF_DEV, BLADERF_DEV,
/*!\brief device is OXGRF pcie*/
OXGRF_DEV,
/*!\brief device is LMSSDR (SoDeRa)*/ /*!\brief device is LMSSDR (SoDeRa)*/
LMSSDR_DEV, LMSSDR_DEV,
/*!\brief device is Iris */ /*!\brief device is Iris */
...@@ -107,7 +109,7 @@ typedef enum { ...@@ -107,7 +109,7 @@ typedef enum {
RFSIMULATOR, RFSIMULATOR,
MAX_RF_DEV_TYPE MAX_RF_DEV_TYPE
} dev_type_t; } dev_type_t;
#define DEVTYPE_NAMES {"","EXMIMO","USRP B200","USRP X300","USRP N300","BLADERF","LMSSDR","IRIS","No HW","ADRV9371_ZC706","UEDv2", "RFSIMULATOR"} #define DEVTYPE_NAMES {"","EXMIMO","USRP B200","USRP X300","USRP N300","BLADERF","OXGRF", "LMSSDR","IRIS","No HW","ADRV9371_ZC706","UEDv2", "RFSIMULATOR"}
/*!\brief transport protocol types /*!\brief transport protocol types
*/ */
typedef enum { typedef enum {
...@@ -208,7 +210,7 @@ typedef struct { ...@@ -208,7 +210,7 @@ typedef struct {
//! timing_source //! timing_source
clock_source_t time_source; clock_source_t time_source;
//! Manual SDR IP address //! Manual SDR IP address
//#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) //#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_OXGRF)
char *sdr_addrs; char *sdr_addrs;
//! Auto calibration flag //! Auto calibration flag
int autocal[4]; int autocal[4];
......
targets/ARCH/OXGRF/USERSPACE/LIB/oxgrf_api_ss.h 0 → 100644
View file @ 9c84ab93
/*
* oxgrf_api_ss.h
*
* Created on: 2016/5/9
* Author: Eric
*/
#ifndef __OXGRF_SS_API_H__
#define __OXGRF_SS_API_H__
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdbool.h>
#if defined(__WINDOWS_) || defined(_WIN32)
#define DLLEXPORT __declspec(dllexport)
#define OXGRFCALL __cdecl
#else
#define DLLEXPORT
#endif
#ifdef __cplusplus
extern "C" {
#endif
typedef struct oxgrf_transport OXGRF_TRANSPORT;
typedef struct oxgrf_device_descriptor {
int32_t id;
int32_t status;
uint8_t nchips;
uint8_t nsubdev;
OXGRF_TRANSPORT *trans;
}OXGRF_DESCRIPTOR;
typedef enum {
TX1_CHANNEL = 1,
TX2_CHANNEL = 2,
TX3_CHANNEL = 3,
TX4_CHANNEL = 4,
TX5_CHANNEL = 5,
TX6_CHANNEL = 6,
TX7_CHANNEL = 7,
TX8_CHANNEL = 8,
}RF_TX_CHANNEL;
typedef enum {
RX1_CHANNEL = 1,
RX2_CHANNEL = 2,
RX3_CHANNEL = 3,
RX4_CHANNEL = 4,
RX5_CHANNEL = 5,
RX6_CHANNEL = 6,
RX7_CHANNEL = 7,
RX8_CHANNEL = 8,
}RF_RX_CHANNEL;
typedef enum rf_gain_ctrl_mode {
RF_GAIN_MGC,
RF_GAIN_FASTATTACK_AGC,
RF_GAIN_SLOWATTACK_AGC,
}RF_GAIN_CTRL_MODE;
typedef enum ref_select {
INTERNAL_REFERENCE = 0,
EXTERNAL_REFERENCE,
}REF_SELECT;
typedef enum vco_cal_select {
ADF4001 = 0,
AUXDAC1,
}VCO_CAL_SELECT;
typedef enum duplex_select {
TDD = 0,
FDD,
}DUPLEX_SELECT;
typedef enum trx_switch {
RX = 0,
TX,
}TRX_SWITCH;
typedef enum {
TX_CHANNEL_TIMEOUT = 29,
RX_CHANNEL_TIMEOUT = 30,
TX_CHANNEL_UNDERFLOW = 31,
RX_CHANNEL_OVERFLOW = 32,
TX_CHANNEL_COUNT = 33,
RX_CHANNEL_COUNT = 34,
}CHANNEL_EVENT;
typedef enum pps_enable {
PPS_INTERNAL_EN,
PPS_GPS_EN,
PPS_EXTERNAL_EN,
}PPSModeEnum;
typedef enum device_configuration {
SingleSubDevSingleRF = 0x1010,
SingleSubDevDualRF = 0x1020,
SingleSubDevQuadRF = 0x1040,
DualSubDevDualRF = 0x2011,
DualSubDevTriple1RF = 0x2012,
DualSubDevTriple2RF = 0x2021,
DualSubDevQuadRF = 0x2022,
DualSubDevOctoRF = 0x2044,
NULLSubDevNULLRF = 0,
}DEV_CFG;
typedef struct {
uint8_t receiver_mode;
uint8_t disciplining_mode;
uint16_t minor_alarms;
uint8_t gnss_decoding_status;
uint8_t disciplining_activity;
uint8_t pps_indication;
uint8_t pps_reference;
} GPS_STATUS;
typedef struct {
uint8_t second;
uint8_t minute;
uint8_t hour;
uint8_t day;
uint8_t month;
uint32_t year;
} TIME_24H;
/*********************************************************************************************************************************************************/
DLLEXPORT uint64_t oxgrf_ticksToTimeNs (const uint64_t ticks, const double rate);
DLLEXPORT uint64_t oxgrf_timeNsToTicks (const uint64_t timeNs, const double rate);
/*********************************************************************************************************************************************************/
DLLEXPORT OXGRF_DESCRIPTOR *oxgrf_open_device (const char *url);
DLLEXPORT int32_t oxgrf_close_device (OXGRF_DESCRIPTOR *oxgrf);
DLLEXPORT int32_t oxgrf_get_device_configuration (OXGRF_DESCRIPTOR* oxgrf, DEV_CFG* cfg);
DLLEXPORT int32_t oxgrf_get_firmware_version(OXGRF_DESCRIPTOR* oxgrf, uint32_t* version);
DLLEXPORT int32_t oxgrf_get_model_version(OXGRF_DESCRIPTOR* oxgrf, uint32_t* version);
/*********************************************************************************************************************************************************/
DLLEXPORT int32_t oxgrf_get_gps_status (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, GPS_STATUS *g_status);
DLLEXPORT int32_t oxgrf_get_utc (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, TIME_24H *time);
DLLEXPORT int32_t oxgrf_get_xyz (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, double *longtitude, double *latitude, double *altitude);
DLLEXPORT int32_t oxgrf_get_sampling_freq_range (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint32_t *sampling_freq_hz_max, uint32_t *sampling_freq_hz_min);
DLLEXPORT int32_t oxgrf_get_rx_gain_range (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint32_t *gain_db_max, uint32_t *gain_db_min);
DLLEXPORT int32_t oxgrf_get_tx_gain_range (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint32_t *gain_db_max, uint32_t *gain_db_min);
DLLEXPORT int32_t oxgrf_get_rx_freq_range (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint64_t *lo_freq_hz_max, uint64_t *lo_freq_hz_min);
DLLEXPORT int32_t oxgrf_get_tx_freq_range (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint64_t *lo_freq_hz_max, uint64_t *lo_freq_hz_min);
/*********************************************************************************************************************************************************/
/* Get current TX LO frequency. */
DLLEXPORT int32_t oxgrf_get_tx_lo_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint64_t *lo_freq_hz);
/* Get current TX sampling frequency. */
DLLEXPORT int32_t oxgrf_get_tx_sampling_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t *sampling_freq_hz);
/* Get the TX RF bandwidth. */
DLLEXPORT int32_t oxgrf_get_tx_rf_bandwidth (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t *bandwidth_hz);
/* Get current transmit attenuation for the selected channel. */
DLLEXPORT int32_t oxgrf_get_tx1_attenuation (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t *attenuation_mdb);
/* Get current transmit attenuation for the selected channel. */
DLLEXPORT int32_t oxgrf_get_tx2_attenuation (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t *attenuation_mdb);
/* Get current RX LO frequency. */
DLLEXPORT int32_t oxgrf_get_rx_lo_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint64_t *lo_freq_hz);
/* Get the RX RF bandwidth. */
DLLEXPORT int32_t oxgrf_get_rx_rf_bandwidth (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t *bandwidth_hz);
/* Get the gain control mode for the selected channel. */
DLLEXPORT int32_t oxgrf_get_rx1_gain_control_mode (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, RF_GAIN_CTRL_MODE *gc_mode);
/* Get the gain control mode for the selected channel. */
DLLEXPORT int32_t oxgrf_get_rx2_gain_control_mode (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, RF_GAIN_CTRL_MODE *gc_mode);
/* Get current receive RF gain for the selected channel. */
DLLEXPORT int32_t oxgrf_get_rx1_rf_gain (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, int32_t *gain_db);
/* Get current receive RF gain for the selected channel. */
DLLEXPORT int32_t oxgrf_get_rx2_rf_gain (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, int32_t *gain_db);
DLLEXPORT int32_t oxgrf_get_rx1_rssi (OXGRF_DESCRIPTOR* oxgrf, uint8_t rf_id, int32_t* rssi);
DLLEXPORT int32_t oxgrf_get_rx2_rssi (OXGRF_DESCRIPTOR* oxgrf, uint8_t rf_id, int32_t* rssi);
/*********************************************************************************************************************************************************/
/* Set the RX LO frequency. */
DLLEXPORT int32_t oxgrf_set_rx_lo_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint64_t lo_freq_hz);
/* Set the RX RF bandwidth. */
DLLEXPORT int32_t oxgrf_set_rx_rf_bandwidth (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t bandwidth_hz);
/* Set the RX sampling frequency. */
DLLEXPORT int32_t oxgrf_set_rx_sampling_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t sampling_freq_hz);
/* Set the gain control mode for the selected channel. */
DLLEXPORT int32_t oxgrf_set_rx1_gain_control_mode (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, RF_GAIN_CTRL_MODE gc_mode);
DLLEXPORT int32_t oxgrf_set_rx2_gain_control_mode (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, RF_GAIN_CTRL_MODE gc_mode);
/* Set the receive RF gain for the selected channel. */
DLLEXPORT int32_t oxgrf_set_rx1_rf_gain (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, int32_t gain_db);
/* Set the receive RF gain for the selected channel. */
DLLEXPORT int32_t oxgrf_set_rx2_rf_gain (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, int32_t gain_db);
DLLEXPORT int32_t oxgrf_set_rx_fir_en_dis (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint8_t enable);
/* Set the TX LO frequency. */
DLLEXPORT int32_t oxgrf_set_tx_lo_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint64_t lo_freq_hz);
/* Set the TX RF bandwidth. */
DLLEXPORT int32_t oxgrf_set_tx_rf_bandwidth (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t bandwidth_hz);
/* Set the TX sampling frequency. */
DLLEXPORT int32_t oxgrf_set_tx_sampling_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t sampling_freq_hz);
/* Set the transmit attenuation for the selected channel. */
DLLEXPORT int32_t oxgrf_set_tx1_attenuation (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t attenuation_mdb);
/* Set the transmit attenuation for the selected channel. */
DLLEXPORT int32_t oxgrf_set_tx2_attenuation (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t attenuation_mdb);
/* Set the transmit abs power for the selected channel. */
DLLEXPORT int32_t oxgrf_set_tx1_abs_power (OXGRF_DESCRIPTOR* oxgrf, uint8_t rf_id, int32_t abs_power);
/* Set the transmit abs power for the selected channel. */
DLLEXPORT int32_t oxgrf_set_tx2_abs_power (OXGRF_DESCRIPTOR* oxgrf, uint8_t rf_id, int32_t abs_power);
DLLEXPORT int32_t oxgrf_set_tx_fir_en_dis (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint8_t status);
/*********************************************************************************************************************************************************/
DLLEXPORT int32_t oxgrf_get_rfchip_reg (OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t reg, uint32_t *value);
DLLEXPORT int32_t oxgrf_set_rfchip_reg(OXGRF_DESCRIPTOR *oxgrf, uint8_t rf_id, uint32_t reg, uint32_t value);
/*********************************************************************************************************************************************************/
DLLEXPORT int32_t oxgrf_get_extend_cmd(OXGRF_DESCRIPTOR *oxgrf, uint8_t cmd_id, uint64_t *value, bool with_param);
DLLEXPORT int32_t oxgrf_set_extend_cmd(OXGRF_DESCRIPTOR *oxgrf, uint8_t cmd_id, uint64_t value);
/*********************************************************************************************************************************************************/
DLLEXPORT int32_t oxgrf_set_tx_lo_int_ext (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_set_rx_lo_int_ext (OXGRF_DESCRIPTOR *oxgrf,uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_set_ext_lo_freq (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint64_t lo_freq_hz);
DLLEXPORT int32_t oxgrf_do_mcs (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_set_ref_clock (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, REF_SELECT source);
DLLEXPORT int32_t oxgrf_set_vco_select (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, VCO_CAL_SELECT vco);
DLLEXPORT int32_t oxgrf_set_auxdac1 (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint32_t vol_mV);
DLLEXPORT int32_t oxgrf_set_duplex_select (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, DUPLEX_SELECT duplex);
DLLEXPORT int32_t oxgrf_set_rx_ant_enable (OXGRF_DESCRIPTOR* oxgrf, uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_tx_cyclic_enable (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_set_trxsw_fpga_enable (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_set_hwbuf_depth (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint32_t depth);
DLLEXPORT int32_t oxgrf_get_hwbuf_depth (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint32_t *depth);
DLLEXPORT int32_t oxgrf_set_pps_select (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, PPSModeEnum pps);
DLLEXPORT int32_t oxgrf_set_rxchannel_coef (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, RF_RX_CHANNEL channel, int16_t coef1, int16_t coef2);
DLLEXPORT int32_t oxgrf_enable_rxchannel_corr (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, RF_RX_CHANNEL channel, uint32_t enable);
DLLEXPORT int32_t oxgrf_set_txchannel_coef (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, RF_TX_CHANNEL channel, int16_t coef1, int16_t coef2);
DLLEXPORT int32_t oxgrf_enable_txchannel_corr (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, RF_TX_CHANNEL channel, uint32_t enable);
DLLEXPORT int32_t oxgrf_set_txchannel_ampcoef (OXGRF_DESCRIPTOR* oxgrf, uint8_t dev_id, RF_TX_CHANNEL channel, int16_t coef);
DLLEXPORT int32_t oxgrf_set_rxchannel_ampcoef (OXGRF_DESCRIPTOR* oxgrf, uint8_t dev_id, RF_RX_CHANNEL channel, int16_t coef);
/*********************************************************************************************************************************************************/
DLLEXPORT int32_t oxgrf_enable_timestamp (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint8_t enable);
DLLEXPORT int32_t oxgrf_read_timestamp (OXGRF_DESCRIPTOR *oxgrf, uint8_t dev_id, uint64_t *timestamp);
DLLEXPORT int32_t oxgrf_get_channel_event (OXGRF_DESCRIPTOR *oxgrf, CHANNEL_EVENT event, uint8_t channel, uint32_t *count);
/*********************************************************************************************************************************************************/
DLLEXPORT int32_t oxgrf_read_samples (OXGRF_DESCRIPTOR *oxgrf, void *buffer, uint32_t count, RF_RX_CHANNEL channel, uint64_t *timestamp);
DLLEXPORT int32_t oxgrf_read_samples_multiport (OXGRF_DESCRIPTOR *oxgrf, void **buffer, uint32_t count, uint8_t channel_mask, uint64_t *timestamp);
DLLEXPORT int32_t oxgrf_read_samples_multiport_Matlab (OXGRF_DESCRIPTOR *oxgrf, void *buffer, uint32_t count, uint8_t channel_mask, uint64_t *timestamp);
DLLEXPORT int32_t oxgrf_dump_samples_multiport (OXGRF_DESCRIPTOR *oxgrf, uint32_t count, uint8_t channel_mask, uint64_t* timestamp);
/* Since the data contains a 16-byte header, the size of the buffer should be greater than or equal to (count*4+16) Bytes*/
DLLEXPORT int32_t oxgrf_read_samples_zerocopy (OXGRF_DESCRIPTOR *oxgrf, void *buffer, uint32_t count, RF_RX_CHANNEL channel, uint64_t *timestamp);
DLLEXPORT int32_t oxgrf_write_samples (OXGRF_DESCRIPTOR *oxgrf, void *buffer, uint32_t count, RF_TX_CHANNEL channel, uint64_t timestamp);
DLLEXPORT int32_t oxgrf_write_samples2 (OXGRF_DESCRIPTOR *oxgrf, void *buffer, uint32_t count, RF_TX_CHANNEL channel, uint64_t timestamp, uint32_t flags);
DLLEXPORT int32_t oxgrf_write_samples_multiport (OXGRF_DESCRIPTOR *oxgrf, const void **buffer, uint32_t count, uint8_t channel_mask, uint64_t timestamp, uint32_t flags);
DLLEXPORT int32_t oxgrf_write_samples_multiport_Matlab (OXGRF_DESCRIPTOR *oxgrf, const void *buffer, uint32_t count, uint8_t channel_mask, uint64_t timestamp, uint32_t flags);
DLLEXPORT int32_t oxgrf_write_samples_zerocopy (OXGRF_DESCRIPTOR *oxgrf, void *buffer, uint32_t count, RF_TX_CHANNEL channel, uint64_t timestamp);
/*********************************************************************************************************************************************************/
DLLEXPORT void float_to_int16 (int16_t *dst, const float *src, int n, float mult);
DLLEXPORT void int16_to_float (float *dst, const int16_t *src, int len, float mult);
DLLEXPORT void int16_to_float_avx2(float *outputVector, const int16_t *inputVector, unsigned int num_points);
DLLEXPORT void float_to_int16_avx2(int16_t *outputVector, const float *inputVector, unsigned int num_points);
/*********************************************************************************************************************************************************/
#ifdef __cplusplus
}
#endif
#endif /* __OXGRF_SS_API_H__ */
targets/ARCH/OXGRF/USERSPACE/LIB/oxgrf_lib.c 0 → 100644
View file @ 9c84ab93
/** oxgrf_lib.c
*
* Author: openxg
*/
#include <stdio.h>
#include <stdlib.h>
#include <stdbool.h>
#include <unistd.h>
#include <string.h>
#include <inttypes.h>
#include <math.h>
#include "oxgrf_lib.h"
#include "common/utils/LOG/log.h"
/** @addtogroup _OXGRF_PHY_RF_INTERFACE_
* @{
*/
#ifdef __SSE4_1__
# include <smmintrin.h>
#endif
#ifdef __AVX2__
# include <immintrin.h>
#endif
//! Number of OXGRF devices
int num_devices = 0;
#ifdef __GNUC__
static int recving = 0;
static int transmiting = 0;
#endif
static bool running = false;
#define RX_MTU 30720
#define BUFFER_SIZE (122880 * 10 * sizeof(int))
#define NCHAN_PER_DEV 4
static void *cache_buf[NCHAN_PER_DEV];
static void *iq_buf[NCHAN_PER_DEV];
static uint32_t remain = 0;
static inline int channel_to_mask(int channel_count)
{
uint8_t ch_mask;
switch (channel_count) {
case 4:
ch_mask = 0xf;break;
case 3:
ch_mask = 0x7;break;
case 2:
ch_mask = 0x3;break;
case 1:
ch_mask = 0x1;break;
default:
ch_mask = 0x1;break;
}
return ch_mask;
}
/*! \brief get current timestamp
*\param device the hardware to use
*\returns timestamp of OXGRF
*/
openair0_timestamp trx_get_timestamp(openair0_device *device) {
return 0;
}
/*! \brief Start oxgrf
* \param device the hardware to use
* \returns 0 on success
*/
int trx_oxgrf_start(openair0_device *device) {
LOG_I(HW, "[oxgrf] Start oxgrf ...\n");
running = true;
return 0;
}
/*! \brief Called to send samples to the oxgrf RF target
\param device pointer to the device structure specific to the RF hardware target
\param timestamp The timestamp at whicch the first sample MUST be sent
\param buff Buffer which holds the samples
\param nsamps number of samples to be sent
\param cc index of the component carrier
\param flags Ignored for the moment
\returns 0 on success
*/
static int trx_oxgrf_write(openair0_device *device,openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) {
int status;
oxgrf_state_t *oxgrf = (oxgrf_state_t*)device->priv;
#ifdef __GNUC__
__sync_fetch_and_add(&transmiting, 1);
#endif
#ifdef __AVX2__
__m256i a, *b;
int len = nsamps * 2;
int16_t *iq = buff[0];
while (len >= 16) {
a = *(__m256i *)&iq[0];
b = (__m256i *)&iq[0];
*b = _mm256_slli_epi16(a, 4);
iq += 16;
len -= 16;
}
#else
__m128i a, *b;
int len = nsamps * 2;
int16_t *iq = buff[0];
while (len >= 8) {
a = *(__m128i *)&iq[0];
b = (__m128i *)&iq[0];
*b = _mm_slli_epi16(a, 4);
iq += 8;
len -= 8;
}
#endif
/* remaining data */
while (len != 0) {
iq[0] <<= 4;
iq++;
len--;
}
status = oxgrf_write_samples_multiport(oxgrf->dev, (const void **)buff, nsamps, channel_to_mask(oxgrf->tx_num_channels), timestamp, 0);
if (status < 0) {
oxgrf->num_tx_errors++;
LOG_E(HW, "[oxgrf] Failed to TX samples\n");
exit(-1);
}
#ifdef __GNUC__
__sync_fetch_and_sub(&transmiting, 1);
#endif
//LOG_D(HW, "Provided TX timestamp: %u, nsamps: %u\n", ptimestamp, nsamps);
oxgrf->tx_current_ts = timestamp;
oxgrf->tx_nsamps += nsamps;
oxgrf->tx_count++;
return nsamps;
}
/*! \brief Receive samples from hardware.
* Read \ref nsamps samples from each channel to buffers. buff[0] is the array for
* the first channel. *ptimestamp is the time at which the first sample
* was received.
* \param device the hardware to use
* \param[out] ptimestamp the time at which the first sample was received.
* \param[out] buff An array of pointers to buffers for received samples. The buffers must be large enough to hold the number of samples \ref nsamps.
* \param nsamps Number of samples. One sample is 2 byte I + 2 byte Q => 4 byte.
* \param cc Index of component carrier
* \returns number of samples read
*/
static int trx_oxgrf_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) {
int status;
oxgrf_state_t *oxgrf = (oxgrf_state_t *)device->priv;
uint64_t timestamp = 0L;
#ifdef __GNUC__
__sync_fetch_and_add(&recving, 1);
#endif
if(remain == 0) {
int recv = 0;
if(nsamps % RX_MTU)
recv = (nsamps / RX_MTU + 1) * RX_MTU;
else
recv = nsamps;
timestamp = 0L;
status = oxgrf_read_samples_multiport(oxgrf->dev, iq_buf, recv, channel_to_mask(oxgrf->rx_num_channels), &timestamp);
if (status < 0) {
LOG_E(HW, "[oxgrf] Failed to read samples %d\n", nsamps);
oxgrf->num_rx_errors++;
exit(-1);
}
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memcpy(buff[i], iq_buf[i], nsamps * 4);
if(recv > nsamps) {
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memcpy(cache_buf[i], iq_buf[i] + nsamps * 4, (recv - nsamps) * 4);
remain = recv - nsamps;
}
*(uint64_t *)ptimestamp = timestamp;
oxgrf->rx_current_ts = timestamp + nsamps;
//LOG_D(HW, "case 0: Current RX timestamp %"PRIu64", hw ts %"PRIu64", nsamps %u, remain %u, recv: %u\n", *ptimestamp, timestamp, nsamps, remain, recv);
} else if(remain >= nsamps) {
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memcpy(buff[i], cache_buf[i], nsamps * 4);
remain -= nsamps;
if(remain > 0) {
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memmove(cache_buf[i], cache_buf[i] + nsamps * 4, remain * 4);
}
*(uint64_t *)ptimestamp = oxgrf->rx_current_ts;
oxgrf->rx_current_ts += nsamps;
//LOG_D(HW, "case 1: Current RX timestamp %"PRIu64", nsamps %u, remain %u\n", *ptimestamp, nsamps, remain);
} else {
int recv;
if(remain + RX_MTU >= nsamps)
recv = RX_MTU;
else
recv = (nsamps / RX_MTU + 1) * RX_MTU;
timestamp = 0L;
status = oxgrf_read_samples_multiport(oxgrf->dev, iq_buf, recv, channel_to_mask(oxgrf->rx_num_channels), &timestamp);
if (status < 0) {
LOG_E(HW, "[oxgrf] Failed to read samples %d\n", nsamps);
oxgrf->num_rx_errors++;
exit(-1);
}
if(timestamp != (oxgrf->rx_current_ts + remain)) {
int overflow = timestamp - (oxgrf->rx_current_ts + remain);
//LOG_W(HW, "Rx overflow %u samples\n", overflow);
remain += overflow;
}
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memcpy(cache_buf[i] + remain * 4, iq_buf[i], recv * 4);
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memcpy(buff[i], cache_buf[i], nsamps * 4);
remain = recv + remain - nsamps;
for(int i = 0; i < oxgrf->rx_num_channels; i++)
memmove(cache_buf[i], cache_buf[i] + nsamps * 4, remain * 4);
*(uint64_t *)ptimestamp = oxgrf->rx_current_ts;
oxgrf->rx_current_ts += nsamps;
//LOG_D(HW, "case 2: Current RX timestamp %"PRIu64", hw ts %"PRIu64", nsamps %u, remain %u, recv: %u\n", *ptimestamp, timestamp, nsamps, remain, recv);
}
#ifdef __GNUC__
__sync_fetch_and_sub(&recving, 1);
#endif
//LOG_D(HW, "Current RX timestamp %"PRIu64", nsamps %u\n", *ptimestamp, nsamps);
oxgrf->rx_nsamps += nsamps;
oxgrf->rx_count++;
return nsamps;
}
/*! \brief Terminate operation of the oxgrf transceiver -- free all associated resources
* \param device the hardware to use
*/
void trx_oxgrf_end(openair0_device *device) {
oxgrf_state_t *oxgrf = (oxgrf_state_t*)device->priv;
if(!running)
return;
running = false;
#ifdef __GNUC__
while(__sync_and_and_fetch(&recving, 1) ||
__sync_and_and_fetch(&transmiting, 1))
usleep(50000);
#endif
LOG_I(HW, ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n");
uint32_t count = 0;
oxgrf_get_channel_event(oxgrf->dev, TX_CHANNEL_TIMEOUT, 1, &count);
LOG_I(HW, "[oxgrf] TX%d Channel timeout: %u\n", 1, count);
oxgrf_get_channel_event(oxgrf->dev, RX_CHANNEL_OVERFLOW, 1, &count);
LOG_I(HW, "[oxgrf] RX%d Channel overflow: %u\n", 1, count);
LOG_I(HW, "<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<\n");
oxgrf_close_device(oxgrf->dev);
//exit(1);
}
/*! \brief print the oxgrf statistics
* \param device the hardware to use
* \returns 0 on success
*/
int trx_oxgrf_get_stats(openair0_device* device) {
return(0);
}
/*! \brief Reset the oxgrf statistics
* \param device the hardware to use
* \returns 0 on success
*/
int trx_oxgrf_reset_stats(openair0_device* device) {
return(0);
}
/*! \brief Stop oxgrf
* \param card the hardware to use
* \returns 0 in success
*/
int trx_oxgrf_stop(openair0_device* device) {
return(0);
}
/*! \brief Set frequencies (TX/RX)
* \param device the hardware to use
* \param openair0_cfg1 openair0 Config structure (ignored. It is there to comply with RF common API)
* \param exmimo_dump_config (ignored)
* \returns 0 in success
*/
int trx_oxgrf_set_freq(openair0_device* device, openair0_config_t *openair0_cfg1,int exmimo_dump_config) {
int status;
oxgrf_state_t *oxgrf = (oxgrf_state_t *)device->priv;
openair0_config_t *openair0_cfg = (openair0_config_t *)device->openair0_cfg;
if ((status = oxgrf_set_tx_lo_freq(oxgrf->dev, 0, (uint64_t)(openair0_cfg->tx_freq[0]))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX frequency\n");
} else
LOG_I(HW, "[oxgrf] set TX frequency to %lu\n",(uint64_t)(openair0_cfg->tx_freq[0]));
if ((status = oxgrf_set_rx_lo_freq(oxgrf->dev, 0, (uint64_t)(openair0_cfg->rx_freq[0]))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set RX frequency\n");
} else
LOG_I(HW, "[oxgrf] set RX frequency to %lu\n",(uint64_t)(openair0_cfg->rx_freq[0]));
return(0);
}
/*! \brief Set Gains (TX/RX)
* \param device the hardware to use
* \param openair0_cfg openair0 Config structure
* \returns 0 in success
*/
int trx_oxgrf_set_gains(openair0_device* device, openair0_config_t *openair0_cfg) {
int ret = 0;
oxgrf_state_t *oxgrf = (oxgrf_state_t *)device->priv;
if (openair0_cfg->rx_gain[0] > 65+openair0_cfg->rx_gain_offset[0]) {
LOG_E(HW, "[oxgrf] Reduce RX Gain 0 by %f dB\n", openair0_cfg->rx_gain[0] - openair0_cfg->rx_gain_offset[0] - 65);
return -1;
}
if ((ret = oxgrf_set_rx1_rf_gain(oxgrf->dev, 0, (uint32_t)(openair0_cfg->rx_gain[0] > 65?65:openair0_cfg->rx_gain[0]))) < 0) {
LOG_I(HW, "[oxgrf] Failed to set RX1 gain\n");
} else
LOG_I(HW, "[oxgrf] set RX1 gain to %u\n",(uint32_t)(openair0_cfg->rx_gain[0]));
if(oxgrf->rx_num_channels > 1) {
if ((ret = oxgrf_set_rx2_rf_gain(oxgrf->dev, 0, (uint32_t)(openair0_cfg->rx_gain[1] > 65?65:openair0_cfg->rx_gain[1]))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set RX2 gain\n");
} else
LOG_I(HW, "[oxgrf] set RX gain to %u\n",(uint32_t)(openair0_cfg->rx_gain[1]));
}
int tx_gain = ((uint32_t)openair0_cfg->tx_gain[0] > 90?90:(uint32_t)openair0_cfg->tx_gain[0]);
if ((ret = oxgrf_set_tx1_attenuation(oxgrf->dev, 0, (90 - tx_gain) * 1000)) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX1 gain\n");
} else
LOG_I(HW, "[oxgrf] set the TX1 gain to %d\n", (uint32_t)openair0_cfg->tx_gain[0]);
if(oxgrf->tx_num_channels > 1) {
tx_gain = ((uint32_t)openair0_cfg->tx_gain[1] > 90?90:(uint32_t)openair0_cfg->tx_gain[1]);
if ((ret = oxgrf_set_tx2_attenuation(oxgrf->dev, 0, (90 - tx_gain) * 1000)) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX2 gain\n");
} else
LOG_I(HW, "[oxgrf] set the TX2 gain to %d\n", (uint32_t)openair0_cfg->tx_gain[1]);
}
return(ret);
}
/*! \brief Initialize Openair oxgrf target. It returns 0 if OK
* \param device the hardware to use
* \param openair0_cfg RF frontend parameters set by application
* \returns 0 on success
*/
int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
int status;
oxgrf_state_t *oxgrf = (oxgrf_state_t*)malloc(sizeof(oxgrf_state_t));
memset(oxgrf, 0, sizeof(oxgrf_state_t));
LOG_I(HW, "[oxgrf] openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
LOG_I(HW, "[oxgrf] openair0_cfg[0].rx_num_channels == '%d'\n", openair0_cfg[0].rx_num_channels);
LOG_I(HW, "[oxgrf] openair0_cfg[0].tx_num_channels == '%d'\n", openair0_cfg[0].tx_num_channels);
// init required params
switch ((int)openair0_cfg->sample_rate) {
case 122880000:
openair0_cfg->samples_per_packet = 122880;
openair0_cfg->tx_sample_advance = 70;
openair0_cfg[0].tx_bw = 100e6;
openair0_cfg[0].rx_bw = 100e6;
break;
case 61440000:
openair0_cfg->samples_per_packet = 61440;
openair0_cfg->tx_sample_advance = 70;
openair0_cfg[0].tx_bw = 40e6;
openair0_cfg[0].rx_bw = 40e6;
break;
case 30720000:
openair0_cfg->samples_per_packet = 30720;
openair0_cfg->tx_sample_advance = 70;
openair0_cfg[0].tx_bw = 20e6;
openair0_cfg[0].rx_bw = 20e6;
break;
case 15360000:
openair0_cfg->samples_per_packet = 15360;
openair0_cfg->tx_sample_advance = 68;
openair0_cfg[0].tx_bw = 10e6;
openair0_cfg[0].rx_bw = 10e6;
break;
case 7680000:
openair0_cfg->samples_per_packet = 7680;
openair0_cfg->tx_sample_advance = 34;
openair0_cfg[0].tx_bw = 5e6;
openair0_cfg[0].rx_bw = 5e6;
break;
case 1920000:
openair0_cfg->samples_per_packet = 1920;
openair0_cfg->tx_sample_advance = 9;
openair0_cfg[0].tx_bw = 1.25e6;
openair0_cfg[0].rx_bw = 1.25e6;
break;
default:
LOG_I(HW, "[oxgrf] Error: unknown sampling rate %f\n", openair0_cfg->sample_rate);
free(oxgrf);
exit(-1);
break;
}
//openair0_cfg->iq_txshift = 2;
//openair0_cfg->iq_rxrescale = 14; /*not sure*/ //FIXME: adjust to oxgrf
oxgrf->sample_rate = (unsigned int)openair0_cfg->sample_rate;
LOG_I(HW, "[oxgrf] sampling_rate %d\n", oxgrf->sample_rate);
oxgrf->rx_num_channels = openair0_cfg[0].rx_num_channels;
oxgrf->tx_num_channels = openair0_cfg[0].tx_num_channels;
int auxdac1 = 0;
char args[64];
if (openair0_cfg[0].sdr_addrs == NULL) {
strcpy(args, "dev=pcie:0");
} else {
strcpy(args, openair0_cfg[0].sdr_addrs);
}
char dev_str[64];
const char dev_arg[] = "dev=";
char *dev_ptr = strstr(args, dev_arg);
if(dev_ptr) {
copy_subdev_string(dev_str, dev_ptr + strlen(dev_arg));
remove_substring(args, dev_arg);
remove_substring(args, dev_str);
LOG_I(HW, "[oxgrf] Using %s\n", dev_str);
}
const char auxdac1_arg[] = "auxdac1=";
char auxdac1_str[64] = {0};
char *auxdac1_ptr = strstr(args, auxdac1_arg);
if(auxdac1_ptr) {
copy_subdev_string(auxdac1_str, auxdac1_ptr + strlen(auxdac1_arg));
remove_substring(args, auxdac1_arg);
remove_substring(args, auxdac1_str);
auxdac1 = atoi(auxdac1_str);
LOG_I(HW, "[oxgrf] Setting auxdac1:%u\n", auxdac1);
}
if ((oxgrf->dev = oxgrf_open_device(dev_str)) == NULL ) {
LOG_E(HW, "[oxgrf] Failed to open oxgrf\n");
free(oxgrf);
return -1;
}
LOG_I(HW, "[oxgrf] Initializing openair0_device\n");
switch (openair0_cfg[0].clock_source) {
case external:
LOG_I(HW, "[oxgrf] clock_source: external\n");
oxgrf_set_ref_clock (oxgrf->dev, 0, EXTERNAL_REFERENCE);
oxgrf_set_pps_select (oxgrf->dev, 0, PPS_EXTERNAL_EN);
break;
case gpsdo:
LOG_I(HW, "[oxgrf] clock_source: gpsdo\n");
break;
case internal:
default:
oxgrf_set_ref_clock (oxgrf->dev, 0, INTERNAL_REFERENCE);
oxgrf_set_pps_select (oxgrf->dev, 0, PPS_INTERNAL_EN);
//oxgrf_set_vco_select (oxgrf->dev, 0, AUXDAC1);
LOG_I(HW, "[oxgrf] clock_source: internal\n");
break;
}
oxgrf_set_auxdac1 (oxgrf->dev, 0, auxdac1);
oxgrf_set_duplex_select (oxgrf->dev, 0, FDD);
oxgrf_set_trxsw_fpga_enable(oxgrf->dev, 0, 0);
oxgrf_set_rx_ant_enable (oxgrf->dev, 0, 1);
oxgrf_set_tx_fir_en_dis (oxgrf->dev, 0, 0);
oxgrf_set_rx_fir_en_dis (oxgrf->dev, 0, 0);
// RX port Initialize
if ((status = oxgrf_set_rx_lo_freq(oxgrf->dev, 0, (uint64_t)(openair0_cfg->rx_freq[0]))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set RX frequency\n");
} else
LOG_I(HW, "[oxgrf] set RX frequency to %lu\n",(uint64_t)(openair0_cfg->rx_freq[0]));
if ((status = oxgrf_set_rx_sampling_freq(oxgrf->dev, 0, (uint32_t)(openair0_cfg->sample_rate))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set RX sample rate\n");
} else
LOG_I(HW, "[oxgrf] set RX sample rate to %u\n", (uint32_t)(openair0_cfg->sample_rate));
if ((status = oxgrf_set_rx_rf_bandwidth(oxgrf->dev, 0, (uint32_t)(openair0_cfg->rx_bw))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set RX bandwidth\n");
} else
LOG_I(HW, "[oxgrf] set RX bandwidth to %u\n",(uint32_t)(openair0_cfg->rx_bw));
if ((status = oxgrf_set_rx1_gain_control_mode(oxgrf->dev, 0, 0)) < 0){
LOG_E(HW, "[oxgrf] Failed to set RX1 Gain Control Mode\n");
} else
LOG_I(HW, "[oxgrf] set RX1 Gain Control Mode MGC\n");
if ((status = oxgrf_set_rx1_rf_gain(oxgrf->dev, 0, (uint32_t)(openair0_cfg->rx_gain[0] > 65?65:openair0_cfg->rx_gain[0]))) < 0) {
LOG_I(HW, "[oxgrf] Failed to set RX1 gain\n");
} else
LOG_I(HW, "[oxgrf] set RX1 gain to %u\n",(uint32_t)(openair0_cfg->rx_gain[0]));
if(oxgrf->rx_num_channels > 1) {
if ((status = oxgrf_set_rx2_gain_control_mode(oxgrf->dev, 0, 0)) < 0){
LOG_E(HW, "[oxgrf] Failed to set RX2 Gain Control Mode\n");
} else
LOG_I(HW, "[oxgrf] set RX2 Gain Control Mode MGC\n");
if ((status = oxgrf_set_rx2_rf_gain(oxgrf->dev, 0, (uint32_t)(openair0_cfg->rx_gain[1] > 65?65:openair0_cfg->rx_gain[1]))) < 0) {
LOG_E(HW, "[oxgrf] Failed to set RX2 gain\n");
} else
LOG_I(HW, "[oxgrf] set RX2 gain to %u\n",(uint32_t)(openair0_cfg->rx_gain[1]));
}
// TX port Initialize
if ((status = oxgrf_set_tx_lo_freq(oxgrf->dev, 0, (uint64_t)openair0_cfg->tx_freq[0])) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX frequency\n");
} else
LOG_I(HW, "[oxgrf] set TX Frequency to %lu\n", (uint64_t)openair0_cfg->tx_freq[0]);
if ((status = oxgrf_set_tx_sampling_freq(oxgrf->dev, 0, (uint32_t)openair0_cfg->sample_rate)) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX sample rate\n");
} else
LOG_I(HW, "[oxgrf] set TX sampling rate to %u\n", (uint32_t)openair0_cfg->sample_rate);
if ((status = oxgrf_set_tx_rf_bandwidth(oxgrf->dev, 0, (uint32_t)openair0_cfg->tx_bw)) <0) {
LOG_E(HW, "[oxgrf] Failed to set TX bandwidth\n");
} else
LOG_I(HW, "[oxgrf] set TX bandwidth to %u\n", (uint32_t)openair0_cfg->tx_bw);
int tx_gain = ((uint32_t)openair0_cfg->tx_gain[0] > 90?90:(uint32_t)openair0_cfg->tx_gain[0]);
if ((status = oxgrf_set_tx1_attenuation(oxgrf->dev, 0, (90 - tx_gain) * 1000)) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX1 gain\n");
} else
LOG_I(HW, "[oxgrf] set the TX1 gain to %d\n", (uint32_t)openair0_cfg->tx_gain[0]);
if(oxgrf->tx_num_channels > 1) {
tx_gain = ((uint32_t)openair0_cfg->tx_gain[1] > 90?90:(uint32_t)openair0_cfg->tx_gain[1]);
if ((status = oxgrf_set_tx2_attenuation(oxgrf->dev, 0, (90 - tx_gain) * 1000)) < 0) {
LOG_E(HW, "[oxgrf] Failed to set TX2 gain\n");
} else
LOG_I(HW, "[oxgrf] set the TX2 gain to %d\n", (uint32_t)openair0_cfg->tx_gain[1]);
}
oxgrf_enable_timestamp(oxgrf->dev, 0, 0);
usleep(5);
oxgrf_enable_timestamp(oxgrf->dev, 0, 1);
for(int i = 0; i < NCHAN_PER_DEV; i++) {
int ret = posix_memalign((void **)&cache_buf[i], 4096, BUFFER_SIZE);
if(ret) {
LOG_I(HW, "Failed to alloc memory\n");
return -1;
}
ret = posix_memalign((void **)&iq_buf[i], 4096, BUFFER_SIZE);
if(ret) {
LOG_I(HW, "Failed to alloc memory\n");
return -1;
}
}
device->Mod_id = num_devices++;
device->type = OXGRF_DEV;
device->trx_start_func = trx_oxgrf_start;
device->trx_end_func = trx_oxgrf_end;
device->trx_read_func = trx_oxgrf_read;
device->trx_write_func = trx_oxgrf_write;
device->trx_get_stats_func = trx_oxgrf_get_stats;
device->trx_reset_stats_func = trx_oxgrf_reset_stats;
device->trx_stop_func = trx_oxgrf_stop;
device->trx_set_freq_func = trx_oxgrf_set_freq;
device->trx_set_gains_func = trx_oxgrf_set_gains;
device->openair0_cfg = openair0_cfg;
device->priv = (void *)oxgrf;
return 0;
}
/*@}*/
targets/ARCH/OXGRF/USERSPACE/LIB/oxgrf_lib.h 0 → 100644
View file @ 9c84ab93
/** oxgrf_lib.h
*
* Author: openxg
*/
#include "oxgrf_api_ss.h"
#include "common_lib.h"
/** @addtogroup _OXGRF_PHY_RF_INTERFACE_
* @{
*/
/*! \brief OXGRF specific data structure */
typedef struct {
//! opaque OXGRF device struct. An empty ("") or NULL device identifier will result in the first encountered device being opened (using the first discovered backend)
OXGRF_DESCRIPTOR *dev;
int16_t *rx_buffer;
int16_t *tx_buffer;
//! Sample rate
unsigned int sample_rate;
int rx_num_channels;
int tx_num_channels;
// --------------------------------
// Debug and output control
// --------------------------------
//! Number of underflows
int num_underflows;
//! Number of overflows
int num_overflows;
//! number of RX errors
int num_rx_errors;
//! Number of TX errors
int num_tx_errors;
//! timestamp of current TX
uint64_t tx_current_ts;
//! timestamp of current RX
uint64_t rx_current_ts;
//! number of TX samples
uint64_t tx_nsamps;
//! number of RX samples
uint64_t rx_nsamps;
//! number of TX count
uint64_t tx_count;
//! number of RX count
uint64_t rx_count;
//! timestamp of RX packet
openair0_timestamp rx_timestamp;
} oxgrf_state_t;
/*! \brief get current timestamp
*\param device the hardware to use
*/
openair0_timestamp trx_get_timestamp(openair0_device *device);
#define REMOVE_SUBSTRING_WITHCOMAS(S, TOREMOVE) \
remove_substring(S, TOREMOVE ","); \
remove_substring(S, TOREMOVE ", "); \
remove_substring(S, "," TOREMOVE); \
remove_substring(S, ", " TOREMOVE); \
remove_substring(S, TOREMOVE)
static inline void remove_substring(char* s, const char* toremove)
{
while ((s = strstr(s, toremove))) {
memmove(s, s + strlen(toremove), 1 + strlen(s + strlen(toremove)));
}
}
static inline void copy_subdev_string(char* dst, char* src)
{
int n = 0;
int len = (int)strlen(src);
/* Copy until end of string or comma */
while (n < len && src[n] != '\0' && src[n] != ',') {
dst[n] = src[n];
n++;
}
dst[n] = '\0';
}
/*@}*/
targets/COMMON/openairinterface5g_limits.h
View file @ 9c84ab93
#ifndef OPENAIRINTERFACE5G_LIMITS_H_ #ifndef OPENAIRINTERFACE5G_LIMITS_H_
#define OPENAIRINTERFACE5G_LIMITS_H_ #define OPENAIRINTERFACE5G_LIMITS_H_
#if 1 /*defined(CBMIMO1) || defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)*/ #if 1 /*defined(CBMIMO1) || defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) || defined(OAI_OXGRF)*/
# define NUMBER_OF_eNB_MAX 1 # define NUMBER_OF_eNB_MAX 1
# define NUMBER_OF_gNB_MAX 1 # define NUMBER_OF_gNB_MAX 1
# define NUMBER_OF_RU_MAX 2 # define NUMBER_OF_RU_MAX 2
......
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.oxgrf.conf 0 → 100644
View file @ 9c84ab93
Active_gNBs = ( "gNB-OPENXG");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OPENXG";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 100;
plmn_list = ({
mcc = 466;
mnc = 92;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
min_rxtxtime = 6;
sib1_tda = 0;
do_SRS = 1;
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 12;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 641280;
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640008;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 106;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 28875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -96;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.199.231";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "eno1";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.199.221/24";
GNB_INTERFACE_NAME_FOR_NGU = "eno1";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.199.221/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 0;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 85
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 65;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=340";
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
f1ap_log_level ="debug";
f1ap_log_verbosity ="medium";
};
targets/RT/USER/lte-softmodem.h
View file @ 9c84ab93
...@@ -78,6 +78,7 @@ ...@@ -78,6 +78,7 @@
#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n" #define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
#define CONFIG_HLP_DLSHIFT "dynamic shift for LLR compuation for TM3/4 (default 0)\n" #define CONFIG_HLP_DLSHIFT "dynamic shift for LLR compuation for TM3/4 (default 0)\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n" #define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_OXGRF_ARGS "set the arguments to identify OXGRF\n"
#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n" #define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
#define CONFIG_HLP_TDD "Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n" #define CONFIG_HLP_TDD "Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n"
#define CONFIG_HLP_TADV "Set timing_advance\n" #define CONFIG_HLP_TADV "Set timing_advance\n"
...@@ -110,6 +111,7 @@ ...@@ -110,6 +111,7 @@
{"r" , CONFIG_HLP_PRB, 0, u8ptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT8, 0}, \ {"r" , CONFIG_HLP_PRB, 0, u8ptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT8, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \ {"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200",TYPE_STRING, 0}, \ {"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200",TYPE_STRING, 0}, \
{"oxgrf-args", CONFIG_HLP_OXGRF_ARGS, 0, strptr:(char **)&oxgrf_args, defstrval:"dev=pciex:0",TYPE_STRING, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \ {"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \ {"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"A", CONFIG_HLP_TADV, 0, iptr:&(timingadv), defintval:0, TYPE_INT, 0}, \ {"A", CONFIG_HLP_TADV, 0, iptr:&(timingadv), defintval:0, TYPE_INT, 0}, \
......
targets/RT/USER/lte-uesoftmodem.c
View file @ 9c84ab93
...@@ -165,6 +165,8 @@ int transmission_mode=1; ...@@ -165,6 +165,8 @@ int transmission_mode=1;
char *usrp_args=NULL; char *usrp_args=NULL;
char *usrp_clksrc=NULL; char *usrp_clksrc=NULL;
char *oxgrf_args=NULL;
THREAD_STRUCT thread_struct; THREAD_STRUCT thread_struct;
/* struct for ethernet specific parameters given in eNB conf file */ /* struct for ethernet specific parameters given in eNB conf file */
eth_params_t *eth_params; eth_params_t *eth_params;
...@@ -482,6 +484,7 @@ void init_openair0(LTE_DL_FRAME_PARMS *frame_parms,int rxgain) { ...@@ -482,6 +484,7 @@ void init_openair0(LTE_DL_FRAME_PARMS *frame_parms,int rxgain) {
} }
if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args; if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args;
else if (oxgrf_args) openair0_cfg[card].sdr_addrs = oxgrf_args;
} }
} }
......
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