Commit bab12d1a authored by Laurent THOMAS's avatar Laurent THOMAS

basic C cleaning of dci decoding

parent c599e172
......@@ -1060,7 +1060,7 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint16_t first_carrier_offset,
uint16_t BWPStart,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
......
......@@ -54,7 +54,7 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint16_t first_carrier_offset,
uint16_t BWPStart,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
......
......@@ -57,25 +57,31 @@ static const char nr_dci_format_string[8][30] = {"NR_DL_DCI_FORMAT_1_0",
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#ifdef NR_PDCCH_DCI_DEBUG
#define LOG_DDD(a, ...) printf("<-NR_PDCCH_DCI_DEBUG (%s)-> " a, __func__, ##__VA_ARGS__ )
#define LOG_DSYMB(b) \
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n" b, \
c_rb, \
i, \
j, \
rxF_ext[j].r, \
rxF_ext[j].i, \
i, \
rxF[i].r, \
rxF[i].i)
#else
#define LOG_DDD(a...)
#define LOG_DSYMB(a...)
#endif
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP \
10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef LOG_I
#undef LOG_I
#define LOG_I(A,B...) printf(B)
#undef LOG_I
#define LOG_I(A, B...) printf(B)
#endif
//static const int16_t conjugate[8]__attribute__((aligned(32))) = {-1,1,-1,1,-1,1,-1,1};
static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
uint32_t *e_rx,
static void nr_pdcch_demapping_deinterleaving(c16_t *llr,
c16_t *e_rx,
uint8_t coreset_time_dur,
uint8_t start_symbol,
uint32_t coreset_nbr_rb,
......@@ -91,7 +97,8 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
* Demapping will regroup in REG and bundles
* Deinterleaving will order the bundles
*
* In the following example we can see the process. The llr contains the demodulated IQs, but they are not ordered from REG 0,1,2,..
* In the following example we can see the process. The llr contains the demodulated IQs, but they are not ordered from
REG 0,1,2,..
* In e_rx (z) we will order the REG ids and group them into bundles.
* Then we will put the bundles in the correct order as indicated in subclause 7.3.2.2
*
......@@ -121,16 +128,14 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
| REG 0 (bundle 0) bundle 0 bundle 0
*/
int c = 0, r = 0;
uint16_t f_bundle_j = 0;
uint32_t coreset_C = 0;
uint16_t index_z, index_llr;
int coreset_interleaved = 0;
int N_regs = coreset_nbr_rb * coreset_time_dur;
const int N_regs = coreset_nbr_rb * coreset_time_dur;
if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved = 1;
coreset_C = (uint32_t) (N_regs / (coreset_interleaver_size_R * reg_bundle_size_L));
coreset_C = (uint32_t)(N_regs / (coreset_interleaver_size_R * reg_bundle_size_L));
} else {
reg_bundle_size_L = 6;
}
......@@ -141,6 +146,7 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
int max_bundles = n_cce * num_bundles_per_cce;
int f_bundle_j_list[max_bundles];
// for each bundle
int c = 0, r = 0, f_bundle_j = 0;
for (int nb = 0; nb < max_bundles; nb++) {
if (coreset_interleaved == 0)
f_bundle_j = nb;
......@@ -157,16 +163,15 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
// Get cce_list indices by bundle index in ascending order
int f_bundle_j_list_ord[number_of_candidates][max_bundles];
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
for (int c_id = 0; c_id < number_of_candidates; c_id++) {
int start_bund_cand = CCE[c_id] * num_bundles_per_cce;
int max_bund_per_cand = L[c_id] * num_bundles_per_cce;
int f_bundle_j_list_id = 0;
for(int nb = 0; nb < max_bundles; nb++) {
for(int bund_cand = start_bund_cand; bund_cand < start_bund_cand + max_bund_per_cand; bund_cand++){
for (int nb = 0; nb < max_bundles; nb++) {
for (int bund_cand = start_bund_cand; bund_cand < start_bund_cand + max_bund_per_cand; bund_cand++) {
if (f_bundle_j_list[bund_cand] == nb) {
f_bundle_j_list_ord[c_id][f_bundle_j_list_id] = nb;
f_bundle_j_list_id++;
}
}
}
......@@ -174,20 +179,30 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
int rb_count = 0;
int data_sc = 9; // 9 sub-carriers with data per PRB
for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
for (int symbol_idx = start_symbol; symbol_idx < start_symbol+coreset_time_dur; symbol_idx++) {
for (int cce_count = 0; cce_count < L[c_id]; cce_count ++) {
for (int k=0; k<NR_NB_REG_PER_CCE/reg_bundle_size_L; k++) { // loop over REG bundles
int f = f_bundle_j_list_ord[c_id][k+NR_NB_REG_PER_CCE*cce_count/reg_bundle_size_L];
for(int rb=0; rb<B_rb; rb++) { // loop over the RBs of the bundle
index_z = data_sc * rb_count;
index_llr = (uint16_t) (f*B_rb + rb + symbol_idx * coreset_nbr_rb) * data_sc;
for (int c_id = 0; c_id < number_of_candidates; c_id++) {
for (int symbol_idx = start_symbol; symbol_idx < start_symbol + coreset_time_dur; symbol_idx++) {
for (int cce_count = 0; cce_count < L[c_id]; cce_count++) {
for (int k = 0; k < NR_NB_REG_PER_CCE / reg_bundle_size_L; k++) { // loop over REG bundles
int f = f_bundle_j_list_ord[c_id][k + NR_NB_REG_PER_CCE * cce_count / reg_bundle_size_L];
for (int rb = 0; rb < B_rb; rb++) { // loop over the RBs of the bundle
c16_t *out = e_rx + data_sc * rb_count;
c16_t *in = llr + (uint16_t)(f * B_rb + rb + symbol_idx * coreset_nbr_rb) * data_sc;
for (int i = 0; i < data_sc; i++) {
e_rx[index_z + i] = llr[index_llr + i];
out[i] = in[i];
#ifdef NR_PDCCH_DCI_DEBUG
LOG_I(PHY,"[candidate=%d,symbol_idx=%d,cce=%d,REG bundle=%d,PRB=%d] z[%d]=(%d,%d) <-> \t llr[%d]=(%d,%d) \n",
c_id,symbol_idx,cce_count,k,f*B_rb + rb,(index_z + i),*(int16_t *) &e_rx[index_z + i],*(1 + (int16_t *) &e_rx[index_z + i]),
(index_llr + i),*(int16_t *) &llr[index_llr + i], *(1 + (int16_t *) &llr[index_llr + i]));
LOG_I(PHY,
"[candidate=%d,symbol_idx=%d,cce=%d,REG bundle=%d,PRB=%d] z[%d]=(%d,%d) <-> \t llr[%d]=(%d,%d) \n",
c_id,
symbol_idx,
cce_count,
k,
f * B_rb + rb,
(index_z + i),
out->r,
out->i,
index_llr + i,
in.r,
in.i);
#endif
}
rb_count++;
......@@ -198,92 +213,52 @@ static void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
}
}
int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t rx_size, int32_t rxdataF_comp[][rx_size],
int16_t *pdcch_llr, uint8_t symbol,uint32_t coreset_nbr_rb) {
int16_t *rxF = (int16_t *) &rxdataF_comp[0][(symbol * coreset_nbr_rb * 12)];
int32_t i;
int16_t *pdcch_llrp;
pdcch_llrp = &pdcch_llr[2 * symbol * coreset_nbr_rb * 9];
static void nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t rx_size,
c16_t rxdataF_comp[][rx_size],
c16_t *pdcch_llr,
uint8_t symbol,
uint32_t coreset_nbr_rb)
{
c16_t *rxF = &rxdataF_comp[0][(symbol * coreset_nbr_rb * 12)];
c16_t *pdcch_llrp = &pdcch_llr[symbol * coreset_nbr_rb * 9];
if (!pdcch_llrp) {
LOG_E(PHY,"pdcch_qpsk_llr: llr is null, symbol %d\n", symbol);
return (-1);
return;
}
LOG_DDD("llr logs: pdcch qpsk llr for symbol %d (pos %d), llr offset %ld\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llrp-pdcch_llr);
//for (i = 0; i < (frame_parms->N_RB_DL * ((symbol == 0) ? 16 : 24)); i++) {
for (i = 0; i < (coreset_nbr_rb * ((symbol == 0) ? 18 : 18)); i++) {
if (*rxF > 31)
*pdcch_llrp = 31;
else if (*rxF < -32)
*pdcch_llrp = -32;
else
*pdcch_llrp = (*rxF);
for (int i = 0; i < (coreset_nbr_rb * ((symbol == 0) ? 9 : 9)); i++) {
// We clip the signal
c16_t res;
res.r = min(rxF->r, 31);
res.r = max(-32, res.r);
res.i = min(rxF->i, 31);
res.i = max(-32, res.i);
*pdcch_llrp = res;
LOG_DDD("llr logs: rb=%d i=%d *rxF:%d => *pdcch_llrp:%d\n",i/18,i,*rxF,*pdcch_llrp);
rxF++;
pdcch_llrp++;
}
return (0);
}
#if 0
int32_t pdcch_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
char *pdcch_llr,
uint8_t symbol) {
int16_t *rxF= (int16_t *) &rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
int32_t i;
char *pdcch_llr8;
pdcch_llr8 = &pdcch_llr[2*symbol*frame_parms->N_RB_DL*12];
if (!pdcch_llr8) {
LOG_E(PHY,"pdcch_qpsk_llr: llr is null, symbol %d\n",symbol);
return(-1);
}
// printf("pdcch qpsk llr for symbol %d (pos %d), llr offset %d\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llr8-pdcch_llr);
for (i=0; i<(frame_parms->N_RB_DL*((symbol==0) ? 16 : 24)); i++) {
if (*rxF>31)
*pdcch_llr8=31;
else if (*rxF<-32)
*pdcch_llr8=-32;
else
*pdcch_llr8 = (char)(*rxF);
// printf("%d %d => %d\n",i,*rxF,*pdcch_llr8);
rxF++;
pdcch_llr8++;
}
return(0);
}
#endif
//__m128i avg128P;
//compute average channel_level on each (TX,RX) antenna pair
void nr_pdcch_channel_level(int32_t rx_size,
int32_t dl_ch_estimates_ext[][rx_size],
c16_t dl_ch_estimates_ext[][rx_size],
NR_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
int symbol,
uint8_t nb_rb) {
int16_t rb;
uint8_t aarx;
simde__m128i *dl_ch128;
simde__m128i avg128P;
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
int nb_rb)
{
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
//clear average level
avg128P = simde_mm_setzero_si128();
dl_ch128=(simde__m128i *)&dl_ch_estimates_ext[aarx][symbol*nb_rb*12];
simde__m128i avg128P = simde_mm_setzero_si128();
simde__m128i *dl_ch128 = (simde__m128i *)&dl_ch_estimates_ext[aarx][symbol * nb_rb * 12];
for (rb=0; rb<(nb_rb*3)>>2; rb++) {
for (int rb = 0; rb < (nb_rb * 3) >> 2; rb++) {
avg128P = simde_mm_add_epi32(avg128P,simde_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
avg128P = simde_mm_add_epi32(avg128P,simde_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
avg128P = simde_mm_add_epi32(avg128P,simde_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
......@@ -304,29 +279,22 @@ void nr_pdcch_channel_level(int32_t rx_size,
avg[aarx] += ((int32_t *)&avg128P)[i] / (nb_rb * 9);
LOG_DDD("Channel level : %d\n",avg[aarx]);
}
simde_mm_empty();
simde_m_empty();
}
simde__m128i mmtmpPD0,mmtmpPD1,mmtmpPD2,mmtmpPD3;
// This function will extract the mapped DM-RS PDCCH REs as per 38.211 Section 7.4.1.3.2 (Mapping to physical resources)
void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
c16_t rxdataF[][rxdataF_sz],
int32_t est_size,
int32_t dl_ch_estimates[][est_size],
int32_t rx_size,
int32_t rxdataF_ext[][rx_size],
int32_t dl_ch_estimates_ext[][rx_size],
uint8_t symbol,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t *coreset_freq_dom,
uint32_t coreset_nbr_rb,
uint32_t n_BWP_start) {
static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
c16_t rxdataF[][rxdataF_sz],
int32_t est_size,
c16_t dl_ch_estimates[][est_size],
int32_t rx_size,
c16_t rxdataF_ext[][rx_size],
c16_t dl_ch_estimates_ext[][rx_size],
int symbol,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t *coreset_freq_dom,
uint32_t coreset_nbr_rb,
uint32_t n_BWP_start)
{
/*
* This function is demapping DM-RS PDCCH RE
* Implementing 38.211 Section 7.4.1.3.2 Mapping to physical resources
......@@ -338,24 +306,19 @@ void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
*
*/
#define NBR_RE_PER_RB_WITH_DMRS 12
#define NBR_RE_PER_RB_WITH_DMRS 12
// after removing the 3 DMRS RE, the RB contains 9 RE with PDCCH
#define NBR_RE_PER_RB_WITHOUT_DMRS 9
uint16_t c_rb;
//uint8_t rb_count_bit;
uint8_t i, j, aarx;
int32_t *dl_ch0, *dl_ch0_ext, *rxF, *rxF_ext;
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
dl_ch0 = &dl_ch_estimates[aarx][frame_parms->ofdm_symbol_size*symbol];
LOG_DDD("dl_ch0 = &dl_ch_estimates[aarx = (%d)][0]\n",aarx);
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS)];
LOG_DDD("dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS));
rxF_ext = &rxdataF_ext[aarx][symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS)];
LOG_DDD("rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS));
#define NBR_RE_PER_RB_WITHOUT_DMRS 9
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
const c16_t *dl_ch0 = dl_ch_estimates[aarx] + frame_parms->ofdm_symbol_size * symbol;
c16_t *rxFbase = rxdataF[aarx] + frame_parms->ofdm_symbol_size * symbol;
LOG_DDD("dl_ch0 = &dl_ch_estimates[aarx = (%d)][0]\n", aarx);
const int offset = symbol * coreset_nbr_rb * NBR_RE_PER_RB_WITH_DMRS;
c16_t *dl_ch0_ext = &dl_ch_estimates_ext[aarx][offset];
LOG_DDD("dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n", aarx, offset);
c16_t *rxF_ext = &rxdataF_ext[aarx][offset];
LOG_DDD("rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n", aarx, offset);
/*
* The following for loop handles treatment of PDCCH contained in table rxdataF (in frequency domain)
......@@ -368,157 +331,127 @@ void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
* 2. Number of RBs in the system bandwidth is odd
* (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF)
* 2.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
* 2.2 The RB is > than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB containing DC)
* 2.3 The RB is == N_RB_DL/2 -> IQ symbols are in the upper border of the rxdataF for first 6 IQ element and the lower border of the rxdataF for the last 6 IQ elements
* If the first RB containing PDCCH within the UE BWP and within the CORESET is higher than half of the system bandwidth (N_RB_DL),
* then the IQ symbol is going to be found at the position 0+c_rb-N_RB_DL/2 in rxdataF and
* we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
* 2.2 The RB is > than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB
* containing DC) 2.3 The RB is == N_RB_DL/2 -> IQ symbols are in the upper border of the rxdataF for first 6 IQ
* element and the lower border of the rxdataF for the last 6 IQ elements If the first RB containing PDCCH within the UE BWP
* and within the CORESET is higher than half of the system bandwidth (N_RB_DL), then the IQ symbol is going to be found at
* the position 0+c_rb-N_RB_DL/2 in rxdataF and we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
*/
int c_rb_by6;
c_rb = 0;
for (int rb=0;rb<coreset_nbr_rb;rb++,c_rb++) {
c_rb_by6 = c_rb/6;
int c_rb = 0;
for (int rb = 0; rb < coreset_nbr_rb; rb++, c_rb++) {
int c_rb_by6 = c_rb / 6;
// skip zeros in frequency domain bitmap
while ((coreset_freq_dom[c_rb_by6>>3] & (1<<(7-(c_rb_by6&7)))) == 0) {
c_rb+=6;
c_rb_by6 = c_rb/6;
while ((coreset_freq_dom[c_rb_by6 >> 3] & (1 << (7 - (c_rb_by6 & 7)))) == 0) {
c_rb += 6;
c_rb_by6 = c_rb / 6;
}
rxF=NULL;
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = (int32_t *)&rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
}
if (((c_rb + n_BWP_start) >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = (int32_t *)&rxdataF[aarx][12*(c_rb + n_BWP_start - (frame_parms->N_RB_DL>>1)) + symbol * frame_parms->ofdm_symbol_size]; // we point at the 1st part of the rxdataF in symbol
LOG_DDD("in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][12*(c_rb + n_BWP_start - (frame_parms->N_RB_DL>>1)) + symbol * frame_parms->ofdm_symbol_size = (%d)]\n",
c_rb,aarx,(12*(c_rb + n_BWP_start - (frame_parms->N_RB_DL>>1)) + symbol * frame_parms->ofdm_symbol_size));
}
if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = (int32_t *)&rxdataF[aarx][frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start) + symbol * frame_parms->ofdm_symbol_size];
LOG_DDD("in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start) + symbol * frame_parms->ofdm_symbol_size = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start) + symbol * frame_parms->ofdm_symbol_size));
}
if (((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = (int32_t *)&rxdataF[aarx][12*(c_rb + n_BWP_start - (frame_parms->N_RB_DL>>1)) - 6 + symbol * frame_parms->ofdm_symbol_size]; // we point at the 1st part of the rxdataF in symbol
LOG_DDD("in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][12*(c_rb + n_BWP_start - (frame_parms->N_RB_DL>>1)) - 6 + symbol * frame_parms->ofdm_symbol_size = (%d)]\n",
c_rb,aarx,(12*(c_rb + n_BWP_start - (frame_parms->N_RB_DL>>1)) - 6 + symbol * frame_parms->ofdm_symbol_size));
}
if (((c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET
// (c_rb = n_BWP_start)
if ((frame_parms->N_RB_DL & 1) == 1 && (c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) {
// treatment of RB containing the DC
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = (int32_t *)&rxdataF[aarx][frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start) + symbol * frame_parms->ofdm_symbol_size];
LOG_DDD("in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start) + symbol * frame_parms->ofdm_symbol_size = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start) + symbol * frame_parms->ofdm_symbol_size));
j = 0;
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the
// end of the table)
c16_t *rxF = rxFbase + frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start);
for (i = 0; i < 6; i++) { //treating first part of the RB note that i=5 would correspond to DC. We treat it in NR
int i = 0, j = 0;
for (; i < 6; i++) { // treating first part of the RB note that i=5 would correspond to DC. We treat it in NR
if ((i != 1) && (i != 5)) {
dl_ch0_ext[j] = dl_ch0[i];
rxF_ext[j] = rxF[i];
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n",
c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short *) &rxF_ext[j]), i,
*(short *) &rxF[i], *(1 + (short *) &rxF[i]));
LOG_DSYMB("");
j++;
} else {
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short *) &rxF_ext[j]), i,
*(short *) &rxF[i], *(1 + (short *) &rxF[i]));
LOG_DSYMB("\t\t <==> DM-RS PDCCH, this is a pilot symbol\n");
}
}
// then we point at the begining of the symbol part of rxdataF do process second part of RB
rxF = (int32_t *)&rxdataF[aarx][symbol * frame_parms->ofdm_symbol_size]; // we point at the 1st part of the rxdataF in symbol
LOG_DDD("in odd case c_rb (%d) is half N_RB_DL +1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][symbol * frame_parms->ofdm_symbol_size = (%d)]\n",
c_rb,aarx,(symbol * frame_parms->ofdm_symbol_size));
for (; i < 12; i++) {
if ((i != 9)) {
dl_ch0_ext[j] = dl_ch0[i];
rxF_ext[j] = rxF[i - 6];
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n",
c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short *) &rxF_ext[j]), i,
*(short *) &rxF[i-6], *(1 + (short *) &rxF[i-6]));
rxF_ext[j] = rxFbase[i - 6];
LOG_DSYMB("");
j++;
} else {
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short *) &rxF_ext[j]), i,
*(short *) &rxF[i-6], *(1 + (short *) &rxF[i-6]));
LOG_DSYMB("\t\t <==> DM-RS PDCCH, this is a pilot symbol\n");
}
}
dl_ch0_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
rxF_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
dl_ch0 += 12;
} else { // treatment of any RB that does not contain the DC
j = 0;
c16_t *rxF;
if ((frame_parms->N_RB_DL & 1) == 0) {
if ((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1))
// if RB to be treated is lower than middle system bandwidth then rxdataF pointed
// at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = rxFbase + (frame_parms->first_carrier_offset + 12 * c_rb) + n_BWP_start * 12;
else
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
// we point at the 1st part of the rxdataF in symbol
rxF = rxFbase + 12 * (c_rb + n_BWP_start - (frame_parms->N_RB_DL >> 1));
} else {
if ((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1))
// if RB to be treated is lower than middle system bandwidth then rxdataF pointed
// at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = rxFbase + frame_parms->first_carrier_offset + 12 * (c_rb + n_BWP_start);
else if ((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1))
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of
// the rxdataF just after the first IQ symbols of the RB containing DC
// we point at the 1st part of the rxdataF in symbol
rxF = rxFbase + 12 * (c_rb + n_BWP_start - (frame_parms->N_RB_DL >> 1)) - 6;
}
for (i = 0; i < 12; i++) {
int j = 0;
for (int i = 0; i < 12; i++) {
if ((i != 1) && (i != 5) && (i != 9)) {
rxF_ext[j] = rxF[i];
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n",
c_rb, i, j, *(short *) &rxF_ext[j],*(1 + (short *) &rxF_ext[j]), i,
*(short *) &rxF[i], *(1 + (short *) &rxF[i]));
dl_ch0_ext[j] = dl_ch0[i];
LOG_DSYMB("");
j++;
} else {
LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d) \t\t <==> DM-RS PDCCH, this is a pilot symbol\n",
c_rb, i, j, *(short *) &rxF_ext[j], *(1 + (short *) &rxF_ext[j]), i,
*(short *) &rxF[i], *(1 + (short *) &rxF[i]));
LOG_DSYMB("\t\t <==> DM-RS PDCCH, this is a pilot symbol\n");
}
}
dl_ch0_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
rxF_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
dl_ch0 += 12;
}
dl_ch0_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
rxF_ext += NBR_RE_PER_RB_WITHOUT_DMRS;
dl_ch0 += 12;
}
}
}
#define print_shorts(s,x) printf("%s %d,%d,%d,%d,%d,%d,%d,%d\n",s,(x)[0],(x)[1],(x)[2],(x)[3],(x)[4],(x)[5],(x)[6],(x)[7])
void nr_pdcch_channel_compensation(int32_t rx_size, int32_t rxdataF_ext[][rx_size],
int32_t dl_ch_estimates_ext[][rx_size],
int32_t rxdataF_comp[][rx_size],
void nr_pdcch_channel_compensation(int32_t rx_size,
c16_t rxdataF_ext[][rx_size],
c16_t dl_ch_estimates_ext[][rx_size],
c16_t rxdataF_comp[][rx_size],
int32_t **rho,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint8_t output_shift,
uint32_t coreset_nbr_rb) {
uint16_t rb; //,nb_rb=20;
uint8_t aarx;
simde__m128i mmtmpP0,mmtmpP1,mmtmpP2,mmtmpP3;
simde__m128i *dl_ch128,*rxdataF128,*rxdataF_comp128;
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
dl_ch128 = (simde__m128i *)&dl_ch_estimates_ext[aarx][symbol*coreset_nbr_rb*12];
rxdataF128 = (simde__m128i *)&rxdataF_ext[aarx][symbol*coreset_nbr_rb*12];
rxdataF_comp128 = (simde__m128i *)&rxdataF_comp[aarx][symbol*coreset_nbr_rb*12];
uint32_t coreset_nbr_rb)
{
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
simde__m128i *dl_ch128 = (simde__m128i *)&dl_ch_estimates_ext[aarx][symbol * coreset_nbr_rb * 12];
simde__m128i *rxdataF128 = (simde__m128i *)&rxdataF_ext[aarx][symbol * coreset_nbr_rb * 12];
simde__m128i *rxdataF_comp128 = (simde__m128i *)&rxdataF_comp[aarx][symbol * coreset_nbr_rb * 12];
//printf("ch compensation dl_ch ext addr %p \n", &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol*20*12]);
//printf("rxdataf ext addr %p symbol %d\n", &rxdataF_ext[aarx][symbol*20*12], symbol);
//printf("rxdataf_comp addr %p\n",&rxdataF_comp[(aatx<<1)+aarx][symbol*20*12]);
for (rb=0; rb<(coreset_nbr_rb*3)>>2; rb++) {
for (int rb = 0; rb < (coreset_nbr_rb * 3) >> 2; rb++) {
// multiply by conjugated channel
mmtmpP0 = simde_mm_madd_epi16(dl_ch128[0],rxdataF128[0]);
simde__m128i mmtmpP0 = simde_mm_madd_epi16(dl_ch128[0], rxdataF128[0]);
//print_ints("re",&mmtmpP0);
// mmtmpP0 contains real part of 4 consecutive outputs (32-bit)
mmtmpP1 = simde_mm_shufflelo_epi16(dl_ch128[0], SIMDE_MM_SHUFFLE(2,3,0,1));
simde__m128i mmtmpP1 = simde_mm_shufflelo_epi16(dl_ch128[0], SIMDE_MM_SHUFFLE(2, 3, 0, 1));
mmtmpP1 = simde_mm_shufflehi_epi16(mmtmpP1, SIMDE_MM_SHUFFLE(2,3,0,1));
mmtmpP1 = simde_mm_sign_epi16(mmtmpP1,*(simde__m128i *)&conjugate[0]);
//print_ints("im",&mmtmpP1);
......@@ -528,8 +461,8 @@ void nr_pdcch_channel_compensation(int32_t rx_size, int32_t rxdataF_ext[][rx_siz
// print_ints("re(shift)",&mmtmpP0);
mmtmpP1 = simde_mm_srai_epi32(mmtmpP1,output_shift);
// print_ints("im(shift)",&mmtmpP1);
mmtmpP2 = simde_mm_unpacklo_epi32(mmtmpP0,mmtmpP1);
mmtmpP3 = simde_mm_unpackhi_epi32(mmtmpP0,mmtmpP1);
simde__m128i mmtmpP2 = simde_mm_unpacklo_epi32(mmtmpP0, mmtmpP1);
simde__m128i mmtmpP3 = simde_mm_unpackhi_epi32(mmtmpP0, mmtmpP1);
//print_ints("c0",&mmtmpP2);
//print_ints("c1",&mmtmpP3);
rxdataF_comp128[0] = simde_mm_packs_epi32(mmtmpP2,mmtmpP3);
......@@ -572,49 +505,43 @@ void nr_pdcch_channel_compensation(int32_t rx_size, int32_t rxdataF_ext[][rx_siz
for (int i=0; i<12 ; i++)
LOG_DDD("rxdataF128[%d]=(%d,%d) X dlch[%d]=(%d,%d) rxdataF_comp128[%d]=(%d,%d)\n",
(rb*12)+i, ((short *)rxdataF128)[i<<1],((short *)rxdataF128)[1+(i<<1)],
(rb*12)+i, ((short *)dl_ch128)[i<<1],((short *)dl_ch128)[1+(i<<1)],
(rb*12)+i, ((short *)rxdataF_comp128)[i<<1],((short *)rxdataF_comp128)[1+(i<<1)]);
(rb * 12) + i,
((c16_t *)rxdataF128)[i].r,
((c16_t *)rxdataF128)[i].i,
(rb * 12) + i,
((c16_t *)dl_ch128)[i].r,
((c16_t *)dl_ch128)[i].i,
(rb * 12) + i,
((c16_t *)rxdataF_comp128)[i].r,
((c16_t *)rxdataF_comp128)[i].i);
dl_ch128+=3;
rxdataF128+=3;
rxdataF_comp128+=3;
}
}
simde_mm_empty();
simde_m_empty();
}
void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t rx_size,
int32_t rxdataF_comp[][rx_size],
uint8_t symbol) {
simde__m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
int32_t i;
static void nr_pdcch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms, int32_t rx_size, c16_t rxdataF_comp[][rx_size], int symbol)
{
if (frame_parms->nb_antennas_rx>1) {
rxdataF_comp128_0 = (simde__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
rxdataF_comp128_1 = (simde__m128i *)&rxdataF_comp[1][symbol*frame_parms->N_RB_DL*12];
simde__m128i *rxdataF_comp128_0 = (simde__m128i *)&rxdataF_comp[0][symbol * frame_parms->N_RB_DL * 12];
simde__m128i *rxdataF_comp128_1 = (simde__m128i *)&rxdataF_comp[1][symbol * frame_parms->N_RB_DL * 12];
const int sz = frame_parms->N_RB_DL * 3;
// MRC on each re of rb
for (i=0; i<frame_parms->N_RB_DL*3; i++) {
for (int i = 0; i < sz; i++) {
rxdataF_comp128_0[i] = simde_mm_adds_epi16(simde_mm_srai_epi16(rxdataF_comp128_0[i],1),simde_mm_srai_epi16(rxdataF_comp128_1[i],1));
}
}
simde_mm_empty();
simde_m_empty();
}
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
void nr_rx_pdcch(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
......@@ -626,15 +553,15 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// Pointers to extracted PDCCH symbols in frequency-domain.
int32_t rx_size = ((4 * frame_parms->N_RB_DL * 12 + 31) >> 5) << 5;
__attribute__ ((aligned(32))) int32_t rxdataF_ext[frame_parms->nb_antennas_rx][rx_size];
__attribute__ ((aligned(32))) int32_t rxdataF_comp[frame_parms->nb_antennas_rx][rx_size];
__attribute__ ((aligned(32))) int32_t pdcch_dl_ch_estimates_ext[frame_parms->nb_antennas_rx][rx_size];
__attribute__((aligned(32))) c16_t rxdataF_ext[frame_parms->nb_antennas_rx][rx_size];
__attribute__((aligned(32))) c16_t rxdataF_comp[frame_parms->nb_antennas_rx][rx_size];
__attribute__((aligned(32))) c16_t pdcch_dl_ch_estimates_ext[frame_parms->nb_antennas_rx][rx_size];
memset(rxdataF_comp, 0, sizeof(rxdataF_comp));
// Pointer to llrs, 4-bit resolution.
int32_t llr_size = 2*4*n_rb*9;
int16_t llr[llr_size];
int32_t llr_size = 4 * n_rb * 9;
c16_t llr[llr_size];
memset(llr, 0, sizeof(llr));
......@@ -706,23 +633,15 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
s,
n_rb);
UEscopeCopy(ue, pdcchLlr, llr, sizeof(int16_t), 1, llr_size, 0);
UEscopeCopy(ue, pdcchLlr, llr, sizeof(c16_t), 1, llr_size, 0);
#if T_TRACER
// T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
// T_INT(n_pdcch_symbols),
// T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
#endif
#ifdef DEBUG_DCI_DECODING
printf("demapping: slot %u, mi %d\n",slot,get_mi(frame_parms,slot));
#endif
}
LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving(), number of candidates %d\n",rel15->number_of_candidates);
nr_pdcch_demapping_deinterleaving((uint32_t *) llr,
(uint32_t *) pdcch_e_rx,
nr_pdcch_demapping_deinterleaving(llr,
pdcch_e_rx,
rel15->coreset.duration,
rel15->coreset.StartSymbolIndex,
n_rb,
......@@ -732,18 +651,13 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
rel15->number_of_candidates,
rel15->CCE,
rel15->L);
LOG_D(PHY,"we end nr_pdcch_demapping_deinterleaving()\n");
LOG_D(PHY,"Ending nr_rx_pdcch() function\n");
return (0);
}
void nr_pdcch_unscrambling(int16_t *e_rx,
uint16_t scrambling_RNTI,
uint32_t length,
uint16_t pdcch_DMRS_scrambling_id,
int16_t *z2)
static void nr_pdcch_unscrambling(c16_t *e_rx,
uint16_t scrambling_RNTI,
uint32_t length,
uint16_t pdcch_DMRS_scrambling_id,
int16_t *z2)
{
int i;
uint8_t reset;
......@@ -756,7 +670,7 @@ void nr_pdcch_unscrambling(int16_t *e_rx,
x2 = ((rnti << 16) + n_id) % (1U << 31); // this is c_init in 38.211 v15.1.0 Section 7.3.2.3
LOG_D(PHY,"PDCCH Unscrambling x2 %x : scrambling_RNTI %x\n", x2, rnti);
int16_t *ptr = &e_rx[0].r;
for (i = 0; i < length; i++) {
if ((i & 0x1f) == 0) {
s = lte_gold_generic(&x1, &x2, reset);
......@@ -764,9 +678,9 @@ void nr_pdcch_unscrambling(int16_t *e_rx,
}
if (((s >> (i % 32)) & 1) == 1)
z2[i] = -e_rx[i];
z2[i] = -ptr[i];
else
z2[i]=e_rx[i];
z2[i] = ptr[i];
}
}
......@@ -804,7 +718,7 @@ static uint16_t nr_dci_false_detection(uint64_t *dci,
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
c16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15)
{
......@@ -841,22 +755,21 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
nr_pdcch_unscrambling(&pdcch_e_rx[e_rx_cand_idx], rel15->coreset.scrambling_rnti, L*108, rel15->coreset.pdcch_dmrs_scrambling_id, tmp_e);
#ifdef DEBUG_DCI_DECODING
uint32_t *z = (uint32_t *) &e_rx[e_rx_cand_idx];
for (int index_z = 0; index_z < L*6; index_z++){
for (int i=0; i<9; i++) {
LOG_I(PHY,"z[%d]=(%d,%d) \n", (9*index_z + i), *(int16_t *) &z[9*index_z + i],*(1 + (int16_t *) &z[9*index_z + i]));
}
}
#endif
uint16_t crc = polar_decoder_int16(tmp_e,
dci_estimation,
1,
NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
n_rnti = rel15->rnti;
LOG_D(PHY, "(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx )\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length, *(unsigned long long*)dci_estimation);
LOG_D(PHY,
"(%i.%i) dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx )\n",
proc->frame_rx,
proc->nr_slot_rx,
n_rnti,
nr_dci_format_string[rel15->dci_format_options[k]],
CCEind,
dci_length,
*(unsigned long long *)dci_estimation);
if (crc == n_rnti) {
LOG_D(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %s,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,nr_dci_format_string[rel15->dci_format_options[k]],CCEind,dci_length,*(unsigned long long*)dci_estimation);
......@@ -886,7 +799,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
LOG_D(PHY,"(%i.%i) Decoded crc %x does not match rnti %x for DCI format %d\n", proc->frame_rx, proc->nr_slot_rx, crc, n_rnti, rel15->dci_format_options[k]);
}
}
e_rx_cand_idx += 9*L*6*2; //e_rx index for next candidate (L CCEs, 6 REGs per CCE and 9 REs per REG and 2 uint16_t per RE)
e_rx_cand_idx += 9 * L * 6; // e_rx index for next candidate (L CCEs, 6 REGs per CCE and 9 REs per REG )
}
return(dci_ind->number_of_dcis);
}
......@@ -266,13 +266,13 @@ void nr_dlsch_unscrambling(int16_t* llr,
uint32_t Nid,
uint32_t n_RNTI);
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
int16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
void nr_rx_pdcch(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t *pdcch_e_rx,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
/*! \brief Performs detection of SSS to find cell ID and other framing parameters (FDD/TDD, normal/extended prefix)
@param phy_vars_ue Pointer to UE variables
......@@ -361,15 +361,9 @@ void nr_sl_rf_card_config_freq(PHY_VARS_NR_UE *ue,
openair0_config_t *openair0_cfg,
int freq_offset);
void nr_pdcch_unscrambling(int16_t *z,
uint16_t scrambling_RNTI,
uint32_t length,
uint16_t pdcch_DMRS_scrambling_id,
int16_t *z2);
uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
c16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
......
......@@ -152,7 +152,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
int n_ss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
......
......@@ -426,7 +426,7 @@ unsigned int nr_get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
int n_ss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
......@@ -444,7 +444,7 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
/// PDCCH/DCI e-sequence (input to rate matching).
int32_t pdcch_e_rx_size = NR_MAX_PDCCH_SIZE;
int16_t pdcch_e_rx[pdcch_e_rx_size];
c16_t pdcch_e_rx[pdcch_e_rx_size];
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
nr_rx_pdcch(ue, proc, pdcch_est_size, pdcch_dl_ch_estimates, pdcch_e_rx, rel15, rxdataF);
......@@ -861,9 +861,7 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr
const uint32_t rxdataF_sz = ue->frame_parms.samples_per_slot_wCP;
__attribute__ ((aligned(32))) c16_t rxdataF[ue->frame_parms.nb_antennas_rx][rxdataF_sz];
// checking if current frame is compatible with SSB periodicity
if (cfg->ssb_table.ssb_period == 0 ||
!(frame_rx%(1<<(cfg->ssb_table.ssb_period-1)))){
if (cfg->ssb_table.ssb_period == 0 || !(frame_rx % (1 << (cfg->ssb_table.ssb_period - 1)))) {
const int estimateSz = fp->symbols_per_slot * fp->ofdm_symbol_size;
// loop over SSB blocks
for(int ssb_index=0; ssb_index<fp->Lmax; ssb_index++) {
......@@ -874,9 +872,7 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr
int ssb_slot = ssb_start_symbol/fp->symbols_per_slot;
int ssb_slot_2 = (cfg->ssb_table.ssb_period == 0) ? ssb_slot+(fp->slots_per_frame>>1) : -1;
if (ssb_slot == nr_slot_rx ||
ssb_slot_2 == nr_slot_rx) {
if (ssb_slot == nr_slot_rx || ssb_slot_2 == nr_slot_rx) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP_PBCH, VCD_FUNCTION_IN);
LOG_D(PHY," ------ PBCH ChannelComp/LLR: frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
......@@ -990,7 +986,7 @@ void pbch_pdcch_processing(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, nr
// Hold the channel estimates in frequency domain.
int32_t pdcch_est_size = ((((fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH))+15)/16)*16);
__attribute__ ((aligned(16))) int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
__attribute__((aligned(16))) c16_t pdcch_dl_ch_estimates[4 * fp->nb_antennas_rx][pdcch_est_size];
uint8_t dci_cnt = 0;
for(int n_ss = 0; n_ss<phy_pdcch_config->nb_search_space; n_ss++) {
......
......@@ -117,7 +117,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
nr_phy_data_t *phy_data,
int n_ss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
......
......@@ -377,8 +377,13 @@ int nr_ue_process_dci_indication_pdu(NR_UE_MAC_INST_t *mac,
{
dci_pdu_rel15_t *def_dci_pdu_rel15 = &mac->def_dci_pdu_rel15[slot][dci->dci_format];
LOG_D(MAC,"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
dci->rnti,dci->dci_format,dci->n_CCE,dci->payloadSize,*(unsigned long long*)dci->payloadBits);
LOG_D(MAC,
"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
dci->rnti,
dci->dci_format,
dci->n_CCE,
dci->payloadSize,
*(unsigned long long *)dci->payloadBits);
const int ret = nr_extract_dci_info(mac, dci->dci_format, dci->payloadSize, dci->rnti, dci->ss_type, (uint64_t *)dci->payloadBits, def_dci_pdu_rel15, slot);
if ((ret & 1) == 1)
return -1;
......
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