Commit c49f9144 authored by Francesco Mani's avatar Francesco Mani

Conflicts solved after merge with develop-nr and modifications to simulators to compile

parents 5a9fb475 43ff9ccf
......@@ -94,14 +94,21 @@ function build_on_vm {
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
fi
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
fi
echo "############################################################"
echo "Copying GIT repo into VM ($VM_NAME)"
......
......@@ -49,6 +49,35 @@ function create_usage {
echo ""
}
function acquire_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
local unlocked="0"
touch ${FlockFile} 2>/dev/null
if [[ $? -ne 0 ]]
then
echo "Cannot access lock file ${FlockFile}"
exit 2
fi
while [ $unlocked -eq 0 ]
do
exec 5>${FlockFile}
flock -nx 5
if [[ $? -ne 0 ]]
then
echo "Another instance of VM creation is running"
sleep 10
else
unlocked="1"
fi
done
chmod 666 ${FlockFile} 2>/dev/null
}
function release_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
rm -Rf ${FlockFile}
}
function create_vm {
echo "############################################################"
echo "OAI CI VM script"
......@@ -60,10 +89,12 @@ function create_vm {
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
}
......@@ -254,6 +254,7 @@ case $key in
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=8
BUILD_OPTIONS="--phy_simulators"
VM_MEMORY=4096
RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b"
NBARGS=$[$NBARGS+256]
shift
......@@ -332,6 +333,7 @@ case $key in
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=8
BUILD_OPTIONS="--phy_simulators"
VM_MEMORY=4096
RUN_OPTIONS="./run_exec_autotests.bash -g \"01510*\" -q -np -b"
NBARGS=$[$NBARGS+256]
;;
......
......@@ -441,10 +441,16 @@ function run_test_on_vm {
echo "############################################################"
echo "Creating test EPC VM ($EPC_VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $EPC_VM_NAME release=xenial --unsafe-caching
echo "Waiting for VM to be started"
uvt-kvm wait $EPC_VM_NAME --insecure
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $EPC_VM_NAME --insecure
fi
uvt-kvm wait $EPC_VM_NAME --insecure
EPC_VM_IP_ADDR=`uvt-kvm ip $EPC_VM_NAME`
echo "$EPC_VM_NAME has for IP addr = $EPC_VM_IP_ADDR"
scp -o StrictHostKeyChecking=no /etc/apt/apt.conf.d/01proxy ubuntu@$EPC_VM_IP_ADDR:/home/ubuntu
......
This diff is collapsed.
......@@ -1057,8 +1057,8 @@
(Test2: PBCH and synchronization, 106PBR),
(Test3: PBCH-only, 217 PRB),
(Test4: PBCH and synchronization, 217 RPB),
(Test5: PBCH-only, 217 PRB),
(Test6: PBCH and synchronization, 217 PRB)</desc>
(Test5: PBCH-only, 273 PRB),
(Test6: PBCH and synchronization, 273 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
......@@ -1067,16 +1067,55 @@
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
<main_exec_args>-s0 -S1 -n1000 -R106
-s0 -S1 -n10 -I -R106
-s0 -S1 -n1000 -R217 -N10
-s0 -S1 -n10 -I -R217 -N10
-s0 -S1 -n1000 -R273 -N20
-s0 -S1 -n10 -I -R273 -N20</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2</tags>
-s0 -S1 -n1000 -R217
-s0 -S1 -n10 -I -R217
-s0 -S1 -n1000 -R273
-s0 -S1 -n10 -I -R273</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2 nr_pbchsim.test3 nr_pbchsim.test4 nr_pbchsim.test5 nr_pbchsim.test6</tags>
<search_expr_true>PBCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015105">
<class>execution</class>
<desc>nr_dlsim Test cases. (Test1: 106 PRB),
(Test2: 217 PRB),
(Test3: 273 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_dlsim.Rel15</main_exec>
<main_exec_args>-n100 -R106
-n100 -R217
-n100 -R273</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3</tags>
<search_expr_true>PDCCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015106">
<class>execution</class>
<desc>nr_dlschsim Test cases. (Test1: 106 PRB),
(Test2: 217 PRB),
(Test3: 273 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_dlschsim.Rel15</main_exec>
<main_exec_args>-R 106 -m9 -s13 -n100
-R 217 -m15 -s15 -n100
-R 273 -m19 -s20 -n100</main_exec_args>
<tags>nr_dlschsim.test1 nr_dlschsim.test2 nr_dlschsim.test3</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110">
<class>execution</class>
......
......@@ -43,10 +43,10 @@ conf_nvram_path=$OPENAIR_DIR/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf
MSC_GEN=0
XFORMS="True"
UE_EXPANSION="False"
UESIM_EXPANSION="False"
PRINT_STATS="False"
VCD_TIMING="False"
DEADLINE_SCHEDULER_FLAG_USER="False"
FORCE_DEADLINE_SCHEDULER_FLAG_USER=""
DEADLINE_SCHEDULER_FLAG_USER=""
CPU_AFFINITY_FLAG_USER="False" #Only valid when lowlatecy flag is set to False
REL="Rel15"
NR_REL="NR_Rel15"
......@@ -78,7 +78,7 @@ trap handle_ctrl_c INT
function print_help() {
echo_info "
This program installs OpenAirInterface Software
You should have ubuntu 14.xx, updated, and the Linux kernel >= 3.14
You should have ubuntu 16.xx or 18.04 updated
Options
-h
This help
......@@ -116,7 +116,7 @@ Options
Rel8 limits the implementation to 3GPP Release 8 version
Rel10 limits the implementation to 3GPP Release 10 version
-w | --hardware
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, ADRV9371_ZC706, None (Default)
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, ADRV9371_ZC706, SIMU, None (Default)
Adds this RF board support (in external packages installation and in compilation)
-t | --transport protocol
ETHERNET , None
......@@ -175,6 +175,9 @@ Options
--basic-simulator
Generates a basic [1 UE + 1 eNB + no channel] simulator.
See targets/ARCH/tcp_bridge/README.tcp_bridge_oai for documentation.
--rfsimulator
Generate virtual RF driver
to use it, set the environement variable RFSIMULATOR to \"enb\" in the eNB and to the eNB IP address in the UEs
Usage (first build):
NI/ETTUS B201 + COTS UE : ./build_oai -I --eNB -x --install-system-files -w USRP
Usage (Regular):
......@@ -250,7 +253,7 @@ function main() {
-w | --hardware)
HW="$2" #"${i#*=}"
# Use OAI_USRP as the key word USRP is used inside UHD driver
if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" -a "$HW" != "ADRV9371_ZC706" ] ; then
if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" -a "$HW" != "ADRV9371_ZC706" -a "$HW" != "SIMU" ] ; then
echo_fatal "Unknown HW type $HW will exit..."
else
if [ "$HW" == "USRP" ] ; then
......@@ -265,6 +268,9 @@ function main() {
if [ "$HW" == "LMSSDR" ] ; then
HW="OAI_LMSSDR"
fi
if [ "$HW" == "SIMU" ] ; then
HW="OAI_SIMU"
fi
echo_info "Setting hardware to: $HW"
fi
shift 2;;
......@@ -332,11 +338,11 @@ function main() {
echo_info "Will build doxygen support"
shift;;
--disable-deadline)
FORCE_DEADLINE_SCHEDULER_FLAG_USER="False"
DEADLINE_SCHEDULER_FLAG_USER="False"
echo_info "Disabling the usage of deadline scheduler"
shift 1;;
--enable-deadline)
FORCE_DEADLINE_SCHEDULER_FLAG_USER="True"
DEADLINE_SCHEDULER_FLAG_USER="True"
echo_info "Enabling the usage of deadline scheduler"
shift 1;;
--enable-cpu-affinity)
......@@ -400,6 +406,10 @@ function main() {
BASIC_SIMULATOR=1
echo_info "Compiling the basic simulator"
shift 1;;
--rfsimulator)
RFSIMULATOR=true
echo_info "Compiling the RF simulator"
shift 1;;
-h | --help)
print_help
exit 1;;
......@@ -442,31 +452,16 @@ function main() {
fi
echo_info "RF HW set to $HW"
#Now we set flags to enable deadline scheduler settings
#By default: USRP: disable,
#By default: BLADERF: enable,
#By default: EXMIMO: enable
if [ "$FORCE_DEADLINE_SCHEDULER_FLAG_USER" = "" ]; then
if [ "$HW" = "EXMIMO" ] ; then
# If the user doesn't specify the Linux scheduler to use, we set a value
if [ "$DEADLINE_SCHEDULER_FLAG_USER" = "" ]; then
case "$HW" in
"EXMIMO")
DEADLINE_SCHEDULER_FLAG_USER="True"
elif [ "$HW" = "ETHERNET" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_USRP" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_ADRV9371_ZC706" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_BLADERF" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_LMSSDR" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "None" ] ; then
;;
*)
DEADLINE_SCHEDULER_FLAG_USER="False"
else
echo_error "Unknown HW type $HW. Exiting now..."
exit
fi
else
DEADLINE_SCHEDULER_FLAG_USER=$FORCE_DEADLINE_SCHEDULER_FLAG_USER
;;
esac
fi
#Disable CPU Affinity for deadline scheduler
......
#!/bin/bash
GENERATED_FULL_DIR=$1
shift
ASN1_SOURCE_DIR=$1
shift
export ASN1C_PREFIX=$1
shift
options=$*
done_flag="$GENERATED_FULL_DIR"/done
if [ "$done_flag" -ot $ASN1_SOURCE_DIR ] ; then
rm -f "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}*.c "$GENERATED_FULL_DIR"/${ASN1C_PREFIX}*.h
mkdir -p "$GENERATED_FULL_DIR"
asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example $options -D $GENERATED_FULL_DIR $ASN1_SOURCE_DIR |& egrep -v "^Copied|^Compiled" | sort -u
fi
touch $done_flag
......@@ -23,9 +23,16 @@
#ifndef BACKTRACE_H_
#define BACKTRACE_H_
#ifdef __cplusplus
extern "C" {
#endif
void display_backtrace(void);
void backtrace_handle_signal(siginfo_t *info);
#ifdef __cplusplus
}
#endif
#endif /* BACKTRACE_H_ */
#!/bin/sh
echo "building ctags for openair1 and openair2 ..."
ctags -e -R --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair2/RRC/CELLULAR/ --exclude=openair2/NAS/DRIVER/CELLULAR/ --exclude=openair2/SIMULATION/ --exclude=targets/DOCS/ --exclude=targets/PROJECTS/ openair1 openair2 openair3 targets cmake_targets common nfapi
ctags -e -R --exclude=openair1/DOCS/ --exclude=openair2/DOCS/ --exclude=openair1/SIMULATION/ --exclude=targets/DOCS/ --exclude=targets/PROJECTS/ openair1 openair2 openair3 targets cmake_targets common nfapi
......@@ -13,6 +13,9 @@
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
#define NFAPI_NR_MAX_NB_TCI_STATES_PDCCH 64
#define NFAPI_NR_MAX_NB_CORESETS 12
#define NFAPI_NR_MAX_NB_SEARCH_SPACES 40
// Extension to the generic structures for single tlv values
typedef struct {
......@@ -356,7 +359,8 @@ typedef enum {
typedef enum {
NFAPI_NR_CSET_CONFIG_MIB_SIB1=0,
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG, // implicit assumption of coreset Id other than 0
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG_CSET_0
} nfapi_nr_coreset_config_type_e;
typedef enum {
......@@ -364,6 +368,31 @@ typedef enum {
NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
} nfapi_nr_coreset_precoder_granularity_type_e;
typedef enum {
NFAPI_NR_QCL_TYPE_A=0,
NFAPI_NR_QCL_TYPE_B,
NFAPI_NR_QCL_TYPE_C,
NFAPI_NR_QCL_TYPE_D
} nfapi_nr_qcl_type_e;
typedef enum {
NFAPI_NR_SS_PERIODICITY_SL1=1,
NFAPI_NR_SS_PERIODICITY_SL2=2,
NFAPI_NR_SS_PERIODICITY_SL4=4,
NFAPI_NR_SS_PERIODICITY_SL5=5,
NFAPI_NR_SS_PERIODICITY_SL8=8,
NFAPI_NR_SS_PERIODICITY_SL10=10,
NFAPI_NR_SS_PERIODICITY_SL16=16,
NFAPI_NR_SS_PERIODICITY_SL20=20,
NFAPI_NR_SS_PERIODICITY_SL40=40,
NFAPI_NR_SS_PERIODICITY_SL80=80,
NFAPI_NR_SS_PERIODICITY_SL160=160,
NFAPI_NR_SS_PERIODICITY_SL320=320,
NFAPI_NR_SS_PERIODICITY_SL640=640,
NFAPI_NR_SS_PERIODICITY_SL1280=1280,
NFAPI_NR_SS_PERIODICITY_SL2560=2560
} nfapi_nr_search_space_monitoring_periodicity_e;
typedef enum {
NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_A=0,
NFAPI_NR_PDSCH_TIME_DOMAIN_ALLOC_TYPE_DEFAULT_B,
......@@ -496,9 +525,9 @@ typedef struct{
uint8_t css_format_2_2;
uint8_t css_format_2_3;
uint8_t uss_dci_formats;
uint8_t srs_monitoring_periodicity;
uint8_t slot_monitoring_periodicity;
uint8_t slot_monitoring_offset;
uint16_t srs_monitoring_periodicity;
uint16_t slot_monitoring_periodicity;
uint16_t slot_monitoring_offset;
uint16_t monitoring_symbols_in_slot;
uint16_t number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS];
} nfapi_nr_search_space_t;
......@@ -516,7 +545,7 @@ typedef struct {
uint8_t aggregation_level;
uint8_t n_rb;
uint8_t n_symb;
uint8_t rb_offset;
int8_t rb_offset;
uint8_t cr_mapping_type;
uint8_t reg_bundle_size;
uint8_t interleaver_size;
......
This diff is collapsed.
......@@ -467,33 +467,26 @@ void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f);
void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f);
uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
int nr_rate_matching_ldpc(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
uint8_t *w,
uint8_t *e,
uint8_t C,
uint8_t rvidx,
uint8_t Qm,
uint8_t Nl,
uint8_t r);
uint32_t E);
int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
int16_t *w,
int16_t *soft_input,
uint8_t C,
uint8_t rvidx,
uint8_t clear,
uint8_t Qm,
uint8_t Nl,
uint8_t r,
uint32_t *E_out);
uint32_t E);
decoder_if_t phy_threegpplte_turbo_decoder;
decoder_if_t phy_threegpplte_turbo_decoder8;
......
......@@ -117,7 +117,7 @@ struct nrPolar_params {
uint64_t cprime_tab1[32][256];
uint64_t B_tab0[32][256];
uint64_t B_tab1[32][256];
uint32_t* crc256Table;
uint32_t *crc256Table;
uint8_t **extended_crc_generator_matrix;
//lowercase: bits, Uppercase: Bits stored in bytes
//polar_encoder vectors
......@@ -136,51 +136,50 @@ struct nrPolar_params {
decoder_tree_t tree;
} __attribute__ ((__packed__));
typedef struct nrPolar_params t_nrPolar_params;
typedef t_nrPolar_params *t_nrPolar_paramsPtr;
void polar_encoder(uint32_t *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams);
t_nrPolar_params *polarParams);
void polar_encoder_dci(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
t_nrPolar_params *polarParams,
uint16_t n_RNTI);
void polar_encoder_fast(uint64_t *A,
uint32_t *out,
int32_t crcmask,
t_nrPolar_paramsPtr polarParams);
t_nrPolar_params *polarParams);
int8_t polar_decoder(double *input,
uint8_t *output,
t_nrPolar_paramsPtr polarParams,
t_nrPolar_params *polarParams,
uint8_t listSize,
uint8_t pathMetricAppr);
uint32_t polar_decoder_int16(int16_t *input,
uint64_t *out,
t_nrPolar_params *polarParams);
const t_nrPolar_params *polarParams);
int8_t polar_decoder_aPriori(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
t_nrPolar_params *polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload);
int8_t polar_decoder_aPriori_timing(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
t_nrPolar_params *polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
double *aPrioriPayload,
double cpuFreqGHz,
FILE* logFile);
FILE *logFile);
int8_t polar_decoder_dci(double *input,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
t_nrPolar_params *polarParams,
uint8_t listSize,
uint8_t pathMetricAppr,
uint16_t n_RNTI);
......@@ -189,26 +188,20 @@ void generic_polar_decoder(t_nrPolar_params *,
decoder_node_t *);
void build_decoder_tree(t_nrPolar_params *pp);
void build_polar_tables(t_nrPolar_paramsPtr polarParams);
void build_polar_tables(t_nrPolar_params *polarParams);
void init_polar_deinterleaver_table(t_nrPolar_params *polarParams);
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level);
void nr_polar_print_polarParams(t_nrPolar_paramsPtr polarParams);
void nr_polar_print_polarParams(t_nrPolar_params *polarParams);
t_nrPolar_paramsPtr nr_polar_params (t_nrPolar_paramsPtr polarParams,
int8_t messageType,
t_nrPolar_params *nr_polar_params ( int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level);
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level);
uint8_t** nr_polar_kronecker_power_matrices(uint8_t n);
uint8_t **nr_polar_kronecker_power_matrices(uint8_t n);
const uint16_t* nr_polar_sequence_pattern(uint8_t n);
const uint16_t *nr_polar_sequence_pattern(uint8_t n);
/*!@fn uint32_t nr_polar_output_length(uint16_t K, uint16_t E, uint8_t n_max)
* @brief Computes...
......@@ -389,16 +382,14 @@ uint8_t **crc6_generator_matrix(uint16_t payloadSizeBits);
static inline void nr_polar_interleaver(uint8_t *input,
uint8_t *output,
uint16_t *pattern,
uint16_t size)
{
uint16_t size) {
for (int i=0; i<size; i++) output[i]=input[pattern[i]];
}
static inline void nr_polar_deinterleaver(uint8_t *input,
uint8_t *output,
uint16_t *pattern,
uint16_t size)
{
uint16_t size) {
for (int i=0; i<size; i++) {
output[pattern[i]]=input[i];
}
......
......@@ -37,16 +37,14 @@
#include "PHY/NR_TRANSPORT/nr_dci.h"
static int intcmp(const void *p1,const void *p2) {
return(*(int16_t*)p1 > *(int16_t*)p2);
return(*(int16_t *)p1 > *(int16_t *)p2);
}
void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
static void nr_polar_init(t_nrPolar_params * *polarParams,
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level)
{
t_nrPolar_paramsPtr currentPtr = *polarParams;
uint8_t aggregation_level) {
t_nrPolar_params *currentPtr = *polarParams;
uint16_t aggregation_prime = nr_polar_aggregation_prime(aggregation_level);
//Parse the list. If the node is already created, return without initialization.
......@@ -58,10 +56,9 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
// printf("currentPtr %p (polarParams %p)\n",currentPtr,polarParams);
//Else, initialize and add node to the end of the linked list.
t_nrPolar_paramsPtr newPolarInitNode = malloc(sizeof(t_nrPolar_params));
t_nrPolar_params *newPolarInitNode = malloc(sizeof(t_nrPolar_params));
if (newPolarInitNode != NULL) {
newPolarInitNode->idx = (messageType * messageLength * aggregation_prime);
newPolarInitNode->nextPtr = NULL;
//printf("newPolarInitNode->idx %d, (%d,%d,%d:%d)\n",newPolarInitNode->idx,messageType,messageLength,aggregation_prime,aggregation_level);
......@@ -93,7 +90,6 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->crc_generator_matrix=crc24c_generator_matrix(newPolarInitNode->payloadBits+newPolarInitNode->crcParityBits);//G_P
//printf("Initializing polar parameters for DCI (K %d, E %d, L %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength,aggregation_level);
} else if (messageType == -1) { //UCI
} else {
AssertFatal(1 == 0, "[nr_polar_init] Incorrect Message Type(%d)", messageType);
}
......@@ -102,31 +98,25 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->N = nr_polar_output_length(newPolarInitNode->K, newPolarInitNode->encoderLength, newPolarInitNode->n_max);
newPolarInitNode->n = log2(newPolarInitNode->N);
newPolarInitNode->G_N = nr_polar_kronecker_power_matrices(newPolarInitNode->n);
//polar_encoder vectors:
newPolarInitNode->nr_polar_crc = malloc(sizeof(uint8_t) * newPolarInitNode->crcParityBits);
newPolarInitNode->nr_polar_aPrime = malloc(sizeof(uint8_t) * ((ceil((newPolarInitNode->payloadBits)/32.0)*4)+3));
newPolarInitNode->nr_polar_APrime = malloc(sizeof(uint8_t) * newPolarInitNode->K);
newPolarInitNode->nr_polar_D = malloc(sizeof(uint8_t) * newPolarInitNode->N);
newPolarInitNode->nr_polar_E = malloc(sizeof(uint8_t) * newPolarInitNode->encoderLength);
//Polar Coding vectors
newPolarInitNode->nr_polar_U = malloc(sizeof(uint8_t) * newPolarInitNode->N); //Decoder: nr_polar_uHat
newPolarInitNode->nr_polar_CPrime = malloc(sizeof(uint8_t) * newPolarInitNode->K); //Decoder: nr_polar_cHat
newPolarInitNode->nr_polar_B = malloc(sizeof(uint8_t) * newPolarInitNode->K); //Decoder: nr_polar_bHat
newPolarInitNode->nr_polar_A = malloc(sizeof(uint8_t) * newPolarInitNode->payloadBits); //Decoder: nr_polar_aHat
newPolarInitNode->Q_0_Nminus1 = nr_polar_sequence_pattern(newPolarInitNode->n);
newPolarInitNode->interleaving_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->K);
nr_polar_interleaving_pattern(newPolarInitNode->K,
newPolarInitNode->i_il,
newPolarInitNode->interleaving_pattern);
newPolarInitNode->deinterleaving_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->K);
for (int i=0;i<newPolarInitNode->K;i++)
for (int i=0; i<newPolarInitNode->K; i++)
newPolarInitNode->deinterleaving_pattern[newPolarInitNode->interleaving_pattern[i]] = i;
newPolarInitNode->rate_matching_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->encoderLength);
......@@ -137,13 +127,14 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->K,
newPolarInitNode->N,
newPolarInitNode->encoderLength);
newPolarInitNode->information_bit_pattern = malloc(sizeof(uint8_t) * newPolarInitNode->N);
newPolarInitNode->Q_I_N = malloc(sizeof(int16_t) * (newPolarInitNode->K + newPolarInitNode->n_pc));
newPolarInitNode->Q_F_N = malloc( sizeof(int16_t) * (newPolarInitNode->N + 1)); // Last element shows the final array index assigned a value.
newPolarInitNode->Q_PC_N = malloc( sizeof(int16_t) * (newPolarInitNode->n_pc));
for (int i = 0; i <= newPolarInitNode->N; i++)
newPolarInitNode->Q_F_N[i] = -1; // Empty array.
nr_polar_info_bit_pattern(newPolarInitNode->information_bit_pattern,
newPolarInitNode->Q_I_N,
newPolarInitNode->Q_F_N,
......@@ -154,81 +145,63 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
newPolarInitNode->encoderLength,
newPolarInitNode->n_pc);
// sort the Q_I_N array in ascending order (first K positions)
qsort((void*)newPolarInitNode->Q_I_N,newPolarInitNode->K,sizeof(int16_t),intcmp);
qsort((void *)newPolarInitNode->Q_I_N,newPolarInitNode->K,sizeof(int16_t),intcmp);
newPolarInitNode->channel_interleaver_pattern = malloc(sizeof(uint16_t) * newPolarInitNode->encoderLength);
nr_polar_channel_interleaver_pattern(newPolarInitNode->channel_interleaver_pattern,
newPolarInitNode->i_bil,
newPolarInitNode->encoderLength);
free(J);
build_decoder_tree(newPolarInitNode);
build_polar_tables(newPolarInitNode);
init_polar_deinterleaver_table(newPolarInitNode);
//printf("decoder tree nodes %d\n",newPolarInitNode->tree.num_nodes);
} else {
AssertFatal(1 == 0, "[nr_polar_init] New t_nrPolar_paramsPtr could not be created");
}
currentPtr = *polarParams;
//If polarParams is empty:
if (currentPtr == NULL)
{
*polarParams = newPolarInitNode;
//printf("Creating first polarParams entry index %d, %p\n",newPolarInitNode->idx,*polarParams);
return;
AssertFatal(1 == 0, "[nr_polar_init] New t_nrPolar_params * could not be created");
}
//Else, add node to the end of the linked list.
while (currentPtr->nextPtr != NULL) {
currentPtr = currentPtr->nextPtr;
}
currentPtr->nextPtr= newPolarInitNode;
printf("Adding new polarParams entry to list index %d,%p\n",
newPolarInitNode->idx,
currentPtr->nextPtr);
//Fixme: the list is not thread safe
//The defect is not critical: we always append (never delete items) and adding two times the same is fine
newPolarInitNode->nextPtr=*polarParams;
*polarParams=newPolarInitNode;
return;
}
void nr_polar_print_polarParams(t_nrPolar_paramsPtr polarParams)
{
void nr_polar_print_polarParams(t_nrPolar_params *polarParams) {
uint8_t i = 0;
if (polarParams == NULL) {
printf("polarParams is empty.\n");
} else {
while (polarParams != NULL){
while (polarParams != NULL) {
printf("polarParams[%d] = %d\n", i, polarParams->idx);
polarParams = polarParams->nextPtr;
i++;
}
}
return;
}
t_nrPolar_paramsPtr nr_polar_params (t_nrPolar_paramsPtr polarParams,
int8_t messageType,
t_nrPolar_params *nr_polar_params ( int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level)
{
t_nrPolar_paramsPtr currentPtr = NULL;
uint8_t aggregation_level) {
static t_nrPolar_params *polarList = NULL;
nr_polar_init(&polarList, messageType,messageLength,aggregation_level);
t_nrPolar_params *polarParams=polarList;
const int tag=messageType * messageLength * nr_polar_aggregation_prime(aggregation_level);
while (polarParams != NULL) {
if (polarParams->idx ==
(messageType * messageLength * (nr_polar_aggregation_prime(aggregation_level)) )) {
currentPtr = polarParams;
break;
} else {
if (polarParams->idx == tag)
return polarParams;
polarParams = polarParams->nextPtr;
}
}
return currentPtr;
AssertFatal(false,"Polar Init tables internal failure\n");
return NULL;
}
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level)
{
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level) {
if (aggregation_level == 0) return 0;
else if (aggregation_level == 1) return NR_POLAR_AGGREGATION_LEVEL_1_PRIME;
else if (aggregation_level == 2) return NR_POLAR_AGGREGATION_LEVEL_2_PRIME;
......
......@@ -63,25 +63,22 @@ void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f)
}
uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
int nr_rate_matching_ldpc(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
uint8_t *w,
uint8_t *e,
uint8_t C,
uint8_t rvidx,
uint8_t Qm,
uint8_t Nl,
uint8_t r)
uint32_t E)
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
//uint8_t *e2;
uint32_t Ncb,ind,k,Nref,N;
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
if (C==0) {
printf("nr_rate_matching: invalid parameters (C %d\n",C);
return -1;
}
//Bit selection
N = (BG==1)?(66*Z):(50*Z);
......@@ -93,25 +90,12 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
Ncb = min(N, Nref);
}
#ifdef RM_DEBUG
printf("nr_rate_matching: Ncb %d, rvidx %d, G %d, Qm %d, Nl%d, r %d\n",Ncb,rvidx, G, Qm,Nl,r);
#endif
Cprime = C; //assume CBGTI not present
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
E = Nl*Qm*((G/(Nl*Qm*Cprime))+1);
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
#ifdef RM_DEBUG
printf("nr_rate_matching: E %d, k0 %d Cprime %d modcprime %d\n",E,ind, Cprime,((G/(Nl*Qm))%Cprime));
printf("nr_rate_matching_ldpc: E %d, k0 %d, Ncb %d, rvidx %d\n", E, ind, Ncb, rvidx);
#endif
//e2 = e;
k=0;
for (; (ind<Ncb)&&(k<E); ind++) {
......@@ -120,7 +104,6 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
//if (w[ind] != NR_NULL) e2[k++]=w[ind];
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
......@@ -131,47 +114,36 @@ uint32_t nr_rate_matching_ldpc(uint8_t Ilbrm,
printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
#endif
//if (w[ind] != NR_NULL) e2[k++]=w[ind];
if (w[ind] != NR_NULL) e[k++]=w[ind];
}
}
return(E);
return 0;
}
int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
uint32_t Tbslbrm,
uint8_t BG,
uint16_t Z,
uint32_t G,
int16_t *w,
int16_t *soft_input,
uint8_t C,
uint8_t rvidx,
uint8_t clear,
uint8_t Qm,
uint8_t Nl,
uint8_t r,
uint32_t *E_out)
uint32_t E)
{
uint8_t Cprime;
uint32_t Ncb,E,ind,k,Nref,N;
int16_t *soft_input2;
uint32_t Ncb,ind,k,Nref,N;
#ifdef RM_DEBUG
int nulled=0;
#endif
if (C==0 || Qm==0 || Nl==0) {
printf("nr_rate_matching: invalid parameters (C %d, Qm %d, Nl %d\n",C,Qm,Nl);
return(-1);
if (C==0) {
printf("nr_rate_matching: invalid parameters (C %d\n",C);
return -1;
}
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
//Bit selection
N = (BG==1)?(66*Z):(50*Z);
......@@ -182,28 +154,20 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
Ncb = min(N, Nref);
}
Cprime = C; //assume CBGTI not present
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
E = Nl*Qm*((G/(Nl*Qm*Cprime))+1);
ind = (index_k0[BG-1][rvidx]*Ncb/N)*Z;
#ifdef RM_DEBUG
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, Ncb %d,rvidx %d, G %d, Qm %d, Nl%d, r %d\n",clear,E,Ncb,rvidx, G, Qm,Nl,r);
printf("nr_rate_matching_ldpc_rx: Clear %d, E %d, k0 %d, Ncb %d, rvidx %d\n", clear, E, ind, Ncb, rvidx);
#endif
if (clear==1)
memset(w,0,Ncb*sizeof(int16_t));
soft_input2 = soft_input;
k=0;
for (; (ind<Ncb)&&(k<E); ind++) {
if (soft_input2[ind] != NR_NULL) {
w[ind] += soft_input2[k++];
if (soft_input[ind] != NR_NULL) {
w[ind] += soft_input[k++];
#ifdef RM_DEBUG
printf("RM_RX k%d Ind: %d (%d)\n",k-1,ind,w[ind]);
#endif
......@@ -220,10 +184,10 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
while(k<E) {
for (ind=0; (ind<Ncb)&&(k<E); ind++) {
if (soft_input2[ind] != NR_NULL) {
w[ind] += soft_input2[k++];
if (soft_input[ind] != NR_NULL) {
w[ind] += soft_input[k++];
#ifdef RM_DEBUG
printf("RM_RX k%d Ind: %d (%d)(soft in %d)\n",k-1,ind,w[ind],soft_input2[k-1]);
printf("RM_RX k%d Ind: %d (%d)(soft in %d)\n",k-1,ind,w[ind],soft_input[k-1]);
#endif
}
......@@ -237,7 +201,5 @@ int nr_rate_matching_ldpc_rx(uint8_t Ilbrm,
}
}
*E_out = E;
return(0);
return 0;
}
This diff is collapsed.
......@@ -919,7 +919,7 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue,int abstraction_flag) {
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
for (j=0; j<2; j++) {
for (k=0; k<2; k++) {
for (k=0; k<RX_NB_TH_MAX; k++) {
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[i][j]);
......
......@@ -54,13 +54,19 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
//int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset+516;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;//+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
uint16_t nb_rb_coreset = 0;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;//+516;
uint16_t nb_rb_pdsch = 50;
uint8_t p=0;
uint8_t l0 = 2;
uint8_t l0 = pdcch_vars->coreset[0].duration;
uint64_t coreset_freq_dom = pdcch_vars->coreset[0].frequencyDomainResources;
for (int i = 0; i < 45; i++) {
if (((coreset_freq_dom & 0x1FFFFFFFFFFF) >> i) & 0x1) nb_rb_coreset++;
}
nb_rb_coreset = 6 * nb_rb_coreset;
//printf("corset duration %d nb_rb_coreset %d\n", l0, nb_rb_coreset);
void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
......@@ -104,9 +110,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
if (no_prefix) {
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot*frame_parms->slots_per_subframe) * (Ns>>1);
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot) * (Ns);
} else {
slot_offset = (frame_parms->samples_per_subframe) * (Ns>>1);
slot_offset = (frame_parms->samples_per_slot) * (Ns);
}
/*if (l<0 || l>=7-frame_parms->Ncp) {
......@@ -122,7 +128,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 - SOFFSET;
// Align with 256 bit
......@@ -130,8 +136,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_FEP
// if (ue->frame <100)
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples);
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
#endif
if (l==0) {
......@@ -146,14 +152,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *)&common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
......@@ -175,11 +181,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
......
......@@ -32,6 +32,7 @@
//#define NR_PBCH_DMRS_LENGTH_DWORD 5
//#define NR_PBCH_DMRS_LENGTH 144
//#define DEBUG_PDCCH
#include "refsig_defs_ue.h"
#include "PHY/defs_nr_UE.h"
......
This diff is collapsed.
......@@ -30,12 +30,11 @@ typedef unsigned __int128 uint128_t;
uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
nfapi_nr_rnti_type_e rnti_type,
uint16_t N_RB,
nfapi_nr_config_request_t* config);
nfapi_nr_config_request_t *config);
uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
t_nrPolar_paramsPtr *nrPolar_params,
uint32_t **gold_pdcch_dmrs,
int32_t* txdataF,
int32_t *txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_config_request_t config);
......@@ -44,7 +43,7 @@ void nr_pdcch_scrambling(uint32_t *in,
uint16_t size,
uint32_t Nid,
uint32_t n_RNTI,
uint32_t* out);
uint32_t *out);
void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
int frame,
......@@ -54,7 +53,7 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
nfapi_nr_dl_config_dci_dl_pdu *pdu,
nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu);
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m);
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t *dci_alloc, uint16_t n_shift, uint8_t m);
#endif //__PHY_NR_TRANSPORT_DCI__H
This diff is collapsed.
......@@ -338,11 +338,9 @@ ap, Wt[0], Wt[1], Wf[0], Wf[1], delta, l_prime[0], l0, dmrs_symbol);
for (int l=rel15->start_symbol; l<rel15->start_symbol+rel15->nb_symbols; l++) {
k = start_sc;
for (int i=0; i<rel15->n_prb*NR_NB_SC_PER_RB; i++) {
// Note the dmrs index modulo 2048 only works for that symbol size -- to be fixed soon
// Also the different amplitudes are for debug purposes and temporary
if ((l == dmrs_symbol) && (k == ((start_sc+get_pdsch_dmrs_idx(n, k_prime, delta, dmrs_type))&((1<<11)-1)))) {
((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*(amp>>1)*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*(amp>>1)*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
if ((l == dmrs_symbol) && (k == ((start_sc+get_pdsch_dmrs_idx(n, k_prime, delta, dmrs_type))%(frame_parms.ofdm_symbol_size)))) {
((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1],
......@@ -356,8 +354,8 @@ dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_s
else {
((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = ((amp<<1) * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = ((amp<<1) * tx_layers[ap][(m<<1) + 1]) >> 15;
((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[(l*frame_parms.ofdm_symbol_size + k)<<1],
......
......@@ -90,6 +90,8 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
@param nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs */
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs,uint8_t Qm, uint8_t Nl);
uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r);
void free_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
void clean_gNB_dlsch(NR_gNB_DLSCH_t *dlsch);
......
......@@ -280,7 +280,7 @@ int nr_dlsch_encoding(unsigned char *a,
uint32_t A, Z;
uint32_t *pz = &Z;
uint8_t mod_order = rel15.modulation_order;
uint16_t Kr=0,r,r_offset=0;//Kr_bytes
uint16_t Kr=0,r,r_offset=0,Kr_bytes;
uint8_t *d_tmp[MAX_NUM_DLSCH_SEGMENTS];
uint8_t kb,BG=1;
uint32_t E;
......@@ -346,7 +346,7 @@ int nr_dlsch_encoding(unsigned char *a,
}
Kr = dlsch->harq_processes[harq_pid]->K;
//Kr_bytes = Kr>>3;
Kr_bytes = Kr>>3;
//printf("segment Z %d kb %d k %d Kr %d BG %d\n", *pz,kb,dlsch->harq_processes[harq_pid]->K,Kr,BG);
......@@ -403,25 +403,24 @@ int nr_dlsch_encoding(unsigned char *a,
//start_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING
printf("rvidx in encoding = %d\n", dlsch->harq_processes[harq_pid]->rvidx);
printf("rvidx in encoding = %d\n", rel15.redundancy_version);
#endif
E = nr_rate_matching_ldpc(Ilbrm,
E = nr_get_E(G, dlsch->harq_processes[harq_pid]->C, mod_order, rel15.nb_layers, r);
nr_rate_matching_ldpc(Ilbrm,
Tbslbrm,
BG,
*pz,
G,
dlsch->harq_processes[harq_pid]->d[r],
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->C,
rel15.redundancy_version,
mod_order,
rel15.nb_layers,
r);
E);
#ifdef DEBUG_DLSCH_CODING
for (int i =0; i<16; i++)
printf("output ratematching e[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->e[i], r_offset);
printf("output ratematching e[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->e[i+r_offset], r_offset);
#endif
//stop_meas(rm_stats);
......@@ -432,18 +431,15 @@ int nr_dlsch_encoding(unsigned char *a,
dlsch->harq_processes[harq_pid]->f+r_offset);
//stop_meas(i_stats);
r_offset += E;
#ifdef DEBUG_DLSCH_CODING
for (int i =0; i<16; i++)
printf("output interleaving f[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->f[i+r*r_offset], r_offset);
#endif
#ifdef DEBUG_DLSCH_CODING
printf("output interleaving f[%d]= %d r_offset %d\n", i,dlsch->harq_processes[harq_pid]->f[i+r_offset], r_offset);
if (r==dlsch->harq_processes[harq_pid]->C-1)
write_output("enc_output.m","enc",dlsch->harq_processes[harq_pid]->f,r_offset,1,4);
write_output("enc_output.m","enc",dlsch->harq_processes[harq_pid]->f,G,1,4);
#endif
r_offset += E;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
......
This diff is collapsed.
......@@ -176,3 +176,18 @@ uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16
G = ((NR_NB_SC_PER_RB*nb_symb_sch)-(nb_re_dmrs*length_dmrs))*nb_rb*Qm*Nl;
return(G);
}
uint32_t nr_get_E(uint32_t G, uint8_t C, uint8_t Qm, uint8_t Nl, uint8_t r) {
uint32_t E;
uint8_t Cprime = C; //assume CBGTI not present
AssertFatal(Nl>0,"Nl is 0\n");
AssertFatal(Qm>0,"Qm is 0\n");
if (r <= Cprime - ((G/(Nl*Qm))%Cprime) - 1)
E = Nl*Qm*(G/(Nl*Qm*Cprime));
else
E = Nl*Qm*((G/(Nl*Qm*Cprime))+1);
return E;
}
......@@ -36,7 +36,7 @@ int nr_generate_pss( int16_t *d_pss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
nfapi_nr_config_request_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
......@@ -49,7 +49,7 @@ int nr_generate_sss( int16_t *d_sss,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
nfapi_nr_config_request_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
......@@ -62,7 +62,7 @@ int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t *txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
nfapi_nr_config_request_t* config,
nfapi_nr_config_request_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
......@@ -85,7 +85,6 @@ void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
@returns 0 on success
*/
int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t *txdataF,
......@@ -95,7 +94,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t Lmax,
uint8_t ssb_index,
int sfn,
nfapi_nr_config_request_t* config,
nfapi_nr_config_request_t *config,
NR_DL_FRAME_PARMS *frame_parms);
/*!
......
......@@ -29,6 +29,7 @@
#include "filt16a_32.h"
#include "T.h"
//#define DEBUG_PDSCH
//#define DEBUG_PDCCH
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
......@@ -271,8 +272,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = 1;
ue->frame_parms.nushift = nushift;
......@@ -287,7 +288,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
......@@ -459,16 +460,16 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
break;
}
if( (Ns== 2) && (l == 0))
if( (Ns== 1) && (l == 0))
{
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_eNB; p++) {
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns>>1], l);
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns], l);
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
}
}
}
......@@ -496,8 +497,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = (p>>1)&1;
ue->frame_parms.nushift = nushift;
......
This diff is collapsed.
......@@ -64,17 +64,10 @@ int8_t *nr_delta_PUCCH_lut = nr_delta_PUSCH_acc;
#ifdef NR_PDCCH_DCI_TOOLS
uint16_t nr_dci_field(uint32_t dci_pdu[4],
uint16_t nr_dci_field(uint64_t dci_pdu[2],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS],
uint8_t dci_field)
{
// uint16_t field_value = 0 ;
// first_bit_position contains the position of the first bit of the corresponding field within the dci pdu payload
// last_bit_position contains the position of the last bit of the corresponding field within the dci pdu payload
// uint16_t last_bit_position = 0;
// uint8_t bit=0;
//printf("\tdci_field=%d, \tsize=%d \t|",dci_field,dci_fields_sizes[dci_field]);
int dci_size=0;
for (int i=0;i<NBR_NR_DCI_FIELDS;i++) dci_size+=dci_fields_sizes[i];
......@@ -87,25 +80,13 @@ uint16_t nr_dci_field(uint32_t dci_pdu[4],
for (int i=0; i<=dci_field ; i++){
first_bit_position = first_bit_position - dci_fields_sizes[i];
}
// last_bit_position = first_bit_position + dci_fields_sizes[dci_field];
//printf("\tfirst_bit=%d,\tlast_bit=%d",first_bit_position,last_bit_position);
/*
for (int i=0; i<4; i++)
for (int j=0; j<32; j++){
if ((((i*32)+j) >= first_bit_position) && (((i*32)+j) < last_bit_position)){
bit = (dci_pdu[i]<<(31-j))>>31;
field_value = (field_value<<1) + bit;
//printf(" bit(%d)=%d[%d] ",(i*32)+j,bit,field_value);
}
}
*/
uint64_t *dci_pdu64=(uint64_t*)&dci_pdu[0];
/*
printf("pdu %llx, field %d, pos %d, size %d => %u\n",(long long unsigned int)*dci_pdu64,dci_field,first_bit_position,dci_fields_sizes[dci_field],
(unsigned int)((*dci_pdu64>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1)));*/
/*uint16_t tmp1 = ((*dci_pdu>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1));
uint16_t tmp2 = 0;
for (int i=0; i<dci_fields_sizes[dci_field]; i++)
tmp2 |= ((tmp1>>i)&1)<<(dci_fields_sizes[dci_field]-i-1);*/
return (uint16_t)((*dci_pdu64>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1));
return ((uint16_t)(*dci_pdu>>first_bit_position)&((1<<dci_fields_sizes[dci_field])-1));
}
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
......@@ -113,7 +94,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
uint32_t dci_pdu[4],
uint64_t dci_pdu[2],
NR_DCI_INFO_EXTRACTED_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DL_UE_HARQ_t *pdlsch0_harq,
......@@ -312,8 +293,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// uint8_t sizes_count=0;
// uint8_t left_shift=0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Entering function nr_extract_dci_info() with dci_pdu=%x %x %x %x dci_length=%d\n",
dci_pdu[0],dci_pdu[1],dci_pdu[2],dci_pdu[3], dci_length);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Entering function nr_extract_dci_info() with dci_pdu=%lx %lx dci_length=%d\n",
dci_pdu[0],dci_pdu[1], dci_length);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> for format %d, dci_fields_sizes {",dci_format);
for (int i=0; i<NBR_NR_DCI_FIELDS; i++) printf("%d ",dci_fields_sizes[i][dci_format]);
printf("}\n");
......@@ -1040,7 +1021,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
uint32_t dci_pdu[4],
uint64_t dci_pdu[2],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
......@@ -1074,8 +1055,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t status=0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> dci_format=%d, rnti=%d, dci_length=%d, dci_pdu[0]=%x, dci_pdu[2]=%x, dci_pdu[2]=%x, dci_pdu[3]=%x\n",
dci_format,rnti,dci_length,dci_pdu[0],dci_pdu[1],dci_pdu[2],dci_pdu[3]);
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> dci_format=%d, rnti=%d, dci_length=%d, dci_pdu[0]=0x%lx, dci_pdu[1]=0x%lx\n",
dci_format,rnti,dci_length,dci_pdu[0],dci_pdu[1]);
#endif
......
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