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Commit c7dd406b authored by Florian Kaltenberger's avatar Florian Kaltenberger
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first try to make UE slot based. WIP

parent 70e7e661
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Showing with 808 additions and 2390 deletions
cmake_targets/autotests/test_case_list.xml
View file @ c7dd406b
......@@ -1057,8 +1057,8 @@
(Test2: PBCH and synchronization, 106PBR),
(Test3: PBCH-only, 217 PRB),
(Test4: PBCH and synchronization, 217 RPB),
(Test5: PBCH-only, 217 PRB),
(Test6: PBCH and synchronization, 217 PRB)</desc>
(Test5: PBCH-only, 273 PRB),
(Test6: PBCH and synchronization, 273 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
......
openair1/PHY/INIT/nr_init_ue.c
View file @ c7dd406b
......@@ -1020,10 +1020,6 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms->numerology_index = 0;
frame_parms->ttis_per_subframe = 1;
frame_parms->slots_per_tti = 2;
//}
......
openair1/PHY/MODULATION/slot_fep_nr.c
View file @ c7dd406b
......@@ -46,7 +46,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
NR_UE_COMMON *common_vars = &ue->common_vars;
uint8_t eNB_id = 0;//ue_common_vars->eNb_id;
unsigned char aa;
unsigned char symbol = l;//+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
unsigned char symbol = l;
unsigned int nb_prefix_samples = (no_prefix ? 0 : frame_parms->nb_prefix_samples);
unsigned int nb_prefix_samples0 = (no_prefix ? 0 : frame_parms->nb_prefix_samples0);
//unsigned int subframe_offset;//,subframe_offset_F;
......@@ -104,9 +104,9 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
}
if (no_prefix) {
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot*frame_parms->slots_per_subframe) * (Ns>>1);
slot_offset = frame_parms->ofdm_symbol_size * (frame_parms->symbols_per_slot) * (Ns);
} else {
slot_offset = (frame_parms->samples_per_subframe) * (Ns>>1);
slot_offset = (frame_parms->samples_per_slot) * (Ns);
}
/*if (l<0 || l>=7-frame_parms->Ncp) {
......@@ -122,7 +122,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
memset(&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],0,frame_parms->ofdm_symbol_size*sizeof(int));
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 - SOFFSET;
// Align with 256 bit
......@@ -130,7 +130,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_FEP
// if (ue->frame <100)
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[Ns%RX_NB_TH].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples);
#endif
......@@ -146,14 +146,14 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *)&common_vars->rxdata[aa][rx_offset % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
#if UE_TIMING_TRACE
start_meas(&ue->rx_dft_stats);
#endif
dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
#endif
......@@ -175,11 +175,11 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
(void *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
frame_parms->ofdm_symbol_size*sizeof(int));
dft((int16_t *)tmp_dft_in,
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
} else { // use dft input from RX buffer directly
dft((int16_t *)&common_vars->rxdata[aa][(rx_offset) % frame_length_samples],
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
(int16_t *)&common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF[aa][frame_parms->ofdm_symbol_size*symbol],1);
}
#if UE_TIMING_TRACE
stop_meas(&ue->rx_dft_stats);
......@@ -190,7 +190,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_FEP
// if (ue->frame <100)
printf("slot_fep: frame %d: symbol %d rx_offset %d\n", ue->proc.proc_rxtx[(Ns)&1].frame_rx, symbol,rx_offset);
printf("slot_fep: frame %d: symbol %d rx_offset %d\n", ue->proc.proc_rxtx[(Ns)&RX_NB_TH].frame_rx, symbol,rx_offset);
#endif
}
......
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
View file @ c7dd406b
......@@ -271,8 +271,8 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = 1;
ue->frame_parms.nushift = nushift;
......@@ -287,7 +287,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_PDCCH
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
......@@ -464,11 +464,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_eNB; p++) {
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns>>1], l);
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns], l);
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
}
}
}
......@@ -496,8 +496,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns>>1]].rxdataF;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = (p>>1)&1;
ue->frame_parms.nushift = nushift;
......
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
View file @ c7dd406b
......@@ -1153,7 +1153,7 @@ uint8_t nr_subframe2harq_pid(NR_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8
*/
uint8_t ret = 255;
uint8_t subframe = nr_tti_rx>>((int)(log2 (frame_parms->ttis_per_subframe)));
uint8_t subframe = nr_tti_rx>>((int)(log2 (frame_parms->slots_per_subframe)));
if (frame_parms->frame_type == FDD) {
ret = (((frame<<1)+nr_tti_rx)&7);
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @ c7dd406b
......@@ -204,7 +204,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
......@@ -265,14 +265,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations);
}
/*if (nr_tti_rx> (10*frame_parms->ttis_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_tti_rx);
/*if (nr_slot_rx> (10*frame_parms->slots_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_slot_rx);
return(dlsch->max_ldpc_iterations);
}*/
/*if (harq_process->harq_ack.ack != 2) {
LOG_D(PHY, "[UE %d] DLSCH @ SF%d : ACK bit is %d instead of DTX even before PDSCH is decoded!\n",
phy_vars_ue->Mod_id, nr_tti_rx, harq_process->harq_ack.ack);
phy_vars_ue->Mod_id, nr_slot_rx, harq_process->harq_ack.ack);
}*/
// nb_rb = dlsch->nb_rb;
......@@ -472,7 +472,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
start_meas(dlsch_turbo_decoding_stats);
#endif
//LOG_E(PHY,"AbsSubframe %d.%d Start turbo segment %d/%d A %d ",frame%1024,nr_tti_rx,r,harq_process->C-1, A);
//LOG_E(PHY,"AbsSubframe %d.%d Start turbo segment %d/%d A %d ",frame%1024,nr_slot_rx,r,harq_process->C-1, A);
//printf("harq process dr iteration %d\n", p_decParams->numMaxIter);
......@@ -570,23 +570,23 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
}
int32_t frame_rx_prev = frame;
int32_t tti_rx_prev = nr_tti_rx - 1;
if (tti_rx_prev < 0) {
int32_t slot_rx_prev = nr_slot_rx - 1;
if (slot_rx_prev < 0) {
frame_rx_prev--;
tti_rx_prev += 10*frame_parms->ttis_per_subframe;
slot_rx_prev += 10*frame_parms->slots_per_subframe;
}
frame_rx_prev = frame_rx_prev%1024;
if (err_flag == 1) {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
LOG_I(PHY,"[UE %d] DLSCH: Seslotng NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
#endif
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
......@@ -595,22 +595,22 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->round++;
// printf("Rate: [UE %d] DLSCH: Setting NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
// printf("Rate: [UE %d] DLSCH: Seslotng NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
if (harq_process->round >= dlsch->Mdlharq) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
}
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Seslotng NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}
return((1+dlsch->max_ldpc_iterations));
} else {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
LOG_I(PHY,"[UE %d] DLSCH: Seslotng ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb, harq_process->round);
#endif
harq_process->status = SCH_IDLE;
......@@ -618,14 +618,14 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
harq_process->harq_ack.ack = 1;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
//LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
//LOG_I(PHY,"[UE %d] DLSCH: Seslotng ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Seslotng ACK for nr_slot_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
//LOG_D(PHY,"[UE %d] DLSCH: Seslotng ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
}
......@@ -673,7 +673,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag)
......@@ -740,14 +740,14 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
return(dlsch->max_ldpc_iterations);
}
/* if (nr_tti_rx> (10*frame_parms->ttis_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_tti_rx);
/* if (nr_slot_rx> (10*frame_parms->slots_per_subframe-1)) {
printf("dlsch_decoding.c: Illegal subframe index %d\n",nr_slot_rx);
return(dlsch->max_ldpc_iterations);
}
if (dlsch->harq_ack[nr_tti_rx].ack != 2) {
if (dlsch->harq_ack[nr_slot_rx].ack != 2) {
LOG_D(PHY, "[UE %d] DLSCH @ SF%d : ACK bit is %d instead of DTX even before PDSCH is decoded!\n",
phy_vars_ue->Mod_id, nr_tti_rx, dlsch->harq_ack[nr_tti_rx].ack);
phy_vars_ue->Mod_id, nr_slot_rx, dlsch->harq_ack[nr_slot_rx].ack);
}*/
/*
......@@ -1089,7 +1089,7 @@ if (harq_process->C>1) { // wakeup worker if more than 1 segment
#if UE_TIMING_TRACE
start_meas(dlsch_turbo_decoding_stats);
#endif
LOG_D(PHY,"mthread AbsSubframe %d.%d Start turbo segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"mthread AbsSubframe %d.%d Start turbo segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
for (int cnt =0; cnt < (kc-2)*p_decParams->Z; cnt++){
inv_d[cnt] = (1)*harq_process->d[r][cnt];
......@@ -1183,23 +1183,23 @@ if (harq_process->C>1) { // wakeup worker if more than 1 segment
if ((err_flag == 0) && (ret>=(1+dlsch->max_ldpc_iterations))) {// a Code segment is in error so break;
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_tti_rx,r,harq_process->C-1);
LOG_D(PHY,"AbsSubframe %d.%d CRC failed, segment %d/%d \n",frame%1024,nr_slot_rx,r,harq_process->C-1);
err_flag = 1;
}
//} //loop r
int32_t frame_rx_prev = frame;
int32_t tti_rx_prev = nr_tti_rx - 1;
if (tti_rx_prev < 0) {
int32_t slot_rx_prev = nr_slot_rx - 1;
if (slot_rx_prev < 0) {
frame_rx_prev--;
tti_rx_prev += 10*frame_parms->ttis_per_subframe;
slot_rx_prev += 10*frame_parms->slots_per_subframe;
}
frame_rx_prev = frame_rx_prev%1024;
if (err_flag == 1) {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_tti_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
LOG_I(PHY,"[UE %d] DLSCH: Seslotng NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, nr_slot_rx, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
#endif
harq_process->harq_ack.ack = 0;
harq_process->harq_ack.harq_id = harq_pid;
......@@ -1208,22 +1208,22 @@ if (harq_process->C>1) { // wakeup worker if more than 1 segment
harq_process->round++;
// printf("Rate: [UE %d] DLSCH: Setting NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
// printf("Rate: [UE %d] DLSCH: Seslotng NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
if (harq_process->round >= dlsch->Mdlharq) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
}
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Seslotng NACK for nr_slot_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}
return((1+dlsch->max_ldpc_iterations));
} else {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_tti_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
LOG_I(PHY,"[UE %d] DLSCH: Seslotng ACK for nr_slot_rx %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,nr_slot_rx,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
#endif
harq_process->status = SCH_IDLE;
......@@ -1231,14 +1231,14 @@ if (harq_process->C>1) { // wakeup worker if more than 1 segment
harq_process->harq_ack.ack = 1;
harq_process->harq_ack.harq_id = harq_pid;
harq_process->harq_ack.send_harq_status = 1;
//LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
//LOG_I(PHY,"[UE %d] DLSCH: Seslotng ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_tti_rx,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Seslotng ACK for nr_slot_rx %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,nr_slot_rx,harq_pid,harq_process->round,harq_process->TBS);
}
//LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
//LOG_D(PHY,"[UE %d] DLSCH: Seslotng ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
}
......@@ -1339,7 +1339,7 @@ void *nr_dlsch_decoding_2thread0(void *arg)
__m128i *pl = (__m128i*)&l;
proc->instance_cnt_dlsch_td=-1;
proc->nr_tti_rx=proc->sub_frame_start;
proc->nr_slot_rx=proc->sub_frame_start;
proc->decoder_thread_available = 0;
......@@ -1406,7 +1406,7 @@ void *nr_dlsch_decoding_2thread0(void *arg)
//r_offset = proc->Er;
//UE_rxtx_proc_t *proc = tdp->proc;
int frame = proc->frame_rx;
int subframe = proc->nr_tti_rx;
int subframe = proc->nr_slot_rx;
NR_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0];
NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[harq_pid];
short *dlsch_llr = phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->llr[0];
......@@ -1707,7 +1707,7 @@ void *nr_dlsch_decoding_2thread0(void *arg)
#if 0
if (err_flag == 1) {
//#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] THREAD 0 DLSCH: Setting NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
LOG_I(PHY,"[UE %d] THREAD 0 DLSCH: Seslotng NAK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d) Kr %d r %d harq_process->round %d\n",
phy_vars_ue->Mod_id, frame, subframe, harq_pid,harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs,Kr,r,harq_process->round);
//#endif
dlsch->harq_ack[subframe].ack = 0;
......@@ -1717,14 +1717,14 @@ void *nr_dlsch_decoding_2thread0(void *arg)
harq_process->round++;
// printf("Rate: [UE %d] DLSCH: Setting NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
// printf("Rate: [UE %d] DLSCH: Seslotng NACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
if (harq_process->round >= dlsch->Mdlharq) {
harq_process->status = SCH_IDLE;
harq_process->round = 0;
}
/* if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting NACK for subframe %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
LOG_D(PHY,"[UE %d] DLSCH: Seslotng NACK for subframe %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->status,harq_process->round,dlsch->Mdlharq,harq_process->TBS);
}*/
......@@ -1732,7 +1732,7 @@ void *nr_dlsch_decoding_2thread0(void *arg)
//return((1+dlsch->max_ldpc_iterations));
} else {
#if UE_DEBUG_TRACE
LOG_I(PHY,"[UE %d] THREAD 0 DLSCH: Setting ACK for subframe %d TBS %d mcs %d nb_rb %d\n",
LOG_I(PHY,"[UE %d] THREAD 0 DLSCH: Seslotng ACK for subframe %d TBS %d mcs %d nb_rb %d\n",
phy_vars_ue->Mod_id,subframe,harq_process->TBS,harq_process->mcs,harq_process->nb_rb);
#endif
......@@ -1741,14 +1741,14 @@ void *nr_dlsch_decoding_2thread0(void *arg)
dlsch->harq_ack[subframe].ack = 1;
dlsch->harq_ack[subframe].harq_id = harq_pid;
dlsch->harq_ack[subframe].send_harq_status = 1;
//LOG_I(PHY,"[UE %d] DLSCH: Setting ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
//LOG_I(PHY,"[UE %d] DLSCH: Seslotng ACK for SFN/SF %d/%d (pid %d, status %d, round %d, TBS %d, mcs %d)\n",
// phy_vars_ue->Mod_id, frame, subframe, harq_pid, harq_process->status, harq_process->round,harq_process->TBS,harq_process->mcs);
/* if(is_crnti)
{
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round,harq_process->TBS);
LOG_D(PHY,"[UE %d] DLSCH: Seslotng ACK for subframe %d (pid %d, round %d, TBS %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round,harq_process->TBS);
}
LOG_D(PHY,"[UE %d] DLSCH: Setting ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
LOG_D(PHY,"[UE %d] DLSCH: Seslotng ACK for subframe %d (pid %d, round %d)\n",phy_vars_ue->Mod_id,subframe,harq_pid,harq_process->round);
}*/
......@@ -1852,7 +1852,7 @@ void *nr_dlsch_decoding_2thread1(void *arg)
__m128i *pl = (__m128i*)&l;
proc->instance_cnt_dlsch_td1=-1;
proc->nr_tti_rx=proc->sub_frame_start;
proc->nr_slot_rx=proc->sub_frame_start;
printf("start thread 1\n");
proc->decoder_thread_available1 = 0;
......@@ -1919,12 +1919,12 @@ void *nr_dlsch_decoding_2thread1(void *arg)
//r_offset = proc->Er;
//UE_rxtx_proc_t *proc = tdp->proc;
int frame = proc->frame_rx;
int subframe = proc->nr_tti_rx;
int subframe = proc->nr_slot_rx;
NR_UE_DLSCH_t *dlsch = phy_vars_ue->dlsch[phy_vars_ue->current_thread_id[subframe]][eNB_id][0];
NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[harq_pid];
short *dlsch_llr = phy_vars_ue->pdsch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->llr[0];
//printf("2thread0 llr flag %d tdp flag %d\n",llr8_flag1, tdp->llr8_flag);
//printf("2thread1 nr_tti_tx %d subframe %d SF thread id %d r_offset %d\n", proc->nr_tti_rx, subframe, phy_vars_ue->current_thread_id[subframe], r_offset);
//printf("2thread1 nr_slot_tx %d subframe %d SF thread id %d r_offset %d\n", proc->nr_slot_rx, subframe, phy_vars_ue->current_thread_id[subframe], r_offset);
p_nrLDPC_procBuf = harq_process->p_nrLDPC_procBuf[2];
/*
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
View file @ c7dd406b
......@@ -90,7 +90,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t nr_slot_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
......@@ -108,10 +108,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
// int avg_0[2];
// int avg_1[2];
#if UE_TIMING_TRACE
uint8_t slot = 0;
#endif
unsigned char aatx,aarx;
unsigned short nb_rb = 0, nb_re =0, round;
......@@ -153,8 +149,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
break;
case PDSCH:
pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]];
dlsch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id];
pdsch_vars = ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]];
dlsch = ue->dlsch[ue->current_thread_id[nr_slot_rx]][eNB_id];
//set active for testing -> to be removed
......@@ -168,7 +164,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//printf("status TB0 = %d, status TB1 = %d \n", dlsch[0]->harq_processes[harq_pid]->status, dlsch[1]->harq_processes[harq_pid]->status);
LOG_D(PHY,"AbsSubframe %d.%d / Sym %d harq_pid %d, harq status %d.%d \n",
frame,nr_tti_rx,symbol,harq_pid,
frame,nr_slot_rx,symbol,harq_pid,
dlsch[0]->harq_processes[harq_pid]->status,
dlsch[1]->harq_processes[harq_pid]->status);
......@@ -203,14 +199,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
}
else {
LOG_E(PHY,"[UE][FATAL] Frame %d nr_tti_rx %d: no active DLSCH\n",ue->proc.proc_rxtx[0].frame_rx,nr_tti_rx);
LOG_E(PHY,"[UE][FATAL] Frame %d nr_slot_rx %d: no active DLSCH\n",ue->proc.proc_rxtx[0].frame_rx,nr_slot_rx);
return(-1);
}
beamforming_mode = ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id];
break;
default:
LOG_E(PHY,"[UE][FATAL] Frame %d nr_tti_rx %d: Unknown PDSCH format %d\n",ue->proc.proc_rxtx[0].frame_rx,nr_tti_rx,type);
LOG_E(PHY,"[UE][FATAL] Frame %d nr_slot_rx %d: Unknown PDSCH format %d\n",ue->proc.proc_rxtx[0].frame_rx,nr_slot_rx,type);
return(-1);
break;
}
......@@ -269,12 +265,6 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
}
#if UE_TIMING_TRACE
if(symbol > ue->frame_parms.symbols_per_tti>>1)
{
slot = 1;
}
#endif
#ifdef DEBUG_HARQ
printf("Demod dlsch0_harq->pmi_alloc %d\n", dlsch0_harq->pmi_alloc);
......@@ -286,17 +276,17 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#endif
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id],
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id]->pmi_ext,
rballoc,
symbol,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
......@@ -310,28 +300,28 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
if (rx_type >= rx_IC_single_stream) {
if (eNB_id_i<ue->n_connected_eNB) // we are in TM5
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id_i],
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id_i],
pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id_i]->pmi_ext,
rballoc,
symbol,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
else
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
nb_rb = dlsch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id],
pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id_i]->pmi_ext,
rballoc,
symbol,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms,
dlsch0_harq->mimo_mode);
......@@ -340,9 +330,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
if (beamforming_mode==0) { //else if nb_antennas_ports_eNB==1 && beamforming_mode == 0
//printf("start nr dlsch extract nr_tti_rx %d thread id %d \n", nr_tti_rx, ue->current_thread_id[nr_tti_rx]);
nb_rb = nr_dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
//printf("start nr dlsch extract nr_slot_rx %d thread id %d \n", nr_slot_rx, ue->current_thread_id[nr_slot_rx]);
nb_rb = nr_dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id],
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
......@@ -351,7 +341,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
symbol,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms);
......@@ -359,38 +349,38 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
/*
if (rx_type==rx_IC_single_stream) {
if (eNB_id_i<ue->n_connected_eNB)
nb_rb = dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id_i],
nb_rb = dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id_i],
pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id_i]->pmi_ext,
rballoc,
symbol,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms);
else
nb_rb = dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
nb_rb = dlsch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id],
pdsch_vars[eNB_id_i]->rxdataF_ext,
pdsch_vars[eNB_id_i]->dl_ch_estimates_ext,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id_i]->pmi_ext,
rballoc,
symbol,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms);
}*/
} /*else if (beamforming_mode==7) { //else if beamforming_mode == 7
nb_rb = dlsch_extract_rbs_TM7(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
nb_rb = dlsch_extract_rbs_TM7(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF,
pdsch_vars[eNB_id]->dl_bf_ch_estimates,
pdsch_vars[eNB_id]->rxdataF_ext,
pdsch_vars[eNB_id]->dl_bf_ch_estimates_ext,
rballoc,
symbol,
nr_tti_rx,
nr_slot_rx,
ue->high_speed_flag,
frame_parms);
......@@ -405,18 +395,18 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_nr_slot_rx_rx]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,nr_tti_rx,slot,
symbol,ue->high_speed_flag,type,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,nr_slot_rx,nr_nr_slot_rx_rx,
symbol,ue->high_speed_flag,type,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,nr_tti_rx,slot,symbol,
ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d Flag %d type %d: Pilot/Data extraction %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,
ue->high_speed_flag,type,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#endif
aatx = frame_parms->nb_antenna_ports_eNB;
aarx = frame_parms->nb_antennas_rx;
......@@ -441,16 +431,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Scale %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d: Channel Scale %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#endif
if (first_symbol_flag==1) {
if (beamforming_mode==0){
......@@ -537,7 +527,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
//#ifdef UE_DEBUG_TRACE
LOG_I(PHY,"[DLSCH] AbsSubframe %d.%d log2_maxh = %d [log2_maxh0 %d log2_maxh1 %d] (%d,%d)\n",
frame%1024,nr_tti_rx, pdsch_vars[eNB_id]->log2_maxh,
frame%1024,nr_slot_rx, pdsch_vars[eNB_id]->log2_maxh,
pdsch_vars[eNB_id]->log2_maxh0,
pdsch_vars[eNB_id]->log2_maxh1,
avg[0],avgs);
......@@ -560,23 +550,23 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#if T_TRACER
if (type == PDSCH)
{
T(T_UE_PHY_PDSCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_tti_rx),
T(T_UE_PHY_PDSCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(nr_slot_rx),
T_INT(avg[0]), T_INT(avg[1]), T_INT(avg[2]), T_INT(avg[3]));
}
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_tti_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,first_symbol_flag,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_tti_rx,slot,symbol,first_symbol_flag,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d first_symbol_flag %d: Channel Level %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,first_symbol_flag,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#endif
// Now channel compensation
if (dlsch0_harq->mimo_mode<LARGE_CDD) {
......@@ -778,16 +768,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_tti_rx,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_tti_rx,slot,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d log2_maxh %d channel_level %d: Channel Comp %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,pdsch_vars[eNB_id]->log2_maxh,proc->channel_level,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#endif
#endif
// MRC
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#endif
#if 0
......@@ -859,16 +849,16 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: Channel Combine %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d: Channel Combine %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#endif
#endif
#if UE_TIMING_TRACE
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
start_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#endif
//printf("LLR dlsch0_harq->Qm %d rx_type %d cw0 %d cw1 %d symbol %d \n",dlsch0_harq->Qm,rx_type,codeword_TB0,codeword_TB1,symbol);
// compute LLRs
......@@ -931,7 +921,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_qpsk_qpsk_llr(frame_parms,
......@@ -940,7 +930,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -952,7 +942,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_16qam_qpsk_llr(frame_parms,
......@@ -962,7 +952,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -974,7 +964,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_64qam_qpsk_llr(frame_parms,
......@@ -984,7 +974,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -1017,7 +1007,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_qpsk_16qam_llr(frame_parms,
......@@ -1027,7 +1017,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -1040,7 +1030,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_16qam_16qam_llr(frame_parms,
......@@ -1051,7 +1041,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -1064,7 +1054,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_64qam_16qam_llr(frame_parms,
......@@ -1075,7 +1065,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -1110,7 +1100,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_qpsk_64qam_llr(frame_parms,
......@@ -1120,7 +1110,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,2,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -1133,7 +1123,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
pdsch_vars[eNB_id]->llr[0],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_16qam_64qam_llr(frame_parms,
......@@ -1144,7 +1134,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pdsch_vars[eNB_id]->llr[1],
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,4,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr128_2ndstream);
}
}
......@@ -1157,7 +1147,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho2_ext,
(int16_t*)pllr_symbol_cw0,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch0_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
if (rx_type==rx_IC_dual_stream) {
nr_dlsch_64qam_64qam_llr(frame_parms,
......@@ -1168,7 +1158,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
pdsch_vars[eNB_id]->dl_ch_rho_ext[harq_pid][round],
pllr_symbol_cw1,
symbol,first_symbol_flag,nb_rb,
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_tti_rx,symbol),
adjust_G2(frame_parms,dlsch1_harq->rb_alloc_even,6,nr_slot_rx,symbol),
pdsch_vars[eNB_id]->llr_offset[symbol]);
}
}
......@@ -1223,27 +1213,27 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
//nr_dlsch_deinterleaving(symbol,bundle_L,(int16_t*)pllr_symbol_cw0,(int16_t*)pllr_symbol_cw0_deint, nb_rb_pdsch);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot]);
stop_meas(&ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
printf("[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,nr_tti_rx,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_tti_rx]][slot].p_time/(cpuf*1000.0));
LOG_I(PHY, "[AbsSFN %d.%d] Nr_Slot_Rx%d Symbol %d: LLR Computation %5.2f \n",frame,nr_slot_rx,nr_slot_rx,symbol,ue->generic_stat_bis[ue->current_thread_id[nr_slot_rx]][nr_slot_rx].p_time/(cpuf*1000.0));
#endif
#endif
// Please keep it: useful for debugging
#if 0
if( (symbol == 13) && (nr_tti_rx==0) && (dlsch0_harq->Qm == 6) /*&& (nb_rb==25)*/)
if( (symbol == 13) && (nr_slot_rx==0) && (dlsch0_harq->Qm == 6) /*&& (nb_rb==25)*/)
{
LOG_E(PHY,"Dump Phy Chan Est \n");
if(1)
{
#if 1
write_output("rxdataF0.m" , "rxdataF0", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("rxdataF1.m" , "rxdataF1", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0],14*frame_parms->ofdm_symbol_size,1,1);
write_output("dl_ch_estimates00.m", "dl_ch_estimates00", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id][0][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("dl_ch_estimates01.m", "dl_ch_estimates01", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id][1][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("dl_ch_estimates10.m", "dl_ch_estimates10", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id][2][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("dl_ch_estimates11.m", "dl_ch_estimates11", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id][3][0],14*frame_parms->ofdm_symbol_size,1,1);
write_output("rxdataF0.m" , "rxdataF0", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF[0][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("rxdataF1.m" , "rxdataF1", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].rxdataF[0][0],14*frame_parms->ofdm_symbol_size,1,1);
write_output("dl_ch_estimates00.m", "dl_ch_estimates00", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id][0][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("dl_ch_estimates01.m", "dl_ch_estimates01", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id][1][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("dl_ch_estimates10.m", "dl_ch_estimates10", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id][2][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("dl_ch_estimates11.m", "dl_ch_estimates11", &common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_slot_rx]].dl_ch_estimates[eNB_id][3][0],14*frame_parms->ofdm_symbol_size,1,1);
//write_output("rxdataF_ext00.m" , "rxdataF_ext00", &pdsch_vars[eNB_id]->rxdataF_ext[0][0],14*frame_parms->N_RB_DL*12,1,1);
......@@ -1271,10 +1261,10 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
#if T_TRACER
T(T_UE_PHY_PDSCH_IQ, T_INT(eNB_id), T_INT(ue->Mod_id), T_INT(frame%1024),
T_INT(nr_tti_rx), T_INT(nb_rb),
T_INT(frame_parms->N_RB_UL), T_INT(frame_parms->symbols_per_tti),
T_INT(nr_slot_rx), T_INT(nb_rb),
T_INT(frame_parms->N_RB_UL), T_INT(frame_parms->symbols_per_slot),
T_BUFFER(&pdsch_vars[eNB_id]->rxdataF_comp0[eNB_id][0],
2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_tti*2));
2 * /* ulsch[UE_id]->harq_processes[harq_pid]->nb_rb */ frame_parms->N_RB_UL *12*frame_parms->symbols_per_slot));
#endif
return(0);
......@@ -1994,7 +1984,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
unsigned char symbol,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx,
unsigned char nr_slot_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms) {
......@@ -2102,7 +2092,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
#ifdef USER_MODE
void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *coded_bits_per_codeword,int round, unsigned char harq_pid)
void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_slot_rx,unsigned int *coded_bits_per_codeword,int round, unsigned char harq_pid)
{
unsigned int nsymb = (ue->frame_parms.Ncp == 0) ? 14 : 12;
char fname[32],vname[32];
......@@ -2110,50 +2100,50 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *
sprintf(fname,"dlsch%d_rxF_r%d_ext0.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_ext0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->rxdataF_ext[0],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antennas_rx >1) {
sprintf(fname,"dlsch%d_rxF_r%d_ext1.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_ext1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_ext[1],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->rxdataF_ext[1],12*N_RB_DL*nsymb,1,1);
}
sprintf(fname,"dlsch%d_ch_r%d_ext00.m",eNB_id,round);
sprintf(vname,"dl%d_ch_r%d_ext00",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
if (ue->transmission_mode[eNB_id]==7){
sprintf(fname,"dlsch%d_bf_ch_r%d.m",eNB_id,round);
sprintf(vname,"dl%d_bf_ch_r%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_bf_ch_estimates[0],512*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_bf_ch_estimates[0],512*nsymb,1,1);
//write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->dl_bf_ch_estimates[0],512,1,1);
sprintf(fname,"dlsch%d_bf_ch_r%d_ext00.m",eNB_id,round);
sprintf(vname,"dl%d_bf_ch_r%d_ext00",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_bf_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_bf_ch_estimates_ext[0],12*N_RB_DL*nsymb,1,1);
}
if (ue->frame_parms.nb_antennas_rx == 2) {
sprintf(fname,"dlsch%d_ch_r%d_ext01.m",eNB_id,round);
sprintf(vname,"dl%d_ch_r%d_ext01",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
}
if (ue->frame_parms.nb_antenna_ports_eNB == 2) {
sprintf(fname,"dlsch%d_ch_r%d_ext10.m",eNB_id,round);
sprintf(vname,"dl%d_ch_r%d_ext10",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[2],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_estimates_ext[2],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antennas_rx == 2) {
sprintf(fname,"dlsch%d_ch_r%d_ext11.m",eNB_id,round);
sprintf(vname,"dl%d_ch_r%d_ext11",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_estimates_ext[3],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_estimates_ext[3],12*N_RB_DL*nsymb,1,1);
}
}
sprintf(fname,"dlsch%d_rxF_r%d_uespec0.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_uespec0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_uespec_pilots[0],12*N_RB_DL,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->rxdataF_uespec_pilots[0],12*N_RB_DL,1,1);
/*
write_output("dlsch%d_ch_ext01.m","dl01_ch0_ext",pdsch_vars[eNB_id]->dl_ch_estimates_ext[1],12*N_RB_DL*nsymb,1,1);
......@@ -2163,31 +2153,31 @@ void dump_dlsch2(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t nr_tti_rx,unsigned int *
sprintf(fname,"dlsch%d_r%d_rho.m",eNB_id,round);
sprintf(vname,"dl_rho_r%d_%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_rho_ext[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_rho_ext[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
sprintf(fname,"dlsch%d_r%d_rho2.m",eNB_id,round);
sprintf(vname,"dl_rho2_r%d_%d",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_rho2_ext[0],12*N_RB_DL*nsymb,1,1);
sprintf(fname,"dlsch%d_rxF_r%d_comp0.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_comp0",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb,1,1);
if (ue->frame_parms.nb_antenna_ports_eNB == 2) {
sprintf(fname,"dlsch%d_rxF_r%d_comp1.m",eNB_id,round);
sprintf(vname,"dl%d_rxF_r%d_comp1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp1[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->rxdataF_comp1[harq_pid][round][0],12*N_RB_DL*nsymb,1,1);
}
sprintf(fname,"dlsch%d_rxF_r%d_llr.m",eNB_id,round);
sprintf(vname,"dl%d_r%d_llr",eNB_id,round);
write_output(fname,vname, ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr[0],coded_bits_per_codeword[0],1,0);
write_output(fname,vname, ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->llr[0],coded_bits_per_codeword[0],1,0);
sprintf(fname,"dlsch%d_r%d_mag1.m",eNB_id,round);
sprintf(vname,"dl%d_r%d_mag1",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_mag0[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_mag0[0],12*N_RB_DL*nsymb,1,1);
sprintf(fname,"dlsch%d_r%d_mag2.m",eNB_id,round);
sprintf(vname,"dl%d_r%d_mag2",eNB_id,round);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dl_ch_magb0[0],12*N_RB_DL*nsymb,1,1);
write_output(fname,vname,ue->pdsch_vars[ue->current_thread_id[nr_slot_rx]][eNB_id]->dl_ch_magb0[0],12*N_RB_DL*nsymb,1,1);
// printf("log2_maxh = %d\n",ue->pdsch_vars[eNB_id]->log2_maxh);
}
......
openair1/PHY/NR_UE_TRANSPORT/nr_prach.c
View file @ c7dd406b
......@@ -604,7 +604,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
uint16_t first_nonzero_root_idx=0;
#if defined(EXMIMO) || defined(OAI_USRP)
prach_start = (ue->rx_offset+subframe*ue->frame_parms.samples_per_tti-ue->hw_timing_advance-ue->N_TA_offset);
prach_start = (ue->rx_offset+subframe*ue->frame_parms.samples_per_subframe-ue->hw_timing_advance-ue->N_TA_offset);
#ifdef PRACH_DEBUG
LOG_I(PHY,"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d\n", ue->Mod_id,
prach_start,
......@@ -614,13 +614,13 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
#endif
if (prach_start<0)
prach_start+=(ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
prach_start+=(ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
if (prach_start>=(ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
prach_start-=(ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
if (prach_start>=(ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
prach_start-=(ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
#else //normal case (simulation)
prach_start = subframe*ue->frame_parms.samples_per_tti-ue->N_TA_offset;
prach_start = subframe*ue->frame_parms.samples_per_subframe-ue->N_TA_offset;
LOG_I(PHY,"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d\n", ue->Mod_id,
prach_start,
ue->rx_offset,
......@@ -1160,10 +1160,10 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
// "prach_fmt4 not fully implemented" );
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
int j;
int overflow = prach_start + prach_len - LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*ue->frame_parms.samples_per_tti;
int overflow = prach_start + prach_len - LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*ue->frame_parms.samples_per_subframe;
LOG_I( PHY, "prach_start=%d, overflow=%d\n", prach_start, overflow );
for (i=prach_start,j=0; i<min(ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,prach_start+prach_len); i++,j++) {
for (i=prach_start,j=0; i<min(ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME,prach_start+prach_len); i++,j++) {
((int16_t*)ue->common_vars.txdata[0])[2*i] = prach[2*j];
((int16_t*)ue->common_vars.txdata[0])[2*i+1] = prach[2*j+1];
}
......@@ -1174,11 +1174,11 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
}
#if defined(EXMIMO)
// handle switch before 1st TX subframe, guarantee that the slot prior to transmission is switch on
for (k=prach_start - (ue->frame_parms.samples_per_tti>>1) ; k<prach_start ; k++) {
for (k=prach_start - (ue->frame_parms.samples_per_subframe>>1) ; k<prach_start ; k++) {
if (k<0)
ue->common_vars.txdata[0][k+ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else if (k>(ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
ue->common_vars.txdata[0][k-ue->frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
ue->common_vars.txdata[0][k+ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else if (k>(ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
ue->common_vars.txdata[0][k-ue->frame_parms.samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] &= 0xFFFEFFFE;
else
ue->common_vars.txdata[0][k] &= 0xFFFEFFFE;
}
......@@ -1197,7 +1197,7 @@ int32_t generate_nr_prach( PHY_VARS_NR_UE *ue, uint8_t eNB_id, uint8_t subframe,
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
LOG_M("prach_txF0.m","prachtxF0",prachF,prach_len-Ncp,1,1);
LOG_M("prach_tx0.m","prachtx0",prach+(Ncp<<1),prach_len-Ncp,1,1);
LOG_M("txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][0]),2*ue->frame_parms.samples_per_tti,1,1);
LOG_M("txsig.m","txs",(int16_t*)(&ue->common_vars.txdata[0][0]),2*ue->frame_parms.samples_per_subframe,1,1);
exit(-1);
#endif
......
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
View file @ c7dd406b
......@@ -552,7 +552,7 @@ void set_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_change
{
/* set new value according to rate_change */
frame_parms_ue->ofdm_symbol_size = (frame_parms_ue->ofdm_symbol_size / rate_change);
frame_parms_ue->samples_per_tti = (frame_parms_ue->samples_per_tti / rate_change);
frame_parms_ue->samples_per_slot = (frame_parms_ue->samples_per_slot / rate_change);
frame_parms_ue->samples_per_subframe = (frame_parms_ue->samples_per_subframe / rate_change);
free_context_pss_nr();
......@@ -580,7 +580,7 @@ void set_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_change
void restore_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_change)
{
frame_parms_ue->ofdm_symbol_size = frame_parms_ue->ofdm_symbol_size * rate_change;
frame_parms_ue->samples_per_tti = frame_parms_ue->samples_per_tti * rate_change;
frame_parms_ue->samples_per_slot = frame_parms_ue->samples_per_slot * rate_change;
frame_parms_ue->samples_per_subframe = frame_parms_ue->samples_per_subframe * rate_change;
free_context_pss_nr();
......@@ -610,9 +610,7 @@ void restore_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_ch
void decimation_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change, int **rxdata)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
AssertFatal(frame_parms->samples_per_tti > 3839,"Illegal samples_per_tti %d\n",frame_parms->samples_per_tti);
int samples_for_frame = frame_parms->samples_per_frame;
#if TEST_SYNCHRO_TIMING_PSS
......
openair1/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
View file @ c7dd406b
......@@ -84,7 +84,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
uint32_t f_gh = 0;
SRS_Resource_t *p_SRS_Resource;
int frame_number = proc->frame_tx;
int slot_number = proc->nr_tti_tx;
int slot_number = proc->nr_slot_tx;
uint16_t n_SRS, n_SRS_cs_i;
double alpha_i;
uint8_t K_TC_p;
......@@ -278,7 +278,7 @@ int32_t generate_srs_nr(SRS_ResourceSet_t *p_srs_resource_set,
n_SRS = l/R;
}
else {
int8_t N_slot_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME * frame_parms->ttis_per_subframe;
int8_t N_slot_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME * frame_parms->slots_per_subframe;
n_SRS = ((N_slot_frame*frame_number + slot_number - T_offset)/T_SRS)*(N_symb_SRS/R)+(l/R);
}
......@@ -399,7 +399,7 @@ int is_srs_period_nr(SRS_Resource_t *p_SRS_Resource, NR_DL_FRAME_PARMS *frame_pa
return (-1);
}
int16_t N_slot_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME * frame_parms->ttis_per_subframe;
int16_t N_slot_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME * frame_parms->slots_per_subframe;
if ((N_slot_frame*frame_tx + slot_tx - T_offset)%T_SRS == 0) {
return (0);
}
......@@ -445,7 +445,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
/* SRS resource configurated ? */
if (p_srs_resource != NULL) {
if (p_srs_resource_set->resourceType == periodic) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_tti_tx) == 0) {
if (is_srs_period_nr(p_srs_resource, frame_parms, proc->frame_tx, proc->nr_slot_tx) == 0) {
generate_srs = 1;
}
}
......@@ -459,7 +459,7 @@ int ue_srs_procedure_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB
if (generate_srs == 1) {
int16_t txptr = AMP;
uint16_t nsymb = (ue->frame_parms.Ncp==0) ? 14:12;
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_tti_tx*nsymb)+(nsymb-1));
uint16_t symbol_offset = (int)ue->frame_parms.ofdm_symbol_size*((proc->nr_slot_tx*nsymb)+(nsymb-1));
if (generate_srs_nr(p_srs_resource_set, frame_parms, &ue->common_vars.txdataF[eNB_id][symbol_offset], txptr, proc) == 0) {
return 0;
}
......
openair1/PHY/defs_nr_UE.h
View file @ c7dd406b
......@@ -168,10 +168,10 @@ typedef struct {
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. ttis_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. ttis_per_subframe - 1] to act upon for reception
int nr_tti_rx;
/// NR slot index within subframe_tx [0 .. slots_per_subframe - 1] to act upon for transmission
int nr_slot_tx;
/// NR slot index within subframe_rx [0 .. slots_per_subframe - 1] to act upon for reception
int nr_slot_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
......@@ -1030,7 +1030,7 @@ typedef struct {
fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[10];
uint8_t current_thread_id[120];
NR_UE_PDSCH *pdsch_vars[RX_NB_TH_MAX][NUMBER_OF_CONNECTED_eNB_MAX+1]; // two RxTx Threads
NR_UE_PDSCH_FLP *pdsch_vars_flp[NUMBER_OF_CONNECTED_eNB_MAX+1];
......
openair1/PHY/defs_nr_common.h
View file @ c7dd406b
......@@ -259,8 +259,6 @@ typedef struct NR_DL_FRAME_PARMS {
uint32_t samples_per_subframe;
/// Number of samples in a slot
uint32_t samples_per_slot;
/// Number of OFDM/SC-FDMA symbols in one subframe (to be modified to account for potential different in UL/DL)
uint16_t symbols_per_tti;
/// Number of samples in a radio frame
uint32_t samples_per_frame;
/// Number of samples in a subframe without CP
......@@ -269,14 +267,8 @@ typedef struct NR_DL_FRAME_PARMS {
uint32_t samples_per_slot_wCP;
/// Number of samples in a radio frame without CP
uint32_t samples_per_frame_wCP;
/// Number of samples in a tti (same as subrame in LTE, slot in NR)
uint32_t samples_per_tti;
/// NR numerology index [0..5] as specified in 38.211 Section 4 (mu). 0=15khZ SCS, 1=30khZ, 2=60kHz, etc
uint8_t numerology_index;
/// NR number of ttis per subframe deduced from numerology (cf 38.211): 1, 2, 4, 8(not supported),16(not supported),32(not supported)
uint8_t ttis_per_subframe;
/// NR number of slots per tti . Assumption only 2 Slot per TTI is supported (Slot Config 1 in 38.211)
uint8_t slots_per_tti;
//#endif
/// Number of Physical transmit antennas in node
uint8_t nb_antennas_tx;
......
openair1/SCHED_NR_UE/harq_nr.c
View file @ c7dd406b
......@@ -114,7 +114,7 @@
*********************************************************************/
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset)
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_slot_rx, uint8_t tx_offset)
{
if (nr_dci_info_extracted->identifier_dci_formats == DL_DCI) {
......@@ -124,14 +124,14 @@ void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_i
dl_harq->harq_ack.vDAI_DL = nr_dci_info_extracted->dai+1;
dl_harq->harq_ack.pucch_resource_indicator = nr_dci_info_extracted->pucch_resource_ind;
dl_harq->harq_ack.slot_for_feedback_ack = (nr_tti_rx + nr_dci_info_extracted->pdsch_to_harq_feedback_time_ind)%ue->frame_parms.ttis_per_subframe;
dl_harq->harq_ack.slot_for_feedback_ack = (nr_slot_rx + nr_dci_info_extracted->pdsch_to_harq_feedback_time_ind)%ue->frame_parms.slots_per_subframe;
dl_harq->harq_ack.harq_id = nr_dci_info_extracted->harq_process_number;
dl_harq->harq_ack.rx_status = downlink_harq_process(dl_harq, dlsch[0]->current_harq_pid, nr_dci_info_extracted->ndi, dlsch[0]->rnti_type);
}
else if (nr_dci_info_extracted->identifier_dci_formats == UL_DCI) {
/* store harq id for which pusch should be transmitted at rx_slot + tx_offset */
set_tx_harq_id(ulsch, nr_dci_info_extracted->harq_process_number, (nr_tti_rx + tx_offset)%ue->frame_parms.ttis_per_subframe);
set_tx_harq_id(ulsch, nr_dci_info_extracted->harq_process_number, (nr_slot_rx + tx_offset)%ue->frame_parms.slots_per_subframe);
ulsch->harq_processes[nr_dci_info_extracted->harq_process_number]->tx_status = uplink_harq_process(ulsch, nr_dci_info_extracted->harq_process_number, nr_dci_info_extracted->ndi, ulsch->rnti_type);
}
}
......
openair1/SCHED_NR_UE/phy_frame_config_nr.c
View file @ c7dd406b
......@@ -55,7 +55,7 @@ int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeri
{
TDD_UL_DL_configCommon_t *p_tdd_ul_dl_configuration;
int slot_number = 0;
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
int nb_slots_to_set = TDD_CONFIG_NB_FRAMES*(frame_parms->slots_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
/* allocate buffer for configuration structure */
p_tdd_ul_dl_configuration = calloc( 1, sizeof(TDD_UL_DL_configCommon_t));
......@@ -78,7 +78,7 @@ int set_tdd_config_nr(NR_DL_FRAME_PARMS *frame_parms, int dl_UL_TransmissionPeri
int nb_periods_per_frame = (FRAME_DURATION_MICRO_SEC/dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = (frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
int nb_slots_per_period = (frame_parms->slots_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
if (nb_slots_per_period != (nrofDownlinkSlots + nrofUplinkSlots)) {
LOG_E(PHY,"set_tdd_configuration_nr: given period is inconsistent with current tdd configuration \n");
......@@ -189,7 +189,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
while(p_current_TDD_UL_DL_SlotConfig != NULL) {
int slot_index = p_current_TDD_UL_DL_SlotConfig->slotIndex;
if (slot_index < TDD_CONFIG_NB_FRAMES*(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)) {
if (slot_index < TDD_CONFIG_NB_FRAMES*(frame_parms->slots_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols != 0) {
if (p_current_TDD_UL_DL_SlotConfig->nrofDownlinkSymbols == NR_TDD_SET_ALL_SYMBOLS) {
if (p_current_TDD_UL_DL_SlotConfig->nrofUplinkSymbols == 0) {
......@@ -250,7 +250,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
*
*********************************************************************/
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_slot)
{
/* for FFD all slot can be considered as an uplink */
if (frame_parms->frame_type == FDD) {
......@@ -258,14 +258,14 @@ int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
}
if (nr_frame%2 == 0) {
if (frame_parms->tdd_uplink_nr[nr_tti] == NR_TDD_UPLINK_SLOT) {
if (frame_parms->tdd_uplink_nr[nr_slot] == NR_TDD_UPLINK_SLOT) {
return (NR_UPLINK_SLOT);
}
else {
return (NR_DOWNLINK_SLOT);
}
}
else if ((frame_parms->tdd_uplink_nr[(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti] == NR_TDD_UPLINK_SLOT)) {
else if ((frame_parms->tdd_uplink_nr[(frame_parms->slots_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_slot] == NR_TDD_UPLINK_SLOT)) {
return (NR_UPLINK_SLOT);
}
else {
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ c7dd406b
This source diff could not be displayed because it is too large. You can view the blob instead.
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c
View file @ c7dd406b
......@@ -158,8 +158,8 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_pro
int K_PUCCH = 0;
if (O_ACK != 0) {
/* it assumes that PDCCH is in the first symbol of receive slot FFS TDDO NR */
int slots_gap = (proc->nr_tti_tx > proc->nr_tti_rx ? (proc->nr_tti_tx - proc->nr_tti_rx - 1) : ((proc->nr_tti_tx + ue->frame_parms.ttis_per_subframe) - proc->nr_tti_rx - 1));
K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_tti)) - 1;
int slots_gap = (proc->nr_slot_tx > proc->nr_slot_rx ? (proc->nr_slot_tx - proc->nr_slot_rx - 1) : ((proc->nr_slot_tx + ue->frame_parms.slots_per_subframe) - proc->nr_slot_rx - 1));
K_PUCCH = (slots_gap * (ue->frame_parms.symbols_per_slot)) - 1;
}
else {
/* field k2 is not present - to check k2 of pucch from upper layer FFS TDDO NR */
......
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ c7dd406b
......@@ -56,7 +56,7 @@ void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
......@@ -67,7 +67,7 @@ void nr_generate_pucch1(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
......@@ -80,7 +80,7 @@ void nr_generate_pucch2(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
......@@ -93,7 +93,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
int nr_slot_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
......@@ -166,7 +166,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
uint64_t pucch_payload = 0;
uint32_t csi_payload = 0;
int frame_tx = proc->frame_tx;
int nr_tti_tx = proc->nr_tti_tx;
int nr_slot_tx = proc->nr_slot_tx;
int Mod_id = ue->Mod_id;
int CC_id = ue->CC_id;
......@@ -186,18 +186,18 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* update current context */
int subframe_number = (proc->nr_tti_rx)/(ue->frame_parms.ttis_per_subframe);
int subframe_number = (proc->nr_slot_rx)/(ue->frame_parms.slots_per_subframe);
nb_pucch_format_4_in_subframes[subframe_number] = 0; /* reset pucch format 4 counter at current rx position */
int dl_harq_pid = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->current_harq_pid;
int dl_harq_pid = ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][0]->current_harq_pid;
if (dl_harq_pid < ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->number_harq_processes_for_pdsch) {
if (dl_harq_pid < ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][0]->number_harq_processes_for_pdsch) {
/* pucch indicator can be reseted in function get_downlink_ack so it should be get now */
pucch_resource_indicator = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack.pucch_resource_indicator;
pucch_resource_indicator = ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack.pucch_resource_indicator;
}
/* Part - I
* Collect feedback that should be transmitted at this nr_tti_tx :
* Collect feedback that should be transmitted at this nr_slot_tx :
* - ACK/NACK, SR, CSI (CQI, RI, ...)
*/
......@@ -212,8 +212,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
CC_id,
frame_tx,
gNB_id,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
nr_tti_tx); // nr_tti_rx used for meas gap
ue->pdcch_vars[ue->current_thread_id[proc->nr_slot_rx]][gNB_id]->crnti,
nr_slot_tx); // nr_slot_rx used for meas gap
}
else {
sr_payload = 1;
......@@ -239,8 +239,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if(O_ACK == 0) {
N_UCI = O_SR + O_CSI;
if ((N_UCI == 0) || ((O_CSI == 0) && (sr_payload == 0))) { /* TS 38.213 9.2.4 UE procedure for reporting SR */
NR_TST_PHY_PRINTF("PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
NR_TST_PHY_PRINTF("PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
LOG_D(PHY,"PUCCH No feedback AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
return (FALSE);
}
else {
......@@ -292,7 +292,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
int occ_length = 0;
int occ_Index = 0;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
NR_UE_HARQ_STATUS_t *harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][0]->harq_processes[dl_harq_pid]->harq_ack;
if (select_pucch_resource(ue, gNB_id, N_UCI, pucch_resource_indicator, &initial_pucch_id, &pucch_resource_set,
&pucch_resource_id, harq_status) == TRUE) {
......@@ -327,7 +327,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if ((ue->UE_mode[gNB_id] != PUSCH) && (O_ACK > 1)) {
O_ACK = 1;
pucch_ack_payload &= 0x1; /* take only first ack */
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_W(PHY,"PUCCH ue is not expected to generate more than one HARQ-ACK at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
}
NR_TST_PHY_PRINTF("PUCCH common configuration with index %d \n", initial_pucch_id);
}
......@@ -370,7 +370,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
}
else {
LOG_W(PHY,"PUCCH No PUCCH resource found at AbsSubframe %d.%d \n", frame_tx%1024, nr_tti_tx);
LOG_W(PHY,"PUCCH No PUCCH resource found at AbsSubframe %d.%d \n", frame_tx%1024, nr_slot_tx);
return (FALSE);
}
......@@ -417,7 +417,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
nb_symbols = nb_symbols_excluding_dmrs[nb_symbols_total-4][index_additional_dmrs][index_hopping];
nb_of_prbs = 1;
subframe_number = nr_tti_tx/(ue->frame_parms.ttis_per_subframe);
subframe_number = nr_slot_tx/(ue->frame_parms.slots_per_subframe);
nb_pucch_format_4_in_subframes[subframe_number]++; /* increment number of transmit pucch 4 in current subframe */
NR_TST_PHY_PRINTF("PUCCH Number of pucch format 4 in subframe %d is %d \n", subframe_number, nb_pucch_format_4_in_subframes[subframe_number]);
N_sc_ctrl_RB = N_SC_RB/(nb_pucch_format_4_in_subframes[subframe_number]);
......@@ -521,7 +521,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
pucch_payload = pucch_payload | (csi_payload << (O_ACK + O_SR)) | (sr_payload << O_ACK) | pucch_ack_payload;
NR_TST_PHY_PRINTF("PUCCH ( AbsSubframe : %d.%d ) ( total payload size %d data 0x%02x ) ( ack length %d data 0x%02x ) ( sr length %d value %d ) ( csi length %d data : 0x%02x ) \n",
frame_tx%1024, nr_tti_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
frame_tx%1024, nr_slot_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols total: %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index);
......@@ -538,8 +538,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
O_CRC, n_HARQ_ACK);
/* set tx power */
ue->tx_power_dBm[nr_tti_tx] = pucch_tx_power;
ue->tx_total_RE[nr_tti_tx] = nb_of_prbs*N_SC_RB;
ue->tx_power_dBm[nr_slot_tx] = pucch_tx_power;
ue->tx_total_RE[nr_slot_tx] = nb_of_prbs*N_SC_RB;
int tx_amp;
......@@ -560,7 +560,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
(uint8_t)m_CS,
nb_symbols_total,
......@@ -575,7 +575,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
(uint8_t)m_0,
nb_symbols_total,
starting_symbol_index,
......@@ -588,13 +588,13 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format2_nr:
{
nr_generate_pucch2(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->pdcch_vars[ue->current_thread_id[proc->nr_slot_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
......@@ -606,14 +606,14 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue,
ue->pdcch_vars[ue->current_thread_id[proc->nr_tti_rx]][gNB_id]->crnti,
ue->pdcch_vars[ue->current_thread_id[proc->nr_slot_rx]][gNB_id]->crnti,
ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nr_slot_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
......@@ -666,7 +666,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
int number_harq_feedback = 0;
uint32_t dai_current = 0;
uint32_t dai_max = 0;
int number_pid_dl = ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][0]->number_harq_processes_for_pdsch;
int number_pid_dl = ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][0]->number_harq_processes_for_pdsch;
bool two_transport_blocks = FALSE;
int number_of_code_word = 1;
int U_DAI_c = 0;
......@@ -691,10 +691,10 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
for (int dl_harq_pid = 0; dl_harq_pid < number_pid_dl; dl_harq_pid++) {
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid]->harq_ack;
harq_status = &ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid]->harq_ack;
/* check if current tx slot should transmit downlink acknowlegment */
if (harq_status->slot_for_feedback_ack == proc->nr_tti_tx) {
if (harq_status->slot_for_feedback_ack == proc->nr_slot_tx) {
if (harq_status->ack == DL_ACKNACK_NO_SET) {
LOG_E(PHY,"PUCCH Downlink acknowledgment has not been set : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME);
......@@ -729,7 +729,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
}
}
if (do_reset == TRUE) {
init_downlink_harq_status(&ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid]);
init_downlink_harq_status(&ue->dlsch[ue->current_thread_id[proc->nr_slot_rx]][gNB_id][code_word]->harq_processes[dl_harq_pid]);
}
}
}
......@@ -1153,8 +1153,8 @@ int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_n
return (1); /* period is slot */
}
int16_t N_slot_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME * ue->frame_parms.ttis_per_subframe;
if (((proc->frame_tx * N_slot_frame) + proc->nr_tti_tx - SR_offset)%SR_periodicity == 0) {
int16_t N_slot_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME * ue->frame_parms.slots_per_subframe;
if (((proc->frame_tx * N_slot_frame) + proc->nr_slot_tx - SR_offset)%SR_periodicity == 0) {
return (1);
}
else {
......
targets/RT/USER/nr-ue.c
View file @ c7dd406b
......@@ -676,7 +676,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_slot_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
......@@ -688,12 +688,13 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
UE->dcireq.slot = proc->nr_slot_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
......@@ -718,7 +719,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
......@@ -732,7 +733,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// Prepare the future Tx data
#if 0
#ifndef NO_RAT_NR
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT)
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_slot_tx) & NR_UPLINK_SLOT)
#else
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
(UE->frame_parms.frame_type == FDD) )
......@@ -1026,16 +1027,15 @@ void *UE_thread(void *arg) {
UE->proc.proc_rxtx[th_id].gotIQs=readTime(gotIQs);
}
proc->nr_tti_rx=subframe_nr;
proc->nr_slot_rx=subframe_nr*UE->frame_parms.slots_per_subframe;
proc->subframe_rx=subframe_nr;
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= subframe_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
proc->subframe_tx= subframe_nr + DURATION_RX_TO_TX;
if (proc->subframe_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
proc->subframe_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
proc->subframe_tx=proc->nr_tti_rx;
proc->timestamp_tx = timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_subframe)-
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
......@@ -1073,7 +1073,6 @@ void *UE_thread(void *arg) {
// pickStaticTime(lastTime);
} //UE->mode != loop_through_memory
else {
proc->nr_tti_rx=subframe_nr;
proc->subframe_rx=subframe_nr;
if(subframe_nr == 0) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
......@@ -1081,14 +1080,16 @@ void *UE_thread(void *arg) {
}
}
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= subframe_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
proc->subframe_tx= subframe_nr + DURATION_RX_TO_TX;
if (proc->subframe_tx > NR_NUMBER_OF_SUBFRAMES_PER_FRAME) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
proc->subframe_tx %= NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
}
proc->subframe_tx=proc->nr_tti_tx;
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
for (proc->nr_slot_rx=proc->subframe_rx*UE->frame_parms.slots_per_subframe;
proc->nr_slot_rx<(proc->subframe_rx+1)*UE->frame_parms.slots_per_subframe;
proc->nr_slot_rx++) {
if (slot_select_nr(&UE->frame_parms, proc->frame_rx, proc->nr_slot_rx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
......@@ -1100,7 +1101,7 @@ void *UE_thread(void *arg) {
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
UE->dcireq.slot = proc->nr_slot_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
......@@ -1108,7 +1109,7 @@ void *UE_thread(void *arg) {
nr_ue_scheduled_response(&UE_mac->scheduled_response);
printf("Processing subframe %d\n",proc->subframe_rx);
printf("Processing subframe %d slot %d\n",proc->subframe_rx,proc->nr_slot_rx);
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode);
}
......@@ -1117,12 +1118,13 @@ void *UE_thread(void *arg) {
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->ul_indication.slot = proc->nr_slot_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
getchar();
}
} // else loop_through_memory
} // start_rx_stream==1
} // UE->is_synchronized==1
......
targets/RT/USER/nr-uesoftmodem.c
View file @ c7dd406b
......@@ -696,11 +696,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms[CC_id]->numerology_index = 0;
frame_parms[CC_id]->ttis_per_subframe = 1;
frame_parms[CC_id]->slots_per_tti = 2;
}
}
......
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