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lizhongxiao
OpenXG-RAN
Commits
c97d5d04
Commit
c97d5d04
authored
May 18, 2022
by
Thomas Schlichter
Browse files
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Plain Diff
fixes from review
parent
44a98a85
Changes
4
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Showing
4 changed files
with
33 additions
and
40 deletions
+33
-40
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
+4
-4
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+22
-29
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
+5
-6
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+2
-1
No files found.
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
View file @
c97d5d04
...
...
@@ -44,16 +44,16 @@ void nr_ulsch_qpsk_llr(int32_t *rxdataF_comp,
uint32_t
nb_re
,
uint8_t
symbol
)
{
uint32_t
*
rxF
=
(
uint32_t
*
)
rxdataF_comp
;
uint32_t
*
llr32
=
(
uint32_t
*
)
ulsch_llr
;
c16_t
*
rxF
=
(
c16_t
*
)
rxdataF_comp
;
c16_t
*
llr32
=
(
c16_t
*
)
ulsch_llr
;
if
(
!
llr32
)
{
LOG_E
(
PHY
,
"nr_ulsch_qpsk_llr: llr is null, symbol %d, llr32 = %p
\n
"
,
symbol
,
llr32
);
}
for
(
int
i
=
0
;
i
<
nb_re
;
i
++
)
{
//*llr32 = *rxF;
((
int16_t
*
)
llr32
)[
0
]
=
((
int16_t
*
)
rxF
)[
0
]
/
8
;
((
int16_t
*
)
llr32
)[
1
]
=
((
int16_t
*
)
rxF
)[
1
]
/
8
;
llr32
->
r
=
rxF
->
r
>>
3
;
llr32
->
i
=
rxF
->
i
>>
3
;
rxF
++
;
llr32
++
;
}
...
...
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
View file @
c97d5d04
...
...
@@ -476,7 +476,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned
char
aarx
;
unsigned
short
k
;
unsigned
int
pilot_cnt
;
int16_t
ch
[
2
],
*
pil
,
*
rxF
,
*
dl_ch
,
*
fl
,
*
fm
,
*
fr
;
int16_t
ch
[
2
],
*
pil
,
*
rxF
,
*
dl_ch
;
int
ch_offset
,
symbol_offset
;
int
**
rxdataF
=
ue
->
common_vars
.
common_vars_rx_data_per_thread
[
proc
->
thread_id
].
rxdataF
;
...
...
@@ -491,9 +491,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
proc
->
thread_id
,
gNB_id
,
ch_offset
,
ue
->
frame_parms
.
ofdm_symbol_size
,
ue
->
frame_parms
.
Ncp
,
Ns
,
symbol
);
#endif
fl
=
filt16a_l1
;
fm
=
filt16a_m1
;
fr
=
filt16a_r1
;
#if CH_INTERP
int16_t
*
fl
=
filt16a_l1
;
int16_t
*
fm
=
filt16a_m1
;
int16_t
*
fr
=
filt16a_r1
;
#endif
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
if
(
scrambling_id
!=
ue
->
scramblingID_pdcch
){
...
...
@@ -652,39 +654,30 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k
+=
4
;
}
#else //ELSE CH_INTERP
int
ch_sum
[
2
];
int
ch_sum
[
2
]
=
{
0
,
0
}
;
for
(
pilot_cnt
=
0
;
pilot_cnt
<
(
3
*
nb_rb_coreset
);
pilot_cnt
+=
3
)
{
if
(
k
>=
ue
->
frame_parms
.
ofdm_symbol_size
){
k
-=
ue
->
frame_parms
.
ofdm_symbol_size
;
for
(
pilot_cnt
=
0
;
pilot_cnt
<
3
*
nb_rb_coreset
;
pilot_cnt
++
)
{
if
(
k
>=
ue
->
frame_parms
.
ofdm_symbol_size
)
{
k
-=
ue
->
frame_parms
.
ofdm_symbol_size
;
rxF
=
(
int16_t
*
)
&
rxdataF
[
aarx
][(
symbol_offset
+
k
+
1
)];
}
#ifdef DEBUG_PDCCH
printf
(
"pilot[%d] = (%d, %d)
\t
rxF[%d] = (%d, %d)
\n
"
,
pilot_cnt
+
0
,
pil
[
0
],
pil
[
1
],
k
+
1
,
rxF
[
0
],
rxF
[
1
]);
#endif
ch_sum
[
0
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
0
]
-
(
int32_t
)
pil
[
1
]
*
rxF
[
1
])
>>
15
);
ch_sum
[
1
]
=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
pil
+=
2
;
rxF
+=
8
;
#ifdef DEBUG_PDCCH
printf
(
"pilot[%d] = (%d, %d)
\t
rxF[%d] = (%d, %d)
\n
"
,
pilot_cnt
+
1
,
pil
[
0
],
pil
[
1
],
k
+
5
,
rxF
[
0
],
rxF
[
1
]);
printf
(
"pilot[%d] = (%d, %d)
\t
rxF[%d] = (%d, %d)
\n
"
,
pilot_cnt
,
pil
[
0
],
pil
[
1
],
k
+
1
,
rxF
[
0
],
rxF
[
1
]);
#endif
ch_sum
[
0
]
+=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
0
]
-
(
int32_t
)
pil
[
1
]
*
rxF
[
1
])
>>
15
);
ch_sum
[
1
]
+=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
pil
+=
2
;
rxF
+=
8
;
#ifdef DEBUG_PDCCH
printf
(
"pilot[%d] = (%d, %d)
\t
rxF[%d] = (%d, %d)
\n
"
,
pilot_cnt
+
2
,
pil
[
0
],
pil
[
1
],
k
+
9
,
rxF
[
0
],
rxF
[
1
]);
#endif
ch_sum
[
0
]
+=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
0
]
-
(
int32_t
)
pil
[
1
]
*
rxF
[
1
])
>>
15
);
ch_sum
[
1
]
+=
(
int16_t
)(((
int32_t
)
pil
[
0
]
*
rxF
[
1
]
+
(
int32_t
)
pil
[
1
]
*
rxF
[
0
])
>>
15
);
pil
+=
2
;
rxF
+=
8
;
ch
[
0
]
=
ch_sum
[
0
]
/
3
;
ch
[
1
]
=
ch_sum
[
1
]
/
3
;
k
+=
4
;
if
(
pilot_cnt
%
3
==
2
)
{
ch
[
0
]
=
ch_sum
[
0
]
/
3
;
ch
[
1
]
=
ch_sum
[
1
]
/
3
;
multadd_real_vector_complex_scalar
(
filt16a_1
,
ch
,
dl_ch
,
16
);
dl_ch
+=
24
;
k
+=
12
;
ch_sum
[
0
]
=
0
;
ch_sum
[
1
]
=
0
;
}
}
#endif //END CH_INTERP
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
View file @
c97d5d04
...
...
@@ -638,11 +638,10 @@ int nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t
beamforming_mode
)
{
uint32_t
*
rxF
=
(
uint32
_t
*
)
&
rxdataF_comp
[((
int32_t
)
symbol
*
nb_rb
*
12
)];
uint32_t
*
llr32
;
c16_t
*
rxF
=
(
c16
_t
*
)
&
rxdataF_comp
[((
int32_t
)
symbol
*
nb_rb
*
12
)];
c16_t
*
llr32
=
(
c16_t
*
)
dlsch_llr
;
int
i
;
llr32
=
(
uint32_t
*
)
dlsch_llr
;
if
(
!
llr32
)
{
LOG_E
(
PHY
,
"nr_dlsch_qpsk_llr: llr is null, symbol %d, llr32=%p
\n
"
,
symbol
,
llr32
);
return
(
-
1
);
...
...
@@ -657,9 +656,9 @@ int nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
*/
for
(
i
=
0
;
i
<
len
;
i
++
)
{
//*llr32 = *rxF;
((
int16_t
*
)
llr32
)[
0
]
=
((
int16_t
*
)
rxF
)[
0
]
/
8
;
((
int16_t
*
)
llr32
)[
1
]
=
((
int16_t
*
)
rxF
)[
1
]
/
8
;
//printf("dlsch_qpsk_llr %d : (%d,%d)\n",i,((int16_t*)llr32)[0],((int16_t*)llr32)[1]
);
llr32
->
r
=
rxF
->
r
>>
3
;
llr32
->
i
=
rxF
->
i
>>
3
;
//printf("dlsch_qpsk_llr %d : (%d,%d)\n", i, llr32->r, llr32->i
);
rxF
++
;
llr32
++
;
}
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @
c97d5d04
...
...
@@ -840,10 +840,11 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
mappingtype
,
add_pos
,
dmrslength
,
pusch_config_pdu
->
start_symbol_index
,
mac
->
scc
?
mac
->
scc
->
dmrs_TypeA_Position
:
mac
->
mib
->
dmrs_TypeA_Position
);
if
(
(
mac
->
ULbwp
[
ul_bwp_id
-
1
]
&&
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformPrecoder_disabled
))
if
(
mac
->
ULbwp
[
ul_bwp_id
-
1
]
&&
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformPrecoder_disabled
)
{
if
(
*
dci_format
!=
NR_UL_DCI_FORMAT_0_1
)
{
pusch_config_pdu
->
num_dmrs_cdm_grps_no_data
=
1
;
}
}
else
if
(
*
dci_format
==
NR_UL_DCI_FORMAT_0_0
||
(
mac
->
ULbwp
[
ul_bwp_id
-
1
]
&&
pusch_config_pdu
->
transform_precoding
==
NR_PUSCH_Config__transformPrecoder_enabled
))
pusch_config_pdu
->
num_dmrs_cdm_grps_no_data
=
2
;
...
...
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