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lizhongxiao
OpenXG-RAN
Commits
cb3b17ea
Commit
cb3b17ea
authored
Feb 02, 2022
by
Robert Schmidt
Browse files
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Merge remote-tracking branch 'origin/tx-thread-fix' into integration_2022_wk05_b
parents
8564ed55
e7441d5a
Changes
4
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4 changed files
with
38 additions
and
53 deletions
+38
-53
executables/nr-gnb.c
executables/nr-gnb.c
+1
-1
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+1
-1
openair1/PHY/NR_TRANSPORT/nr_pss.c
openair1/PHY/NR_TRANSPORT/nr_pss.c
+17
-25
openair1/PHY/NR_TRANSPORT/nr_sss.c
openair1/PHY/NR_TRANSPORT/nr_sss.c
+19
-26
No files found.
executables/nr-gnb.c
View file @
cb3b17ea
...
@@ -443,7 +443,7 @@ void init_gNB_Tpool(int inst) {
...
@@ -443,7 +443,7 @@ void init_gNB_Tpool(int inst) {
initNotifiedFIFO
(
gNB
->
L1_tx_out
);
initNotifiedFIFO
(
gNB
->
L1_tx_out
);
// we create 2 threads for L1 tx processing
// we create 2 threads for L1 tx processing
for
(
int
i
=
0
;
i
<
1
;
i
++
)
{
for
(
int
i
=
0
;
i
<
2
;
i
++
)
{
notifiedFIFO_elt_t
*
msgL1Tx
=
newNotifiedFIFO_elt
(
sizeof
(
processingData_L1tx_t
),
0
,
gNB
->
L1_tx_out
,
tx_func
);
notifiedFIFO_elt_t
*
msgL1Tx
=
newNotifiedFIFO_elt
(
sizeof
(
processingData_L1tx_t
),
0
,
gNB
->
L1_tx_out
,
tx_func
);
processingData_L1tx_t
*
msgDataTx
=
(
processingData_L1tx_t
*
)
NotifiedFifoData
(
msgL1Tx
);
processingData_L1tx_t
*
msgDataTx
=
(
processingData_L1tx_t
*
)
NotifiedFifoData
(
msgL1Tx
);
init_DLSCH_struct
(
gNB
,
msgDataTx
);
init_DLSCH_struct
(
gNB
,
msgDataTx
);
...
...
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
cb3b17ea
openair1/PHY/NR_TRANSPORT/nr_pss.c
View file @
cb3b17ea
...
@@ -30,44 +30,36 @@ int nr_generate_pss( int32_t *txdataF,
...
@@ -30,44 +30,36 @@ int nr_generate_pss( int32_t *txdataF,
nfapi_nr_config_request_scf_t
*
config
,
nfapi_nr_config_request_scf_t
*
config
,
NR_DL_FRAME_PARMS
*
frame_parms
)
NR_DL_FRAME_PARMS
*
frame_parms
)
{
{
int
i
,
k
,
l
,
m
;
int16_t
a
;
int16_t
d_pss
[
NR_PSS_LENGTH
];
int16_t
x
[
NR_PSS_LENGTH
];
int16_t
x
[
NR_PSS_LENGTH
];
const
int
x_initial
[
7
]
=
{
0
,
1
,
1
,
0
,
1
,
1
,
1
};
const
int
x_initial
[
7
]
=
{
0
,
1
,
1
,
0
,
1
,
1
,
1
};
uint8_t
Nid2
=
config
->
cell_config
.
phy_cell_id
.
value
%
3
;
/// Sequence generation
/// Sequence generation
for
(
i
=
0
;
i
<
7
;
i
++
)
for
(
i
nt
i
=
0
;
i
<
7
;
i
++
)
x
[
i
]
=
x_initial
[
i
];
x
[
i
]
=
x_initial
[
i
];
for
(
i
=
0
;
i
<
(
NR_PSS_LENGTH
-
7
);
i
++
)
{
for
(
i
nt
i
=
0
;
i
<
(
NR_PSS_LENGTH
-
7
);
i
++
)
{
x
[
i
+
7
]
=
(
x
[
i
+
4
]
+
x
[
i
])
%
2
;
x
[
i
+
7
]
=
(
x
[
i
+
4
]
+
x
[
i
])
%
2
;
}
}
for
(
i
=
0
;
i
<
NR_PSS_LENGTH
;
i
++
)
{
m
=
(
i
+
43
*
Nid2
)
%
(
NR_PSS_LENGTH
);
d_pss
[
i
]
=
(
1
-
2
*
x
[
m
])
*
23170
;
}
#ifdef NR_PSS_DEBUG
#ifdef NR_PSS_DEBUG
write_output
(
"d_pss.m"
,
"d_pss"
,
(
void
*
)
d_pss
,
NR_PSS_LENGTH
,
1
,
0
);
write_output
(
"d_pss.m"
,
"d_pss"
,
(
void
*
)
d_pss
,
NR_PSS_LENGTH
,
1
,
0
);
printf
(
"PSS: ofdm_symbol_size %d, first_carrier_offset %d
\n
"
,
frame_parms
->
ofdm_symbol_size
,
frame_parms
->
first_carrier_offset
);
printf
(
"PSS: ofdm_symbol_size %d, first_carrier_offset %d
\n
"
,
frame_parms
->
ofdm_symbol_size
,
frame_parms
->
first_carrier_offset
);
#endif
#endif
/// Resource mapping
/// Resource mapping
a
=
amp
;
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
// PSS occupies a predefined position (subcarriers 56-182, symbol 0) within the SSB block starting from
k
=
frame_parms
->
first_carrier_offset
+
frame_parms
->
ssb_start_subcarrier
+
56
;
//and
int
k
=
frame_parms
->
first_carrier_offset
+
frame_parms
->
ssb_start_subcarrier
+
56
;
//and
if
(
k
>=
frame_parms
->
ofdm_symbol_size
)
k
-=
frame_parms
->
ofdm_symbol_size
;
if
(
k
>=
frame_parms
->
ofdm_symbol_size
)
k
-=
frame_parms
->
ofdm_symbol_size
;
l
=
ssb_start_symbol
;
int
l
=
ssb_start_symbol
;
for
(
m
=
0
;
m
<
NR_PSS_LENGTH
;
m
++
)
{
uint8_t
Nid2
=
config
->
cell_config
.
phy_cell_id
.
value
%
3
;
for
(
int
i
=
0
;
i
<
NR_PSS_LENGTH
;
i
++
)
{
int
m
=
(
i
+
43
*
Nid2
)
%
(
NR_PSS_LENGTH
);
int16_t
d_pss
=
(
1
-
2
*
x
[
m
])
*
23170
;
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
// printf("pss: writing position k %d / %d\n",k,frame_parms->ofdm_symbol_size);
((
int16_t
*
)
txdataF
)[
2
*
(
l
*
frame_parms
->
ofdm_symbol_size
+
k
)]
=
(
a
*
d_pss
[
m
]
)
>>
15
;
((
int16_t
*
)
txdataF
)[
2
*
(
l
*
frame_parms
->
ofdm_symbol_size
+
k
)]
=
(((
int16_t
)
amp
)
*
d_pss
)
>>
15
;
k
++
;
k
++
;
if
(
k
>=
frame_parms
->
ofdm_symbol_size
)
if
(
k
>=
frame_parms
->
ofdm_symbol_size
)
...
...
openair1/PHY/NR_TRANSPORT/nr_sss.c
View file @
cb3b17ea
...
@@ -29,36 +29,28 @@ int nr_generate_sss( int32_t *txdataF,
...
@@ -29,36 +29,28 @@ int nr_generate_sss( int32_t *txdataF,
nfapi_nr_config_request_scf_t
*
config
,
nfapi_nr_config_request_scf_t
*
config
,
NR_DL_FRAME_PARMS
*
frame_parms
)
NR_DL_FRAME_PARMS
*
frame_parms
)
{
{
int
i
,
k
,
l
;
int16_t
x0
[
NR_SSS_LENGTH
];
int
m0
,
m1
;
int16_t
x1
[
NR_SSS_LENGTH
];
int
Nid
,
Nid1
,
Nid2
;
//int16_t a;
int16_t
d_sss
[
NR_SSS_LENGTH
];
int16_t
x0
[
NR_SSS_LENGTH
],
x1
[
NR_SSS_LENGTH
];
const
int
x0_initial
[
7
]
=
{
1
,
0
,
0
,
0
,
0
,
0
,
0
};
const
int
x0_initial
[
7
]
=
{
1
,
0
,
0
,
0
,
0
,
0
,
0
};
const
int
x1_initial
[
7
]
=
{
1
,
0
,
0
,
0
,
0
,
0
,
0
};
const
int
x1_initial
[
7
]
=
{
1
,
0
,
0
,
0
,
0
,
0
,
0
};
/// Sequence generation
/// Sequence generation
Nid
=
config
->
cell_config
.
phy_cell_id
.
value
;
int
Nid
=
config
->
cell_config
.
phy_cell_id
.
value
;
Nid2
=
Nid
%
3
;
int
Nid2
=
Nid
%
3
;
Nid1
=
(
Nid
-
Nid2
)
/
3
;
int
Nid1
=
(
Nid
-
Nid2
)
/
3
;
for
(
i
=
0
;
i
<
7
;
i
++
)
{
for
(
int
i
=
0
;
i
<
7
;
i
++
)
{
x0
[
i
]
=
x0_initial
[
i
];
x0
[
i
]
=
x0_initial
[
i
];
x1
[
i
]
=
x1_initial
[
i
];
x1
[
i
]
=
x1_initial
[
i
];
}
}
for
(
i
=
0
;
i
<
NR_SSS_LENGTH
-
7
;
i
++
)
{
for
(
int
i
=
0
;
i
<
NR_SSS_LENGTH
-
7
;
i
++
)
{
x0
[
i
+
7
]
=
(
x0
[
i
+
4
]
+
x0
[
i
])
%
2
;
x0
[
i
+
7
]
=
(
x0
[
i
+
4
]
+
x0
[
i
])
%
2
;
x1
[
i
+
7
]
=
(
x1
[
i
+
1
]
+
x1
[
i
])
%
2
;
x1
[
i
+
7
]
=
(
x1
[
i
+
1
]
+
x1
[
i
])
%
2
;
}
}
m0
=
15
*
(
Nid1
/
112
)
+
(
5
*
Nid2
);
int
m0
=
15
*
(
Nid1
/
112
)
+
(
5
*
Nid2
);
m1
=
Nid1
%
112
;
int
m1
=
Nid1
%
112
;
for
(
i
=
0
;
i
<
NR_SSS_LENGTH
;
i
++
)
{
d_sss
[
i
]
=
(
1
-
2
*
x0
[(
i
+
m0
)
%
NR_SSS_LENGTH
]
)
*
(
1
-
2
*
x1
[(
i
+
m1
)
%
NR_SSS_LENGTH
]
)
*
23170
;
}
#ifdef NR_SSS_DEBUG
#ifdef NR_SSS_DEBUG
write_output
(
"d_sss.m"
,
"d_sss"
,
(
void
*
)
d_sss
,
NR_SSS_LENGTH
,
1
,
1
);
write_output
(
"d_sss.m"
,
"d_sss"
,
(
void
*
)
d_sss
,
NR_SSS_LENGTH
,
1
,
1
);
...
@@ -67,11 +59,12 @@ int nr_generate_sss( int32_t *txdataF,
...
@@ -67,11 +59,12 @@ int nr_generate_sss( int32_t *txdataF,
/// Resource mapping
/// Resource mapping
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
// SSS occupies a predefined position (subcarriers 56-182, symbol 2) within the SSB block starting from
k
=
frame_parms
->
first_carrier_offset
+
frame_parms
->
ssb_start_subcarrier
+
56
;
//and
int
k
=
frame_parms
->
first_carrier_offset
+
frame_parms
->
ssb_start_subcarrier
+
56
;
//and
l
=
ssb_start_symbol
+
2
;
int
l
=
ssb_start_symbol
+
2
;
for
(
int
m
=
0
;
m
<
NR_SSS_LENGTH
;
m
++
)
{
for
(
int
i
=
0
;
i
<
NR_SSS_LENGTH
;
i
++
)
{
((
int16_t
*
)
txdataF
)[
2
*
(
l
*
frame_parms
->
ofdm_symbol_size
+
k
)]
=
(
amp
*
d_sss
[
m
])
>>
15
;
int16_t
d_sss
=
(
1
-
2
*
x0
[(
i
+
m0
)
%
NR_SSS_LENGTH
]
)
*
(
1
-
2
*
x1
[(
i
+
m1
)
%
NR_SSS_LENGTH
]
)
*
23170
;
((
int16_t
*
)
txdataF
)[
2
*
(
l
*
frame_parms
->
ofdm_symbol_size
+
k
)]
=
(((
int16_t
)
amp
)
*
d_sss
)
>>
15
;
k
++
;
k
++
;
if
(
k
>=
frame_parms
->
ofdm_symbol_size
)
if
(
k
>=
frame_parms
->
ofdm_symbol_size
)
...
...
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