Commit cbaa5449 authored by 黄灏's avatar 黄灏

Dpdkrf

parent d610c9a0
......@@ -523,6 +523,14 @@ add_library(oai_oxgrfdevif MODULE ${HWLIB_OXGRF_SOURCE} )
target_link_libraries(oai_oxgrfdevif oxgrf_ss)
include_directories("${OPENAIR_DIR}/radio/DPDKRF/")
set(HWLIB_DPDKRF_SOURCE
${OPENAIR_DIR}/radio/DPDKRF/dpdkrf_oai.c
)
add_library(oai_dpdkrfdevif MODULE ${HWLIB_DPDKRF_SOURCE} )
target_link_libraries(oai_dpdkrfdevif dpdkrf)
include_directories("${OPENAIR_DIR}/radio/ETHERNET/USERSPACE/LIB/")
set(TPLIB_ETHERNET_SOURCE
${OPENAIR_DIR}/radio/ETHERNET/USERSPACE/LIB/ethernet_lib.c
......
......@@ -280,7 +280,7 @@ function main() {
-w | --hardware)
# Use OAI_USRP as the key word USRP is used inside UHD driver
case "$2" in
"USRP" | "BLADERF" | "LMSSDR" | "IRIS" | "SIMU" | "AW2SORI"| "OXGRF")
"USRP" | "BLADERF" | "LMSSDR" | "IRIS" | "SIMU" | "AW2SORI"| "OXGRF" | "DPDKRF")
HW="OAI_"$2
;;
"None")
......@@ -587,6 +587,7 @@ function main() {
ln -sf liboai_bladerfdevif.so liboai_device.so
echo_info "liboai_device.so is linked to BLADERF device library"
elif [ "$HW" == "OAI_OXGRF" ] ; then
if [ ! -f "/usr/local/include/oxgrf_api_ss.h" ] ; then
sudo cp $THIS_SCRIPT_PATH/../radio/OXGRF/USERSPACE/LIB/oxgrf_api_ss.h /usr/local/include/oxgrf_api_ss.h
......@@ -598,6 +599,20 @@ function main() {
ln -sf liboai_oxgrfdevif.so liboai_device.so
echo_info "liboai_device.so is linked to OXGRF device library"
elif [ "$HW" == "OAI_DPDKRF" ] ; then
if [ ! -f "/usr/local/include/dpdkrf_lib.h" ] ; then
sudo cp $THIS_SCRIPT_PATH/../radio/DPDKRF/dpdkrf_lib.h /usr/local/include/dpdkrf_lib.h
sudo cp $THIS_SCRIPT_PATH/../radio/DPDKRF/libdpdkrf.so /usr/local/lib/libdpdkrf.so
sudo chmod +x /usr/local/lib/libdpdkrf.so
sudo ldconfig /usr/local/lib
fi
compilations $BUILD_DIR oai_dpdkrfdevif.txt oai_dpdkrfdevif
ln -sf liboai_dpdkrfdevif.so liboai_device.so
echo_info "liboai_device.so is linked to DPDKRF device library"
elif [ "$HW" == "OAI_LMSSDR" ] ; then
# if [ -f "/usr/include/libbladeRF.h" ] ; then
compilations $BUILD_DIR oai_lmssdrdevif.txt oai_lmssdrdevif
......
......@@ -44,7 +44,7 @@
#include "executables/softmodem-common.h"
const char *const devtype_names[MAX_RF_DEV_TYPE] =
{"", "USRP B200", "USRP X300", "USRP N300", "USRP X400", "BLADERF", "OXGRF_DEV", "LMSSDR", "IRIS", "No HW", "UEDv2", "RFSIMULATOR"};
{"", "USRP B200", "USRP X300", "USRP N300", "USRP X400", "BLADERF", "OXGRF_DEV", "LMSSDR", "IRIS", "No HW", "UEDv2", "RFSIMULATOR","DPDKRF"};
const char *get_devname(int devtype) {
if (devtype < MAX_RF_DEV_TYPE && devtype !=MIN_RF_DEV_TYPE )
......
......@@ -95,6 +95,7 @@ typedef enum {
BLADERF_DEV,
/*!\brief device is OXGRF pcie*/
OXGRF_DEV,
DPDKRF_DEV,
/*!\brief device is LMSSDR (SoDeRa)*/
LMSSDR_DEV,
/*!\brief device is Iris */
......
#ifndef DPDKRF_H
#define DPDKRF_H
#include <sys/socket.h>
#include <unistd.h>
#define SAMPLE_PER_PACKAGE 960
#define CTRL_CMD_ID_CFG 0x1111
typedef struct
{
uint32_t header; // 0x12345678
uint16_t cmdType; // 0x1111
uint16_t enable; // 1-enable whole msg, 0-disable.
uint8_t rfState; // 0-rf disable; 1-enable; other value will disable this para.
uint8_t digLoopMode; // 0-normal work; 1-digital loop back mode. other value will disable this para.
uint8_t pad[6];
uint8_t rxGain[4]; // valid range is [0~30],other value will disable this para.
uint8_t txGain[4]; // valid range is [0~30],other value will disable this para.
uint64_t rxFreq; // unit is Hz; <1000 will disable this para.
uint64_t txFreq; // unit is Hz; <1000 will disable this para.
uint32_t crc;
uint32_t tail; // 0xA5A5A5A5
} STRUCT_CTRL_CMD_CFG_REQ;
typedef struct
{
uint32_t header; // 0x87654321
uint16_t cmdType; // 0x1111
uint16_t enable; // 1-enable whole msg, 0-disable.
uint8_t rfState; // 0-rf disable; 1-enable; other value will disable this para.
uint8_t digLoopMode; // 0-normal work; 1-digital loop back mode. other value will disable this para.
uint8_t pad[6];
uint8_t rxGain[4]; // valid range is [0~30],other value will disable this para.
uint8_t txGain[4]; // valid range is [0~30],other value will disable this para.
uint64_t rxFreq; // unit is Hz; <1000 will disable this para.
uint64_t txFreq; // unit is Hz; <1000 will disable this para.
uint32_t crc;
uint32_t tail; // 0x5A5A5A5A
} STRUCT_CTRL_CMD_CFG_ACK;
void Dpdk_device_init(int lcore_id, int antNum, int startDelay, int logEnable);
/**
* receive 1 package data from port. the package may DATA or CTRL frame.
* this function is blocked until receive 1 package.
* @param sockId
* sock ID, can only be 0 or 1.
* @param buf
* 2 level buffer pointer. buf[0] will store antenna 0 data, and buf[1] will store antenna 1 data.
* these 2 buffer should be malloc before call this function.
* @param timestamp
* a pointer to store the timestamp.
* @return
* - the received data sample num.
*/
int dpdkrf_recvDataPack(int sockfd, uint8_t **buf, int *timestamp);
/**
* send 1 package data. the package may DATA or CTRL frame.
* for data frame, 1 package hold 2 antenna data, each antenna has half.
* @param sockId
* sock ID, can only be 0 or 1.
* @param buf
* 2 level buffer pointer. buf[0] store antenna 0 data, and buf[1] store antenna 1 data.
* @param nsamps
* package sample Number.
* @param ctrlFlag
* - 0 data frame, else control frame.
* @param timestamp
* package sequence Number, at which the data will appear at air.
* @return
* - 0: Success;
* - others: send failed.
*/
int dpdkrf_sendDataPack(int sockfd, uint8_t **buf, int nsamps, int flags, int sn);
int32_t trx_dpdkrf_read(uint8_t **buff, uint32_t nsamps, uint64_t *timestamp);
int32_t trx_dpdkrf_write(uint8_t **buff, int nsamps, uint64_t timestamp);
int32_t trx_dpdkrf_write_ctrl(uint8_t **buff);
void *trx_dpdkrf_read_ctrl();
void plot(int type, void *data, int len);
#endif // HELLO_HELLO_H
\ No newline at end of file
#include <rte_eal.h>
#include <rte_ethdev.h>
#include <rte_mbuf.h>
#include <rte_malloc.h>
#include <rte_timer.h>
#include<sys/types.h>
#include<sys/stat.h>
#include<fcntl.h>
#include <stdlib.h>
#include<unistd.h>
#include <sched.h>
#include <pthread.h>
#include <string.h> /**> memset */
#include <signal.h>
#include <termios.h>
#include <rte_eal.h> /**> rte_eal_init */
#include <rte_debug.h> /**> for rte_panic */
#include <rte_errno.h> /**> rte_errno global var */
#include <rte_memzone.h> /**> rte_memzone_dump */
#include <rte_memcpy.h>
#include <rte_string_fns.h>
#include <rte_spinlock.h>
#include <time.h> /** For SLEEP **/
#include <getopt.h>
#include <stdio.h>
#include <arpa/inet.h>
#include <stdbool.h>
#include <inttypes.h>
#include <sys/time.h>
#include <math.h>
#include "dpdkrf_oai.h"
#include "dpdkrf_lib.h"
#include "common/utils/LOG/log.h"
#define SAMPLE_PER_PACKAGE 960
#define ANT_PORT_NUM 1
int num_devices = 0;
#define DEFAULT_NUM 61440
static uint8_t cache_rx[4][SAMPLE_PER_PACKAGE*512];
static uint8_t cache_tx[4][SAMPLE_PER_PACKAGE*512];
#define CTRL_BUF_NUM 64
int32_t gTxCtrlBuf[SAMPLE_PER_PACKAGE * 2 * CTRL_BUF_NUM] __attribute__((aligned(8)));
int32_t gRxCtrlBuf[SAMPLE_PER_PACKAGE * 2 * CTRL_BUF_NUM] __attribute__((aligned(8)));
int gRxCtrlIdx = 0;
int gRxCtrlIdxRead = 0;
void trx_setMsgGainRx(void*buf, int g1, int g2, int g3, int g4)
{
STRUCT_CTRL_CMD_CFG_REQ *msg = buf;
memset(msg, 0, sizeof(STRUCT_CTRL_CMD_CFG_REQ));
msg->header = 0x12345678;
msg->cmdType = CTRL_CMD_ID_CFG;
msg->enable = 1;
msg->rfState = 1; // NO effect;
msg->digLoopMode = 3; // NO effect;
msg->rxGain[0] = g1;
msg->rxGain[1] = g2;
msg->rxGain[2] = g3;
msg->rxGain[3] = g4;
msg->txGain[0] = 100;
msg->txGain[1] = 100;
msg->txGain[2] = 100;
msg->txGain[3] = 100;
msg->txFreq = 0;
msg->rxFreq = 0;
return;
}
void trx_setMsgGainTx(void*buf, int g1, int g2, int g3, int g4)
{
STRUCT_CTRL_CMD_CFG_REQ *msg = buf;
memset(msg, 0, sizeof(STRUCT_CTRL_CMD_CFG_REQ));
msg->header = 0x12345678;
msg->cmdType = CTRL_CMD_ID_CFG;
msg->enable = 1;
msg->rfState = 1; // NO effect;
msg->digLoopMode = 3; // NO effect;
msg->rxGain[0] = 30;
msg->rxGain[1] = 30;
msg->rxGain[2] = 30;
msg->rxGain[3] = 30;
msg->txGain[0] = g1;
msg->txGain[1] = g2;
msg->txGain[2] = g3;
msg->txGain[3] = g4;
msg->txFreq = 0;
msg->rxFreq = 0;
return;
}
void* trx_dpdkrf_read_ctrl()
{
int t = (gRxCtrlIdx - gRxCtrlIdxRead + CTRL_BUF_NUM) % CTRL_BUF_NUM;
if (t != 0)
{
void*buff = &gRxCtrlBuf[gRxCtrlIdxRead * SAMPLE_PER_PACKAGE * 2];
gRxCtrlIdxRead++;
if (gRxCtrlIdxRead >= CTRL_BUF_NUM)
gRxCtrlIdxRead = 0;
return buff;
}
return 0;
}
int32_t trx_dpdkrf_write_ctrl(uint8_t **buff)
{
dpdkrf_sendDataPack(0, &buff[0], SAMPLE_PER_PACKAGE, 1, 0);
return 0;
}
int32_t test_dpdkrf_read (openair0_device *device, openair0_timestamp *ptimestamp, void **buff1, int nsamps, int cc){
void *buff[4];
for (int i = 0; i < ANT_PORT_NUM; i++)
{
buff[i] = buff1[i];
}
if (ANT_PORT_NUM == 1)
{
buff[1] = cache_rx[1];
}
int32_t rr = trx_dpdkrf_read(buff, nsamps, ptimestamp);
return nsamps;
}
int32_t test_dpdkrf_write (openair0_device *device,openair0_timestamp timestamp, void **buff1, int nsamps, int cc, int flags){
void *buff[4];
for (int i = 0; i < ANT_PORT_NUM; i++)
{
buff[i] = buff1[i];
}
if (ANT_PORT_NUM == 1)
{
buff[1] = cache_tx[1];
}
int32_t rr = trx_dpdkrf_write(buff,nsamps, timestamp);
return nsamps;
}
int trx_dpdkrf_start(openair0_device *device) {
uint8_t **txpCtrlgain = rte_malloc(NULL, 4 * sizeof(uint8_t), 0);
for (int i = 0; i < 4; i++)
{
txpCtrlgain[i] = (uint8_t *)gTxCtrlBuf;
}
LOG_I(HW, "[dpdkrf] Start dpdkrf ...\n");
Dpdk_device_init(15, 2, 5000000 * 5, 1);
trx_setMsgGainTx(gTxCtrlBuf, 0, 0, 0, 0);
txpCtrlgain[0] = (uint8_t *)gTxCtrlBuf;
trx_dpdkrf_write_ctrl(txpCtrlgain);
return 0;
}
void trx_dpdkrf_end(openair0_device *device){
}
int trx_dpdkrf_get_stats(openair0_device* device) {
return(0);
}
int trx_dpdkrf_reset_stats(openair0_device* device) {
return(0);
}
int trx_dpdkrf_stop(openair0_device* device) {
return(0);
}
int trx_dpdkrf_set_freq(openair0_device* device, openair0_config_t *openair0_cfg1) {
// printf("1freq = %ld %ld\n\n",openair0_cfg->rx_freq[0],openair0_cfg->tx_freq[0]);
// uint8_t **txpCtrl = rte_malloc(NULL, 4 * sizeof(uint8_t), 0);
// trx_setMsgFreq(gTxCtrlBuf, (uint64_t)(openair0_cfg->rx_freq[0]),(uint64_t)(openair0_cfg->tx_freq[0]));
// txpCtrl[0] = (uint8_t *)gTxCtrlBuf;
// trx_dpdkrf_write_ctrl(txpCtrl);
return(0);
}
int trx_dpdkrf_set_gains(openair0_device* device, openair0_config_t *openair0_cfg) {
if (openair0_cfg->rx_gain[0] > 65+openair0_cfg->rx_gain_offset[0]) {
LOG_E(HW, "[oxgrf] Reduce RX Gain 0 by %f dB\n", openair0_cfg->rx_gain[0] - openair0_cfg->rx_gain_offset[0] - 65);
return -1;
}
uint8_t **txpCtrl = rte_malloc(NULL, 4 * sizeof(uint8_t), 0);
trx_setMsgGainRx(gTxCtrlBuf,(uint32_t)(openair0_cfg->rx_gain[0] > 65?65:openair0_cfg->rx_gain[0]),(uint32_t)(openair0_cfg->rx_gain[1] > 65?65:openair0_cfg->rx_gain[1]),100,100 );
int tx_gain1 = ((uint32_t)openair0_cfg->tx_gain[0] > 90?90:(uint32_t)openair0_cfg->tx_gain[0]);
int tx_gain2 = ((uint32_t)openair0_cfg->tx_gain[1] > 90?90:(uint32_t)openair0_cfg->tx_gain[1]);
trx_setMsgGainTx(gTxCtrlBuf, (90 - tx_gain1) * 1000,(90 - tx_gain2) * 1000,100,100);
txpCtrl[0] = (uint8_t *)gTxCtrlBuf;
trx_dpdkrf_write_ctrl(txpCtrl);
return(0);
}
int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
dpdkrf_state_t *dpdkrf = (dpdkrf_state_t*)malloc(sizeof(dpdkrf_state_t));
memset(dpdkrf, 0, sizeof(dpdkrf_state_t));
LOG_I(HW, "[dpdkrf] openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
LOG_I(HW, "[dpdkrf] openair0_cfg[0].rx_num_channels == '%d'\n", openair0_cfg[0].rx_num_channels);
LOG_I(HW, "[dpdkrf] openair0_cfg[0].tx_num_channels == '%d'\n", openair0_cfg[0].tx_num_channels);
// init required params
switch ((int)openair0_cfg->sample_rate) {
case 122880000:
openair0_cfg->samples_per_packet = 122880;
openair0_cfg->tx_sample_advance = 70;
openair0_cfg[0].tx_bw = 100e6;
openair0_cfg[0].rx_bw = 100e6;
break;
case 61440000:
openair0_cfg->samples_per_packet = 61440;
openair0_cfg->tx_sample_advance = 70;
openair0_cfg[0].tx_bw = 40e6;
openair0_cfg[0].rx_bw = 40e6;
break;
case 30720000:
openair0_cfg->samples_per_packet = 30720;
openair0_cfg->tx_sample_advance = 70;
openair0_cfg[0].tx_bw = 20e6;
openair0_cfg[0].rx_bw = 20e6;
break;
case 15360000:
openair0_cfg->samples_per_packet = 15360;
openair0_cfg->tx_sample_advance = 68;
openair0_cfg[0].tx_bw = 10e6;
openair0_cfg[0].rx_bw = 10e6;
break;
case 7680000:
openair0_cfg->samples_per_packet = 7680;
openair0_cfg->tx_sample_advance = 34;
openair0_cfg[0].tx_bw = 5e6;
openair0_cfg[0].rx_bw = 5e6;
break;
case 1920000:
openair0_cfg->samples_per_packet = 1920;
openair0_cfg->tx_sample_advance = 9;
openair0_cfg[0].tx_bw = 1.25e6;
openair0_cfg[0].rx_bw = 1.25e6;
break;
default:
LOG_I(HW, "[dpdkrf] Error: unknown sampling rate %f\n", openair0_cfg->sample_rate);
free(dpdkrf);
exit(-1);
break;
}
dpdkrf->sample_rate = (unsigned int)openair0_cfg->sample_rate;
LOG_I(HW, "[rf] sampling_rate %d\n", dpdkrf->sample_rate);
dpdkrf->rx_num_channels = openair0_cfg[0].rx_num_channels;
dpdkrf->tx_num_channels = openair0_cfg[0].tx_num_channels;
for (int i = 0; i < 1920 * 2; i++)
gTxCtrlBuf[i] = i;
char *arg[1] = {"./nr-softmodem"};
if (rte_eal_init(1,arg) < 0) {
rte_exit(EXIT_FAILURE, "Error with EAL init\n");
}
device->Mod_id = num_devices++;
device->type = DPDKRF_DEV;
device->trx_start_func = trx_dpdkrf_start;
device->trx_end_func = trx_dpdkrf_end;
device->trx_read_func = test_dpdkrf_read;
device->trx_write_func = test_dpdkrf_write;
device->trx_get_stats_func = trx_dpdkrf_get_stats;
device->trx_reset_stats_func = trx_dpdkrf_reset_stats;
device->trx_stop_func = trx_dpdkrf_stop;
device->trx_set_freq_func = trx_dpdkrf_set_freq;
device->trx_set_gains_func = trx_dpdkrf_set_gains;
device->openair0_cfg = openair0_cfg;
device->priv = (void *)dpdkrf;
// rte_timer_setup();
return 0;
}
#include "common_lib.h"
#include "nr-softmodem.h"
typedef struct {
//! Sample rate
unsigned int sample_rate;
int rx_num_channels;
int tx_num_channels;
//! Number of underflows
int num_underflows;
//! Number of overflows
int num_overflows;
//! number of RX errors
int num_rx_errors;
//! Number of TX errors
int num_tx_errors;
//! timestamp of current TX
uint64_t tx_current_ts;
//! timestamp of current RX
uint64_t rx_current_ts;
//! number of TX samples
uint64_t tx_nsamps;
//! number of RX samples
uint64_t rx_nsamps;
//! number of TX count
uint64_t tx_count;
//! number of RX count
uint64_t rx_count;
//! timestamp of RX packet
openair0_timestamp rx_timestamp;
}dpdkrf_state_t;
#define REMOVE_SUBSTRING_WITHCOMAS(S, TOREMOVE) \
remove_substring(S, TOREMOVE ","); \
remove_substring(S, TOREMOVE ", "); \
remove_substring(S, "," TOREMOVE); \
remove_substring(S, ", " TOREMOVE); \
remove_substring(S, TOREMOVE)
static inline void remove_substring(char* s, const char* toremove)
{
while ((s = strstr(s, toremove))) {
memmove(s, s + strlen(toremove), 1 + strlen(s + strlen(toremove)));
}
}
static inline void copy_subdev_string(char* dst, char* src)
{
int n = 0;
int len = (int)strlen(src);
/* Copy until end of string or comma */
while (n < len && src[n] != '\0' && src[n] != ',') {
dst[n] = src[n];
n++;
}
dst[n] = '\0';
}
\ No newline at end of file
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 100;
plmn_list = ({
mcc = 466;
mnc = 92;
mnc_length = 2;
snssaiList = (
{
sst = 1;
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
sib1_tda = 15;
min_rxtxtime = 6;
pdsch_AntennaPorts_XP = 1;
pusch_AntennaPorts = 2;
do_CSIRS = 0;
ul_prbblacklist = "135,136,137,138"
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 12;
searchSpaceZero = 10;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3300.24 + 134*12*30e3 = 3348.48 MHz (5G NR GSCN: 7741)
absoluteFrequencySSB = 512910;
dl_frequencyBand = 41;
# this is 3300.24 MHz
dl_absoluteFrequencyPointA = 503190;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 273;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=162 (275*(275-L+1))+(274-RBstart))
initialDLBWPlocationAndBandwidth = 31624;
#
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 10;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 41;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 273;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 12;
preambleReceivedTargetPower = -90;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -70;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 1099; // RBstart=0, L=273 (100 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 1099; // RBstart=0, L=273 (100 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.199.193";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "enp90s0";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.199.218";
GNB_INTERFACE_NAME_FOR_NGU = "enp90s0";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.199.218";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
pusch_FailureThres = 1000;
ulsch_max_frame_inactivity = 0;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 80;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 2;
nb_rx = 2;
att_tx = 85;
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 25;
eNB_instances = [0];
##beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x0000];
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=1660";
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
hw_log_level ="info";
phy_log_level ="info";
mac_log_level ="info";
rlc_log_level ="info";
pdcp_log_level ="info";
rrc_log_level ="info";
ngap_log_level ="debug";
f1ap_log_level ="debug";
};
Active_gNBs = ( "gNB-OAI");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-OAI";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 100;
plmn_list = ({ mcc = 466; mnc = 92; mnc_length = 2; snssaiList = ({ sst = 1 }) });
nr_cellid = 12345678L;
////////// Physical parameters:
sib1_tda = 15;
min_rxtxtime = 6;
do_CSIRS = 0;
do_SRS = 0;
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 2;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 12 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 512910;
dl_frequencyBand = 41;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 503190;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 273;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 2;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 41;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 273;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 31624;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -96;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// AMF parameters:
amf_ip_address = ( { ipv4 = "192.168.199.193";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "enp90s0";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.199.218";
GNB_INTERFACE_NAME_FOR_NGU = "enp90s0";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.199.218";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity = 1;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 85
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 25;
sf_extension = 0;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000];
sdr_addrs = "dev=pciex:0,auxdac1=340";
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="debug";
ngap_log_verbosity ="medium";
};
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