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lizhongxiao
OpenXG-RAN
Commits
dd5ca817
Commit
dd5ca817
authored
Oct 13, 2023
by
francescomani
Committed by
Laurent THOMAS
Jan 25, 2024
Browse files
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Plain Diff
MR2510 handling reception of CSI command for aperiodic CSI reporting
parent
77525618
Changes
8
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8 changed files
with
245 additions
and
97 deletions
+245
-97
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+7
-13
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+5
-0
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
+1
-0
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+2
-2
openair2/LAYER2/NR_MAC_UE/mac_defs.h
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+14
-1
openair2/LAYER2/NR_MAC_UE/mac_proto.h
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+38
-17
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+102
-63
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+76
-1
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
dd5ca817
...
...
@@ -37,18 +37,6 @@
typedef signed char int8_t;
*/
typedef
struct
{
uint8_t
uci_format
;
uint8_t
uci_channel
;
uint8_t
harq_ack_bits
;
uint32_t
harq_ack
;
uint8_t
csi_bits
;
uint32_t
csi
;
uint8_t
sr_bits
;
uint32_t
sr
;
}
fapi_nr_uci_pdu_rel15_t
;
typedef
enum
{
RLM_no_monitoring
=
0
,
RLM_out_of_sync
=
1
,
...
...
@@ -250,10 +238,16 @@ typedef struct
typedef
struct
{
// payloads with fixed array size
// no place to free the dinamically allocated
// vector without L1 implementation
uint16_t
harq_ack_bit_length
;
uint64_t
harq_payload
;
uint16_t
csi_part1_bit_length
;
uint64_t
csi_part1_payload
;
uint16_t
csi_part2_bit_length
;
uint8_t
alpha_scaling
;
uint64_t
csi_part2_payload
;
uint8_t
alpha_scaling
;
// 0 = 0.5, 1 = 0.65, 2 = 0.8, 3 = 1
uint8_t
beta_offset_harq_ack
;
uint8_t
beta_offset_csi1
;
uint8_t
beta_offset_csi2
;
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @
dd5ca817
...
...
@@ -132,6 +132,11 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
const
nfapi_nr_ue_pusch_pdu_t
*
pusch_pdu
=
&
ulsch_ue
->
pusch_pdu
;
uint32_t
tb_size
=
pusch_pdu
->
pusch_data
.
tb_size
;
AssertFatal
(
pusch_pdu
->
pusch_uci
.
harq_ack_bit_length
==
0
&&
pusch_pdu
->
pusch_uci
.
csi_part1_bit_length
==
0
&&
pusch_pdu
->
pusch_uci
.
csi_part2_bit_length
==
0
,
"UCI on PUSCH not supported
\n
"
);
int
start_symbol
=
pusch_pdu
->
start_symbol_index
;
uint16_t
ul_dmrs_symb_pos
=
pusch_pdu
->
ul_dmrs_symb_pos
;
uint8_t
number_of_symbols
=
pusch_pdu
->
nr_of_symbols
;
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @
dd5ca817
...
...
@@ -563,6 +563,7 @@ typedef struct NR_UE_UL_BWP {
NR_PUSCH_TimeDomainResourceAllocationList_t
*
tdaList_Common
;
NR_ConfiguredGrantConfig_t
*
configuredGrantConfig
;
NR_PUSCH_Config_t
*
pusch_Config
;
NR_UCI_OnPUSCH_t
*
uci_onPusch
;
NR_PUCCH_Config_t
*
pucch_Config
;
NR_PUCCH_ConfigCommon_t
*
pucch_ConfigCommon
;
NR_SRS_Config_t
*
srs_Config
;
...
...
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @
dd5ca817
...
...
@@ -5211,7 +5211,7 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, nr_csi_report_t *cs
int
csi_resourceidx
=
0
;
while
(
found_resource
==
0
&&
csi_resourceidx
<
csi_MeasConfig
->
csi_ResourceConfigToAddModList
->
list
.
count
)
{
csi_resourceconfig
=
csi_MeasConfig
->
csi_ResourceConfigToAddModList
->
list
.
array
[
csi_resourceidx
];
if
(
csi_resourceconfig
->
csi_ResourceConfigId
==
csi_ResourceConfigId
)
if
(
csi_resourceconfig
->
csi_ResourceConfigId
==
csi_ResourceConfigId
)
found_resource
=
1
;
csi_resourceidx
++
;
}
...
...
@@ -5229,7 +5229,7 @@ void compute_csi_bitlen(NR_CSI_MeasConfig_t *csi_MeasConfig, nr_csi_report_t *cs
if
(
csi_MeasConfig
->
csi_SSB_ResourceSetToAddModList
->
list
.
array
[
csi_idx
]
->
csi_SSB_ResourceSetId
==
*
(
csi_resourceconfig
->
csi_RS_ResourceSetList
.
choice
.
nzp_CSI_RS_SSB
->
csi_SSB_ResourceSetList
->
list
.
array
[
0
])){
//We can configure only one SSB resource set from spec 38.331 IE CSI-ResourceConfig
nb_resources
=
csi_MeasConfig
->
csi_SSB_ResourceSetToAddModList
->
list
.
array
[
csi_idx
]
->
csi_SSB_ResourceList
.
list
.
count
;
nb_resources
=
csi_MeasConfig
->
csi_SSB_ResourceSetToAddModList
->
list
.
array
[
csi_idx
]
->
csi_SSB_ResourceList
.
list
.
count
;
csi_report
->
SSB_Index_list
=
csi_MeasConfig
->
csi_SSB_ResourceSetToAddModList
->
list
.
array
[
csi_idx
]
->
csi_SSB_ResourceList
.
list
.
array
;
csi_report
->
CSI_Index_list
=
NULL
;
break
;
...
...
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @
dd5ca817
...
...
@@ -455,6 +455,19 @@ typedef struct {
A_SEQUENCE_OF
(
NR_SearchSpace_t
)
list_SS
;
}
NR_BWP_PDCCH_t
;
typedef
struct
csi_payload
{
uint32_t
part1_payload
;
uint32_t
part2_payload
;
int
p1_bits
;
int
p2_bits
;
}
csi_payload_t
;
typedef
enum
{
WIDEBAND_ON_PUCCH
,
SUBBAND_ON_PUCCH
,
ON_PUSCH
}
CSI_mapping_t
;
/*!\brief Top level UE MAC structure */
typedef
struct
NR_UE_MAC_INST_s
{
module_id_t
ue_id
;
...
...
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @
dd5ca817
...
...
@@ -216,6 +216,28 @@ void release_mac_configuration(NR_UE_MAC_INST_t *mac);
void
nr_ue_ul_scheduler
(
nr_uplink_indication_t
*
ul_info
);
void
nr_ue_dl_scheduler
(
nr_downlink_indication_t
*
dl_info
);
csi_payload_t
nr_ue_aperiodic_csi_reporting
(
NR_UE_MAC_INST_t
*
mac
,
dci_field_t
csi_request
,
int
tda
,
long
*
K2
);
/**\brief fill nr_scheduled_response struct instance
@param nr_scheduled_response_t * pointer to scheduled_response instance to fill
@param fapi_nr_dl_config_request_t* pointer to dl_config,
@param fapi_nr_ul_config_request_t* pointer to ul_config,
@param fapi_nr_tx_request_t* pointer to tx_request;
@param module_id_t mod_id module ID
@param int cc_id CC ID
@param frame_t frame frame number
@param int slot reference number
@param void *phy_pata pointer to a PHY specific structure to be filled in the scheduler response (can be null) */
void
fill_scheduled_response
(
nr_scheduled_response_t
*
scheduled_response
,
fapi_nr_dl_config_request_t
*
dl_config
,
fapi_nr_ul_config_request_t
*
ul_config
,
fapi_nr_tx_request_t
*
tx_request
,
module_id_t
mod_id
,
int
cc_id
,
frame_t
frame
,
int
slot
,
void
*
phy_data
);
/*! \fn int8_t nr_ue_get_SR(module_id_t module_idP, frame_t frameP, slot_t slotP);
\brief Called by PHY to get sdu for PUSCH transmission. It performs the following operations: Checks BSR for DCCH, DCCH1 and
DTCH corresponding to previous values computed either in SR or BSR procedures. It gets rlc status indications on DCCH,DCCH1 and
...
...
@@ -285,27 +307,25 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
int
nr_get_csi_measurements
(
NR_UE_MAC_INST_t
*
mac
,
frame_t
frame
,
int
slot
,
PUCCH_sched_t
*
pucch
);
uint8_t
get_ssb_rsrp_payload
(
NR_UE_MAC_INST_t
*
mac
,
PUCCH_sched_t
*
pucch
,
csi_payload_t
get_ssb_rsrp_payload
(
NR_UE_MAC_INST_t
*
mac
,
struct
NR_CSI_ReportConfig
*
csi_reportconfig
,
NR_CSI_ResourceConfigId_t
csi_ResourceConfigId
,
NR_CSI_MeasConfig_t
*
csi_MeasConfig
);
uint8_t
get_csirs_RI_PMI_CQI_payload
(
NR_UE_MAC_INST_t
*
mac
,
PUCCH_sched_t
*
pucch
,
csi_payload_t
get_csirs_RI_PMI_CQI_payload
(
NR_UE_MAC_INST_t
*
mac
,
struct
NR_CSI_ReportConfig
*
csi_reportconfig
,
NR_CSI_ResourceConfigId_t
csi_ResourceConfigId
,
NR_CSI_MeasConfig_t
*
csi_MeasConfig
);
NR_CSI_MeasConfig_t
*
csi_MeasConfig
,
CSI_mapping_t
mapping_type
);
uint8_t
get_csirs_RSRP_payload
(
NR_UE_MAC_INST_t
*
mac
,
PUCCH_sched_t
*
pucch
,
csi_payload_t
get_csirs_RSRP_payload
(
NR_UE_MAC_INST_t
*
mac
,
struct
NR_CSI_ReportConfig
*
csi_reportconfig
,
NR_CSI_ResourceConfigId_t
csi_ResourceConfigId
,
NR_CSI_MeasConfig_t
*
csi_MeasConfig
);
uint8_t
nr_get_csi_payload
(
NR_UE_MAC_INST_t
*
mac
,
PUCCH_sched_t
*
pucch
,
csi_payload_t
nr_get_csi_payload
(
NR_UE_MAC_INST_t
*
mac
,
int
csi_report_id
,
CSI_mapping_t
mapping_type
,
NR_CSI_MeasConfig_t
*
csi_MeasConfig
);
uint8_t
get_rsrp_index
(
int
rsrp
);
...
...
@@ -524,6 +544,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_tda_info_t
*
tda_info
,
nfapi_nr_ue_pusch_pdu_t
*
pusch_config_pdu
,
dci_pdu_rel15_t
*
dci
,
csi_payload_t
*
csi_report
,
RAR_grant_t
*
rar_grant
,
uint16_t
rnti
,
const
nr_dci_format_t
dci_format
);
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
dd5ca817
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @
dd5ca817
...
...
@@ -429,6 +429,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_tda_info_t
*
tda_info
,
nfapi_nr_ue_pusch_pdu_t
*
pusch_config_pdu
,
dci_pdu_rel15_t
*
dci
,
csi_payload_t
*
csi_report
,
RAR_grant_t
*
rar_grant
,
uint16_t
rnti
,
const
nr_dci_format_t
dci_format
)
...
...
@@ -538,6 +539,38 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu
->
tbslbrm
=
0
;
}
else
if
(
dci
)
{
if
(
dci
->
csi_request
.
nbits
>
0
&&
dci
->
csi_request
.
val
>
0
)
{
AssertFatal
(
csi_report
,
"CSI report needs to be present in case of CSI request
\n
"
);
pusch_config_pdu
->
pusch_uci
.
csi_part1_bit_length
=
csi_report
->
p1_bits
;
pusch_config_pdu
->
pusch_uci
.
csi_part1_payload
=
csi_report
->
part1_payload
;
pusch_config_pdu
->
pusch_uci
.
csi_part2_bit_length
=
csi_report
->
p2_bits
;
pusch_config_pdu
->
pusch_uci
.
csi_part2_payload
=
csi_report
->
part2_payload
;
AssertFatal
(
pusch_Config
&&
pusch_Config
->
uci_OnPUSCH
,
"UCI on PUSCH need to be configured
\n
"
);
pusch_config_pdu
->
pusch_uci
.
alpha_scaling
=
pusch_Config
->
uci_OnPUSCH
->
choice
.
setup
->
scaling
;
AssertFatal
(
pusch_Config
->
uci_OnPUSCH
->
choice
.
setup
->
betaOffsets
&&
pusch_Config
->
uci_OnPUSCH
->
choice
.
setup
->
betaOffsets
->
present
==
NR_UCI_OnPUSCH__betaOffsets_PR_semiStatic
,
"Only semistatic beta offset is supported
\n
"
);
NR_BetaOffsets_t
*
beta_offsets
=
pusch_Config
->
uci_OnPUSCH
->
choice
.
setup
->
betaOffsets
->
choice
.
semiStatic
;
pusch_config_pdu
->
pusch_uci
.
beta_offset_harq_ack
=
pusch_config_pdu
->
pusch_uci
.
harq_ack_bit_length
>
2
?
(
pusch_config_pdu
->
pusch_uci
.
harq_ack_bit_length
<
12
?
*
beta_offsets
->
betaOffsetACK_Index2
:
*
beta_offsets
->
betaOffsetACK_Index3
)
:
*
beta_offsets
->
betaOffsetACK_Index1
;
pusch_config_pdu
->
pusch_uci
.
beta_offset_csi1
=
pusch_config_pdu
->
pusch_uci
.
csi_part1_bit_length
<
12
?
*
beta_offsets
->
betaOffsetCSI_Part1_Index1
:
*
beta_offsets
->
betaOffsetCSI_Part1_Index2
;
pusch_config_pdu
->
pusch_uci
.
beta_offset_csi2
=
pusch_config_pdu
->
pusch_uci
.
csi_part2_bit_length
<
12
?
*
beta_offsets
->
betaOffsetCSI_Part2_Index1
:
*
beta_offsets
->
betaOffsetCSI_Part2_Index2
;
}
else
{
pusch_config_pdu
->
pusch_uci
.
csi_part1_bit_length
=
0
;
pusch_config_pdu
->
pusch_uci
.
csi_part2_bit_length
=
0
;
}
pusch_config_pdu
->
pusch_uci
.
harq_ack_bit_length
=
0
;
pusch_config_pdu
->
bwp_start
=
current_UL_BWP
->
BWPStart
;
pusch_config_pdu
->
bwp_size
=
current_UL_BWP
->
BWPSize
;
...
...
@@ -780,6 +813,48 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
return
0
;
}
csi_payload_t
nr_ue_aperiodic_csi_reporting
(
NR_UE_MAC_INST_t
*
mac
,
dci_field_t
csi_request
,
int
tda
,
long
*
k2
)
{
NR_CSI_AperiodicTriggerStateList_t
*
aperiodicTriggerStateList
=
mac
->
sc_info
.
aperiodicTriggerStateList
;
AssertFatal
(
aperiodicTriggerStateList
,
"Received CSI request via DCI but aperiodicTriggerStateList is not present
\n
"
);
int
n_states
=
aperiodicTriggerStateList
->
list
.
count
;
int
n_ts
=
csi_request
.
nbits
;
csi_payload_t
csi
=
{
0
};
AssertFatal
(
n_states
<=
((
1
<<
n_ts
)
-
1
),
"Case of subselection indication of trigger states not supported yet
\n
"
);
int
num_trig
=
0
;
for
(
int
i
=
0
;
i
<
n_ts
;
i
++
)
{
// A non-zero codepoint of the CSI request field in the DCI is mapped to a CSI triggering state
// according to the order of the associated positions of the up to (2^n_ts -1) trigger states
// in CSI-AperiodicTriggerStateList with codepoint 1 mapped to the triggering state in the first position
if
(
csi_request
.
val
&
(
1
<<
i
))
{
AssertFatal
(
num_trig
==
0
,
"Multiplexing more than 1 CSI report is not supported
\n
"
);
NR_CSI_AperiodicTriggerState_t
*
trigger_state
=
aperiodicTriggerStateList
->
list
.
array
[
i
];
AssertFatal
(
trigger_state
->
associatedReportConfigInfoList
.
list
.
count
==
1
,
"Cannot handle more than 1 report configuration per state
\n
"
);
NR_CSI_AssociatedReportConfigInfo_t
*
reportconfig
=
trigger_state
->
associatedReportConfigInfoList
.
list
.
array
[
0
];
NR_CSI_ReportConfigId_t
id
=
reportconfig
->
reportConfigId
;
NR_CSI_MeasConfig_t
*
csi_measconfig
=
mac
->
sc_info
.
csi_MeasConfig
;
int
found
=
-
1
;
for
(
int
c
=
0
;
c
<
csi_measconfig
->
csi_ReportConfigToAddModList
->
list
.
count
;
c
++
)
{
NR_CSI_ReportConfig_t
*
report_config
=
csi_measconfig
->
csi_ReportConfigToAddModList
->
list
.
array
[
c
];
if
(
report_config
->
reportConfigId
==
id
)
{
struct
NR_CSI_ReportConfig__reportConfigType__aperiodic__reportSlotOffsetList
*
offset_list
=
&
report_config
->
reportConfigType
.
choice
.
aperiodic
->
reportSlotOffsetList
;
AssertFatal
(
tda
<
offset_list
->
list
.
count
,
"TDA index from DCI %d exceeds slot offset list %d
\n
"
,
tda
,
offset_list
->
list
.
count
);
if
(
k2
==
NULL
||
*
k2
<
*
offset_list
->
list
.
array
[
tda
])
k2
=
offset_list
->
list
.
array
[
tda
];
found
=
c
;
break
;
}
}
AssertFatal
(
found
>=
0
,
"Couldn't find csi-ReportConfig with ID %ld
\n
"
,
id
);
num_trig
++
;
csi
=
nr_get_csi_payload
(
mac
,
found
,
ON_PUSCH
,
csi_measconfig
);
}
}
return
csi
;
}
int
configure_srs_pdu
(
NR_UE_MAC_INST_t
*
mac
,
NR_SRS_Resource_t
*
srs_resource
,
fapi_nr_ul_config_srs_pdu
*
srs_config_pdu
,
...
...
@@ -2294,7 +2369,7 @@ uint8_t set_csirs_measurement_bitmap(NR_CSI_MeasConfig_t *csi_measconfig, NR_CSI
if
(
csi_res_id
>
NR_maxNrofCSI_ResourceConfigurations
)
return
meas_bitmap
;
// CSI-RS for tracking
for
(
int
i
=
0
;
i
<
csi_measconfig
->
csi_ReportConfigToAddModList
->
list
.
count
;
i
++
)
{
struct
NR_CSI_ReportConfig
*
report_config
=
csi_measconfig
->
csi_ReportConfigToAddModList
->
list
.
array
[
i
];
NR_CSI_ReportConfig_t
*
report_config
=
csi_measconfig
->
csi_ReportConfigToAddModList
->
list
.
array
[
i
];
if
(
report_config
->
resourcesForChannelMeasurement
!=
csi_res_id
)
continue
;
// bit 0 RSRP bit 1 RI bit 2 LI bit 3 PMI bit 4 CQI bit 5 i1
...
...
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