Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lizhongxiao
OpenXG-RAN
Commits
ec905e7c
Commit
ec905e7c
authored
Jun 09, 2016
by
Rohit Gupta
Committed by
Florian Kaltenberger
Jun 10, 2016
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
fixed a bug in initialization of DCI
parent
841078e6
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
14 additions
and
0 deletions
+14
-0
openair1/SCHED/phy_mac_stub.c
openair1/SCHED/phy_mac_stub.c
+14
-0
No files found.
openair1/SCHED/phy_mac_stub.c
View file @
ec905e7c
...
...
@@ -238,6 +238,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rah
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_5MHz_FDD_t
));
/*
...
...
@@ -269,6 +271,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rah
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_5MHz_TDD_t
));
/*
...
...
@@ -287,6 +290,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
...
...
@@ -305,6 +309,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rah
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_10MHz_FDD_t
));
/*
...
...
@@ -323,6 +329,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
}
else
{
...
...
@@ -336,6 +343,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rah
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_10MHz_TDD_t
));
/*
...
...
@@ -354,6 +362,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
}
...
...
@@ -371,6 +380,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_20MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_20MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
((
DCI1_20MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rah
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_20MHz_FDD_t
));
/*
...
...
@@ -389,6 +400,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
else
{
...
...
@@ -402,6 +414,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rah
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_20MHz_TDD_t
));
/*
...
...
@@ -420,6 +433,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rah = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment