Commit 28559707 authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/NR_UE_stability_fixes' into integration_2020_wk48_2

parents 08b30bab e8b7dc84
...@@ -798,7 +798,7 @@ typedef struct { ...@@ -798,7 +798,7 @@ typedef struct {
} fapi_nr_pusch_power_control_t; } fapi_nr_pusch_power_control_t;
typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t; typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t; typedef enum {transform_precoder_enabled = 0, transform_precoder_disabled = 1} transform_precoder_t;
typedef enum { typedef enum {
codebook_subset_fullyAndPartialAndNonCoherent = 1, codebook_subset_fullyAndPartialAndNonCoherent = 1,
codebook_subset_partialAndNonCoherent = 2, codebook_subset_partialAndNonCoherent = 2,
......
...@@ -1008,6 +1008,12 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8 ...@@ -1008,6 +1008,12 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
if (resource_set_found == TRUE) { if (resource_set_found == TRUE) {
if (pucch_resource_indicator < MAX_PUCCH_RESOURCE_INDICATOR) { if (pucch_resource_indicator < MAX_PUCCH_RESOURCE_INDICATOR) {
// Verify that the value of pucch_resource_indicator is valid
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.count <= pucch_resource_indicator)
{
LOG_E(PHY, "Value of pucch_resource_indicator is out of bounds! Possibly due to a false DCI. \n");
return (FALSE);
}
/* check if resource indexing by pucch_resource_indicator of this set is compatible */ /* check if resource indexing by pucch_resource_indicator of this set is compatible */
if ((ready_pucch_resource_id == TRUE) || (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.array[pucch_resource_indicator][0] != MAX_NB_OF_PUCCH_RESOURCES)) { if ((ready_pucch_resource_id == TRUE) || (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.array[pucch_resource_indicator][0] != MAX_NB_OF_PUCCH_RESOURCES)) {
......
...@@ -1393,7 +1393,7 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl ...@@ -1393,7 +1393,7 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
NR_TDD_UL_DL_Pattern_t *tdd_pattern = &mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1; NR_TDD_UL_DL_Pattern_t *tdd_pattern = &mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity); const int num_slots_per_tdd = nr_slots_per_frame[mu] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0); const int num_slots_ul = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
int index = slot + num_slots_ul - num_slots_per_tdd; int index = (slot + num_slots_ul - num_slots_per_tdd) % num_slots_per_tdd;
LOG_D(MAC, "nr_ue_procedures: get_ul_config_request() slots per tdd %d, num_slots_ul %d, index %d\n", LOG_D(MAC, "nr_ue_procedures: get_ul_config_request() slots per tdd %d, num_slots_ul %d, index %d\n",
num_slots_per_tdd, num_slots_per_tdd,
num_slots_ul, num_slots_ul,
...@@ -2896,6 +2896,13 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p ...@@ -2896,6 +2896,13 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP); dlsch_config_pdu->number_rbs = NRRIV2BW(riv,n_RB_DLBWP);
dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP); dlsch_config_pdu->start_rb = NRRIV2PRBOFFSET(riv,n_RB_DLBWP);
// Sanity check in case a false or erroneous DCI is received
if ((dlsch_config_pdu->number_rbs < 1 ) || (dlsch_config_pdu->number_rbs > n_RB_DLBWP - dlsch_config_pdu->start_rb)) {
// DCI is invalid!
LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_DLBWP: %d \n", dlsch_config_pdu->number_rbs, dlsch_config_pdu->start_rb, n_RB_DLBWP);
return -1;
}
} }
if(pusch_config_pdu != NULL){ if(pusch_config_pdu != NULL){
/* /*
...@@ -2910,6 +2917,14 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p ...@@ -2910,6 +2917,14 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
pusch_config_pdu->rb_size = NRRIV2BW(riv,n_RB_ULBWP); pusch_config_pdu->rb_size = NRRIV2BW(riv,n_RB_ULBWP);
pusch_config_pdu->rb_start = NRRIV2PRBOFFSET(riv,n_RB_ULBWP); pusch_config_pdu->rb_start = NRRIV2PRBOFFSET(riv,n_RB_ULBWP);
// Sanity check in case a false or erroneous DCI is received
if ((pusch_config_pdu->rb_size < 1) || (pusch_config_pdu->rb_size > n_RB_ULBWP - pusch_config_pdu->rb_start)) {
// DCI is invalid!
LOG_W(MAC, "Frequency domain assignment values are invalid! #RBs: %d, Start RB: %d, n_RB_ULBWP: %d \n",pusch_config_pdu->rb_size, pusch_config_pdu->rb_start, n_RB_ULBWP);
return -1;
}
} }
return 0; return 0;
} }
...@@ -3133,6 +3148,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3133,6 +3148,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int bwp_id = 1; int bwp_id = 1;
int mu = 0; int mu = 0;
long k2 = 0; long k2 = 0;
int pucch_res_set_cnt = 0, valid = 0;
uint16_t frame_tx = 0, slot_tx = 0; uint16_t frame_tx = 0, slot_tx = 0;
bool valid_ptrs_setup = 0; bool valid_ptrs_setup = 0;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id); NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
...@@ -3194,7 +3210,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3194,7 +3210,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu; nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu_0_0 = &ul_config->ul_config_list[ul_config->number_pdus].pusch_config_pdu;
/* IDENTIFIER_DCI_FORMATS */ /* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val); if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_0,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val) < 0)
return -1;
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_0,NULL,dci->time_domain_assignment.val) < 0) if (nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_0,NULL,dci->time_domain_assignment.val) < 0)
return -1; return -1;
...@@ -3205,6 +3222,27 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3205,6 +3222,27 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* MCS */ /* MCS */
pusch_config_pdu_0_0->mcs_index = dci->mcs; pusch_config_pdu_0_0->mcs_index = dci->mcs;
/* MCS TABLE */
if (mac->scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL)
pusch_config_pdu_0_0->transform_precoding = 1;
else
pusch_config_pdu_0_0->transform_precoding = 0;
if (pusch_config_pdu_0_0->transform_precoding == transform_precoder_disabled)
pusch_config_pdu_0_0->mcs_table = get_pusch_mcs_table(pusch_config->mcs_Table, 0,
dci_format, NR_RNTI_TC, NR_SearchSpace__searchSpaceType_PR_common, false);
else
pusch_config_pdu_0_0->mcs_table = get_pusch_mcs_table(pusch_config->mcs_TableTransformPrecoder, 1,
dci_format, NR_RNTI_TC, NR_SearchSpace__searchSpaceType_PR_common, false);
pusch_config_pdu_0_0->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu_0_0->mcs_index, pusch_config_pdu_0_0->mcs_table);
pusch_config_pdu_0_0->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu_0_0->mcs_index, pusch_config_pdu_0_0->mcs_table);
if (pusch_config_pdu_0_0->target_code_rate == 0 || pusch_config_pdu_0_0->qam_mod_order == 0) {
LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n");
return -1;
}
/* NDI */ /* NDI */
pusch_config_pdu_0_0->pusch_data.new_data_indicator = dci->ndi; pusch_config_pdu_0_0->pusch_data.new_data_indicator = dci->ndi;
/* RV */ /* RV */
...@@ -3293,7 +3331,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3293,7 +3331,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* BANDWIDTH_PART_IND */ /* BANDWIDTH_PART_IND */
//pusch_config_pdu_0_1->bandwidth_part_ind = dci->bwp_indicator.val; //pusch_config_pdu_0_1->bandwidth_part_ind = dci->bwp_indicator.val;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val); if (nr_ue_process_dci_freq_dom_resource_assignment(pusch_config_pdu_0_1,NULL,n_RB_ULBWP,0,dci->frequency_domain_assignment.val) < 0)
return -1;
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_1,NULL,dci->time_domain_assignment.val) < 0) if (nr_ue_process_dci_time_dom_resource_assignment(mac,pusch_config_pdu_0_1,NULL,dci->time_domain_assignment.val) < 0)
return -1; return -1;
...@@ -3651,7 +3690,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3651,7 +3690,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing; dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
/* IDENTIFIER_DCI_FORMATS */ /* IDENTIFIER_DCI_FORMATS */
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val); if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_0,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0)
return -1;
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0) if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_0,dci->time_domain_assignment.val) < 0)
return -1; return -1;
...@@ -3669,6 +3709,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3669,6 +3709,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved; dlsch_config_pdu_1_0->vrb_to_prb_mapping = (dci->vrb_to_prb_mapping.val == 0) ? vrb_to_prb_mapping_non_interleaved:vrb_to_prb_mapping_interleaved;
/* MCS */ /* MCS */
dlsch_config_pdu_1_0->mcs = dci->mcs; dlsch_config_pdu_1_0->mcs = dci->mcs;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dlsch_config_pdu_1_0->mcs > 28) {
LOG_W(MAC, "MCS value % d out of bounds! Possibly due to false DCI. Ignoring DCI!!\n", dlsch_config_pdu_1_0->mcs);
return -1;
}
/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ /* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
dlsch_config_pdu_1_0->ndi = dci->ndi; dlsch_config_pdu_1_0->ndi = dci->ndi;
/* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/ /* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
...@@ -3699,6 +3744,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3699,6 +3744,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
//if (dci->pucch_resource_indicator == 6) dlsch_config_pdu_1_0->pucch_resource_id = 7; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!! //if (dci->pucch_resource_indicator == 6) dlsch_config_pdu_1_0->pucch_resource_id = 7; //pucch-ResourceId obtained from the 7th value of resourceList FIXME!!
//if (dci->pucch_resource_indicator == 7) dlsch_config_pdu_1_0->pucch_resource_id = 8; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!! //if (dci->pucch_resource_indicator == 7) dlsch_config_pdu_1_0->pucch_resource_id = 8; //pucch-ResourceId obtained from the 8th value of resourceList FIXME!!
dlsch_config_pdu_1_0->pucch_resource_id = dci->pucch_resource_indicator; dlsch_config_pdu_1_0->pucch_resource_id = dci->pucch_resource_indicator;
// Sanity check for pucch_resource_indicator value received to check for false DCI.
valid = 0;
pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dlsch_config_pdu_1_0->pucch_resource_id < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1;
break;
}
}
if (!valid) {
LOG_W(MAC, "pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", dlsch_config_pdu_1_0->pucch_resource_id);
return -1;
}
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/ /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI)*/
dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val; dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind = dci->pdsch_to_harq_feedback_timing_indicator.val;
...@@ -3776,7 +3835,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3776,7 +3835,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* BANDWIDTH_PART_IND */ /* BANDWIDTH_PART_IND */
// dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind; // dlsch_config_pdu_1_1->bandwidth_part_ind = dci->bandwidth_part_ind;
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */ /* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val); if (nr_ue_process_dci_freq_dom_resource_assignment(NULL,dlsch_config_pdu_1_1,0,n_RB_DLBWP,dci->frequency_domain_assignment.val) < 0)
return -1;
/* TIME_DOM_RESOURCE_ASSIGNMENT */ /* TIME_DOM_RESOURCE_ASSIGNMENT */
if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val) < 0) if (nr_ue_process_dci_time_dom_resource_assignment(mac,NULL,dlsch_config_pdu_1_1,dci->time_domain_assignment.val) < 0)
return -1; return -1;
...@@ -3799,12 +3859,22 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3799,12 +3859,22 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val; dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val;
/* MCS (for transport block 1)*/ /* MCS (for transport block 1)*/
dlsch_config_pdu_1_1->mcs = dci->mcs; dlsch_config_pdu_1_1->mcs = dci->mcs;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dlsch_config_pdu_1_1->mcs > 28) {
LOG_W(MAC, "MCS value % d out of bounds! Possibly due to false DCI. Ignoring DCI!!\n", dlsch_config_pdu_1_1->mcs);
return -1;
}
/* NDI (for transport block 1)*/ /* NDI (for transport block 1)*/
dlsch_config_pdu_1_1->ndi = dci->ndi; dlsch_config_pdu_1_1->ndi = dci->ndi;
/* RV (for transport block 1)*/ /* RV (for transport block 1)*/
dlsch_config_pdu_1_1->rv = dci->rv; dlsch_config_pdu_1_1->rv = dci->rv;
/* MCS (for transport block 2)*/ /* MCS (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val; dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dlsch_config_pdu_1_1->tb2_mcs > 28) {
LOG_W(MAC, "MCS value % d out of bounds! Possibly due to false DCI. Ignoring DCI!!\n", dlsch_config_pdu_1_1->tb2_mcs);
return -1;
}
/* NDI (for transport block 2)*/ /* NDI (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val; dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val;
/* RV (for transport block 2)*/ /* RV (for transport block 2)*/
...@@ -3821,6 +3891,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr ...@@ -3821,6 +3891,20 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3; if (dci->tpc == 3) dlsch_config_pdu_1_1->accumulated_delta_PUCCH = 3;
/* PUCCH_RESOURCE_IND */ /* PUCCH_RESOURCE_IND */
dlsch_config_pdu_1_1->pucch_resource_id = dci->pucch_resource_indicator; dlsch_config_pdu_1_1->pucch_resource_id = dci->pucch_resource_indicator;
// Sanity check for pucch_resource_indicator value received to check for false DCI.
valid = 0;
pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dlsch_config_pdu_1_1->pucch_resource_id < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1;
break;
}
}
if (!valid) {
LOG_W(MAC, "pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", dlsch_config_pdu_1_1->pucch_resource_id);
return -1;
}
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */ /* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
// according to TS 38.213 Table 9.2.3-1 // according to TS 38.213 Table 9.2.3-1
dlsch_config_pdu_1_1->pdsch_to_harq_feedback_time_ind = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0]; dlsch_config_pdu_1_1->pdsch_to_harq_feedback_time_ind = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
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