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常顺宇
OpenXG-RAN
Commits
28a4f533
Commit
28a4f533
authored
May 06, 2019
by
frtabu
Browse files
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Plain Diff
Fix basic simu problem, due to remaining #if OAI_USRP... macros in UE
parent
fad83e47
Changes
5
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5 changed files
with
890 additions
and
1029 deletions
+890
-1029
openair1/PHY/LTE_TRANSPORT/print_stats.c
openair1/PHY/LTE_TRANSPORT/print_stats.c
+460
-493
openair1/PHY/LTE_UE_TRANSPORT/initial_sync.c
openair1/PHY/LTE_UE_TRANSPORT/initial_sync.c
+21
-60
openair1/PHY/LTE_UE_TRANSPORT/prach_ue.c
openair1/PHY/LTE_UE_TRANSPORT/prach_ue.c
+242
-259
openair1/SCHED_UE/phy_procedures_lte_ue.c
openair1/SCHED_UE/phy_procedures_lte_ue.c
+166
-216
targets/RT/USER/lte-ue.c
targets/RT/USER/lte-ue.c
+1
-1
No files found.
openair1/PHY/LTE_TRANSPORT/print_stats.c
View file @
28a4f533
This diff is collapsed.
Click to expand it.
openair1/PHY/LTE_UE_TRANSPORT/initial_sync.c
View file @
28a4f533
...
...
@@ -31,6 +31,7 @@
*/
#include "PHY/types.h"
#include "PHY/defs_UE.h"
#include "targets/RT/USER/lte-softmodem.h"
#include "PHY/phy_extern_ue.h"
#include "SCHED_UE/sched_UE.h"
#include "transport_proto_ue.h"
...
...
@@ -49,10 +50,8 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode) {
uint8_t
l
,
pbch_decoded
,
frame_mod4
,
pbch_tx_ant
,
dummy
;
LTE_DL_FRAME_PARMS
*
frame_parms
=&
ue
->
frame_parms
;
char
phich_resource
[
6
];
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"[UE%d] Initial sync: starting PBCH detection (rx_offset %d)
\n
"
,
ue
->
Mod_id
,
LOG_D
(
PHY
,
"[UE%d] Initial sync: starting PBCH detection (rx_offset %d)
\n
"
,
ue
->
Mod_id
,
ue
->
rx_offset
);
#endif
for
(
l
=
0
;
l
<
frame_parms
->
symbols_per_tti
/
2
;
l
++
)
{
slot_fep
(
ue
,
...
...
@@ -95,8 +94,7 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode) {
0
);
}
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"[UE %d] RX RSSI %d dBm, digital (%d, %d) dB, linear (%d, %d), avg rx power %d dB (%d lin), RX gain %d dB
\n
"
,
LOG_D
(
PHY
,
"[UE %d] RX RSSI %d dBm, digital (%d, %d) dB, linear (%d, %d), avg rx power %d dB (%d lin), RX gain %d dB
\n
"
,
ue
->
Mod_id
,
ue
->
measurements
.
rx_rssi_dBm
[
0
]
-
((
ue
->
frame_parms
.
nb_antennas_rx
==
2
)
?
3
:
0
),
ue
->
measurements
.
rx_power_dB
[
0
][
0
],
...
...
@@ -106,7 +104,7 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode) {
ue
->
measurements
.
rx_power_avg_dB
[
0
],
ue
->
measurements
.
rx_power_avg
[
0
],
ue
->
rx_total_gain_dB
);
LOG_
I
(
PHY
,
"[UE %d] N0 %d dBm digital (%d, %d) dB, linear (%d, %d), avg noise power %d dB (%d lin)
\n
"
,
LOG_
D
(
PHY
,
"[UE %d] N0 %d dBm digital (%d, %d) dB, linear (%d, %d), avg noise power %d dB (%d lin)
\n
"
,
ue
->
Mod_id
,
ue
->
measurements
.
n0_power_tot_dBm
,
ue
->
measurements
.
n0_power_dB
[
0
],
...
...
@@ -115,7 +113,6 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode) {
ue
->
measurements
.
n0_power
[
1
],
ue
->
measurements
.
n0_power_avg_dB
,
ue
->
measurements
.
n0_power_avg
);
#endif
pbch_decoded
=
0
;
for
(
frame_mod4
=
0
;
frame_mod4
<
4
;
frame_mod4
++
)
{
...
...
@@ -225,8 +222,7 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode) {
ue
->
proc
.
proc_rxtx
[
i
].
frame_tx
=
ue
->
proc
.
proc_rxtx
[
0
].
frame_rx
;
}
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"[UE%d] Initial sync: pbch decoded sucessfully p %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!
\n
"
,
LOG_D
(
PHY
,
"[UE%d] Initial sync: pbch decoded sucessfully p %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!
\n
"
,
ue
->
Mod_id
,
frame_parms
->
nb_antenna_ports_eNB
,
pbch_tx_ant
,
...
...
@@ -234,7 +230,6 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode) {
frame_parms
->
N_RB_DL
,
frame_parms
->
phich_config_common
.
phich_duration
,
phich_resource
);
//frame_parms->phich_config_common.phich_resource);
#endif
return
(
0
);
}
else
{
return
(
-
1
);
...
...
@@ -254,10 +249,6 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
LTE_DL_FRAME_PARMS
*
frame_parms
=
&
ue
->
frame_parms
;
int
ret
=-
1
;
int
aarx
,
rx_power
=
0
;
/*#ifdef OAI_USRP
__m128i *rxdata128;
#endif*/
// LOG_I(PHY,"**************************************************************\n");
// First try FDD normal prefix
frame_parms
->
Ncp
=
NORMAL
;
frame_parms
->
frame_type
=
FDD
;
...
...
@@ -277,9 +268,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
else
sync_pos2
=
sync_pos
+
FRAME_LENGTH_COMPLEX_SAMPLES
-
frame_parms
->
nb_prefix_samples
;
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d
\n
"
,
ue
->
Mod_id
,
sync_pos
,
ue
->
common_vars
.
eNb_id
);
#endif
LOG_D
(
PHY
,
"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d
\n
"
,
ue
->
Mod_id
,
sync_pos
,
ue
->
common_vars
.
eNb_id
);
// SSS detection
// PSS is hypothesized in last symbol of first slot in Frame
sync_pos_slot
=
(
frame_parms
->
samples_per_tti
>>
1
)
-
frame_parms
->
ofdm_symbol_size
-
frame_parms
->
nb_prefix_samples
;
...
...
@@ -291,9 +280,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
if
(((
sync_pos2
-
sync_pos_slot
)
>=
0
)
&&
((
sync_pos2
-
sync_pos_slot
)
<
((
FRAME_LENGTH_COMPLEX_SAMPLES
-
frame_parms
->
samples_per_tti
/
2
))))
{
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"Calling sss detection (FDD normal CP)
\n
"
);
#endif
LOG_D
(
PHY
,
"Calling sss detection (FDD normal CP)
\n
"
);
rx_sss
(
ue
,
&
metric_fdd_ncp
,
&
flip_fdd_ncp
,
&
phase_fdd_ncp
);
frame_parms
->
nushift
=
frame_parms
->
Nid_cell
%
6
;
...
...
@@ -304,14 +291,10 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
lte_gold
(
frame_parms
,
ue
->
lte_gold_table
[
0
],
frame_parms
->
Nid_cell
);
ret
=
pbch_detection
(
ue
,
mode
);
// LOG_M("rxdata2.m","rxd2",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"FDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
LOG_D
(
PHY
,
"FDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
frame_parms
->
Nid_cell
,
metric_fdd_ncp
,
phase_fdd_ncp
,
flip_fdd_ncp
,
ret
);
#endif
}
else
{
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d
\n
"
,
sync_pos
,
sync_pos_slot
);
#endif
LOG_D
(
PHY
,
"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d
\n
"
,
sync_pos
,
sync_pos_slot
);
}
if
(
ret
==-
1
)
{
...
...
@@ -347,14 +330,10 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
lte_gold
(
frame_parms
,
ue
->
lte_gold_table
[
0
],
frame_parms
->
Nid_cell
);
ret
=
pbch_detection
(
ue
,
mode
);
// LOG_M("rxdata3.m","rxd3",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"FDD Extended prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
LOG_D
(
PHY
,
"FDD Extended prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
frame_parms
->
Nid_cell
,
metric_fdd_ecp
,
phase_fdd_ecp
,
flip_fdd_ecp
,
ret
);
#endif
}
else
{
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"FDD Extended prefix: SSS error condition: sync_pos %d, sync_pos_slot %d
\n
"
,
sync_pos
,
sync_pos_slot
);
#endif
LOG_D
(
PHY
,
"FDD Extended prefix: SSS error condition: sync_pos %d, sync_pos_slot %d
\n
"
,
sync_pos
,
sync_pos_slot
);
}
if
(
ret
==-
1
)
{
...
...
@@ -390,10 +369,8 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
lte_gold
(
frame_parms
,
ue
->
lte_gold_table
[
0
],
frame_parms
->
Nid_cell
);
ret
=
pbch_detection
(
ue
,
mode
);
// LOG_M("rxdata4.m","rxd4",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"TDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
LOG_D
(
PHY
,
"TDD Normal prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
frame_parms
->
Nid_cell
,
metric_tdd_ncp
,
phase_tdd_ncp
,
flip_tdd_ncp
,
ret
);
#endif
if
(
ret
==-
1
)
{
// Now TDD extended prefix
...
...
@@ -426,10 +403,8 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
lte_gold
(
frame_parms
,
ue
->
lte_gold_table
[
0
],
frame_parms
->
Nid_cell
);
ret
=
pbch_detection
(
ue
,
mode
);
// LOG_M("rxdata5.m","rxd5",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"TDD Extended prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
LOG_D
(
PHY
,
"TDD Extended prefix: CellId %d metric %d, phase %d, flip %d, pbch %d
\n
"
,
frame_parms
->
Nid_cell
,
metric_tdd_ecp
,
phase_tdd_ecp
,
flip_tdd_ecp
,
ret
);
#endif
}
}
}
...
...
@@ -481,18 +456,16 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
openair0_cfg
[
0
].
rx_freq
[
0
]
-
ue
->
common_vars
.
freq_offset
,
ue
->
common_vars
.
freq_offset
);
}
else
{
#ifdef DEBUG_INITIAL_SYNC
LOG_I
(
PHY
,
"[UE%d] Initial sync : PBCH not ok
\n
"
,
ue
->
Mod_id
);
LOG_I
(
PHY
,
"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d
\n
"
,
ue
->
Mod_id
,
sync_pos
,
ue
->
common_vars
.
eNb_id
);
LOG_D
(
PHY
,
"[UE%d] Initial sync : PBCH not ok
\n
"
,
ue
->
Mod_id
);
LOG_D
(
PHY
,
"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d
\n
"
,
ue
->
Mod_id
,
sync_pos
,
ue
->
common_vars
.
eNb_id
);
/* LOG_I(PHY,"[UE%d] Initial sync: (metric fdd_ncp %d (%d), metric fdd_ecp %d (%d), metric_tdd_ncp %d (%d), metric_tdd_ecp %d (%d))\n",
ue->Mod_id,
metric_fdd_ncp,Nid_cell_fdd_ncp,
metric_fdd_ecp,Nid_cell_fdd_ecp,
metric_tdd_ncp,Nid_cell_tdd_ncp,
metric_tdd_ecp,Nid_cell_tdd_ecp);*/
LOG_
I
(
PHY
,
"[UE%d] Initial sync : Estimated Nid_cell %d, Frame_type %d
\n
"
,
ue
->
Mod_id
,
LOG_
D
(
PHY
,
"[UE%d] Initial sync : Estimated Nid_cell %d, Frame_type %d
\n
"
,
ue
->
Mod_id
,
frame_parms
->
Nid_cell
,
frame_parms
->
frame_type
);
#endif
ue
->
UE_mode
[
0
]
=
NOT_SYNCHED
;
ue
->
pbch_vars
[
0
]
->
pdu_errors_last
=
ue
->
pbch_vars
[
0
]
->
pdu_errors
;
ue
->
pbch_vars
[
0
]
->
pdu_errors
++
;
...
...
@@ -517,27 +490,15 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode) {
// we might add a low-pass filter here later
ue
->
measurements
.
rx_power_avg
[
0
]
=
rx_power
/
frame_parms
->
nb_antennas_rx
;
ue
->
measurements
.
rx_power_avg_dB
[
0
]
=
dB_fixed
(
ue
->
measurements
.
rx_power_avg
[
0
]);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I
(
PHY
,
"[UE%d] Initial sync : Estimated power: %d dB
\n
"
,
ue
->
Mod_id
,
ue
->
measurements
.
rx_power_avg_dB
[
0
]
);
#endif
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
if
(
IS_SOFTMODEM_BASICSIM
||
IS_SOFTMODEM_RFSIM
)
phy_adjust_gain
(
ue
,
ue
->
measurements
.
rx_power_avg_dB
[
0
],
0
);
#endif
#endif
#endif
}
else
{
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
if
(
IS_SOFTMODEM_BASICSIM
||
IS_SOFTMODEM_RFSIM
)
phy_adjust_gain
(
ue
,
dB_fixed
(
ue
->
measurements
.
rssi
),
0
);
#endif
#endif
#endif
}
// exit_fun("debug exit");
return
ret
;
}
openair1/PHY/LTE_UE_TRANSPORT/prach_ue.c
View file @
28a4f533
...
...
@@ -31,6 +31,7 @@
*/
#include "PHY/sse_intrin.h"
#include "PHY/defs_UE.h"
#include "targets/RT/USER/lte-softmodem.h"
#include "PHY/phy_extern_ue.h"
//#include "prach.h"
#include "PHY/LTE_TRANSPORT/if4_tools.h"
...
...
@@ -43,9 +44,7 @@
//#define PRACH_DEBUG 1
int32_t
generate_prach
(
PHY_VARS_UE
*
ue
,
uint8_t
eNB_id
,
uint8_t
subframe
,
uint16_t
Nf
)
{
int32_t
generate_prach
(
PHY_VARS_UE
*
ue
,
uint8_t
eNB_id
,
uint8_t
subframe
,
uint16_t
Nf
)
{
lte_frame_type_t
frame_type
=
ue
->
frame_parms
.
frame_type
;
//uint8_t tdd_config = ue->frame_parms.tdd_config;
uint16_t
rootSequenceIndex
=
ue
->
frame_parms
.
prach_config_common
.
rootSequenceIndex
;
...
...
@@ -67,7 +66,6 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
uint16_t
preamble_offset
,
preamble_shift
;
uint16_t
preamble_index0
,
n_shift_ra
,
n_shift_ra_bar
;
uint16_t
d_start
,
numshift
;
uint8_t
prach_fmt
=
get_prach_fmt
(
prach_ConfigIndex
,
frame_type
);
//uint8_t Nsp=2;
//uint8_t f_ra,t1_ra;
...
...
@@ -82,7 +80,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
int
i
,
prach_len
;
uint16_t
first_nonzero_root_idx
=
0
;
#if defined(EXMIMO) || defined(OAI_USRP)
if
(
!
(
IS_SOFTMODEM_BASICSIM
||
IS_SOFTMODEM_RFSIM
)
)
{
prach_start
=
(
ue
->
rx_offset
+
subframe
*
ue
->
frame_parms
.
samples_per_tti
-
ue
->
hw_timing_advance
-
ue
->
N_TA_offset
);
#ifdef PRACH_DEBUG
LOG_I
(
PHY
,
"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d
\n
"
,
ue
->
Mod_id
,
...
...
@@ -97,17 +95,14 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
if
(
prach_start
>=
(
ue
->
frame_parms
.
samples_per_tti
*
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
))
prach_start
-=
(
ue
->
frame_parms
.
samples_per_tti
*
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
);
#else //normal case (simulation)
}
else
{
//normal case (simulation)
prach_start
=
subframe
*
ue
->
frame_parms
.
samples_per_tti
-
ue
->
N_TA_offset
;
LOG_I
(
PHY
,
"[UE %d] prach_start %d, rx_offset %d, hw_timing_advance %d, N_TA_offset %d
\n
"
,
ue
->
Mod_id
,
prach_start
,
ue
->
rx_offset
,
ue
->
hw_timing_advance
,
ue
->
N_TA_offset
);
#endif
}
// First compute physical root sequence
if
(
restricted_set
==
0
)
{
...
...
@@ -125,7 +120,6 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
ue
->
frame_parms
.
prach_config_common
.
prach_ConfigInfo
.
prach_FreqOffset
,
tdd_mapindex
,
Nf
);
prach_root_sequence_map
=
(
prach_fmt
<
4
)
?
prach_root_sequence_map0_3
:
prach_root_sequence_map4
;
/*
// this code is not part of get_prach_prb_offset
if (frame_type == TDD) { // TDD
...
...
@@ -157,7 +151,6 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
}
}
*/
// This is the relative offset (for unrestricted case) in the root sequence table (5.7.2-4 from 36.211) for the given preamble index
preamble_offset
=
((
NCS
==
0
)
?
preamble_index
:
(
preamble_index
/
(
N_ZC
/
NCS
)));
...
...
@@ -166,11 +159,9 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
preamble_shift
=
(
NCS
==
0
)
?
0
:
(
preamble_index
%
(
N_ZC
/
NCS
));
preamble_shift
*=
NCS
;
}
else
{
// This is the high-speed case
#ifdef PRACH_DEBUG
LOG_I
(
PHY
,
"[UE %d] High-speed mode, NCS_config %d
\n
"
,
ue
->
Mod_id
,
Ncs_config
);
#endif
not_found
=
1
;
preamble_index0
=
preamble_index
;
// set preamble_offset to initial rootSequenceIndex and look if we need more root sequences for this
...
...
@@ -190,7 +181,6 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
}
u
=
prach_root_sequence_map
[
index
];
uint16_t
n_group_ra
=
0
;
if
(
(
du
[
u
]
<
(
N_ZC
/
3
))
&&
(
du
[
u
]
>=
NCS
)
)
{
...
...
@@ -217,7 +207,6 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
if
(
preamble_index0
<
numshift
)
{
not_found
=
0
;
preamble_shift
=
(
d_start
*
(
preamble_index0
/
n_shift_ra
))
+
((
preamble_index0
%
n_shift_ra
)
*
NCS
);
}
else
{
// skip to next rootSequenceIndex and recompute parameters
preamble_offset
++
;
preamble_index0
-=
numshift
;
...
...
@@ -234,10 +223,8 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
preamble_offset
,
preamble_shift
);
#endif
// nsymb = (frame_parms->Ncp==0) ? 14:12;
// subframe_offset = (unsigned int)frame_parms->ofdm_symbol_size*subframe*nsymb;
k
=
(
12
*
n_ra_prb
)
-
6
*
ue
->
frame_parms
.
N_RB_UL
;
if
(
k
<
0
)
...
...
@@ -245,9 +232,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
k
*=
12
;
k
+=
13
;
Xu
=
(
int16_t
*
)
ue
->
X_u
[
preamble_offset
-
first_nonzero_root_idx
];
Xu
=
(
int16_t
*
)
ue
->
X_u
[
preamble_offset
-
first_nonzero_root_idx
];
/*
k+=(12*ue->frame_parms.first_carrier_offset);
if (k>(12*ue->frame_parms.ofdm_symbol_size))
...
...
@@ -257,35 +242,35 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
switch
(
ue
->
frame_parms
.
N_RB_UL
)
{
case
6
:
memset
((
void
*
)
prachF
,
0
,
4
*
1536
);
memset
((
void
*
)
prachF
,
0
,
4
*
1536
);
break
;
case
15
:
memset
((
void
*
)
prachF
,
0
,
4
*
3072
);
memset
((
void
*
)
prachF
,
0
,
4
*
3072
);
break
;
case
25
:
memset
((
void
*
)
prachF
,
0
,
4
*
6144
);
memset
((
void
*
)
prachF
,
0
,
4
*
6144
);
break
;
case
50
:
memset
((
void
*
)
prachF
,
0
,
4
*
12288
);
memset
((
void
*
)
prachF
,
0
,
4
*
12288
);
break
;
case
75
:
memset
((
void
*
)
prachF
,
0
,
4
*
18432
);
memset
((
void
*
)
prachF
,
0
,
4
*
18432
);
break
;
case
100
:
if
(
ue
->
frame_parms
.
threequarter_fs
==
0
)
memset
((
void
*
)
prachF
,
0
,
4
*
24576
);
memset
((
void
*
)
prachF
,
0
,
4
*
24576
);
else
memset
((
void
*
)
prachF
,
0
,
4
*
18432
);
memset
((
void
*
)
prachF
,
0
,
4
*
18432
);
break
;
}
for
(
offset
=
0
,
offset2
=
0
;
offset
<
N_ZC
;
offset
++
,
offset2
+=
preamble_shift
)
{
if
(
offset2
>=
N_ZC
)
offset2
-=
N_ZC
;
...
...
@@ -462,8 +447,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
prach_len
=
2
*
24576
+
Ncp
;
}
}
}
else
{
}
else
{
if
(
prach_fmt
==
4
)
{
idft3072
(
prachF
,
prach2
,
1
);
//TODO: account for repeated format in dft output
...
...
@@ -474,6 +458,7 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
memmove
(
prach
,
prach
+
36864
,
Ncp
<<
2
);
prach_len
=
18432
+
Ncp
;
printf
(
"Generated prach for 100 PRB, 3/4 sampling
\n
"
);
if
(
prach_fmt
>
1
)
{
memmove
(
prach2
+
36834
,
prach2
,
73728
);
prach_len
=
2
*
18432
+
Ncp
;
...
...
@@ -485,24 +470,26 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
}
//LOG_I(PHY,"prach_len=%d\n",prach_len);
AssertFatal
(
prach_fmt
<
4
,
"prach_fmt4 not fully implemented"
);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
if
(
!
(
IS_SOFTMODEM_BASICSIM
||
IS_SOFTMODEM_RFSIM
)
)
{
int
j
;
int
overflow
=
prach_start
+
prach_len
-
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
*
ue
->
frame_parms
.
samples_per_tti
;
LOG_I
(
PHY
,
"prach_start=%d, overflow=%d
\n
"
,
prach_start
,
overflow
);
for
(
i
=
prach_start
,
j
=
0
;
i
<
min
(
ue
->
frame_parms
.
samples_per_tti
*
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
,
prach_start
+
prach_len
);
i
++
,
j
++
)
{
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
]
=
prach
[
2
*
j
];
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
+
1
]
=
prach
[
2
*
j
+
1
];
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
]
=
prach
[
2
*
j
];
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
+
1
]
=
prach
[
2
*
j
+
1
];
}
for
(
i
=
0
;
i
<
overflow
;
i
++
,
j
++
)
{
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
]
=
prach
[
2
*
j
];
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
+
1
]
=
prach
[
2
*
j
+
1
];
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
]
=
prach
[
2
*
j
];
((
int16_t
*
)
ue
->
common_vars
.
txdata
[
0
])[
2
*
i
+
1
]
=
prach
[
2
*
j
+
1
];
}
#if defined(EXMIMO)
// handle switch before 1st TX subframe, guarantee that the slot prior to transmission is switch on
for
(
k
=
prach_start
-
(
ue
->
frame_parms
.
samples_per_tti
>>
1
)
;
k
<
prach_start
;
k
++
)
{
if
(
k
<
0
)
...
...
@@ -512,25 +499,21 @@ int32_t generate_prach( PHY_VARS_UE *ue, uint8_t eNB_id, uint8_t subframe, uint1
else
ue
->
common_vars
.
txdata
[
0
][
k
]
&=
0xFFFEFFFE
;
}
#endif
#else
#endif
}
else
{
// simulators
for
(
i
=
0
;
i
<
prach_len
;
i
++
)
{
((
int16_t
*
)(
&
ue
->
common_vars
.
txdata
[
0
][
prach_start
]))[
2
*
i
]
=
prach
[
2
*
i
];
((
int16_t
*
)(
&
ue
->
common_vars
.
txdata
[
0
][
prach_start
]))[
2
*
i
+
1
]
=
prach
[
2
*
i
+
1
];
((
int16_t
*
)(
&
ue
->
common_vars
.
txdata
[
0
][
prach_start
]))[
2
*
i
]
=
prach
[
2
*
i
];
((
int16_t
*
)(
&
ue
->
common_vars
.
txdata
[
0
][
prach_start
]))[
2
*
i
+
1
]
=
prach
[
2
*
i
+
1
];
}
}
#endif
#if defined(PRACH_WRITE_OUTPUT_DEBUG)
LOG_M
(
"prach_txF0.m"
,
"prachtxF0"
,
prachF
,
prach_len
-
Ncp
,
1
,
1
);
LOG_M
(
"prach_tx0.m"
,
"prachtx0"
,
prach
+
(
Ncp
<<
1
),
prach_len
-
Ncp
,
1
,
1
);
LOG_M
(
"txsig.m"
,
"txs"
,(
int16_t
*
)(
&
ue
->
common_vars
.
txdata
[
0
][
0
]),
2
*
ue
->
frame_parms
.
samples_per_tti
,
1
,
1
);
LOG_M
(
"txsig.m"
,
"txs"
,(
int16_t
*
)(
&
ue
->
common_vars
.
txdata
[
0
][
0
]),
2
*
ue
->
frame_parms
.
samples_per_tti
,
1
,
1
);
exit
(
-
1
);
#endif
return
signal_energy
(
(
int
*
)
prach
,
256
);
return
signal_energy
(
(
int
*
)
prach
,
256
);
}
openair1/SCHED_UE/phy_procedures_lte_ue.c
View file @
28a4f533
This diff is collapsed.
Click to expand it.
targets/RT/USER/lte-ue.c
View file @
28a4f533
...
...
@@ -1741,7 +1741,7 @@ void *UE_thread(void *arg) {
}
}
//usleep(3000);
//
usleep(3000);
if
(
sub_frame
==
0
)
{
//UE->proc.proc_rxtx[0].frame_rx++;
//UE->proc.proc_rxtx[1].frame_rx++;
...
...
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