Commit 35e723d0 authored by Robert Schmidt's avatar Robert Schmidt

handle_nr_uci() for multiple UEs

parent d9c7243a
...@@ -266,15 +266,27 @@ void nr_csi_meas_reporting(int Mod_idP, ...@@ -266,15 +266,27 @@ void nr_csi_meas_reporting(int Mod_idP,
} }
void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, void handle_nr_uci_pucch_0_1(module_id_t mod_id,
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01, frame_t frame,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234, sub_frame_t slot,
NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) { const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01)
{
int UE_id = find_nr_UE_id(mod_id, uci_01->rnti);
if (UE_id < 0) {
LOG_E(MAC, "%s(): unknown RNTI %04x in PUCCH UCI\n", __func__, uci_01->rnti);
return;
}
NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10,
uci_01->ul_cqi,
30);
// TODO // TODO
int max_harq_rounds = 4; // TODO define macro int max_harq_rounds = 4; // TODO define macro
if (((uci_01->pduBitmap >> 1) & 0x01)) {
if (uci_01 != NULL) {
// handle harq // handle harq
int harq_idx_s = 0; int harq_idx_s = 0;
...@@ -283,7 +295,7 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, ...@@ -283,7 +295,7 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
// search for the right harq process // search for the right harq process
for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) { for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
// if the gNB received ack with a good confidence // if the gNB received ack with a good confidence
if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) { if ((slot - 1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
sched_ctrl->harq_processes[harq_idx].feedback_slot = -1; sched_ctrl->harq_processes[harq_idx].feedback_slot = -1;
if ((uci_01->harq->harq_list[harq_bit].harq_value == 1) && if ((uci_01->harq->harq_list[harq_bit].harq_value == 1) &&
(uci_01->harq->harq_confidence_level == 0)) { (uci_01->harq->harq_confidence_level == 0)) {
...@@ -299,13 +311,13 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, ...@@ -299,13 +311,13 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) { if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1; sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0; sched_ctrl->harq_processes[harq_idx].round = 0;
stats->dlsch_errors++; UE_info->mac_stats[UE_id].dlsch_errors++;
} }
break; break;
} }
// if feedback slot processing is aborted // if feedback slot processing is aborted
else if (sched_ctrl->harq_processes[harq_idx].feedback_slot != -1 else if (sched_ctrl->harq_processes[harq_idx].feedback_slot != -1
&& (UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot && (slot - 1) > sched_ctrl->harq_processes[harq_idx].feedback_slot
&& sched_ctrl->harq_processes[harq_idx].is_waiting) { && sched_ctrl->harq_processes[harq_idx].is_waiting) {
sched_ctrl->harq_processes[harq_idx].feedback_slot = -1; sched_ctrl->harq_processes[harq_idx].feedback_slot = -1;
sched_ctrl->harq_processes[harq_idx].round++; sched_ctrl->harq_processes[harq_idx].round++;
...@@ -318,9 +330,29 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, ...@@ -318,9 +330,29 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
} }
} }
} }
}
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234)
{
int UE_id = find_nr_UE_id(mod_id, uci_234->rnti);
if (UE_id < 0) {
LOG_E(MAC, "%s(): unknown RNTI %04x in PUCCH UCI\n", __func__, uci_234->rnti);
return;
}
NR_UE_info_t *UE_info = &RC.nrmac[mod_id]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(RC.nrmac[mod_id]->pucch_target_snrx10,
uci_234->ul_cqi,
30);
if (uci_234 != NULL) { // TODO
int max_harq_rounds = 4; // TODO define macro
if ((uci_234->pduBitmap >> 1) & 0x01) {
int harq_idx_s = 0; int harq_idx_s = 0;
int acknack; int acknack;
...@@ -329,7 +361,7 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, ...@@ -329,7 +361,7 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
acknack = ((uci_234->harq.harq_payload[harq_bit>>3])>>harq_bit)&0x01; acknack = ((uci_234->harq.harq_payload[harq_bit>>3])>>harq_bit)&0x01;
for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) { for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
// if the gNB received ack with a good confidence or if the max harq rounds was reached // if the gNB received ack with a good confidence or if the max harq rounds was reached
if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) { if ((slot - 1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
// TODO add some confidence level for when there is no CRC // TODO add some confidence level for when there is no CRC
sched_ctrl->harq_processes[harq_idx].feedback_slot = -1; sched_ctrl->harq_processes[harq_idx].feedback_slot = -1;
if ((uci_234->harq.harq_crc != 1) && acknack) { if ((uci_234->harq.harq_crc != 1) && acknack) {
...@@ -345,13 +377,13 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, ...@@ -345,13 +377,13 @@ void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) { if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1; sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0; sched_ctrl->harq_processes[harq_idx].round = 0;
stats->dlsch_errors++; UE_info->mac_stats[UE_id].dlsch_errors++;
} }
break; break;
} }
// if feedback slot processing is aborted // if feedback slot processing is aborted
else if (sched_ctrl->harq_processes[harq_idx].feedback_slot != -1 else if (sched_ctrl->harq_processes[harq_idx].feedback_slot != -1
&& (UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot && (slot - 1) > sched_ctrl->harq_processes[harq_idx].feedback_slot
&& sched_ctrl->harq_processes[harq_idx].is_waiting) { && sched_ctrl->harq_processes[harq_idx].is_waiting) {
sched_ctrl->harq_processes[harq_idx].feedback_slot = -1; sched_ctrl->harq_processes[harq_idx].feedback_slot = -1;
sched_ctrl->harq_processes[harq_idx].round++; sched_ctrl->harq_processes[harq_idx].round++;
......
...@@ -157,10 +157,15 @@ void nr_fill_nfapi_dl_pdu(int Mod_id, ...@@ -157,10 +157,15 @@ void nr_fill_nfapi_dl_pdu(int Mod_id,
int ndi, int ndi,
int round); int round);
void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch, void handle_nr_uci_pucch_0_1(module_id_t mod_id,
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01, frame_t frame,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234, sub_frame_t slot,
NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats); const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01);
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234);
void config_uldci(NR_BWP_Uplink_t *ubwp, void config_uldci(NR_BWP_Uplink_t *ubwp,
nfapi_nr_pusch_pdu_t *pusch_pdu, nfapi_nr_pusch_pdu_t *pusch_pdu,
...@@ -409,5 +414,4 @@ int16_t ssb_index_from_prach(module_id_t module_idP, ...@@ -409,5 +414,4 @@ int16_t ssb_index_from_prach(module_id_t module_idP,
void find_SSB_and_RO_available(module_id_t module_idP); void find_SSB_and_RO_available(module_id_t module_idP);
void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10);
#endif /*__LAYER2_NR_MAC_PROTO_H__*/ #endif /*__LAYER2_NR_MAC_PROTO_H__*/
...@@ -76,35 +76,28 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) { ...@@ -76,35 +76,28 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
} }
void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) { void handle_nr_uci(NR_UL_IND_t *UL_info)
{
const module_id_t mod_id = UL_info->module_id;
const frame_t frame = UL_info->frame;
const sub_frame_t slot = UL_info->slot;
int num_ucis = UL_info->uci_ind.num_ucis; int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list; nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
for (int i = 0; i < num_ucis; i++) { for (int i = 0; i < num_ucis; i++) {
switch (uci_list[i].pdu_type) { switch (uci_list[i].pdu_type) {
case NFAPI_NR_UCI_PUSCH_PDU_TYPE: break; case NFAPI_NR_UCI_PUSCH_PDU_TYPE:
LOG_E(MAC, "%s(): unhandled NFAPI_NR_UCI_PUSCH_PDU_TYPE\n", __func__);
break;
case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: { case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1; const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
handle_nr_uci_pucch_0_1(mod_id, frame, slot, uci_pdu);
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
if( (uci_pdu->pduBitmap>>1) & 0x01)
nr_rx_acknack(NULL,uci_pdu,NULL,UL_info,sched_ctrl,stats);
break; break;
} }
case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: { case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4; const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
handle_nr_uci_pucch_2_3_4(mod_id, frame, slot, uci_pdu);
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
if( (uci_pdu->pduBitmap>>1) & 0x01)
nr_rx_acknack(NULL,NULL,uci_pdu,UL_info,sched_ctrl,stats);
break; break;
} }
} }
...@@ -217,7 +210,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { ...@@ -217,7 +210,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
clear_nr_nfapi_information(mac,CC_id,UL_info->frame,UL_info->slot); clear_nr_nfapi_information(mac,CC_id,UL_info->frame,UL_info->slot);
handle_nr_rach(UL_info); handle_nr_rach(UL_info);
handle_nr_uci(UL_info,&mac->UE_info.UE_sched_ctrl[0],&mac->UE_info.mac_stats[0],mac->pucch_target_snrx10); handle_nr_uci(UL_info);
// clear HI prior to handling ULSCH // clear HI prior to handling ULSCH
mac->UL_dci_req[CC_id].numPdus = 0; mac->UL_dci_req[CC_id].numPdus = 0;
handle_nr_ulsch(UL_info, &mac->UE_info.UE_sched_ctrl[0],&mac->UE_info.mac_stats[0]); handle_nr_ulsch(UL_info, &mac->UE_info.UE_sched_ctrl[0],&mac->UE_info.mac_stats[0]);
......
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