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常顺宇
OpenXG-RAN
Commits
4e8e7079
Commit
4e8e7079
authored
Jul 07, 2016
by
lukashov
Browse files
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Browse Files
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Plain Diff
Some more clean up + adding second option for a precoder.
parent
aa69c550
Changes
3
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Side-by-side
Showing
3 changed files
with
834 additions
and
833 deletions
+834
-833
openair1/PHY/LTE_TRANSPORT/dci_tools.c
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+515
-513
openair1/SIMULATION/LTE_PHY/dlsim.c
openair1/SIMULATION/LTE_PHY/dlsim.c
+317
-318
openair1/SIMULATION/TOOLS/random_channel.c
openair1/SIMULATION/TOOLS/random_channel.c
+2
-2
No files found.
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @
4e8e7079
...
@@ -481,9 +481,9 @@ uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
...
@@ -481,9 +481,9 @@ uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
case
15
:
case
15
:
if
(
vrb
<
12
)
{
if
(
vrb
<
12
)
{
if
((
vrb
&
3
)
<
2
)
// even: 0->0, 1->4, 4->1, 5->5, 8->2, 9->6 odd: 0->7, 1->11
if
((
vrb
&
3
)
<
2
)
// even: 0->0, 1->4, 4->1, 5->5, 8->2, 9->6 odd: 0->7, 1->11
return
(((
7
*
odd_slot
)
+
4
*
(
vrb
&
3
)
+
(
vrb
>>
2
))
%
14
)
+
14
*
(
vrb
/
14
);
return
(((
7
*
odd_slot
)
+
4
*
(
vrb
&
3
)
+
(
vrb
>>
2
))
%
14
)
+
14
*
(
vrb
/
14
);
else
if
(
vrb
<
12
)
// even: 2->7, 3->11, 6->8, 7->12, 10->9, 11->13
else
if
(
vrb
<
12
)
// even: 2->7, 3->11, 6->8, 7->12, 10->9, 11->13
return
(((
7
*
odd_slot
)
+
4
*
(
vrb
&
3
)
+
(
vrb
>>
2
)
+
13
)
%
14
)
+
14
*
(
vrb
/
14
);
return
(((
7
*
odd_slot
)
+
4
*
(
vrb
&
3
)
+
(
vrb
>>
2
)
+
13
)
%
14
)
+
14
*
(
vrb
/
14
);
}
}
if
(
vrb
==
12
)
if
(
vrb
==
12
)
return
(
3
+
(
7
*
odd_slot
))
%
14
;
return
(
3
+
(
7
*
odd_slot
))
%
14
;
...
@@ -500,43 +500,43 @@ uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
...
@@ -500,43 +500,43 @@ uint32_t get_prb(int N_RB_DL,int odd_slot,int vrb,int Ngap) {
if
(
Ngap
==
0
)
{
if
(
Ngap
==
0
)
{
// Nrow=12,Nnull=2,NVRBDL=46,Ngap1= 27
// Nrow=12,Nnull=2,NVRBDL=46,Ngap1= 27
if
(
vrb
>=
23
)
if
(
vrb
>=
23
)
offset
=
4
;
offset
=
4
;
else
else
offset
=
0
;
offset
=
0
;
if
(
vrb
<
44
)
{
if
(
vrb
<
44
)
{
if
((
vrb
&
3
)
>=
2
)
if
((
vrb
&
3
)
>=
2
)
return
offset
+
((
23
*
odd_slot
)
+
12
*
(
vrb
&
3
)
+
(
vrb
>>
2
)
+
45
)
%
46
;
return
offset
+
((
23
*
odd_slot
)
+
12
*
(
vrb
&
3
)
+
(
vrb
>>
2
)
+
45
)
%
46
;
else
else
return
offset
+
((
23
*
odd_slot
)
+
12
*
(
vrb
&
3
)
+
(
vrb
>>
2
))
%
46
;
return
offset
+
((
23
*
odd_slot
)
+
12
*
(
vrb
&
3
)
+
(
vrb
>>
2
))
%
46
;
}
}
if
(
vrb
==
44
)
// even: 44->11, odd: 45->34
if
(
vrb
==
44
)
// even: 44->11, odd: 45->34
return
offset
+
((
23
*
odd_slot
)
+
22
-
12
+
1
);
return
offset
+
((
23
*
odd_slot
)
+
22
-
12
+
1
);
if
(
vrb
==
45
)
// even: 45->10, odd: 45->33
if
(
vrb
==
45
)
// even: 45->10, odd: 45->33
return
offset
+
((
23
*
odd_slot
)
+
22
+
12
);
return
offset
+
((
23
*
odd_slot
)
+
22
+
12
);
if
(
vrb
==
46
)
if
(
vrb
==
46
)
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
-
12
+
1
)
%
46
;
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
-
12
+
1
)
%
46
;
if
(
vrb
==
47
)
if
(
vrb
==
47
)
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
+
12
)
%
46
;
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
+
12
)
%
46
;
if
(
vrb
==
48
)
if
(
vrb
==
48
)
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
-
12
+
1
)
%
46
;
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
-
12
+
1
)
%
46
;
if
(
vrb
==
49
)
if
(
vrb
==
49
)
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
+
12
)
%
46
;
return
offset
+
46
+
((
23
*
odd_slot
)
+
23
+
12
)
%
46
;
}
}
else
{
else
{
// Nrow=6,Nnull=6,NVRBDL=18,Ngap1= 27
// Nrow=6,Nnull=6,NVRBDL=18,Ngap1= 27
if
(
vrb
>=
9
)
if
(
vrb
>=
9
)
offset
=
18
;
offset
=
18
;
else
else
offset
=
0
;
offset
=
0
;
if
(
vrb
<
12
)
{
if
(
vrb
<
12
)
{
if
((
vrb
&
3
)
>=
2
)
if
((
vrb
&
3
)
>=
2
)
return
offset
+
((
9
*
odd_slot
)
+
6
*
(
vrb
&
3
)
+
(
vrb
>>
2
)
+
17
)
%
18
;
return
offset
+
((
9
*
odd_slot
)
+
6
*
(
vrb
&
3
)
+
(
vrb
>>
2
)
+
17
)
%
18
;
else
else
return
offset
+
((
9
*
odd_slot
)
+
6
*
(
vrb
&
3
)
+
(
vrb
>>
2
))
%
18
;
return
offset
+
((
9
*
odd_slot
)
+
6
*
(
vrb
&
3
)
+
(
vrb
>>
2
))
%
18
;
}
}
else
{
else
{
return
offset
+
((
9
*
odd_slot
)
+
12
*
(
vrb
&
1
)
+
(
vrb
>>
1
)
)
%
18
+
18
*
(
vrb
/
18
);
return
offset
+
((
9
*
odd_slot
)
+
12
*
(
vrb
&
1
)
+
(
vrb
>>
1
)
)
%
18
+
18
*
(
vrb
/
18
);
}
}
}
}
break
;
break
;
...
@@ -742,7 +742,7 @@ void generate_RIV_tables()
...
@@ -742,7 +742,7 @@ void generate_RIV_tables()
nVRB_even_dist
=
get_prb
(
100
,
0
,
nVRB
,
0
);
nVRB_even_dist
=
get_prb
(
100
,
0
,
nVRB
,
0
);
// if ((RBstart==0) && (Lcrbs<=8))
// if ((RBstart==0) && (Lcrbs<=8))
//
printf("nVRB %d => nVRB_even_dist %d\n",nVRB,nVRB_even_dist);
//
printf("nVRB %d => nVRB_even_dist %d\n",nVRB,nVRB_even_dist);
if
(
nVRB_even_dist
<
32
)
if
(
nVRB_even_dist
<
32
)
...
@@ -750,16 +750,16 @@ void generate_RIV_tables()
...
@@ -750,16 +750,16 @@ void generate_RIV_tables()
else
if
(
nVRB_even_dist
<
64
)
else
if
(
nVRB_even_dist
<
64
)
allocdist1_0_even
|=
(
1
<<
(
nVRB_even_dist
-
32
));
allocdist1_0_even
|=
(
1
<<
(
nVRB_even_dist
-
32
));
else
if
(
nVRB_even_dist
<
96
)
else
if
(
nVRB_even_dist
<
96
)
allocdist2_0_even
|=
(
1
<<
(
nVRB_even_dist
-
64
));
allocdist2_0_even
|=
(
1
<<
(
nVRB_even_dist
-
64
));
else
else
allocdist3_0_even
|=
(
1
<<
(
nVRB_even_dist
-
96
));
allocdist3_0_even
|=
(
1
<<
(
nVRB_even_dist
-
96
));
/* if ((RBstart==0) && (Lcrbs<=8))
/* if ((RBstart==0) && (Lcrbs<=8))
printf("rballoc =>(%08x.%08x.%08x.%08x)\n",
printf("rballoc =>(%08x.%08x.%08x.%08x)\n",
allocdist0_0_even,
allocdist0_0_even,
allocdist1_0_even,
allocdist1_0_even,
allocdist2_0_even,
allocdist2_0_even,
allocdist3_0_even
allocdist3_0_even
);
);
*/
*/
// Distributed Gap1, odd slot
// Distributed Gap1, odd slot
nVRB_odd_dist
=
get_prb
(
100
,
1
,
nVRB
,
0
);
nVRB_odd_dist
=
get_prb
(
100
,
1
,
nVRB
,
0
);
...
@@ -768,9 +768,9 @@ void generate_RIV_tables()
...
@@ -768,9 +768,9 @@ void generate_RIV_tables()
else
if
(
nVRB_odd_dist
<
64
)
else
if
(
nVRB_odd_dist
<
64
)
allocdist1_0_odd
|=
(
1
<<
(
nVRB_odd_dist
-
32
));
allocdist1_0_odd
|=
(
1
<<
(
nVRB_odd_dist
-
32
));
else
if
(
nVRB_odd_dist
<
96
)
else
if
(
nVRB_odd_dist
<
96
)
allocdist2_0_odd
|=
(
1
<<
(
nVRB_odd_dist
-
64
));
allocdist2_0_odd
|=
(
1
<<
(
nVRB_odd_dist
-
64
));
else
else
allocdist3_0_odd
|=
(
1
<<
(
nVRB_odd_dist
-
96
));
allocdist3_0_odd
|=
(
1
<<
(
nVRB_odd_dist
-
96
));
// Distributed Gap2, even slot
// Distributed Gap2, even slot
...
@@ -780,9 +780,9 @@ void generate_RIV_tables()
...
@@ -780,9 +780,9 @@ void generate_RIV_tables()
else
if
(
nVRB_even_dist
<
64
)
else
if
(
nVRB_even_dist
<
64
)
allocdist1_1_even
|=
(
1
<<
(
nVRB_even_dist
-
32
));
allocdist1_1_even
|=
(
1
<<
(
nVRB_even_dist
-
32
));
else
if
(
nVRB_even_dist
<
96
)
else
if
(
nVRB_even_dist
<
96
)
allocdist2_1_even
|=
(
1
<<
(
nVRB_even_dist
-
64
));
allocdist2_1_even
|=
(
1
<<
(
nVRB_even_dist
-
64
));
else
else
allocdist3_1_even
|=
(
1
<<
(
nVRB_even_dist
-
96
));
allocdist3_1_even
|=
(
1
<<
(
nVRB_even_dist
-
96
));
// Distributed Gap2, odd slot
// Distributed Gap2, odd slot
...
@@ -792,9 +792,9 @@ void generate_RIV_tables()
...
@@ -792,9 +792,9 @@ void generate_RIV_tables()
else
if
(
nVRB_odd_dist
<
64
)
else
if
(
nVRB_odd_dist
<
64
)
allocdist1_1_odd
|=
(
1
<<
(
nVRB_odd_dist
-
32
));
allocdist1_1_odd
|=
(
1
<<
(
nVRB_odd_dist
-
32
));
else
if
(
nVRB_odd_dist
<
96
)
else
if
(
nVRB_odd_dist
<
96
)
allocdist2_1_odd
|=
(
1
<<
(
nVRB_odd_dist
-
64
));
allocdist2_1_odd
|=
(
1
<<
(
nVRB_odd_dist
-
64
));
else
else
allocdist3_1_odd
|=
(
1
<<
(
nVRB_odd_dist
-
96
));
allocdist3_1_odd
|=
(
1
<<
(
nVRB_odd_dist
-
96
));
RIV
=
computeRIV
(
100
,
RBstart
,
Lcrbs
);
RIV
=
computeRIV
(
100
,
RBstart
,
Lcrbs
);
...
@@ -860,7 +860,7 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti)
...
@@ -860,7 +860,7 @@ uint8_t get_transmission_mode(module_id_t Mod_id, uint8_t CC_id, rnti_t rnti)
}
}
int
generate_eNB_dlsch_params_from_dci
(
int
frame
,
int
generate_eNB_dlsch_params_from_dci
(
int
frame
,
uint8_t
subframe
,
uint8_t
subframe
,
void
*
dci_pdu
,
void
*
dci_pdu
,
uint16_t
rnti
,
uint16_t
rnti
,
DCI_format_t
dci_format
,
DCI_format_t
dci_format
,
...
@@ -871,7 +871,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -871,7 +871,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
uint16_t
ra_rnti
,
uint16_t
ra_rnti
,
uint16_t
p_rnti
,
uint16_t
p_rnti
,
uint16_t
DL_pmi_single
uint16_t
DL_pmi_single
)
)
{
{
uint8_t
harq_pid
=
UINT8_MAX
;
uint8_t
harq_pid
=
UINT8_MAX
;
...
@@ -928,11 +928,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -928,11 +928,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT6
[
rballoc
];
}
}
else
{
else
{
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
mac_xface
->
macphy_exit
(
"exiting"
);
mac_xface
->
macphy_exit
(
"exiting"
);
}
}
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT6
[
rballoc
];
//NPRB;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT6
[
rballoc
];
//NPRB;
...
@@ -966,11 +966,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -966,11 +966,11 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT25
[
rballoc
];
}
}
else
{
else
{
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
mac_xface
->
macphy_exit
(
"exiting"
);
mac_xface
->
macphy_exit
(
"exiting"
);
}
}
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT25
[
rballoc
];
//NPRB;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT25
[
rballoc
];
//NPRB;
...
@@ -999,12 +999,12 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -999,12 +999,12 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
}
}
else
{
else
{
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
mac_xface
->
macphy_exit
(
"exiting"
);
mac_xface
->
macphy_exit
(
"exiting"
);
}
}
...
@@ -1036,14 +1036,14 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -1036,14 +1036,14 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
0
]
=
localRIV2alloc_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
1
]
=
localRIV2alloc_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
2
]
=
localRIV2alloc_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
2
]
=
localRIV2alloc_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
3
]
=
localRIV2alloc_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc
[
3
]
=
localRIV2alloc_LUT100_3
[
rballoc
];
}
}
else
{
else
{
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
LOG_E
(
PHY
,
"Distributed RB allocation not done yet
\n
"
);
mac_xface
->
macphy_exit
(
"exiting"
);
mac_xface
->
macphy_exit
(
"exiting"
);
}
}
...
@@ -1564,64 +1564,64 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -1564,64 +1564,64 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch0_harq
->
dl_power_off
=
1
;
dlsch0_harq
->
dl_power_off
=
1
;
dlsch1_harq
->
dl_power_off
=
1
;
dlsch1_harq
->
dl_power_off
=
1
;
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
dlsch1_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch1_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
dlsch1_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch1_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
switch
(
tpmi
)
{
switch
(
tpmi
)
{
case
0
:
case
0
:
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
dlsch1_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
dlsch1_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
break
;
break
;
case
1
:
case
1
:
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
break
;
break
;
case
2
:
// PUSCH precoding
case
2
:
// PUSCH precoding
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch0_harq
->
pmi_alloc
=
DL_pmi_single
;
dlsch0_harq
->
pmi_alloc
=
DL_pmi_single
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch1_harq
->
pmi_alloc
=
DL_pmi_single
;
dlsch1_harq
->
pmi_alloc
=
DL_pmi_single
;
break
;
break
;
default:
default:
break
;
break
;
}
}
}
}
else
{
// only one is active
else
{
// only one is active
dlsch0_harq
->
dl_power_off
=
1
;
dlsch0_harq
->
dl_power_off
=
1
;
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
switch
(
tpmi
)
{
switch
(
tpmi
)
{
case
0
:
case
0
:
dlsch0_harq
->
mimo_mode
=
ALAMOUTI
;
dlsch0_harq
->
mimo_mode
=
ALAMOUTI
;
break
;
break
;
case
1
:
case
1
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING11
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING11
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
0
);
break
;
break
;
case
2
:
case
2
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1m1
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1m1
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
0
);
break
;
break
;
case
3
:
case
3
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1j
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1j
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
2
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
2
,
0
);
break
;
break
;
case
4
:
case
4
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1mj
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1mj
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
3
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
3
,
0
);
break
;
break
;
case
5
:
case
5
:
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING0
;
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING0
;
dlsch0_harq
->
pmi_alloc
=
DL_pmi_single
;
dlsch0_harq
->
pmi_alloc
=
DL_pmi_single
;
break
;
break
;
case
6
:
case
6
:
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING1
;
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING1
;
dlsch0_harq
->
pmi_alloc
=
DL_pmi_single
;
dlsch0_harq
->
pmi_alloc
=
DL_pmi_single
;
break
;
break
;
}
}
}
}
}
else
if
(
frame_parms
->
nb_antennas_tx
==
4
)
{
}
else
if
(
frame_parms
->
nb_antennas_tx
==
4
)
{
// fill in later
// fill in later
...
@@ -1917,7 +1917,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -1917,7 +1917,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch1_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch1_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
dlsch1_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch1_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
if
((
dlsch0
->
active
==
1
)
&&
(
dlsch1
->
active
==
1
))
{
if
((
dlsch0
->
active
==
1
)
&&
(
dlsch1
->
active
==
1
))
{
dlsch0_harq
->
mimo_mode
=
LARGE_CDD
;
dlsch0_harq
->
mimo_mode
=
LARGE_CDD
;
dlsch1_harq
->
mimo_mode
=
LARGE_CDD
;
dlsch1_harq
->
mimo_mode
=
LARGE_CDD
;
dlsch0_harq
->
dl_power_off
=
1
;
dlsch0_harq
->
dl_power_off
=
1
;
...
@@ -2154,8 +2154,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
...
@@ -2154,8 +2154,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch1_harq
->
rb_alloc
[
0
]
=
dlsch0_harq
->
rb_alloc
[
0
];
dlsch1_harq
->
rb_alloc
[
0
]
=
dlsch0_harq
->
rb_alloc
[
0
];
dlsch0_harq
->
nb_rb
=
conv_nprb
(
rah
,
dlsch0_harq
->
nb_rb
=
conv_nprb
(
rah
,
rballoc
,
rballoc
,
frame_parms
->
N_RB_DL
);
frame_parms
->
N_RB_DL
);
dlsch1_harq
->
nb_rb
=
dlsch0_harq
->
nb_rb
;
dlsch1_harq
->
nb_rb
=
dlsch0_harq
->
nb_rb
;
dlsch0_harq
->
mcs
=
mcs1
;
dlsch0_harq
->
mcs
=
mcs1
;
...
@@ -3109,7 +3109,7 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
...
@@ -3109,7 +3109,7 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
case
6
:
case
6
:
LOG_D
(
PHY
,
"DCI format1C (1.5MHz), rnti %x (%x)
\n
"
,
dci
->
rnti
,((
uint32_t
*
)
&
dci
->
dci_pdu
[
0
])[
0
]);
LOG_D
(
PHY
,
"DCI format1C (1.5MHz), rnti %x (%x)
\n
"
,
dci
->
rnti
,((
uint32_t
*
)
&
dci
->
dci_pdu
[
0
])[
0
]);
LOG_D
(
PHY
,
"RB_ALLOC %x (NB_RB %d)
\n
"
,
LOG_D
(
PHY
,
"RB_ALLOC %x (NB_RB %d)
\n
"
,
((
DCI1C_1_5MHz_t
*
)
&
dci
->
dci_pdu
[
0
])
->
rballoc
,
RIV2nb_rb_LUT6
[
conv_1C_RIV
(((
DCI1C_1_5MHz_t
*
)
&
dci
->
dci_pdu
[
0
])
->
rballoc
,
6
)]);
((
DCI1C_1_5MHz_t
*
)
&
dci
->
dci_pdu
[
0
])
->
rballoc
,
RIV2nb_rb_LUT6
[
conv_1C_RIV
(((
DCI1C_1_5MHz_t
*
)
&
dci
->
dci_pdu
[
0
])
->
rballoc
,
6
)]);
LOG_D
(
PHY
,
"MCS %d
\n
"
,((
DCI1C_1_5MHz_t
*
)
&
dci
->
dci_pdu
[
0
])
->
mcs
);
LOG_D
(
PHY
,
"MCS %d
\n
"
,((
DCI1C_1_5MHz_t
*
)
&
dci
->
dci_pdu
[
0
])
->
mcs
);
break
;
break
;
...
@@ -3838,7 +3838,7 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
...
@@ -3838,7 +3838,7 @@ int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
int
generate_ue_dlsch_params_from_dci
(
int
frame
,
int
generate_ue_dlsch_params_from_dci
(
int
frame
,
uint8_t
subframe
,
uint8_t
subframe
,
void
*
dci_pdu
,
void
*
dci_pdu
,
uint16_t
rnti
,
uint16_t
rnti
,
DCI_format_t
dci_format
,
DCI_format_t
dci_format
,
...
@@ -3914,16 +3914,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -3914,16 +3914,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
NPRB
=
RIV2nb_rb_LUT6
[
rballoc
];
NPRB
=
RIV2nb_rb_LUT6
[
rballoc
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
}
}
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT6
[
rballoc
];
}
}
else
{
else
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_even_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_even_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_odd_LUT6
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_odd_LUT6
[
rballoc
];
}
}
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
...
@@ -3970,16 +3970,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -3970,16 +3970,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
NPRB
=
RIV2nb_rb_LUT25
[
rballoc
];
NPRB
=
RIV2nb_rb_LUT25
[
rballoc
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
}
}
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT25
[
rballoc
];
}
}
else
{
else
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_even_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_even_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_odd_LUT25
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_odd_LUT25
[
rballoc
];
}
}
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT25
[
rballoc
];
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT25
[
rballoc
];
...
@@ -4023,30 +4023,30 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4023,30 +4023,30 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
NPRB
=
RIV2nb_rb_LUT50
[
rballoc
];
NPRB
=
RIV2nb_rb_LUT50
[
rballoc
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
}
}
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
//
printf("rballoc: %08x.%08x\n",dlsch0_harq->rb_alloc_even[0],dlsch0_harq->rb_alloc_even[1]);
//
printf("rballoc: %08x.%08x\n",dlsch0_harq->rb_alloc_even[0],dlsch0_harq->rb_alloc_even[1]);
}
else
{
// DISTRIBUTED
}
else
{
// DISTRIBUTED
if
((
rballoc
&
(
1
<<
10
))
==
0
)
{
if
((
rballoc
&
(
1
<<
10
))
==
0
)
{
rballoc
=
rballoc
&
(
~
(
1
<<
10
));
rballoc
=
rballoc
&
(
~
(
1
<<
10
));
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
}
}
else
{
else
{
rballoc
=
rballoc
&
(
~
(
1
<<
10
));
rballoc
=
rballoc
&
(
~
(
1
<<
10
));
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
}
}
}
}
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
...
@@ -4090,41 +4090,41 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4090,41 +4090,41 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
dlsch0_harq
=
dlsch
[
0
]
->
harq_processes
[
harq_pid
];
NPRB
=
RIV2nb_rb_LUT100
[
rballoc
];
NPRB
=
RIV2nb_rb_LUT100
[
rballoc
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch0_harq
->
delta_PUCCH
=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
dlsch
[
0
]
->
g_pucch
+=
delta_PUCCH_lut
[
TPC
&
3
];
}
}
if
(
vrb_type
==
LOCALIZED
)
{
if
(
vrb_type
==
LOCALIZED
)
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
localRIV2alloc_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
localRIV2alloc_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
localRIV2alloc_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
localRIV2alloc_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
localRIV2alloc_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
localRIV2alloc_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
localRIV2alloc_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
localRIV2alloc_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
localRIV2alloc_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
localRIV2alloc_LUT100_3
[
rballoc
];
}
else
{
}
else
{
if
((
rballoc
&
(
1
<<
10
))
==
0
)
{
//Gap 1
if
((
rballoc
&
(
1
<<
10
))
==
0
)
{
//Gap 1
rballoc
=
rballoc
&
(
~
(
1
<<
12
));
rballoc
=
rballoc
&
(
~
(
1
<<
12
));
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap0_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap0_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap0_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap0_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap0_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap0_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap0_odd_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap0_odd_LUT100_3
[
rballoc
];
}
}
else
{
//Gap 2
else
{
//Gap 2
rballoc
=
rballoc
&
(
~
(
1
<<
12
));
rballoc
=
rballoc
&
(
~
(
1
<<
12
));
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap1_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap1_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap1_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap1_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap1_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap1_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap1_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap1_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap1_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap1_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap1_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap1_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap1_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap1_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap1_odd_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap1_odd_LUT100_3
[
rballoc
];
}
}
}
}
dlsch0_harq
->
vrb_type
=
vrb_type
;
dlsch0_harq
->
vrb_type
=
vrb_type
;
...
@@ -4153,7 +4153,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4153,7 +4153,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
// if ((dlsch0_harq->round == 4) || ( {
// if ((dlsch0_harq->round == 4) || ( {
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
first_tx
=
1
;
dlsch0_harq
->
first_tx
=
1
;
// }
// }
// if (dlsch0_harq->round == 0)
// if (dlsch0_harq->round == 0)
// ndi = 1-dlsch0_harq->DCINdi;
// ndi = 1-dlsch0_harq->DCINdi;
...
@@ -4168,14 +4168,14 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4168,14 +4168,14 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq
->
dl_power_off
=
1
;
//no power offset
dlsch0_harq
->
dl_power_off
=
1
;
//no power offset
LOG_D
(
PHY
,
"UE (%x/%d): Subframe %d Format1A DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d, round %d
\n
"
,
LOG_D
(
PHY
,
"UE (%x/%d): Subframe %d Format1A DCI: ndi %d, old_ndi %d (first tx %d) harq_status %d, round %d
\n
"
,
dlsch
[
0
]
->
rnti
,
dlsch
[
0
]
->
rnti
,
harq_pid
,
harq_pid
,
subframe
,
subframe
,
ndi
,
ndi
,
dlsch0_harq
->
DCINdi
,
dlsch0_harq
->
DCINdi
,
dlsch0_harq
->
first_tx
,
dlsch0_harq
->
first_tx
,
dlsch0_harq
->
status
,
dlsch0_harq
->
status
,
dlsch0_harq
->
round
);
dlsch0_harq
->
round
);
if
((
ndi
!=
dlsch0_harq
->
DCINdi
)
||
// DCI has been toggled or this is the first transmission
if
((
ndi
!=
dlsch0_harq
->
DCINdi
)
||
// DCI has been toggled or this is the first transmission
(
dlsch0_harq
->
first_tx
==
1
))
{
(
dlsch0_harq
->
first_tx
==
1
))
{
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
round
=
0
;
...
@@ -4228,7 +4228,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4228,7 +4228,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
RIV_max
=
RIV_max25
;
RIV_max
=
RIV_max25
;
// printf("Format1C : %x : mcs %d, rballoc %d=>%d=>%x\n",((uint32_t*)dci_pdu)[0],
// printf("Format1C : %x : mcs %d, rballoc %d=>%d=>%x\n",((uint32_t*)dci_pdu)[0],
//
mcs,((DCI1C_5MHz_t *)dci_pdu)->rballoc,rballoc,dlsch0_harq->rb_alloc_even[0]);
//
mcs,((DCI1C_5MHz_t *)dci_pdu)->rballoc,rballoc,dlsch0_harq->rb_alloc_even[0]);
break
;
break
;
case
50
:
case
50
:
...
@@ -4237,16 +4237,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4237,16 +4237,16 @@ int generate_ue_dlsch_params_from_dci(int frame,
Ngap
=
((
DCI1C_10MHz_t
*
)
dci_pdu
)
->
Ngap
;
Ngap
=
((
DCI1C_10MHz_t
*
)
dci_pdu
)
->
Ngap
;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT50
[
rballoc
];
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT50
[
rballoc
];
if
(
Ngap
==
0
)
{
if
(
Ngap
==
0
)
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT50_1
[
rballoc
];
}
}
else
{
else
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap1_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap1_even_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap1_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap1_odd_LUT50_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap1_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap1_even_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap1_odd_LUT50_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap1_odd_LUT50_1
[
rballoc
];
}
}
RIV_max
=
RIV_max50
;
RIV_max
=
RIV_max50
;
...
@@ -4258,35 +4258,35 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4258,35 +4258,35 @@ int generate_ue_dlsch_params_from_dci(int frame,
Ngap
=
((
DCI1C_20MHz_t
*
)
dci_pdu
)
->
Ngap
;
Ngap
=
((
DCI1C_20MHz_t
*
)
dci_pdu
)
->
Ngap
;
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT100
[
rballoc
];
dlsch0_harq
->
nb_rb
=
RIV2nb_rb_LUT100
[
rballoc
];
if
(
Ngap
==
0
)
{
if
(
Ngap
==
0
)
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap0_even_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap0_odd_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap0_even_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap0_odd_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap0_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap0_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap0_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap0_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap0_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap0_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap0_odd_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap0_odd_LUT100_3
[
rballoc
];
}
}
else
{
else
{
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap1_even_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
0
]
=
distRIV2alloc_gap1_even_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap1_odd_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
0
]
=
distRIV2alloc_gap1_odd_LUT100_0
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap1_even_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
1
]
=
distRIV2alloc_gap1_even_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap1_odd_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
1
]
=
distRIV2alloc_gap1_odd_LUT100_1
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap1_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
2
]
=
distRIV2alloc_gap1_even_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap1_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
2
]
=
distRIV2alloc_gap1_odd_LUT100_2
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap1_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_even
[
3
]
=
distRIV2alloc_gap1_even_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap1_odd_LUT100_3
[
rballoc
];
dlsch0_harq
->
rb_alloc_odd
[
3
]
=
distRIV2alloc_gap1_odd_LUT100_3
[
rballoc
];
}
}
RIV_max
=
RIV_max100
;
RIV_max
=
RIV_max100
;
/*
/*
printf("Format1C : %x : mcs %d, rballoc %d=>%d=>(%08x.%08x.%08x.%08x), Ngap %d\n",((uint32_t*)dci_pdu)[0],
printf("Format1C : %x : mcs %d, rballoc %d=>%d=>(%08x.%08x.%08x.%08x), Ngap %d\n",((uint32_t*)dci_pdu)[0],
mcs,((DCI1C_20MHz_t *)dci_pdu)->rballoc,rballoc,
mcs,((DCI1C_20MHz_t *)dci_pdu)->rballoc,rballoc,
dlsch0_harq->rb_alloc_even[0],
dlsch0_harq->rb_alloc_even[0],
dlsch0_harq->rb_alloc_even[1],
dlsch0_harq->rb_alloc_even[1],
dlsch0_harq->rb_alloc_even[2],
dlsch0_harq->rb_alloc_even[2],
dlsch0_harq->rb_alloc_even[3],
dlsch0_harq->rb_alloc_even[3],
Ngap
Ngap
);
);
*/
*/
break
;
break
;
...
@@ -4307,9 +4307,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4307,9 +4307,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
if
(
rnti
==
si_rnti
)
{
// rule from Section 5.3.1 of 36.321
if
(
rnti
==
si_rnti
)
{
// rule from Section 5.3.1 of 36.321
if
(((
frame
&
1
)
==
0
)
&&
(
subframe
==
5
))
if
(((
frame
&
1
)
==
0
)
&&
(
subframe
==
5
))
dlsch0_harq
->
rvidx
=
(((
3
*
((
frame
>>
1
)
&
3
))
+
1
)
>>
1
)
&
3
;
// SIB1
dlsch0_harq
->
rvidx
=
(((
3
*
((
frame
>>
1
)
&
3
))
+
1
)
>>
1
)
&
3
;
// SIB1
else
else
dlsch0_harq
->
rvidx
=
(((
3
*
(
subframe
&
3
))
+
1
)
>>
1
)
&
3
;
// other SIBs
dlsch0_harq
->
rvidx
=
(((
3
*
(
subframe
&
3
))
+
1
)
>>
1
)
&
3
;
// other SIBs
}
}
else
if
((
rnti
==
p_rnti
)
||
(
rnti
==
ra_rnti
))
{
// Section 7.1.7.3
else
if
((
rnti
==
p_rnti
)
||
(
rnti
==
ra_rnti
))
{
// Section 7.1.7.3
dlsch0_harq
->
rvidx
=
0
;
dlsch0_harq
->
rvidx
=
0
;
...
@@ -4321,11 +4321,11 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4321,11 +4321,11 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0_harq
->
dl_power_off
=
1
;
//no power offset
dlsch0_harq
->
dl_power_off
=
1
;
//no power offset
LOG_D
(
PHY
,
"UE (%x/%d): Subframe %d Format1C DCI: harq_status %d, round %d
\n
"
,
LOG_D
(
PHY
,
"UE (%x/%d): Subframe %d Format1C DCI: harq_status %d, round %d
\n
"
,
dlsch
[
0
]
->
rnti
,
dlsch
[
0
]
->
rnti
,
harq_pid
,
harq_pid
,
subframe
,
subframe
,
dlsch0_harq
->
status
,
dlsch0_harq
->
status
,
dlsch0_harq
->
round
);
dlsch0_harq
->
round
);
dlsch0_harq
->
mcs
=
mcs
;
dlsch0_harq
->
mcs
=
mcs
;
...
@@ -4416,7 +4416,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4416,7 +4416,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
rah
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
rah
;
rballoc
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rv
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
rv
;
rv
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
rv
;
TPC
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
TPC
;
TPC
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
TPC
;
ndi
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
ndi
;
ndi
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
ndi
;
harq_pid
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI1_20MHz_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
}
}
...
@@ -4525,245 +4525,245 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4525,245 +4525,245 @@ int generate_ue_dlsch_params_from_dci(int frame,
case
6
:
case
6
:
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rv1
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_1_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rv1
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_1_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rv1
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_1_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rv1
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_1_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
{
else
{
LOG_E
(
PHY
,
"UE: subframe %d Format2 DCI: unsupported number of TX antennas %d
\n
"
,
subframe
,
frame_parms
->
nb_antennas_tx_eNB
);
LOG_E
(
PHY
,
"UE: subframe %d Format2 DCI: unsupported number of TX antennas %d
\n
"
,
subframe
,
frame_parms
->
nb_antennas_tx_eNB
);
}
}
break
;
break
;
case
25
:
case
25
:
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_5MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_5MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_5MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_5MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
break
;
break
;
case
50
:
case
50
:
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_10MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_10MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_10MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_10MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
{
else
{
LOG_E
(
PHY
,
"UE: Format2 DCI: unsupported number of TX antennas %d
\n
"
,
frame_parms
->
nb_antennas_tx_eNB
);
LOG_E
(
PHY
,
"UE: Format2 DCI: unsupported number of TX antennas %d
\n
"
,
frame_parms
->
nb_antennas_tx_eNB
);
}
}
break
;
break
;
case
100
:
case
100
:
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_parms
->
nb_antennas_tx_eNB
==
2
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_20MHz_2A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_20MHz_2A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
else
if
(
frame_parms
->
nb_antennas_tx_eNB
==
4
)
{
if
(
frame_type
==
TDD
)
{
if
(
frame_type
==
TDD
)
{
mcs1
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_20MHz_4A_TDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
else
{
else
{
mcs1
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs1
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs1
;
mcs2
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
mcs2
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
mcs2
;
rballoc
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rballoc
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rballoc
;
rah
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rah
;
rah
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rah
;
rv1
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv1
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv1
;
rv2
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
rv2
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
rv2
;
ndi1
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi1
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi1
;
ndi2
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
ndi2
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
ndi2
;
harq_pid
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
harq_pid
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
harq_pid
;
tbswap
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tbswap
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
tb_swap
;
tpmi
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
tpmi
=
((
DCI2_20MHz_4A_FDD_t
*
)
dci_pdu
)
->
tpmi
;
}
}
}
}
else
{
else
{
LOG_E
(
PHY
,
"UE: Format2 DCI: unsupported number of TX antennas %d
\n
"
,
frame_parms
->
nb_antennas_tx_eNB
);
LOG_E
(
PHY
,
"UE: Format2 DCI: unsupported number of TX antennas %d
\n
"
,
frame_parms
->
nb_antennas_tx_eNB
);
}
}
break
;
break
;
...
@@ -4814,8 +4814,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4814,8 +4814,8 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch1_harq
->
rb_alloc_odd
[
3
]
=
dlsch0_harq
->
rb_alloc_odd
[
3
];
dlsch1_harq
->
rb_alloc_odd
[
3
]
=
dlsch0_harq
->
rb_alloc_odd
[
3
];
dlsch0_harq
->
nb_rb
=
conv_nprb
(
rah
,
dlsch0_harq
->
nb_rb
=
conv_nprb
(
rah
,
rballoc
,
rballoc
,
frame_parms
->
N_RB_DL
);
frame_parms
->
N_RB_DL
);
dlsch1_harq
->
nb_rb
=
dlsch0_harq
->
nb_rb
;
dlsch1_harq
->
nb_rb
=
dlsch0_harq
->
nb_rb
;
dlsch0_harq
->
mcs
=
mcs1
;
dlsch0_harq
->
mcs
=
mcs1
;
...
@@ -4864,60 +4864,60 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4864,60 +4864,60 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch1_harq
->
dl_power_off
=
1
;
dlsch1_harq
->
dl_power_off
=
1
;
switch
(
tpmi
)
{
switch
(
tpmi
)
{
case
0
:
case
0
:
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODING1
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
dlsch1_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
dlsch1_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
1
);
break
;
break
;
case
1
:
case
1
:
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_UNIFORM_PRECODINGj
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
dlsch1_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
dlsch1_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
1
);
break
;
break
;
case
2
:
// PUSCH precoding
case
2
:
// PUSCH precoding
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch0_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch0_harq
->
pmi_alloc
=
dlsch0
->
pmi_alloc
;
dlsch0_harq
->
pmi_alloc
=
dlsch0
->
pmi_alloc
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch1_harq
->
mimo_mode
=
DUALSTREAM_PUSCH_PRECODING
;
dlsch1_harq
->
pmi_alloc
=
dlsch0
->
pmi_alloc
^
0x1555
;
dlsch1_harq
->
pmi_alloc
=
dlsch0
->
pmi_alloc
^
0x1555
;
break
;
break
;
default:
default:
break
;
break
;
}
}
}
}
else
{
else
{
dlsch0_harq
->
dl_power_off
=
1
;
dlsch0_harq
->
dl_power_off
=
1
;
switch
(
tpmi
)
{
switch
(
tpmi
)
{
case
0
:
case
0
:
dlsch0_harq
->
mimo_mode
=
ALAMOUTI
;
dlsch0_harq
->
mimo_mode
=
ALAMOUTI
;
break
;
break
;
case
1
:
case
1
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING11
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING11
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
0
,
0
);
break
;
break
;
case
2
:
case
2
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1m1
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1m1
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
1
,
0
);
break
;
break
;
case
3
:
case
3
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1j
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1j
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
2
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
2
,
0
);
break
;
break
;
case
4
:
case
4
:
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1mj
;
dlsch0_harq
->
mimo_mode
=
UNIFORM_PRECODING1mj
;
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
3
,
0
);
dlsch0_harq
->
pmi_alloc
=
pmi_extend
(
frame_parms
,
3
,
0
);
break
;
break
;
case
5
:
case
5
:
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING0
;
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING0
;
// pmi stored from ulsch allocation routine
// pmi stored from ulsch allocation routine
dlsch0_harq
->
pmi_alloc
=
dlsch0
->
pmi_alloc
;
dlsch0_harq
->
pmi_alloc
=
dlsch0
->
pmi_alloc
;
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
break
;
break
;
case
6
:
case
6
:
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING1
;
dlsch0_harq
->
mimo_mode
=
PUSCH_PRECODING1
;
LOG_E
(
PHY
,
"Unsupported TPMI
\n
"
);
LOG_E
(
PHY
,
"Unsupported TPMI
\n
"
);
return
(
-
1
);
return
(
-
1
);
break
;
break
;
}
}
}
}
...
@@ -4927,46 +4927,46 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4927,46 +4927,46 @@ int generate_ue_dlsch_params_from_dci(int frame,
if
(
dlsch0
->
active
==
1
)
{
if
(
dlsch0
->
active
==
1
)
{
if
((
ndi1
!=
dlsch0_harq
->
DCINdi
)
||
if
((
ndi1
!=
dlsch0_harq
->
DCINdi
)
||
(
dlsch0_harq
->
first_tx
==
1
))
{
(
dlsch0_harq
->
first_tx
==
1
))
{
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
round
=
0
;
dlsch0_harq
->
status
=
ACTIVE
;
dlsch0_harq
->
status
=
ACTIVE
;
dlsch0_harq
->
DCINdi
=
ndi1
;
dlsch0_harq
->
DCINdi
=
ndi1
;
if
(
dlsch0_harq
->
first_tx
==
1
)
{
if
(
dlsch0_harq
->
first_tx
==
1
)
{
LOG_D
(
PHY
,
"Format 2 DCI First TX0: Clearing flag
\n
"
);
LOG_D
(
PHY
,
"Format 2 DCI First TX0: Clearing flag
\n
"
);
dlsch0_harq
->
first_tx
=
0
;
dlsch0_harq
->
first_tx
=
0
;
}
}
}
}
else
if
(
dlsch0_harq
->
status
==
SCH_IDLE
)
{
// we got an Ndi = 0 for a previously decoded process,
else
if
(
dlsch0_harq
->
status
==
SCH_IDLE
)
{
// we got an Ndi = 0 for a previously decoded process,
// this happens if either another harq process in the same
// this happens if either another harq process in the same
// is NAK or an ACK was not received
// is NAK or an ACK was not received
dlsch0
->
harq_ack
[
subframe
].
ack
=
1
;
dlsch0
->
harq_ack
[
subframe
].
ack
=
1
;
dlsch0
->
harq_ack
[
subframe
].
harq_id
=
harq_pid
;
dlsch0
->
harq_ack
[
subframe
].
harq_id
=
harq_pid
;
dlsch0
->
harq_ack
[
subframe
].
send_harq_status
=
1
;
dlsch0
->
harq_ack
[
subframe
].
send_harq_status
=
1
;
dlsch0
->
active
=
0
;
dlsch0
->
active
=
0
;
}
}
}
}
if
(
dlsch1
->
active
==
1
)
{
if
(
dlsch1
->
active
==
1
)
{
if
((
ndi2
!=
dlsch1_harq
->
DCINdi
)
||
if
((
ndi2
!=
dlsch1_harq
->
DCINdi
)
||
(
dlsch1_harq
->
first_tx
==
1
))
{
(
dlsch1_harq
->
first_tx
==
1
))
{
dlsch1_harq
->
round
=
0
;
dlsch1_harq
->
round
=
0
;
dlsch1_harq
->
status
=
ACTIVE
;
dlsch1_harq
->
status
=
ACTIVE
;
dlsch1_harq
->
DCINdi
=
ndi2
;
dlsch1_harq
->
DCINdi
=
ndi2
;
if
(
dlsch1_harq
->
first_tx
==
1
)
{
if
(
dlsch1_harq
->
first_tx
==
1
)
{
LOG_D
(
PHY
,
"Format 2 DCI First TX1: Clearing flag
\n
"
);
LOG_D
(
PHY
,
"Format 2 DCI First TX1: Clearing flag
\n
"
);
dlsch1_harq
->
first_tx
=
0
;
dlsch1_harq
->
first_tx
=
0
;
}
}
}
}
else
if
(
dlsch1_harq
->
status
==
SCH_IDLE
)
{
// we got an Ndi = 0 for a previously decoded process,
else
if
(
dlsch1_harq
->
status
==
SCH_IDLE
)
{
// we got an Ndi = 0 for a previously decoded process,
// this happens if either another harq process in the same
// this happens if either another harq process in the same
// is NAK or an ACK was not received
// is NAK or an ACK was not received
dlsch1
->
harq_ack
[
subframe
].
ack
=
1
;
dlsch1
->
harq_ack
[
subframe
].
ack
=
1
;
dlsch1
->
harq_ack
[
subframe
].
harq_id
=
harq_pid
;
dlsch1
->
harq_ack
[
subframe
].
harq_id
=
harq_pid
;
dlsch1
->
harq_ack
[
subframe
].
send_harq_status
=
1
;
dlsch1
->
harq_ack
[
subframe
].
send_harq_status
=
1
;
dlsch1
->
active
=
0
;
dlsch1
->
active
=
0
;
}
}
}
}
...
@@ -4975,11 +4975,11 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -4975,11 +4975,11 @@ int generate_ue_dlsch_params_from_dci(int frame,
if
(
dlsch0_harq
->
nb_rb
>
1
)
{
if
(
dlsch0_harq
->
nb_rb
>
1
)
{
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
dlsch0_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch0_harq
->
mcs
)][
dlsch0_harq
->
nb_rb
-
1
];
if
(
mcs1
<=
28
)
if
(
mcs1
<=
28
)
dlsch0_harq
->
Qm
=
get_Qm
(
mcs1
);
dlsch0_harq
->
Qm
=
get_Qm
(
mcs1
);
else
if
(
mcs1
<=
31
)
else
if
(
mcs1
<=
31
)
dlsch0_harq
->
Qm
=
(
mcs1
-
28
)
<<
1
;
dlsch0_harq
->
Qm
=
(
mcs1
-
28
)
<<
1
;
else
else
LOG_E
(
PHY
,
"invalid mcs1 %d
\n
"
,
mcs1
);
LOG_E
(
PHY
,
"invalid mcs1 %d
\n
"
,
mcs1
);
}
else
}
else
dlsch0_harq
->
TBS
=
0
;
dlsch0_harq
->
TBS
=
0
;
...
@@ -5001,9 +5001,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
...
@@ -5001,9 +5001,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
if
(
dlsch1_harq
->
nb_rb
>
1
)
{
if
(
dlsch1_harq
->
nb_rb
>
1
)
{
dlsch1_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch1_harq
->
mcs
)][
dlsch1_harq
->
nb_rb
-
1
];
dlsch1_harq
->
TBS
=
TBStable
[
get_I_TBS
(
dlsch1_harq
->
mcs
)][
dlsch1_harq
->
nb_rb
-
1
];
if
(
mcs2
<=
28
)
if
(
mcs2
<=
28
)
dlsch1_harq
->
Qm
=
get_Qm
(
mcs2
);
dlsch1_harq
->
Qm
=
get_Qm
(
mcs2
);
else
if
(
mcs1
<=
31
)
else
if
(
mcs1
<=
31
)
dlsch1_harq
->
Qm
=
(
mcs2
-
28
)
<<
1
;
dlsch1_harq
->
Qm
=
(
mcs2
-
28
)
<<
1
;
else
else
LOG_E
(
PHY
,
"invalid mcs2 %d
\n
"
,
mcs2
);
LOG_E
(
PHY
,
"invalid mcs2 %d
\n
"
,
mcs2
);
}
else
}
else
...
@@ -5894,14 +5894,16 @@ uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb)
...
@@ -5894,14 +5894,16 @@ uint16_t quantize_subband_pmi(PHY_MEASUREMENTS *meas,uint8_t eNB_id,int nb_rb)
else
if
(
rank
==
1
)
{
else
if
(
rank
==
1
)
{
for
(
aarx
=
0
;
aarx
<
meas
->
nb_antennas_rx
;
aarx
++
)
{
for
(
aarx
=
0
;
aarx
<
meas
->
nb_antennas_rx
;
aarx
++
)
{
pmi_re
+=
meas
->
subband_pmi_re
[
eNB_id
][
i
][
aarx
];
pmi_re
+=
meas
->
subband_pmi_re
[
eNB_id
][
i
][
aarx
];
//printf("meas->subband_pmi_re[eNB_id][i][%d]=%d\n", aarx, meas->subband_pmi_re[eNB_id][i][aarx]);
//printf("meas->subband_pmi_re[eNB_id][i][%d]=%d\n", aarx, meas->subband_pmi_re[eNB_id][i][aarx]);
pmi_im
+=
meas
->
subband_pmi_im
[
eNB_id
][
i
][
aarx
];
pmi_im
+=
meas
->
subband_pmi_im
[
eNB_id
][
i
][
aarx
];
//printf("meas->subband_pmi_im[eNB_id][i][%d]=%d\n",aarx, meas->subband_pmi_im[eNB_id][i][aarx]);
//printf("meas->subband_pmi_im[eNB_id][i][%d]=%d\n",aarx, meas->subband_pmi_im[eNB_id][i][aarx]);
}
}
if
(((
pmi_re
>=
pmi_im
)
&&
(
pmi_re
>=
-
pmi_im
))
||
((
pmi_re
<=
pmi_im
)
&&
(
pmi_re
>=
-
pmi_im
)))
if
(
pmi_re
>=
pmi_im
)
// this is not orthogonal
pmiq
=
PMI_2A_R1_11
;
// this is orthogonal
else
//if (((pmi_re >= pmi_im) && (pmi_re >= -pmi_im)) || ((pmi_re <= pmi_im) && (pmi_re >= -pmi_im)))
pmiq
=
PMI_2A_R1_1j
;
pmiq
=
PMI_2A_R1_11
;
else
pmiq
=
PMI_2A_R1_1j
;
// printf("subband %d, pmi_re %d, pmi_im %d, pmiq %d \n",i,pmi_re,pmi_im,pmiq);
// printf("subband %d, pmi_re %d, pmi_im %d, pmiq %d \n",i,pmi_re,pmi_im,pmiq);
// printf("subband %d, pmi%d \n",i,pmiq);
// printf("subband %d, pmi%d \n",i,pmiq);
...
@@ -7278,8 +7280,8 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
...
@@ -7278,8 +7280,8 @@ int generate_eNB_ulsch_params_from_dci(void *dci_pdu,
harq_pid
=
subframe2harq_pid
(
frame_parms
,
harq_pid
=
subframe2harq_pid
(
frame_parms
,
pdcch_alloc2ul_frame
(
frame_parms
,
pdcch_alloc2ul_frame
(
frame_parms
,
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
,
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
,
subframe
),
subframe
),
pdcch_alloc2ul_subframe
(
frame_parms
,
subframe
));
pdcch_alloc2ul_subframe
(
frame_parms
,
subframe
));
// printf("eNB: sched_subframe %d, subframe %d, frame_tx %d\n",sched_subframe,subframe,phy_vars_eNB->proc[sched_subframe].frame_tx);
// printf("eNB: sched_subframe %d, subframe %d, frame_tx %d\n",sched_subframe,subframe,phy_vars_eNB->proc[sched_subframe].frame_tx);
...
...
openair1/SIMULATION/LTE_PHY/dlsim.c
View file @
4e8e7079
...
@@ -476,7 +476,7 @@ int main(int argc, char **argv)
...
@@ -476,7 +476,7 @@ int main(int argc, char **argv)
break
;
break
;
case
'Q'
:
case
'Q'
:
channel_model
=
Rayleigh1_orth_eff_ch_TM4_prec_real
;
// for DUALSTREAM_UNIFORM_PRECODING1 when interf is precancelled
channel_model
=
Rayleigh1_orth_eff_ch_TM4_prec_real
;
// for DUALSTREAM_UNIFORM_PRECODING1 when interf is precancelled
break
;
break
;
case
'R'
:
case
'R'
:
channel_model
=
Rayleigh1_orth_eff_ch_TM4_prec_imag
;
// for DUALSTREAM_UNIFORM_PRECODINGj when interf is precancelled
channel_model
=
Rayleigh1_orth_eff_ch_TM4_prec_imag
;
// for DUALSTREAM_UNIFORM_PRECODINGj when interf is precancelled
break
;
break
;
...
@@ -525,49 +525,49 @@ int main(int argc, char **argv)
...
@@ -525,49 +525,49 @@ int main(int argc, char **argv)
break
;
break
;
case
'R'
:
case
'R'
:
num_rounds
=
atoi
(
optarg
);
num_rounds
=
atoi
(
optarg
);
break
;
break
;
case
'S'
:
case
'S'
:
subframe
=
atoi
(
optarg
);
subframe
=
atoi
(
optarg
);
break
;
break
;
case
'T'
:
case
'T'
:
n_rnti
=
atoi
(
optarg
);
n_rnti
=
atoi
(
optarg
);
break
;
break
;
case
'u'
:
case
'u'
:
rx_type
=
(
RX_type_t
)
atoi
(
optarg
);
rx_type
=
(
RX_type_t
)
atoi
(
optarg
);
if
(
rx_type
<
rx_standard
||
rx_type
>
rx_SIC_dual_stream
)
{
if
(
rx_type
<
rx_standard
||
rx_type
>
rx_SIC_dual_stream
)
{
printf
(
"Unsupported rx type %d
\n
"
,
rx_type
);
printf
(
"Unsupported rx type %d
\n
"
,
rx_type
);
exit
(
-
1
);
exit
(
-
1
);
}
}
break
;
break
;
case
'v'
:
case
'v'
:
i_mod
=
atoi
(
optarg
);
i_mod
=
atoi
(
optarg
);
if
(
i_mod
!=
2
&&
i_mod
!=
4
&&
i_mod
!=
6
)
{
if
(
i_mod
!=
2
&&
i_mod
!=
4
&&
i_mod
!=
6
)
{
msg
(
"Wrong i_mod %d, should be 2,4 or 6
\n
"
,
i_mod
);
msg
(
"Wrong i_mod %d, should be 2,4 or 6
\n
"
,
i_mod
);
exit
(
-
1
);
exit
(
-
1
);
}
}
break
;
break
;
case
'P'
:
case
'P'
:
print_perf
=
1
;
print_perf
=
1
;
break
;
break
;
case
'X'
:
case
'X'
:
xforms
=
1
;
xforms
=
1
;
break
;
break
;
case
'Z'
:
case
'Z'
:
dump_table
=
1
;
dump_table
=
1
;
break
;
break
;
case
'Y'
:
case
'Y'
:
perfect_ce
=
1
;
perfect_ce
=
1
;
break
;
break
;
case
'V'
:
case
'V'
:
interf_unaw_shift0
=
atoi
(
optarg
);
interf_unaw_shift0
=
atoi
(
optarg
);
break
;
break
;
case
'W'
:
case
'W'
:
interf_unaw_shift1
=
atoi
(
optarg
);
interf_unaw_shift1
=
atoi
(
optarg
);
break
;
break
;
case
'J'
:
case
'J'
:
interf_unaw_shift
=
atoi
(
optarg
);
interf_unaw_shift
=
atoi
(
optarg
);
break
;
break
;
case
'h'
:
case
'h'
:
default:
default:
printf
(
"%s -h(elp) -a(wgn on) -d(ci decoding on) -p(extended prefix on) -m mcs1 -M mcs2 -n n_frames -s snr0 -x transmission mode (1,2,3,5,6) -y TXant -z RXant -I trch_file
\n
"
,
argv
[
0
]);
printf
(
"%s -h(elp) -a(wgn on) -d(ci decoding on) -p(extended prefix on) -m mcs1 -M mcs2 -n n_frames -s snr0 -x transmission mode (1,2,3,5,6) -y TXant -z RXant -I trch_file
\n
"
,
argv
[
0
]);
...
@@ -721,14 +721,14 @@ int main(int argc, char **argv)
...
@@ -721,14 +721,14 @@ int main(int argc, char **argv)
sprintf
(
bler_fname
,
"bler_tx%d_rec%d_chan%d_nrx%d_mcs%d_mcsi%d_u%d_imod%d.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_rx
,
mcs1
,
mcs_i
,
rx_type
,
i_mod
);
sprintf
(
bler_fname
,
"bler_tx%d_rec%d_chan%d_nrx%d_mcs%d_mcsi%d_u%d_imod%d.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_rx
,
mcs1
,
mcs_i
,
rx_type
,
i_mod
);
else
if
(
abstx
==
1
)
else
if
(
abstx
==
1
)
if
(
perfect_ce
==
1
)
if
(
perfect_ce
==
1
)
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_ab_pce_sh%d_p
mnew
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_ab_pce_sh%d_p
nort
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
else
else
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_ab_sh%d_p
mnew
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_ab_sh%d_p
nort
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
else
//abstx=0
else
//abstx=0
if
(
perfect_ce
==
1
)
if
(
perfect_ce
==
1
)
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_pce_sh%d_p
mnew
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_pce_sh%d_p
nort
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
else
else
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_sh%d_p
mnew
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
sprintf
(
bler_fname
,
"bler_tx%d_r%d_ch%d_%d_nrx%d_mcs%d_mcsi%d_sh%d_p
nort
.csv"
,
transmission_mode
,
rx_type
,
channel_model
,
n_frames
,
n_rx
,
mcs1
,
mcs2
,
interf_unaw_shift
);
bler_fd
=
fopen
(
bler_fname
,
"w"
);
bler_fd
=
fopen
(
bler_fname
,
"w"
);
if
(
bler_fd
==
NULL
)
{
if
(
bler_fd
==
NULL
)
{
...
@@ -764,9 +764,9 @@ int main(int argc, char **argv)
...
@@ -764,9 +764,9 @@ int main(int argc, char **argv)
else
else
if
(
perfect_ce
==
1
)
if
(
perfect_ce
==
1
)
sprintf
(
csv_fname
,
"dout_tx%d_r%d_mcs%d_mcsi%d_ch%d_ns%d_R%d_pce_sh%d_%d_p
mnew
.m"
,
transmission_mode
,
rx_type
,
mcs1
,
mcs2
,
channel_model
,
n_frames
,
num_rounds
,
interf_unaw_shift
,
n_ch_rlz
);
sprintf
(
csv_fname
,
"dout_tx%d_r%d_mcs%d_mcsi%d_ch%d_ns%d_R%d_pce_sh%d_%d_p
nort
.m"
,
transmission_mode
,
rx_type
,
mcs1
,
mcs2
,
channel_model
,
n_frames
,
num_rounds
,
interf_unaw_shift
,
n_ch_rlz
);
else
else
sprintf
(
csv_fname
,
"dout_tx%d_r%d_mcs%d_mcsi%d_ch%d_ns%d_R%d_sh%d_%d_p
mnew
.m"
,
transmission_mode
,
rx_type
,
mcs1
,
mcs2
,
channel_model
,
n_frames
,
num_rounds
,
interf_unaw_shift
,
n_ch_rlz
);
sprintf
(
csv_fname
,
"dout_tx%d_r%d_mcs%d_mcsi%d_ch%d_ns%d_R%d_sh%d_%d_p
nort
.m"
,
transmission_mode
,
rx_type
,
mcs1
,
mcs2
,
channel_model
,
n_frames
,
num_rounds
,
interf_unaw_shift
,
n_ch_rlz
);
csv_fd
=
fopen
(
csv_fname
,
"w"
);
csv_fd
=
fopen
(
csv_fname
,
"w"
);
fprintf
(
csv_fd
,
"data_all%d=["
,
mcs1
);
fprintf
(
csv_fd
,
"data_all%d=["
,
mcs1
);
...
@@ -3412,9 +3412,9 @@ n(tikz_fname,"w");
...
@@ -3412,9 +3412,9 @@ n(tikz_fname,"w");
if
(
abstx
){
if
(
abstx
){
if
(
trials
==
0
&&
round
==
0
&&
transmission_mode
>=
4
){
if
(
trials
==
0
&&
round
==
0
&&
transmission_mode
>=
4
){
for
(
iii
=
0
;
iii
<
NB_RB
;
iii
++
){
for
(
iii
=
0
;
iii
<
NB_RB
;
iii
++
){
//fprintf(csv_fd, "%d, %d", (PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->pmi_ext[iii]),(PHY_vars_UE->lte_ue_pdsch_vars[eNB_id_i]->pmi_ext[iii]));
//fprintf(csv_fd, "%d, %d", (PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->pmi_ext[iii]),(PHY_vars_UE->lte_ue_pdsch_vars[eNB_id_i]->pmi_ext[iii]));
fprintf
(
csv_fd
,
"%x,"
,(
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
pmi_ext
[
iii
]));
fprintf
(
csv_fd
,
"%x,"
,(
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
pmi_ext
[
iii
]));
//printf("%x ",(PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->pmi_ext[iii]));
//printf("%x ",(PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->pmi_ext[iii]));
}
}
}
}
}
}
...
@@ -3430,17 +3430,17 @@ n(tikz_fname,"w");
...
@@ -3430,17 +3430,17 @@ n(tikz_fname,"w");
for
(
cw_non_sic
=
0
;
cw_non_sic
<
cw_to_decode_interf
;
cw_non_sic
++
){
for
(
cw_non_sic
=
0
;
cw_non_sic
<
cw_to_decode_interf
;
cw_non_sic
++
){
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
rnti
=
(
common_flag
==
0
)
?
n_rnti
:
SI_RNTI
;
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
rnti
=
(
common_flag
==
0
)
?
n_rnti
:
SI_RNTI
;
coded_bits_per_codeword
=
get_G
(
&
PHY_vars_eNB
->
lte_frame_parms
,
coded_bits_per_codeword
=
get_G
(
&
PHY_vars_eNB
->
lte_frame_parms
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
nb_rb
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
nb_rb
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
rb_alloc
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
rb_alloc
,
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
mcs
),
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Nl
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Nl
,
num_pdcch_symbols
,
num_pdcch_symbols
,
0
,
subframe
);
0
,
subframe
);
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
]
->
G
=
coded_bits_per_codeword
;
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
]
->
G
=
coded_bits_per_codeword
;
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
]
->
Qm
=
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
mcs
);
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
]
->
Qm
=
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
mcs
);
if
(
n_frames
==
2
)
{
if
(
n_frames
==
2
)
{
printf
(
"Kmimo=%d, cw=%d, G=%d, TBS=%d
\n
"
,
Kmimo
,
cw_non_sic
,
coded_bits_per_codeword
,
printf
(
"Kmimo=%d, cw=%d, G=%d, TBS=%d
\n
"
,
Kmimo
,
cw_non_sic
,
coded_bits_per_codeword
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
]
->
TBS
);
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
]
->
TBS
);
// calculate uncoded BER
// calculate uncoded BER
uncoded_ber_bit
=
(
short
*
)
malloc
(
sizeof
(
short
)
*
coded_bits_per_codeword
);
uncoded_ber_bit
=
(
short
*
)
malloc
(
sizeof
(
short
)
*
coded_bits_per_codeword
);
...
@@ -3454,12 +3454,12 @@ n(tikz_fname,"w");
...
@@ -3454,12 +3454,12 @@ n(tikz_fname,"w");
uncoded_ber
=
0
;
uncoded_ber
=
0
;
printf
(
"trials=%d
\n
"
,
trials
);
printf
(
"trials=%d
\n
"
,
trials
);
for
(
i
=
0
;
i
<
coded_bits_per_codeword
;
i
++
)
for
(
i
=
0
;
i
<
coded_bits_per_codeword
;
i
++
)
if
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
e
[
i
]
!=
(
PHY_vars_UE
->
lte_ue_pdsch_vars
[
0
]
->
llr
[
cw_non_sic
][
i
]
<
0
))
{
if
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
e
[
i
]
!=
(
PHY_vars_UE
->
lte_ue_pdsch_vars
[
0
]
->
llr
[
cw_non_sic
][
i
]
<
0
))
{
uncoded_ber_bit
[
i
]
=
1
;
uncoded_ber_bit
[
i
]
=
1
;
uncoded_ber
++
;
uncoded_ber
++
;
}
}
else
else
uncoded_ber_bit
[
i
]
=
0
;
uncoded_ber_bit
[
i
]
=
0
;
uncoded_ber
/=
coded_bits_per_codeword
;
uncoded_ber
/=
coded_bits_per_codeword
;
avg_ber
+=
uncoded_ber
;
avg_ber
+=
uncoded_ber
;
...
@@ -3476,50 +3476,49 @@ n(tikz_fname,"w");
...
@@ -3476,50 +3476,49 @@ n(tikz_fname,"w");
start_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
start_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
dlsch_unscrambling
(
&
PHY_vars_UE
->
lte_frame_parms
,
dlsch_unscrambling
(
&
PHY_vars_UE
->
lte_frame_parms
,
0
,
0
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
],
coded_bits_per_codeword
,
coded_bits_per_codeword
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_non_sic
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_non_sic
],
cw_non_sic
,
cw_non_sic
,
subframe
<<
1
);
subframe
<<
1
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
start_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
start_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
ret
[
cw_non_sic
]
=
dlsch_decoding
(
PHY_vars_UE
,
ret
[
cw_non_sic
]
=
dlsch_decoding
(
PHY_vars_UE
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_non_sic
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_non_sic
],
&
PHY_vars_UE
->
lte_frame_parms
,
&
PHY_vars_UE
->
lte_frame_parms
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
],
subframe
,
subframe
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
current_harq_pid
,
1
,
llr8_flag
);
1
,
llr8_flag
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
if
(
ret
[
cw_non_sic
]
<=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
max_turbo_iterations
)
{
if
(
ret
[
cw_non_sic
]
<=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
max_turbo_iterations
)
{
if
(
cw_non_sic
==
0
)
{
if
(
cw_non_sic
==
0
)
{
avg_iter
[
0
]
+=
ret
[
0
];
avg_iter
[
0
]
+=
ret
[
0
];
iter_trials
[
0
]
++
;
iter_trials
[
0
]
++
;
}
}
if
(
n_frames
==
2
)
{
if
(
n_frames
==
2
)
{
printf
(
"cw non sic %d, round %d: No DLSCH errors found, uncoded ber %f
\n
"
,
cw_non_sic
,
round
,
uncoded_ber
);
printf
(
"cw non sic %d, round %d: No DLSCH errors found, uncoded ber %f
\n
"
,
cw_non_sic
,
round
,
uncoded_ber
);
#ifdef PRINT_BYTES
#ifdef PRINT_BYTES
for
(
s
=
0
;
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
C
;
s
++
)
{
for
(
s
=
0
;
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
C
;
s
++
)
{
if
(
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Cminus
)
if
(
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Cminus
)
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Kminus
;
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Kminus
;
else
else
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Kplus
;
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
Kplus
;
Kr_bytes
=
Kr
>>
3
;
Kr_bytes
=
Kr
>>
3
;
printf
(
"Decoded_output (Segment %d):
\n
"
,
s
);
printf
(
"Decoded_output (Segment %d):
\n
"
,
s
);
for
(
i
=
0
;
i
<
Kr_bytes
;
i
++
)
for
(
i
=
0
;
i
<
Kr_bytes
;
i
++
)
printf
(
"%d : %x (%x)
\n
"
,
i
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
],
printf
(
"%d : %x (%x)
\n
"
,
i
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]
^
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]);
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]
^
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_non_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]);
}
}
#endif
#endif
}
}
PHY_vars_UE
->
total_TBS
[
eNB_id
]
=
PHY_vars_UE
->
total_TBS
[
eNB_id
]
+
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
cw_non_sic
]
->
current_harq_pid
]
->
TBS
;
PHY_vars_UE
->
total_TBS
[
eNB_id
]
=
PHY_vars_UE
->
total_TBS
[
eNB_id
]
+
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
cw_non_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
cw_non_sic
]
->
current_harq_pid
]
->
TBS
;
...
@@ -3622,250 +3621,250 @@ n(tikz_fname,"w");
...
@@ -3622,250 +3621,250 @@ n(tikz_fname,"w");
}
}
if
((
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
]
->
mimo_mode
>=
DUALSTREAM_UNIFORM_PRECODING1
)
&&
if
((
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
]
->
mimo_mode
>=
DUALSTREAM_UNIFORM_PRECODING1
)
&&
(
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
]
->
mimo_mode
<=
DUALSTREAM_PUSCH_PRECODING
)
&&
(
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
]
->
mimo_mode
<=
DUALSTREAM_PUSCH_PRECODING
)
&&
rx_type
==
rx_SIC_dual_stream
)
{
rx_type
==
rx_SIC_dual_stream
)
{
remove
(
"rho_rho_in_llr.m"
);
remove
(
"rho_rho_in_llr.m"
);
// for (round = 0 ; round < 1 ; round++) {
// for (round = 0 ; round < 1 ; round++) {
dlsch0_ue_harq
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
];
dlsch0_ue_harq
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
];
dlsch0_eNB_harq
=
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
];
dlsch0_eNB_harq
=
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
];
dlsch0_eNB_harq
->
mimo_mode
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
]
->
mimo_mode
;
dlsch0_eNB_harq
->
mimo_mode
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
]
->
mimo_mode
;
dlsch0_eNB_harq
->
rb_alloc
[
0
]
=
dlsch0_ue_harq
->
rb_alloc_even
[
0
];
dlsch0_eNB_harq
->
rb_alloc
[
0
]
=
dlsch0_ue_harq
->
rb_alloc_even
[
0
];
dlsch0_eNB_harq
->
nb_rb
=
dlsch0_ue_harq
->
nb_rb
;
dlsch0_eNB_harq
->
nb_rb
=
dlsch0_ue_harq
->
nb_rb
;
dlsch0_eNB_harq
->
mcs
=
dlsch0_ue_harq
->
mcs
;
dlsch0_eNB_harq
->
mcs
=
dlsch0_ue_harq
->
mcs
;
dlsch0_eNB_harq
->
rvidx
=
dlsch0_ue_harq
->
rvidx
;
dlsch0_eNB_harq
->
rvidx
=
dlsch0_ue_harq
->
rvidx
;
dlsch0_eNB_harq
->
Nl
=
dlsch0_ue_harq
->
Nl
;
dlsch0_eNB_harq
->
Nl
=
dlsch0_ue_harq
->
Nl
;
dlsch0_eNB_harq
->
round
=
dlsch0_ue_harq
->
round
;
dlsch0_eNB_harq
->
round
=
dlsch0_ue_harq
->
round
;
dlsch0_eNB_harq
->
TBS
=
dlsch0_ue_harq
->
TBS
;
dlsch0_eNB_harq
->
TBS
=
dlsch0_ue_harq
->
TBS
;
dlsch0_eNB_harq
->
dl_power_off
=
dlsch0_ue_harq
->
dl_power_off
;
dlsch0_eNB_harq
->
dl_power_off
=
dlsch0_ue_harq
->
dl_power_off
;
dlsch0_eNB_harq
->
status
=
dlsch0_ue_harq
->
status
;
dlsch0_eNB_harq
->
status
=
dlsch0_ue_harq
->
status
;
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
active
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
active
;
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
active
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
active
;
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
rnti
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
rnti
;
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
rnti
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
rnti
;
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
;
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
=
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]
->
current_harq_pid
;
dlsch_encoding
(
input_buffer0
[
0
],
//PHY_vars_UE->dlsch_ue[eNB_id][0]->harq_processes[PHY_vars_UE->dlsch_ue[eNB_id][0]->current_harq_pid]->b,
dlsch_encoding
(
input_buffer0
[
0
],
//PHY_vars_UE->dlsch_ue[eNB_id][0]->harq_processes[PHY_vars_UE->dlsch_ue[eNB_id][0]->current_harq_pid]->b,
&
PHY_vars_UE
->
lte_frame_parms
,
&
PHY_vars_UE
->
lte_frame_parms
,
num_pdcch_symbols
,
num_pdcch_symbols
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
],
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
],
0
,
0
,
subframe
,
subframe
,
&
PHY_vars_UE
->
dlsch_rate_matching_stats
,
&
PHY_vars_UE
->
dlsch_rate_matching_stats
,
&
PHY_vars_UE
->
dlsch_turbo_encoding_stats
,
&
PHY_vars_UE
->
dlsch_turbo_encoding_stats
,
&
PHY_vars_UE
->
dlsch_interleaving_stats
);
&
PHY_vars_UE
->
dlsch_interleaving_stats
);
coded_bits_per_codeword
=
get_G
(
&
PHY_vars_UE
->
lte_frame_parms
,
coded_bits_per_codeword
=
get_G
(
&
PHY_vars_UE
->
lte_frame_parms
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
nb_rb
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
nb_rb
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
rb_alloc
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
rb_alloc
,
get_Qm
(
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
mcs
),
get_Qm
(
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
mcs
),
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
Nl
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
]
->
current_harq_pid
]
->
Nl
,
num_pdcch_symbols
,
0
,
subframe
);
dlsch_scrambling
(
&
PHY_vars_UE
->
lte_frame_parms
,
0
,
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
],
coded_bits_per_codeword
,
0
,
subframe
<<
1
);
re_allocated
=
dlsch_modulation_SIC
(
sic_buffer
,
subframe
,
&
PHY_vars_UE
->
lte_frame_parms
,
num_pdcch_symbols
,
num_pdcch_symbols
,
&
PHY_vars_UE
->
dlsch_eNB
[
0
][
0
],
0
,
NULL
,
subframe
);
coded_bits_per_codeword
);
// write_output("sic_buffer.m","sic", *sic_buffer,re_allocated,1,1);
// write_output("rxdataF_comp1.m","rxF_comp1", *PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[PHY_vars_UE->dlsch_ue[0][0]->current_harq_pid][round],14*12*25,1,1);
// write_output("rxdataF_rho.m","rho", *PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[PHY_vars_UE->dlsch_ue[0][0]->current_harq_pid][round],14*12*25,1,1);
switch
(
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
1
]
->
harq_processes
[
0
]
->
mcs
)){
dlsch_scrambling
(
&
PHY_vars_UE
->
lte_frame_parms
,
0
,
case
2
:
PHY_vars_UE
->
dlsch_eNB
[
eNB_id
],
coded_bits_per_codeword
,
0
,
subframe
<<
1
);
re_allocated
=
dlsch_modulation_SIC
(
sic_buffer
,
subframe
,
&
PHY_vars_UE
->
lte_frame_parms
,
num_pdcch_symbols
,
&
PHY_vars_UE
->
dlsch_eNB
[
0
][
0
],
NULL
,
coded_bits_per_codeword
);
// write_output("sic_buffer.m","sic", *sic_buffer,re_allocated,1,1);
// write_output("rxdataF_comp1.m","rxF_comp1", *PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp1[PHY_vars_UE->dlsch_ue[0][0]->current_harq_pid][round],14*12*25,1,1);
// write_output("rxdataF_rho.m","rho", *PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->dl_ch_rho_ext[PHY_vars_UE->dlsch_ue[0][0]->current_harq_pid][round],14*12*25,1,1);
dlsch_qpsk_llr_SIC
(
&
PHY_vars_UE
->
lte_frame_parms
,
switch
(
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
1
]
->
harq_processes
[
0
]
->
mcs
)){
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
rxdataF_comp1
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
sic_buffer
,
case
2
:
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_rho_ext
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
1
],
num_pdcch_symbols
,
dlsch0_eNB_harq
->
nb_rb
,
subframe
,
dlsch0_eNB_harq
->
rb_alloc
[
0
],
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
0
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]);
break
;
case
4
:
dlsch_qpsk_llr_SIC
(
&
PHY_vars_UE
->
lte_frame_parms
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
rxdataF_comp1
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
dlsch_16qam_llr_SIC
(
&
PHY_vars_UE
->
lte_frame_parms
,
sic_buffer
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
rxdataF_comp1
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_rho_ext
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
sic_buffer
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
1
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_rho_ext
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
num_pdcch_symbols
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
1
],
dlsch0_eNB_harq
->
nb_rb
,
num_pdcch_symbols
,
subframe
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_mag1
,
dlsch0_eNB_harq
->
rb_alloc
[
0
],
dlsch0_eNB_harq
->
nb_rb
,
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
0
]
->
harq_processes
[
0
]
->
mcs
),
subframe
,
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]);
dlsch0_eNB_harq
->
rb_alloc
[
0
],
break
;
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
0
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]);
break
;
case
6
:
dlsch_64qam_llr_SIC
(
&
PHY_vars_UE
->
lte_frame_parms
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
rxdataF_comp1
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
sic_buffer
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_rho_ext
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
1
],
num_pdcch_symbols
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_mag1
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_magb1
,
dlsch0_eNB_harq
->
nb_rb
,
subframe
,
dlsch0_eNB_harq
->
rb_alloc
[
0
],
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
0
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]);
break
;
}
// round
// write_output("rxdata_llr1.m","llr1", PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->llr[1],re_allocated*2,1,0);
for
(
cw_sic
=
cw_to_decode_interf_free
;
cw_sic
<
cw_to_decode_interf_free
+
1
;
cw_sic
++
){
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
rnti
=
(
common_flag
==
0
)
?
n_rnti
:
SI_RNTI
;
coded_bits_per_codeword
=
get_G
(
&
PHY_vars_eNB
->
lte_frame_parms
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
nb_rb
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
rb_alloc
,
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Nl
,
num_pdcch_symbols
,
0
,
subframe
);
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
]
->
G
=
coded_bits_per_codeword
;
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
]
->
Qm
=
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
mcs
);
if
(
n_frames
==
2
)
{
printf
(
"Kmimo=%d, cw=%d, G=%d, TBS=%d
\n
"
,
Kmimo
,
cw_sic
,
coded_bits_per_codeword
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
]
->
TBS
);
// calculate uncoded BER
uncoded_ber_bit
=
(
short
*
)
malloc
(
sizeof
(
short
)
*
coded_bits_per_codeword
);
AssertFatal
(
uncoded_ber_bit
,
"uncoded_ber_bit==NULL"
);
sprintf
(
fname
,
"dlsch%d_rxF_r%d_cw%d_llr.m"
,
eNB_id
,
round
,
cw_sic
);
sprintf
(
vname
,
"dl%d_r%d_cw%d_llr"
,
eNB_id
,
round
,
cw_sic
);
write_output
(
fname
,
vname
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
0
]
->
llr
[
cw_sic
],
coded_bits_per_codeword
,
1
,
0
);
sprintf
(
fname
,
"dlsch_cw%d_e.m"
,
cw_sic
);
sprintf
(
vname
,
"dlschcw%d_e"
,
cw_sic
);
write_output
(
fname
,
vname
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
e
,
coded_bits_per_codeword
,
1
,
4
);
uncoded_ber
=
0
;
printf
(
"trials=%d
\n
"
,
trials
);
for
(
i
=
0
;
i
<
coded_bits_per_codeword
;
i
++
)
if
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
e
[
i
]
!=
(
PHY_vars_UE
->
lte_ue_pdsch_vars
[
0
]
->
llr
[
cw_sic
][
i
]
<
0
))
{
uncoded_ber_bit
[
i
]
=
1
;
uncoded_ber
++
;
}
else
uncoded_ber_bit
[
i
]
=
0
;
uncoded_ber
/=
coded_bits_per_codeword
;
avg_ber
+=
uncoded_ber
;
sprintf
(
fname
,
"cw%d_uncoded_ber_bit.m"
,
cw_sic
);
sprintf
(
vname
,
"uncoded_ber_bit_cw%d"
,
cw_sic
);
write_output
(
fname
,
vname
,
uncoded_ber_bit
,
coded_bits_per_codeword
,
1
,
0
);
printf
(
"cw %d, uncoded ber %f
\n
"
,
cw_sic
,
uncoded_ber
);
free
(
uncoded_ber_bit
);
uncoded_ber_bit
=
NULL
;
}
start_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
case
4
:
dlsch_unscrambling
(
&
PHY_vars_UE
->
lte_frame_parms
,
0
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
],
coded_bits_per_codeword
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_sic
],
cw_sic
,
subframe
<<
1
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
start_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
dlsch_16qam_llr_SIC
(
&
PHY_vars_UE
->
lte_frame_parms
,
ret
[
1
]
=
dlsch_decoding
(
PHY_vars_UE
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
rxdataF_comp1
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_sic
],
sic_buffer
,
&
PHY_vars_UE
->
lte_frame_parms
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_rho_ext
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
],
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
1
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
],
num_pdcch_symbols
,
subframe
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_mag1
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
,
dlsch0_eNB_harq
->
nb_rb
,
1
,
llr8_flag
);
subframe
,
stop_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
dlsch0_eNB_harq
->
rb_alloc
[
0
],
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
0
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]);
if
(
ret
[
1
]
<=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
max_turbo_iterations
)
{
//if (ret <= PHY_vars_UE->dlsch_ue[0][cw_sic]->max_turbo_iterations )
break
;
case
6
:
avg_iter
[
1
]
+=
ret
[
1
];
dlsch_64qam_llr_SIC
(
&
PHY_vars_UE
->
lte_frame_parms
,
iter_trials
[
1
]
++
;
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
rxdataF_comp1
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
sic_buffer
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_rho_ext
[
PHY_vars_UE
->
dlsch_ue
[
0
][
0
]
->
current_harq_pid
][
round
],
if
(
n_frames
==
2
)
{
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
1
],
printf
(
"cw sic %d, round %d: No DLSCH errors found, uncoded ber %f
\n
"
,
cw_sic
,
round
,
uncoded_ber
);
num_pdcch_symbols
,
#ifdef PRINT_BYTES
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_mag1
,
for
(
s
=
0
;
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
C
;
s
++
)
{
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
dl_ch_magb1
,
if
(
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Cminus
)
dlsch0_eNB_harq
->
nb_rb
,
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kminus
;
subframe
,
else
dlsch0_eNB_harq
->
rb_alloc
[
0
],
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kplus
;
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
0
]
->
harq_processes
[
0
]
->
mcs
),
PHY_vars_UE
->
dlsch_ue
[
eNB_id
][
0
]);
break
;
}
// round
Kr_bytes
=
Kr
>>
3
;
// write_output("rxdata_llr1.m","llr1", PHY_vars_UE->lte_ue_pdsch_vars[eNB_id]->llr[1],re_allocated*2,1,0)
;
printf
(
"Decoded_output (Segment %d):
\n
"
,
s
);
for
(
cw_sic
=
cw_to_decode_interf_free
;
cw_sic
<
cw_to_decode_interf_free
+
1
;
cw_sic
++
){
for
(
i
=
0
;
i
<
Kr_bytes
;
i
++
)
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
rnti
=
(
common_flag
==
0
)
?
n_rnti
:
SI_RNTI
;
printf
(
"%d : %x (%x)
\n
"
,
i
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
],
coded_bits_per_codeword
=
get_G
(
&
PHY_vars_eNB
->
lte_frame_parms
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]
^
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]);
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
nb_rb
,
}
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
rb_alloc
,
#endif
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
mcs
),
}
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Nl
,
num_pdcch_symbols
,
}
0
,
subframe
);
else
{
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
]
->
G
=
coded_bits_per_codeword
;
errs
[
cw_sic
][
round
]
++
;
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
]
->
Qm
=
get_Qm
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
mcs
);
// exit(0);
if
(
n_frames
==
2
)
{
printf
(
"Kmimo=%d, cw=%d, G=%d, TBS=%d
\n
"
,
Kmimo
,
cw_sic
,
coded_bits_per_codeword
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
]
->
TBS
);
if
(
cw_sic
==
1
)
{
// calculate uncoded BER
avg_iter
[
1
]
+=
ret
[
1
]
-
1
;
uncoded_ber_bit
=
(
short
*
)
malloc
(
sizeof
(
short
)
*
coded_bits_per_codeword
);
iter_trials
[
1
]
++
;
AssertFatal
(
uncoded_ber_bit
,
"uncoded_ber_bit==NULL"
);
sprintf
(
fname
,
"dlsch%d_rxF_r%d_cw%d_llr.m"
,
eNB_id
,
round
,
cw_sic
);
sprintf
(
vname
,
"dl%d_r%d_cw%d_llr"
,
eNB_id
,
round
,
cw_sic
);
write_output
(
fname
,
vname
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
0
]
->
llr
[
cw_sic
],
coded_bits_per_codeword
,
1
,
0
);
sprintf
(
fname
,
"dlsch_cw%d_e.m"
,
cw_sic
);
sprintf
(
vname
,
"dlschcw%d_e"
,
cw_sic
);
write_output
(
fname
,
vname
,
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
e
,
coded_bits_per_codeword
,
1
,
4
);
uncoded_ber
=
0
;
printf
(
"trials=%d
\n
"
,
trials
);
for
(
i
=
0
;
i
<
coded_bits_per_codeword
;
i
++
)
if
(
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
e
[
i
]
!=
(
PHY_vars_UE
->
lte_ue_pdsch_vars
[
0
]
->
llr
[
cw_sic
][
i
]
<
0
))
{
uncoded_ber_bit
[
i
]
=
1
;
uncoded_ber
++
;
}
else
uncoded_ber_bit
[
i
]
=
0
;
uncoded_ber
/=
coded_bits_per_codeword
;
avg_ber
+=
uncoded_ber
;
sprintf
(
fname
,
"cw%d_uncoded_ber_bit.m"
,
cw_sic
);
sprintf
(
vname
,
"uncoded_ber_bit_cw%d"
,
cw_sic
);
write_output
(
fname
,
vname
,
uncoded_ber_bit
,
coded_bits_per_codeword
,
1
,
0
);
printf
(
"cw %d, uncoded ber %f
\n
"
,
cw_sic
,
uncoded_ber
);
free
(
uncoded_ber_bit
);
uncoded_ber_bit
=
NULL
;
}
start_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
dlsch_unscrambling
(
&
PHY_vars_UE
->
lte_frame_parms
,
0
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
],
coded_bits_per_codeword
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_sic
],
cw_sic
,
subframe
<<
1
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_unscrambling_stats
);
start_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
ret
[
1
]
=
dlsch_decoding
(
PHY_vars_UE
,
PHY_vars_UE
->
lte_ue_pdsch_vars
[
eNB_id
]
->
llr
[
cw_sic
],
&
PHY_vars_UE
->
lte_frame_parms
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
],
subframe
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
current_harq_pid
,
1
,
llr8_flag
);
stop_meas
(
&
PHY_vars_UE
->
dlsch_decoding_stats
);
if
(
ret
[
1
]
<=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
max_turbo_iterations
)
{
//if (ret <= PHY_vars_UE->dlsch_ue[0][cw_sic]->max_turbo_iterations )
avg_iter
[
1
]
+=
ret
[
1
];
iter_trials
[
1
]
++
;
if
(
n_frames
==
2
)
{
printf
(
"cw sic %d, round %d: No DLSCH errors found, uncoded ber %f
\n
"
,
cw_sic
,
round
,
uncoded_ber
);
#ifdef PRINT_BYTES
for
(
s
=
0
;
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
C
;
s
++
)
{
if
(
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Cminus
)
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kminus
;
else
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kplus
;
Kr_bytes
=
Kr
>>
3
;
printf
(
"Decoded_output (Segment %d):
\n
"
,
s
);
for
(
i
=
0
;
i
<
Kr_bytes
;
i
++
)
printf
(
"%d : %x (%x)
\n
"
,
i
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]
^
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]);
}
}
#endif
if
(
n_frames
==
2
)
{
}
//if ((n_frames==1) || (SNR>=30)) {
printf
(
"cw sic %d, round %d: DLSCH errors found, uncoded ber %f
\n
"
,
cw_sic
,
round
,
uncoded_ber
);
}
#ifdef PRINT_BYTES
for
(
s
=
0
;
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
C
;
s
++
)
{
if
(
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Cminus
)
else
{
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kminus
;
errs
[
cw_sic
][
round
]
++
;
else
// exit(0);
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kplus
;
if
(
cw_sic
==
1
)
{
Kr_bytes
=
Kr
>>
3
;
avg_iter
[
1
]
+=
ret
[
1
]
-
1
;
iter_trials
[
1
]
++
;
printf
(
"Decoded_output (Segment %d):
\n
"
,
s
);
}
for
(
i
=
0
;
i
<
Kr_bytes
;
i
++
)
printf
(
"%d : %x (%x)
\n
"
,
i
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
],
if
(
n_frames
==
2
)
{
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]
^
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]);
//if ((n_frames==1) || (SNR>=30)) {
}
printf
(
"cw sic %d, round %d: DLSCH errors found, uncoded ber %f
\n
"
,
cw_sic
,
round
,
uncoded_ber
);
#endif
#ifdef PRINT_BYTES
}
//n_frames==1
for
(
s
=
0
;
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
C
;
s
++
)
{
// exit(0);
if
(
s
<
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Cminus
)
}
//if (ret > PHY_vars_UE->dlsch_ue[0][cw_sic]->max_turbo_iterations )
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kminus
;
}
//for (int cw_1=cw_to_decode_interf_free; cw_1<cw_to_decode_interf_free+1;cw_1++)
else
Kr
=
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
Kplus
;
Kr_bytes
=
Kr
>>
3
;
}
//if SIC
printf
(
"Decoded_output (Segment %d):
\n
"
,
s
);
for
(
i
=
0
;
i
<
Kr_bytes
;
i
++
)
printf
(
"%d : %x (%x)
\n
"
,
i
,
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
],
PHY_vars_UE
->
dlsch_ue
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]
^
PHY_vars_eNB
->
dlsch_eNB
[
0
][
cw_sic
]
->
harq_processes
[
0
]
->
c
[
s
][
i
]);
}
#endif
}
//n_frames==1
// exit(0);
}
//if (ret > PHY_vars_UE->dlsch_ue[0][cw_sic]->max_turbo_iterations )
}
//for (int cw_1=cw_to_decode_interf_free; cw_1<cw_to_decode_interf_free+1;cw_1++)
}
//if SIC
}
//if (ret <= PHY_vars_UE->dlsch_ue[0][cw_non_sic]->max_turbo_iterations )
}
//if (ret <= PHY_vars_UE->dlsch_ue[0][cw_non_sic]->max_turbo_iterations )
...
...
openair1/SIMULATION/TOOLS/random_channel.c
View file @
4e8e7079
...
@@ -51,7 +51,7 @@ void fill_channel_desc(channel_desc_t *chan_desc,
...
@@ -51,7 +51,7 @@ void fill_channel_desc(channel_desc_t *chan_desc,
struct
complex
**
R_sqrt
,
struct
complex
**
R_sqrt
,
double
Td
,
double
Td
,
double
sampling_rate
,
double
sampling_rate
,
double
channel_bandwidth
,
double
channel_bandwidth
,
double
ricean_factor
,
double
ricean_factor
,
double
aoa
,
double
aoa
,
double
forgetting_factor
,
double
forgetting_factor
,
...
@@ -81,7 +81,7 @@ void fill_channel_desc(channel_desc_t *chan_desc,
...
@@ -81,7 +81,7 @@ void fill_channel_desc(channel_desc_t *chan_desc,
chan_desc
->
delays
[
i
]
=
((
double
)
i
)
*
delta_tau
;
chan_desc
->
delays
[
i
]
=
((
double
)
i
)
*
delta_tau
;
}
}
else
else
chan_desc
->
delays
=
delays
;
chan_desc
->
delays
=
delays
;
chan_desc
->
Td
=
Td
;
chan_desc
->
Td
=
Td
;
chan_desc
->
sampling_rate
=
sampling_rate
;
chan_desc
->
sampling_rate
=
sampling_rate
;
chan_desc
->
channel_bandwidth
=
channel_bandwidth
;
chan_desc
->
channel_bandwidth
=
channel_bandwidth
;
...
...
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