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OpenXG-RAN
Commit 6c00bd1a authored by frtabu's avatar frtabu
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Merge branch 'RU-RAU-split' of https://gitlab.eurecom.fr/oai/openairinterface5g into RU-RAU-split

parents 3e27fc89 e2ec5451
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Showing with 351 additions and 184 deletions
openair1/PHY/INIT/lte_init.c
View file @ 6c00bd1a
...@@ -1015,6 +1015,8 @@ void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, ...@@ -1015,6 +1015,8 @@ void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
phy_vars_ue->ulsch[eNB_id]->Mlimit = max_harq_tx; phy_vars_ue->ulsch[eNB_id]->Mlimit = max_harq_tx;
} }
extern uint16_t beta_cqi[16];
void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
struct PhysicalConfigDedicated *physicalConfigDedicated ) struct PhysicalConfigDedicated *physicalConfigDedicated )
{ {
...@@ -1070,7 +1072,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id, ...@@ -1070,7 +1072,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
LOG_D(PHY,"pusch_config_dedicated.betaOffset_ACK_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index); LOG_D(PHY,"pusch_config_dedicated.betaOffset_ACK_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_ACK_Index);
LOG_D(PHY,"pusch_config_dedicated.betaOffset_RI_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index); LOG_D(PHY,"pusch_config_dedicated.betaOffset_RI_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index);
LOG_D(PHY,"pusch_config_dedicated.betaOffset_CQI_Index %d\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index); LOG_D(PHY,"pusch_config_dedicated.betaOffset_CQI_Index %d => %d)\n",phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index,beta_cqi[phy_vars_ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index]);
LOG_D(PHY,"\n"); LOG_D(PHY,"\n");
......
openair1/PHY/LTE_ESTIMATION/lte_adjust_sync.c
View file @ 6c00bd1a
...@@ -239,7 +239,7 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id) ...@@ -239,7 +239,7 @@ int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id)
max_pos_fil2 = ((max_pos_fil2 * coef) + (max_pos * ncoef)) >> 15; max_pos_fil2 = ((max_pos_fil2 * coef) + (max_pos * ncoef)) >> 15;
//#ifdef DEBUG_PHY //#ifdef DEBUG_PHY
LOG_I(PHY,"frame %d: max_pos = %d, max_pos_fil = %d, sync_pos=%d\n",eNB->proc.frame_rx,max_pos,max_pos_fil2,sync_pos); LOG_D(PHY,"frame %d: max_pos = %d, max_pos_fil = %d, sync_pos=%d\n",eNB->proc.frame_rx,max_pos,max_pos_fil2,sync_pos);
//#endif //DEBUG_PHY //#endif //DEBUG_PHY
return(max_pos_fil2-sync_pos); return(max_pos_fil2-sync_pos);
......
openair1/PHY/LTE_TRANSPORT/dci.c
View file @ 6c00bd1a
...@@ -2130,11 +2130,11 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols, ...@@ -2130,11 +2130,11 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
if (dci_alloc[i].L == (uint8_t)L) { if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING //#ifdef DEBUG_DCI_ENCODING
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L, LOG_D(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu); *(unsigned int*)dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]); //dump_dci(frame_parms,&dci_alloc[i]);
#endif //#endif
if (dci_alloc[i].firstCCE>=0) { if (dci_alloc[i].firstCCE>=0) {
e_ptr = generate_dci0(dci_alloc[i].dci_pdu, e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 6c00bd1a
...@@ -7680,6 +7680,9 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, ...@@ -7680,6 +7680,9 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag, ulsch->harq_processes[harq_pid]->subframe_scheduling_flag,
ulsch->bundling, ulsch->bundling,
ulsch->harq_processes[harq_pid]->O_ACK);*/ ulsch->harq_processes[harq_pid]->O_ACK);*/
LOG_D(PHY,"Setting beta_offset_cqi_times8 to %d, index %d\n",
beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index],
ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index);
ulsch->beta_offset_cqi_times8 = beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index];//18; ulsch->beta_offset_cqi_times8 = beta_cqi[ue->pusch_config_dedicated[eNB_id].betaOffset_CQI_Index];//18;
ulsch->beta_offset_ri_times8 = beta_ri[ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index];//10; ulsch->beta_offset_ri_times8 = beta_ri[ue->pusch_config_dedicated[eNB_id].betaOffset_RI_Index];//10;
...@@ -7724,10 +7727,10 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu, ...@@ -7724,10 +7727,10 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
if (ue->ulsch_Msg3_active[eNB_id] == 1) if (ue->ulsch_Msg3_active[eNB_id] == 1)
ue->ulsch_Msg3_active[eNB_id] = 0; ue->ulsch_Msg3_active[eNB_id] = 0;
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d\n", LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d, ulsch_ue_Msg3_active %d, cqi_req %d => O %d\n",
ue->Mod_id,harq_pid, ue->Mod_id,harq_pid,
proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb, proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id]); ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx, ue->ulsch_Msg3_active[eNB_id],cqi_req,ulsch->O);
// ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift; // ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
......
openair1/PHY/LTE_TRANSPORT/proto.h
View file @ 6c00bd1a
...@@ -1722,7 +1722,7 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *PHY_vars_eNB, ...@@ -1722,7 +1722,7 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *PHY_vars_eNB,
uint8_t use_srs); uint8_t use_srs);
void dump_ulsch(PHY_VARS_eNB *phy_vars_eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id); void dump_ulsch(PHY_VARS_eNB *phy_vars_eNB,int frame, int subframe, uint8_t UE_id);
int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci); int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
......
openair1/PHY/LTE_TRANSPORT/pucch.c
View file @ 6c00bd1a
...@@ -2388,14 +2388,14 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, ...@@ -2388,14 +2388,14 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
} //re } //re
} // aa } // aa
#ifdef DEBUG_PUCCH_RX
LOG_I(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe]));
#endif
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re); LOG_D(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im); (subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe]));
eNB->pucch1ab_stats_cnt[UE_id][subframe] = (eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re);
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im);
eNB->pucch1ab_stats_cnt[UE_id][subframe] = (eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
/* frame not available here - set to -1 for the moment */ /* frame not available here - set to -1 for the moment */
T(T_ENB_PHY_PUCCH_1AB_IQ, T_INT(eNB->Mod_id), T_INT(UE_id), T_INT(-1), T_INT(subframe), T_INT(stat_re), T_INT(stat_im)); T(T_ENB_PHY_PUCCH_1AB_IQ, T_INT(eNB->Mod_id), T_INT(UE_id), T_INT(-1), T_INT(subframe), T_INT(stat_re), T_INT(stat_im));
...@@ -2406,6 +2406,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB, ...@@ -2406,6 +2406,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
if (fmt==pucch_format1b) if (fmt==pucch_format1b)
*(1+payload) = (stat_im<0) ? 1 : 0; *(1+payload) = (stat_im<0) ? 1 : 0;
} else { // insufficient energy on PUCCH so NAK } else { // insufficient energy on PUCCH so NAK
LOG_D(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
*payload = 4; // DTX *payload = 4; // DTX
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re); ((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im); ((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
......
openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c
View file @ 6c00bd1a
...@@ -1329,23 +1329,21 @@ void rx_ulsch_emul(PHY_VARS_eNB *eNB, ...@@ -1329,23 +1329,21 @@ void rx_ulsch_emul(PHY_VARS_eNB *eNB,
} }
void dump_ulsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id) void dump_ulsch(PHY_VARS_eNB *eNB,int frame,int subframe,uint8_t UE_id) {
{
uint32_t nsymb = (eNB->frame_parms.Ncp == 0) ? 14 : 12; uint32_t nsymb = (eNB->frame_parms.Ncp == 0) ? 14 : 12;
uint8_t harq_pid; uint8_t harq_pid;
int subframe = proc->subframe_rx;
harq_pid = subframe2harq_pid(&eNB->frame_parms,proc->frame_rx,subframe); harq_pid = subframe2harq_pid(&eNB->frame_parms,frame,subframe);
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, TBS %d, Qm %d, N_symb %d\n", subframe,harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, TBS %d, Qm %d, N_symb %d\n",
subframe,harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS,eNB->ulsch[UE_id]->harq_processes[harq_pid]->Qm, eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS,eNB->ulsch[UE_id]->harq_processes[harq_pid]->Qm,
eNB->ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch); eNB->ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch);
//#ifndef OAI_EMU //#ifndef OAI_EMU
write_output("/tmp/ulsch_d.m","ulsch_dseq",&eNB->ulsch[UE_id]->harq_processes[harq_pid]->d[0][96], write_output("/tmp/ulsch_d.m","ulsch_dseq",&eNB->ulsch[UE_id]->harq_processes[harq_pid]->d[0][96],
eNB->ulsch[UE_id]->harq_processes[harq_pid]->Kplus*3,1,0); eNB->ulsch[UE_id]->harq_processes[harq_pid]->Kplus*3,1,0);
if (eNB->common_vars.rxdata) write_output("/tmp/rxsig0.m","rxs0", &eNB->common_vars.rxdata[0][0],eNB->frame_parms.samples_per_tti*10,1,1); if (eNB->common_vars.rxdata) write_output("/tmp/rxsig0.m","rxs0", &eNB->common_vars.rxdata[0][0],eNB->frame_parms.samples_per_tti*10,1,1);
if (eNB->frame_parms.nb_antennas_rx>1) if (eNB->frame_parms.nb_antennas_rx>1)
if (eNB->common_vars.rxdata) write_output("/tmp/rxsig1.m","rxs1", &eNB->common_vars.rxdata[1][0],eNB->frame_parms.samples_per_tti*10,1,1); if (eNB->common_vars.rxdata) write_output("/tmp/rxsig1.m","rxs1", &eNB->common_vars.rxdata[1][0],eNB->frame_parms.samples_per_tti*10,1,1);
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 6c00bd1a
...@@ -1309,7 +1309,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { ...@@ -1309,7 +1309,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
nPRS)%12; nPRS)%12;
LOG_D(PHY, LOG_D(PHY,
"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n", "[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, Qm %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d, beta_cqi %d \n",
eNB->Mod_id,harq_pid,frame,subframe, eNB->Mod_id,harq_pid,frame,subframe,
ulsch_harq->dci_alloc, ulsch_harq->dci_alloc,
ulsch_harq->rar_alloc, ulsch_harq->rar_alloc,
...@@ -1323,7 +1323,8 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { ...@@ -1323,7 +1323,8 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
ulsch_harq->n_DMRS2, ulsch_harq->n_DMRS2,
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift, fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
nPRS, nPRS,
ulsch_harq->O_ACK); ulsch_harq->O_ACK,
ulsch->beta_offset_cqi_times8);
start_meas(&eNB->ulsch_demodulation_stats); start_meas(&eNB->ulsch_demodulation_stats);
...@@ -1380,6 +1381,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { ...@@ -1380,6 +1381,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
T_INT(harq_pid)); T_INT(harq_pid));
fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC fill_crc_indication(eNB,i,frame,subframe,1); // indicate NAK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n", LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
eNB->Mod_id,harq_pid, eNB->Mod_id,harq_pid,
...@@ -1388,7 +1390,11 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { ...@@ -1388,7 +1390,11 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
ulsch->Mlimit, ulsch->Mlimit,
ulsch_harq->o_ACK[0], ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1]); ulsch_harq->o_ACK[1]);
/*
if (dB_fixed_times10(eNB->pusch_vars[i]->ulsch_power[0]) > 300) {
dump_ulsch(eNB,frame,subframe,i); exit(-1);
}*/
#if defined(MESSAGE_CHART_GENERATOR_PHY) #if defined(MESSAGE_CHART_GENERATOR_PHY)
MSC_LOG_RX_DISCARDED_MESSAGE( MSC_LOG_RX_DISCARDED_MESSAGE(
MSC_PHY_ENB,MSC_PHY_UE, MSC_PHY_ENB,MSC_PHY_UE,
...@@ -1405,7 +1411,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) { ...@@ -1405,7 +1411,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc) {
fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC fill_crc_indication(eNB,i,frame,subframe,0); // indicate ACK to MAC
fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC fill_rx_indication(eNB,i,frame,subframe); // indicate SDU to MAC
T(T_ENB_PHY_ULSCH_UE_ACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(i), T_INT(ulsch->rnti), T(T_ENB_PHY_ULSCH_UE_ACK, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe), T_INT(i), T_INT(ulsch->rnti),
T_INT(harq_pid)); T_INT(harq_pid));
ulsch_harq->status = SCH_IDLE; ulsch_harq->status = SCH_IDLE;
...@@ -1516,6 +1522,10 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) { ...@@ -1516,6 +1522,10 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) {
// estimate timing advance for MAC // estimate timing advance for MAC
sync_pos = lte_est_timing_advance_pusch(eNB,UE_id); sync_pos = lte_est_timing_advance_pusch(eNB,UE_id);
timing_advance_update = sync_pos - eNB->frame_parms.nb_prefix_samples/4; //to check timing_advance_update = sync_pos - eNB->frame_parms.nb_prefix_samples/4; //to check
// if (timing_advance_update > 10) { dump_ulsch(eNB,frame,subframe,UE_id); exit(-1);}
// if (timing_advance_update < -10) { dump_ulsch(eNB,frame,subframe,UE_id); exit(-1);}
switch (eNB->frame_parms.N_RB_DL) { switch (eNB->frame_parms.N_RB_DL) {
case 6: case 6:
pdu->rx_indication_rel8.timing_advance = timing_advance_update; pdu->rx_indication_rel8.timing_advance = timing_advance_update;
...@@ -1544,10 +1554,16 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) { ...@@ -1544,10 +1554,16 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe) {
// estimate UL_CQI for MAC (from antenna port 0 only) // estimate UL_CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 200;//(10*eNB->measurements.n0_power_dB[0]); int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 200;//(10*eNB->measurements.n0_power_dB[0]);
if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0; if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0;
else if (SNRtimes10 > 635) pdu->rx_indication_rel8.ul_cqi=255; else if (SNRtimes10 > 635) pdu->rx_indication_rel8.ul_cqi=255;
else pdu->rx_indication_rel8.ul_cqi=(640+SNRtimes10)/5; else pdu->rx_indication_rel8.ul_cqi=(640+SNRtimes10)/5;
LOG_D(PHY,"[PUSCH %d] Filling RX_indication with SNR %d (%d), timing_advance %d (update %d)\n",
harq_pid,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance,
timing_advance_update);
eNB->UL_INFO.rx_ind.number_of_pdus++; eNB->UL_INFO.rx_ind.number_of_pdus++;
pthread_mutex_unlock(&eNB->UL_INFO_mutex); pthread_mutex_unlock(&eNB->UL_INFO_mutex);
......
openair2/LAYER2/MAC/defs.h
View file @ 6c00bd1a
...@@ -648,6 +648,10 @@ typedef struct { ...@@ -648,6 +648,10 @@ typedef struct {
uint8_t oldmcs2[8]; uint8_t oldmcs2[8];
/// NDI from last UL scheduling /// NDI from last UL scheduling
uint8_t oldNDI_UL[8]; uint8_t oldNDI_UL[8];
/// mcs from last UL scheduling
uint8_t mcs_UL[8];
/// TBS from last UL scheduling
uint8_t TBS_UL[8];
/// Flag to indicate UL has been scheduled at least once /// Flag to indicate UL has been scheduled at least once
boolean_t ul_active; boolean_t ul_active;
/// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received) /// Flag to indicate UE has been configured (ACK from RRCConnectionSetup received)
...@@ -877,6 +881,8 @@ typedef struct { ...@@ -877,6 +881,8 @@ typedef struct {
uint8_t generate_Msg4; uint8_t generate_Msg4;
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3. /// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
uint8_t wait_ack_Msg4; uint8_t wait_ack_Msg4;
/// harq_pid used for Msg4 transmission
uint8_t harq_pid;
/// UE RNTI allocated during RAR /// UE RNTI allocated during RAR
rnti_t rnti; rnti_t rnti;
/// RA RNTI allocated from received PRACH /// RA RNTI allocated from received PRACH
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ 6c00bd1a
...@@ -499,7 +499,6 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -499,7 +499,6 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
nfapi_ul_config_request_body_t *ul_req; nfapi_ul_config_request_body_t *ul_req;
uint8_t lcid; uint8_t lcid;
uint8_t offset; uint8_t offset;
int harq_pid;
#ifdef Rel14 #ifdef Rel14
...@@ -568,8 +567,8 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -568,8 +567,8 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
// set HARQ process round to 0 for this UE // set HARQ process round to 0 for this UE
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10; if (cc->tdd_Config) RA_template->harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7; else RA_template->harq_pid = ((frameP*10)+subframeP)&7;
// Get RRCConnectionSetup for Piggyback // Get RRCConnectionSetup for Piggyback
...@@ -642,7 +641,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -642,7 +641,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = harq_pid; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_process = RA_template->harq_pid;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi_length = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpmi = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0; dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi_flag = 0;
...@@ -729,7 +728,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -729,7 +728,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
lcid=0; lcid=0;
UE_list->UE_sched_ctrl[UE_id].round[CC_idP][harq_pid] = 0; UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid] = 0;
msg4_header = 1+6+1; // CR header, CR CE, SDU header msg4_header = 1+6+1; // CR header, CR CE, SDU header
if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) { if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
...@@ -853,7 +852,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -853,7 +852,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
4, // aggregation_level 4, // aggregation_level
RA_template->rnti, // rnti RA_template->rnti, // rnti
1, // rnti_type, CRNTI 1, // rnti_type, CRNTI
harq_pid, // harq_process RA_template->harq_pid, // harq_process
1, // tpc, none 1, // tpc, none
getRIV(N_RB_DL,first_rb,4), // resource_block_coding getRIV(N_RB_DL,first_rb,4), // resource_block_coding
RA_template->msg4_mcs, // mcs RA_template->msg4_mcs, // mcs
...@@ -861,7 +860,9 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -861,7 +860,9 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
0, // rv 0, // rv
0); // vrb_flag 0); // vrb_flag
if (!CCE_allocation_infeasible(module_idP,CC_idP,0,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,RA_template->rnti)) { if (!CCE_allocation_infeasible(module_idP,CC_idP,0,
subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,
RA_template->rnti)) {
dl_req->number_dci++; dl_req->number_dci++;
dl_req->number_pdu++; dl_req->number_pdu++;
...@@ -872,10 +873,10 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -872,10 +873,10 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
lcid=0; lcid=0;
// put HARQ process 0 round to IDLE // put HARQ process round to 0
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10; if (cc->tdd_Config) RA_template->harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7; else RA_template->harq_pid = ((frameP*10)+subframeP)&7;
UE_list->UE_sched_ctrl[UE_id].round[CC_idP][harq_pid] = 0; UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid] = 0;
if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) { if ((RA_template->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header; msg4_padding = RA_template->msg4_TBsize - rrc_sdu_length - msg4_header;
...@@ -936,6 +937,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t ...@@ -936,6 +937,7 @@ void generate_Msg4(module_id_t module_idP,int CC_idP,frame_t frameP,sub_frame_t
&eNB->pdu_index[CC_idP], &eNB->pdu_index[CC_idP],
eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0]); eNB->UE_list.DLSCH_pdu[CC_idP][0][(unsigned char)UE_id].payload[0]);
LOG_D(MAC,"Filling UCI ACK/NAK information, cce_idx %d\n",dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
// Program PUCCH1a for ACK/NAK // Program PUCCH1a for ACK/NAK
// Program ACK/NAK for Msg4 PDSCH // Program ACK/NAK for Msg4 PDSCH
fill_nfapi_uci_acknak(module_idP, fill_nfapi_uci_acknak(module_idP,
...@@ -973,7 +975,7 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP, ...@@ -973,7 +975,7 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
UE_list_t *UE_list=&eNB->UE_list; UE_list_t *UE_list=&eNB->UE_list;
nfapi_dl_config_request_body_t *dl_req; nfapi_dl_config_request_body_t *dl_req;
int round,harq_pid; int round;
/* /*
#ifdef Rel14 #ifdef Rel14
COMMON_channels_t *cc = eNB->common_channels; COMMON_channels_t *cc = eNB->common_channels;
...@@ -1013,18 +1015,16 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP, ...@@ -1013,18 +1015,16 @@ void check_Msg4_retransmission(module_id_t module_idP,int CC_idP,frame_t frameP,
UE_id = find_UE_id(module_idP,RA_template->rnti); UE_id = find_UE_id(module_idP,RA_template->rnti);
AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n"); AssertFatal(UE_id>=0,"Can't find UE for t-crnti\n");
if (cc[CC_idP].tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
round = UE_list->UE_sched_ctrl[UE_id].round[CC_idP][harq_pid]; round = UE_list->UE_sched_ctrl[UE_id].round[CC_idP][RA_template->harq_pid];
vrb_map = cc[CC_idP].vrb_map; vrb_map = cc[CC_idP].vrb_map;
dl_req = &eNB->DL_req[CC_idP].dl_config_request_body; dl_req = &eNB->DL_req[CC_idP].dl_config_request_body;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu]; dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth); N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth);
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 was acknowledged (round %d)\n", LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Checking if Msg4 for harq_pid %d was acknowledged (round %d)\n",
module_idP,CC_idP,frameP,subframeP,round); module_idP,CC_idP,frameP,subframeP,RA_template->harq_pid,round);
if (round!=8) { if (round!=8) {
......
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @ 6c00bd1a
...@@ -777,12 +777,12 @@ void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_ReportP ...@@ -777,12 +777,12 @@ void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_ReportP
} }
uint8_t get_dl_cqi_pmi_size_pusch(UE_sched_ctrl *sched_ctl,COMMON_channels_t *cc,uint8_t tmode,uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic) { uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode,uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic) {
int Ntab[6] = {0,4,7,9,10,13}; int Ntab[6] = {0,4,7,9,10,13};
int N = Ntab[cc->p_eNB]; int N = Ntab[cc->mib->message.dl_Bandwidth];
int Ltab_uesel[6] = {0,6,9,13,15,18}; int Ltab_uesel[6] = {0,6,9,13,15,18};
int L = Ltab_uesel[cc->p_eNB]; int L = Ltab_uesel[cc->mib->message.dl_Bandwidth];
AssertFatal(cqi_ReportModeAperiodic != NULL,"cqi_ReportPeriodic is null!\n"); AssertFatal(cqi_ReportModeAperiodic != NULL,"cqi_ReportPeriodic is null!\n");
...@@ -1229,7 +1229,8 @@ uint16_t fill_nfapi_uci_acknak(module_id_t module_idP, ...@@ -1229,7 +1229,8 @@ uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
absSFP, absSFP,
&ul_config_pdu->uci_harq_pdu.harq_information, &ul_config_pdu->uci_harq_pdu.harq_information,
cce_idxP); cce_idxP);
LOG_D(MAC,"Filled in HARQ for rnti %x, cce_idxP %d-> n1_pucch %d\n",rntiP,cce_idxP,ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel9_fdd.n_pucch_1_0); LOG_D(MAC,"Filled in HARQ for rnti %x SF %d.%d acknakSF %d.%d, cce_idxP %d-> n1_pucch %d\n",rntiP,
absSFP/10,absSFP%10,ackNAK_absSF/10,ackNAK_absSF%10,cce_idxP,ul_config_pdu->uci_harq_pdu.harq_information.harq_information_rel9_fdd.n_pucch_1_0);
ul_req->number_of_pdus++; ul_req->number_of_pdus++;
...@@ -1306,7 +1307,103 @@ uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,u ...@@ -1306,7 +1307,103 @@ uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,u
return(((absSF/10)<<4) + (absSF%10)); return(((absSF/10)<<4) + (absSF%10));
} }
void fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t cqi_req,
COMMON_channels_t *cc,
struct PhysicalConfigDedicated *physicalConfigDedicated,
uint8_t tmode,
uint32_t handle,
uint16_t rnti,
uint8_t resource_block_start,
uint8_t number_of_resource_blocks,
uint8_t mcs,
uint8_t cyclic_shift_2_for_drms,
uint8_t frequency_hopping_enabled_flag,
uint8_t frequency_hopping_bits,
uint8_t new_data_indication,
uint8_t redundancy_version,
uint8_t harq_process_number,
uint8_t ul_tx_mode,
uint8_t current_tx_nb,
uint8_t n_srs,
uint16_t size
) {
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t));
if (cqi_req==0)
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE;
else
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu));
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = handle;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = rnti;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = resource_block_start;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = number_of_resource_blocks;
if (mcs<11) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
else if (mcs<21) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = cyclic_shift_2_for_drms;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = frequency_hopping_enabled_flag;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = frequency_hopping_bits;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = new_data_indication;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = redundancy_version;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = harq_process_number;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = ul_tx_mode;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = current_tx_nb;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = n_srs;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = size;
if (cqi_req == 1) {
// Add CQI portion
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
LOG_D(MAC,"report_type %d\n",ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type);
if (cc->p_eNB<=2 && (tmode==3||tmode==4||tmode==8||tmode==9||tmode==10))
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
else if (cc->p_eNB<=2)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
else if (cc->p_eNB==4)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;
AssertFatal(physicalConfigDedicated->cqi_ReportConfig!=NULL,"physicalConfigDedicated->cqi_ReportConfig is null!\n");
AssertFatal(physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic!=NULL,"physicalConfigDedicated->cqi_ReportModeAperiodic is null!\n");
AssertFatal(physicalConfigDedicated->pusch_ConfigDedicated!=NULL,"physicalConfigDedicated->puschConfigDedicated is null!\n");
for (int ri=0;
ri<(1<<ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);
ri++)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =
get_dl_cqi_pmi_size_pusch(cc,
tmode,
1+ri,
physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic);
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index;
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri = physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_RI_Index;
}
}
#ifdef Rel14 #ifdef Rel14
void fill_nfapi_ulsch_config_request_emtc(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t ue_type,
uint16_t total_number_of_repetitions,
uint16_t repetition_number,
uint16_t initial_transmission_sf_io) {
// Re13 fields
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = ue_type;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = total_number_of_repetitions;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = repetition_number;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = initial_transmission_sf_io;
}
int get_numnarrowbands(long dl_Bandwidth) { int get_numnarrowbands(long dl_Bandwidth) {
int nb_tab[6] = {1,2,4,8,12,16}; int nb_tab[6] = {1,2,4,8,12,16};
...@@ -2909,7 +3006,7 @@ boolean_t CCE_allocation_infeasible(int module_idP, ...@@ -2909,7 +3006,7 @@ boolean_t CCE_allocation_infeasible(int module_idP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti; dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = aggregation; dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = aggregation;
DL_req->number_pdu++; DL_req->number_pdu++;
ret = allocate_CCEs(module_idP,CC_idP,subframe,1); ret = allocate_CCEs(module_idP,CC_idP,subframe,0);
if (ret==-1) if (ret==-1)
res = TRUE; res = TRUE;
DL_req->number_pdu--; DL_req->number_pdu--;
...@@ -2918,7 +3015,7 @@ boolean_t CCE_allocation_infeasible(int module_idP, ...@@ -2918,7 +3015,7 @@ boolean_t CCE_allocation_infeasible(int module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation;
HI_DCI0_req->number_of_dci++; HI_DCI0_req->number_of_dci++;
ret = allocate_CCEs(module_idP,CC_idP,subframe,1); ret = allocate_CCEs(module_idP,CC_idP,subframe,0);
if (ret==-1) if (ret==-1)
res = TRUE; res = TRUE;
HI_DCI0_req->number_of_dci--; HI_DCI0_req->number_of_dci--;
...@@ -3287,7 +3384,7 @@ void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP, ...@@ -3287,7 +3384,7 @@ void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,
AssertFatal((cqi_ReportModeAperiodic = UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic)!=NULL, AssertFatal((cqi_ReportModeAperiodic = UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic)!=NULL,
"cqi_ReportModeAperiodic is null for UE %d\n",UE_id); "cqi_ReportModeAperiodic is null for UE %d\n",UE_id);
int N = Ntab[cc->p_eNB]; int N = Ntab[cc->mib->message.dl_Bandwidth];
int tmode = get_tmode(mod_idP,CC_idP,UE_id); int tmode = get_tmode(mod_idP,CC_idP,UE_id);
int ri = sched_ctl->aperiodic_ri_received[CC_idP]; int ri = sched_ctl->aperiodic_ri_received[CC_idP];
int r,diffcqi0=0,diffcqi1=0,pmi_uesel=0; int r,diffcqi0=0,diffcqi1=0,pmi_uesel=0;
......
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ 6c00bd1a
...@@ -61,7 +61,7 @@ ...@@ -61,7 +61,7 @@
#define DEBUG_eNB_SCHEDULER 1 #define DEBUG_eNB_SCHEDULER 1
// This table holds the allowable PRB sizes for ULSCH transmissions // This table holds the allowable PRB sizes for ULSCH transmissions
uint8_t rb_table[33] = {1,2,3,4,5,6,8,9,10,12,15,16,18,20,24,25,27,30,32,36,40,45,48,50,54,60,72,75,80,81,90,96,100}; uint8_t rb_table[34] = {1,2,3,4,5,6,8,9,10,12,15,16,18,20,24,25,27,30,32,36,40,45,48,50,54,60,64,72,75,80,81,90,96,100};
void rx_sdu(const module_id_t enb_mod_idP, void rx_sdu(const module_id_t enb_mod_idP,
const int CC_idP, const int CC_idP,
...@@ -106,8 +106,12 @@ void rx_sdu(const module_id_t enb_mod_idP, ...@@ -106,8 +106,12 @@ void rx_sdu(const module_id_t enb_mod_idP,
if (UE_id!=-1) { if (UE_id!=-1) {
LOG_D(MAC,"[eNB %d] CC_id %d Received ULSCH sdu from PHY (rnti %x, UE_id %d)\n",enb_mod_idP,CC_idP,rntiP,UE_id); LOG_D(MAC,"[eNB %d][PUSCH %d] CC_id %d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",enb_mod_idP,harq_pid,CC_idP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],
rntiP,UE_id,ul_cqi);
AssertFatal(UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] < 8,
"round >= 8\n");
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0; UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0; UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid)); UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
...@@ -121,11 +125,17 @@ void rx_sdu(const module_id_t enb_mod_idP, ...@@ -121,11 +125,17 @@ void rx_sdu(const module_id_t enb_mod_idP,
} }
if (sduP==NULL) { // we've got an error if (sduP==NULL) { // we've got an error
LOG_D(MAC,"[eNB %d] CC_id %d ULSCH in error in round %d\n",enb_mod_idP,CC_idP,UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP]); LOG_D(MAC,"[eNB %d][PUSCH %d] CC_id %d ULSCH in error in round %d, ul_cqi %d\n",enb_mod_idP,harq_pid,CC_idP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],ul_cqi);
// AssertFatal(1==0,"ulsch in error\n"); // AssertFatal(1==0,"ulsch in error\n");
if (UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP] == 7) if (UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] == 7) {
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid)); UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1<<harq_pid));
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid]=0;
// here we increment error statistics
}
else UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid]++;
return; return;
} }
} }
else { // Check if this is an RA process for the rnti else { // Check if this is an RA process for the rnti
...@@ -165,7 +175,7 @@ void rx_sdu(const module_id_t enb_mod_idP, ...@@ -165,7 +175,7 @@ void rx_sdu(const module_id_t enb_mod_idP,
eNB->eNB_stats[CC_idP].total_ulsch_bytes_rx+=sdu_lenP; eNB->eNB_stats[CC_idP].total_ulsch_bytes_rx+=sdu_lenP;
eNB->eNB_stats[CC_idP].total_ulsch_pdus_rx+=1; eNB->eNB_stats[CC_idP].total_ulsch_pdus_rx+=1;
UE_list->UE_sched_ctrl[UE_id].round_UL[harq_pid][CC_idP] = 0; UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] = 0;
// control element // control element
for (i=0; i<num_ce; i++) { for (i=0; i<num_ce; i++) {
...@@ -824,8 +834,7 @@ void schedule_ulsch_rnti(module_id_t module_idP, ...@@ -824,8 +834,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
eNB_UE_STATS *eNB_UE_stats = NULL; eNB_UE_STATS *eNB_UE_stats = NULL;
uint8_t status = 0; uint8_t status = 0;
uint8_t rb_table_index = -1; uint8_t rb_table_index = -1;
uint16_t TBS = 0; uint32_t cqi_req,cshift,ndi,tpc;
uint32_t cqi_req,cshift,ndi,mcs=0,tpc;
int32_t normalized_rx_power; int32_t normalized_rx_power;
int32_t target_rx_power=-90; int32_t target_rx_power=-90;
static int32_t tpc_accumulated=0; static int32_t tpc_accumulated=0;
...@@ -840,6 +849,7 @@ void schedule_ulsch_rnti(module_id_t module_idP, ...@@ -840,6 +849,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
UE_sched_ctrl *UE_sched_ctrl; UE_sched_ctrl *UE_sched_ctrl;
int tmode; int tmode;
int sched_frame=frameP; int sched_frame=frameP;
int rvidx_tab[4] = {0,2,3,1};
if (sched_subframeP<subframeP) sched_frame++; if (sched_subframeP<subframeP) sched_frame++;
...@@ -925,11 +935,11 @@ abort(); ...@@ -925,11 +935,11 @@ abort();
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth); N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id]; eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
/*
aggregation=get_aggregation(get_bw_index(module_idP,CC_id), aggregation=get_aggregation(get_bw_index(module_idP,CC_id),
eNB_UE_stats->dl_cqi, eNB_UE_stats->dl_cqi,
format0); format0);
*/
if (CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)) { if (CCE_allocation_infeasible(module_idP,CC_id,0,subframeP,aggregation,rnti)) {
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE\n", module_idP,frameP,subframeP,UE_id,rnti,CC_id); LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d/%x CC %d: not enough nCCE\n", module_idP,frameP,subframeP,UE_id,rnti,CC_id);
...@@ -962,8 +972,8 @@ abort(); ...@@ -962,8 +972,8 @@ abort();
if (((UE_is_to_be_scheduled(module_idP,CC_id,UE_id)>0)) || (round>0))// || ((frameP%10)==0)) if (((UE_is_to_be_scheduled(module_idP,CC_id,UE_id)>0)) || (round>0))// || ((frameP%10)==0))
// if there is information on bsr of DCCH, DTCH or if there is UL_SR, or if there is a packet to retransmit, or we want to schedule a periodic feedback every 10 frames // if there is information on bsr of DCCH, DTCH or if there is UL_SR, or if there is a packet to retransmit, or we want to schedule a periodic feedback every 10 frames
{ {
LOG_I(MAC,"[eNB %d][PUSCH] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UL_inactivity timer %d,UL_failure timer %d,cqi_req_timer %d)\n", LOG_D(MAC,"[eNB %d][PUSCH %d] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UL_inactivity timer %d,UL_failure timer %d,cqi_req_timer %d)\n",
module_idP,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR, module_idP,harq_pid,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR,
UE_sched_ctrl->ul_inactivity_timer, UE_sched_ctrl->ul_inactivity_timer,
UE_sched_ctrl->ul_failure_timer, UE_sched_ctrl->ul_failure_timer,
...@@ -981,6 +991,8 @@ abort(); ...@@ -981,6 +991,8 @@ abort();
else else
cqi_req = 0; cqi_req = 0;
cqi_req = 0;
//power control //power control
//compute the expected ULSCH RX power (for the stats) //compute the expected ULSCH RX power (for the stats)
...@@ -1023,15 +1035,15 @@ abort(); ...@@ -1023,15 +1035,15 @@ abort();
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power; UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1=UE_template->pre_assigned_mcs_ul; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1=UE_template->pre_assigned_mcs_ul;
mcs = UE_template->pre_assigned_mcs_ul;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS UE_template->mcs_UL[harq_pid] = UE_template->pre_assigned_mcs_ul;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if (UE_template->pre_allocated_rb_table_index_ul >=0) { if (UE_template->pre_allocated_rb_table_index_ul >=0) {
rb_table_index=UE_template->pre_allocated_rb_table_index_ul; rb_table_index=UE_template->pre_allocated_rb_table_index_ul;
} else { } else {
mcs=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs); UE_template->mcs_UL[harq_pid]=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs);
rb_table_index=5; // for PHR rb_table_index=5; // for PHR
} }
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=mcs; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=UE_template->mcs_UL[harq_pid];
// buffer_occupancy = UE_template->ul_total_buffer; // buffer_occupancy = UE_template->ul_total_buffer;
while (((rb_table[rb_table_index]>(N_RB_UL-1-first_rb[CC_id])) || while (((rb_table[rb_table_index]>(N_RB_UL-1-first_rb[CC_id])) ||
...@@ -1040,20 +1052,20 @@ abort(); ...@@ -1040,20 +1052,20 @@ abort();
rb_table_index--; rb_table_index--;
} }
TBS = get_TBS_UL(mcs,rb_table[rb_table_index]); UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],rb_table[rb_table_index]);
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=rb_table[rb_table_index]; UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=rb_table[rb_table_index];
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=TBS; UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid];
// buffer_occupancy -= TBS; // buffer_occupancy -= TBS;
T(T_ENB_MAC_UE_UL_SCHEDULE, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T(T_ENB_MAC_UE_UL_SCHEDULE, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]), T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
T_INT(TBS), T_INT(ndi)); T_INT(TBS), T_INT(ndi));
if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED) if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED)
LOG_I(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled UE %d (mcs %d, first rb %d, nb_rb %d, rb_table_index %d, TBS %d, harq_pid %d)\n", LOG_D(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled UE %d (mcs %d, first rb %d, nb_rb %d, rb_table_index %d, TBS %d, harq_pid %d)\n",
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,mcs, module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,UE_template->mcs_UL[harq_pid],
first_rb[CC_id],rb_table[rb_table_index], first_rb[CC_id],rb_table[rb_table_index],
rb_table_index,TBS,harq_pid); rb_table_index,UE_template->TBS_UL[harq_pid],harq_pid);
// bad indices : 20 (40 PRB), 21 (45 PRB), 22 (48 PRB) // bad indices : 20 (40 PRB), 21 (45 PRB), 22 (48 PRB)
// increment for next UE allocation // increment for next UE allocation
...@@ -1067,9 +1079,9 @@ abort(); ...@@ -1067,9 +1079,9 @@ abort();
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SCHEDULED,UE_sched_ctrl->ul_scheduled); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SCHEDULED,UE_sched_ctrl->ul_scheduled);
// adjust total UL buffer status by TBS, wait for UL sdus to do final update // adjust total UL buffer status by TBS, wait for UL sdus to do final update
LOG_D(MAC,"[eNB %d] CC_id %d UE %d/%x : adjusting ul_total_buffer, old %d, TBS %d\n", module_idP,CC_id,UE_id,rnti,UE_template->ul_total_buffer,TBS); LOG_D(MAC,"[eNB %d] CC_id %d UE %d/%x : adjusting ul_total_buffer, old %d, TBS %d\n", module_idP,CC_id,UE_id,rnti,UE_template->ul_total_buffer,UE_template->TBS_UL[harq_pid]);
if (UE_template->ul_total_buffer > TBS) if (UE_template->ul_total_buffer > UE_template->TBS_UL[harq_pid])
UE_template->ul_total_buffer -= TBS; UE_template->ul_total_buffer -= UE_template->TBS_UL[harq_pid];
else else
UE_template->ul_total_buffer = 0; UE_template->ul_total_buffer = 0;
LOG_D(MAC,"ul_total_buffer, new %d\n", UE_template->ul_total_buffer); LOG_D(MAC,"ul_total_buffer, new %d\n", UE_template->ul_total_buffer);
...@@ -1077,6 +1089,7 @@ abort(); ...@@ -1077,6 +1089,7 @@ abort();
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1) cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
// save it for a potential retransmission // save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift; UE_template->cshift[harq_pid] = cshift;
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi]; hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t)); memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE; hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
...@@ -1087,7 +1100,7 @@ abort(); ...@@ -1087,7 +1100,7 @@ abort();
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = first_rb[CC_id]; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = first_rb[CC_id];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = rb_table[rb_table_index]; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = rb_table[rb_table_index];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.mcs_1 = mcs; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.mcs_1 = UE_template->mcs_UL[harq_pid];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cyclic_shift_2_for_drms = cshift; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cyclic_shift_2_for_drms = cshift;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.frequency_hopping_enabled_flag = 0; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.frequency_hopping_enabled_flag = 0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.new_data_indication_1 = ndi; hi_dci0_pdu->dci_pdu.dci_pdu_rel8.new_data_indication_1 = ndi;
...@@ -1101,85 +1114,45 @@ abort(); ...@@ -1101,85 +1114,45 @@ abort();
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++; eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
LOG_I(MAC,"Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n", LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP); harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
// Add UL_config PDUs // Add UL_config PDUs
ul_config_pdu = &ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus]; fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t)); cc,
if (cqi_req==0) UE_template->physicalConfigDedicated,
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_PDU_TYPE; get_tmode(module_idP,CC_id,UE_id),
else eNB->ul_handle,
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE; rnti,
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_pdu)); first_rb[CC_id], // resource_block_start
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.handle = eNB->ul_handle++; rb_table[rb_table_index], // number_of_resource_blocks
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.rnti = rnti; UE_template->mcs_UL[harq_pid],
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.resource_block_start = first_rb[CC_id]; cshift, // cyclic_shift_2_for_drms
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = rb_table[rb_table_index]; 0, // frequency_hopping_enabled_flag
if (mcs<11) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2; 0, // frequency_hopping_bits
else if (mcs<21) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4; ndi, // new_data_indication
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6; 0, // redundancy_version
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = cshift; harq_pid, // harq_process_number
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = 0; 0, // ul_tx_mode
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = 0; 0, // current_tx_nb
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.new_data_indication = ndi; 0, // n_srs
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.redundancy_version = 0; get_TBS_UL(UE_template->mcs_UL[harq_pid],
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.harq_process_number = harq_pid; rb_table[rb_table_index])
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.ul_tx_mode = 0; );
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.current_tx_nb = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.n_srs = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.size = get_TBS_UL(mcs,
rb_table[rb_table_index]);
#ifdef Rel14 #ifdef Rel14
// Re13 fields
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.ue_type = UE_template->rach_resource_type>2 ? 2 : 1; fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.total_number_of_repetitions = 1; UE_template->rach_resource_type>2 ? 2 : 1,
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.repetition_number = 1; 1, //total_number_of_repetitions
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel13.initial_transmission_sf_io = (frameP*10)+subframeP; 1, //repetition_number
(frameP*10)+subframeP);
} }
#endif #endif
ul_req_tmp->number_of_pdus++; ul_req_tmp->number_of_pdus++;
eNB->ul_handle++;
if (cqi_req == 1) {
// Add CQI portion
tmode = get_tmode(module_idP,CC_id,UE_id);
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE;
ul_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_ul_config_ulsch_cqi_ri_pdu));
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type = 1;
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.number_of_cc = 1;
LOG_I(MAC,"report_type %d\n",ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.report_type);
if (cc->p_eNB<=2 && (tmode==3||tmode==4||tmode==8||tmode==9||tmode==10))
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 1;
else if (cc->p_eNB<=2)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 0;
else if (cc->p_eNB==4)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size = 2;
AssertFatal(UE_template->physicalConfigDedicated->cqi_ReportConfig!=NULL,"physicalConfigDedicated->cqi_ReportConfig is null!\n");
AssertFatal(UE_template->physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic!=NULL,"physicalConfigDedicated->cqi_ReportModeAperiodic is null!\n");
AssertFatal(UE_template->physicalConfigDedicated->pusch_ConfigDedicated!=NULL,"physicalConfigDedicated->puschConfigDedicated is null!\n");
for (int ri=0;
ri<(1<<ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].ri_size);
ri++)
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[ri] =
get_dl_cqi_pmi_size_pusch(&UE_list->UE_sched_ctrl[UE_id],
cc,
tmode,
1+ri,
UE_template->physicalConfigDedicated->cqi_ReportConfig->cqi_ReportModeAperiodic);
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.delta_offset_cqi = UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index;
((nfapi_ul_config_ulsch_cqi_ri_pdu*)ul_config_pdu)->cqi_ri_information.cqi_ri_information_rel9.delta_offset_ri = UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_RI_Index;
LOG_I(MAC,"Frame %d, Subframe %d: Requesting CQI information for UE %d/%x => O_r1 %d, betaCQI %d\n",
frameP,subframeP,UE_id,rnti,
ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9.aperiodic_cqi_pmi_ri_report.cc[0].dl_cqi_pmi_size[0],
(int)UE_template->physicalConfigDedicated->pusch_ConfigDedicated->betaOffset_CQI_Index);
}
} }
add_ue_ulsch_info(module_idP, add_ue_ulsch_info(module_idP,
CC_id, CC_id,
...@@ -1192,7 +1165,7 @@ abort(); ...@@ -1192,7 +1165,7 @@ abort();
} }
else { // round > 0 => retransmission else { // round > 0 => retransmission
T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(mcs), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]), T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(first_rb[CC_id]), T_INT(rb_table[rb_table_index]),
T_INT(round)); T_INT(round));
// fill in NAK information // fill in NAK information
...@@ -1205,10 +1178,46 @@ abort(); ...@@ -1205,10 +1178,46 @@ abort();
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid]; hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = UE_template->cshift[harq_pid];
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0; hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req->number_of_hi++; hi_dci0_req->number_of_hi++;
LOG_I(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) UE %d (mcs %d, first rb %d, nb_rb %d, TBS %d, harq_pid %d,round %d)\n", LOG_D(MAC,"[eNB %d][PUSCH %d/%x] CC_id %d Frame %d subframeP %d Scheduled (PHICH) UE %d (mcs %d, first rb %d, nb_rb %d, TBS %d, round %d)\n",
module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,mcs, module_idP,harq_pid,rnti,CC_id,frameP,subframeP,UE_id,UE_template->mcs_UL[harq_pid],
UE_template->first_rb_ul[harq_pid], UE_template->nb_rb_ul[harq_pid], UE_template->first_rb_ul[harq_pid], UE_template->nb_rb_ul[harq_pid],
TBS,harq_pid,round); UE_template->TBS_UL[harq_pid],round);
// Add UL_config PDUs
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
cc,
UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
UE_template->first_rb_ul[harq_pid], // resource_block_start
UE_template->nb_rb_ul[harq_pid], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid],
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
UE_template->oldNDI_UL[harq_pid], // new_data_indication
rvidx_tab[round&3], // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
UE_template->TBS_UL[harq_pid]
);
#ifdef Rel14
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
1, //total_number_of_repetitions
1, //repetition_number
(frameP*10)+subframeP);
}
#endif
ul_req_tmp->number_of_pdus++;
eNB->ul_handle++;
}/* }/*
else if (round > 0) { //we schedule a retransmission else if (round > 0) { //we schedule a retransmission
......
openair2/LAYER2/MAC/extern.h
View file @ 6c00bd1a
...@@ -77,7 +77,7 @@ extern int cqi_to_mcs[16]; ...@@ -77,7 +77,7 @@ extern int cqi_to_mcs[16];
extern uint32_t RRC_CONNECTION_FLAG; extern uint32_t RRC_CONNECTION_FLAG;
extern uint8_t rb_table[33]; extern uint8_t rb_table[34];
extern DCI0_5MHz_TDD_1_6_t UL_alloc_pdu; extern DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
......
openair2/LAYER2/MAC/proto.h
View file @ 6c00bd1a
...@@ -945,13 +945,43 @@ void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_PMI_Con ...@@ -945,13 +945,43 @@ void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_PMI_Con
uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_channels_t *cc,uint8_t tmode, struct CQI_ReportPeriodic *cqi_ReportPeriodic); uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_channels_t *cc,uint8_t tmode, struct CQI_ReportPeriodic *cqi_ReportPeriodic);
uint8_t get_dl_cqi_pmi_size_pusch(UE_sched_ctrl *sched_ctl,COMMON_channels_t *cc,uint8_t tmode, uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic); uint8_t get_dl_cqi_pmi_size_pusch(COMMON_channels_t *cc,uint8_t tmode, uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic);
void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP, uint8_t *pdu, uint8_t length); void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP, uint8_t *pdu, uint8_t length);
void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length); void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length);
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,uint16_t pdu_length, uint16_t *pdu_index, uint8_t *pdu ); uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,uint16_t pdu_length, uint16_t *pdu_index, uint8_t *pdu );
void fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t cqi_req,
COMMON_channels_t *cc,
struct PhysicalConfigDedicated *physicalConfigDedicated,
uint8_t tmode,
uint32_t handle,
uint16_t rnti,
uint8_t resource_block_start,
uint8_t number_of_resource_blocks,
uint8_t mcs,
uint8_t cyclic_shift_2_for_drms,
uint8_t frequency_hopping_enabled_flag,
uint8_t frequency_hopping_bits,
uint8_t new_data_indication,
uint8_t redundancy_version,
uint8_t harq_process_number,
uint8_t ul_tx_mode,
uint8_t current_tx_nb,
uint8_t n_srs,
uint16_t size
);
#ifdef Rel14
void fill_nfapi_ulsch_config_request_emtc(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t ue_type,
uint16_t total_number_of_repetitions,
uint16_t repetition_number,
uint16_t initial_transmission_sf_io);
#endif
void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t frameP, sub_frame_t subframeP,uint8_t cce_idx); void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t frameP, sub_frame_t subframeP,uint8_t cce_idx);
void fill_nfapi_dlsch_config(eNB_MAC_INST *eNB, nfapi_dl_config_request_body_t *dl_req, void fill_nfapi_dlsch_config(eNB_MAC_INST *eNB, nfapi_dl_config_request_body_t *dl_req,
......
openair2/PHY_INTERFACE/IF_Module.c
View file @ 6c00bd1a
...@@ -102,41 +102,46 @@ void handle_harq(UL_IND_t *UL_info) { ...@@ -102,41 +102,46 @@ void handle_harq(UL_IND_t *UL_info) {
void handle_ulsch(UL_IND_t *UL_info) { void handle_ulsch(UL_IND_t *UL_info) {
int i; int i,j;
for (i=0;i<UL_info->rx_ind.number_of_pdus;i++) { for (i=0;i<UL_info->rx_ind.number_of_pdus;i++) {
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu \n",UL_info->frame,UL_info->subframe); for (j=0;j<UL_info->crc_ind.number_of_crcs;j++) {
rx_sdu(UL_info->module_id, // find crc_indication j corresponding rx_indication i
UL_info->CC_id, if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==
UL_info->frame, UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti) {
UL_info->subframe, if (UL_info->crc_ind.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti, LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
UL_info->rx_ind.rx_pdu_list[i].data, rx_sdu(UL_info->module_id,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.length, UL_info->CC_id,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.timing_advance, UL_info->frame,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.ul_cqi); UL_info->subframe,
} UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
else {
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti,
UL_info->rx_ind.rx_pdu_list[i].data,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
break;
} //if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==
// UL_info->rx_ind.rx_pdu_list[i].rx_ue_information.rnti) {
} // for (j=0;j<UL_info->crc_ind.number_of_crcs;j++) {
AssertFatal(j<UL_info->crc_ind.number_of_crcs,"Couldn't find matchin CRC indication\n");
} // for (i=0;i<UL_info->rx_ind.number_of_pdus;i++) {
UL_info->rx_ind.number_of_pdus=0; UL_info->rx_ind.number_of_pdus=0;
for (i=0;i<UL_info->crc_ind.number_of_crcs;i++) {
if (UL_info->crc_ind.crc_pdu_list[i].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->crc_ind.crc_pdu_list[i].rx_ue_information.rnti,
(uint8_t *)NULL,
0,
0,
0);
}
}
UL_info->crc_ind.number_of_crcs=0; UL_info->crc_ind.number_of_crcs=0;
} }
......
targets/RT/USER/lte-softmodem.c
View file @ 6c00bd1a
...@@ -205,9 +205,9 @@ int16_t glog_level = LOG_INFO; ...@@ -205,9 +205,9 @@ int16_t glog_level = LOG_INFO;
int16_t glog_verbosity = LOG_MED; int16_t glog_verbosity = LOG_MED;
int16_t hw_log_level = LOG_INFO; int16_t hw_log_level = LOG_INFO;
int16_t hw_log_verbosity = LOG_MED; int16_t hw_log_verbosity = LOG_MED;
int16_t phy_log_level = LOG_INFO; int16_t phy_log_level = LOG_DEBUG;
int16_t phy_log_verbosity = LOG_MED; int16_t phy_log_verbosity = LOG_MED;
int16_t mac_log_level = LOG_INFO; int16_t mac_log_level = LOG_DEBUG;
int16_t mac_log_verbosity = LOG_MED; int16_t mac_log_verbosity = LOG_MED;
int16_t rlc_log_level = LOG_INFO; int16_t rlc_log_level = LOG_INFO;
int16_t rlc_log_verbosity = LOG_MED; int16_t rlc_log_verbosity = LOG_MED;
......
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