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常顺宇
OpenXG-RAN
Commits
90344ce5
Commit
90344ce5
authored
Jun 26, 2019
by
magounak
Committed by
Raphael Defosseux
Jul 10, 2019
Browse files
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Plain Diff
modify develop branch to enable multi-RRUs functionalities
parent
3c85cd58
Changes
3
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Showing
3 changed files
with
20 additions
and
16 deletions
+20
-16
openair1/SCHED/ru_procedures.c
openair1/SCHED/ru_procedures.c
+1
-1
targets/RT/USER/lte-enb.c
targets/RT/USER/lte-enb.c
+6
-9
targets/RT/USER/lte-ru.c
targets/RT/USER/lte-ru.c
+13
-6
No files found.
openair1/SCHED/ru_procedures.c
View file @
90344ce5
...
@@ -100,7 +100,7 @@ void feptx0(RU_t *ru,int slot) {
...
@@ -100,7 +100,7 @@ void feptx0(RU_t *ru,int slot) {
*/
*/
int
num_symb
=
7
;
int
num_symb
=
7
;
if
(
subframe_select
(
fp
,
subframe
)
==
SF_S
)
num_symb
=
fp
->
dl_symbols_in_S_subframe
;
if
(
subframe_select
(
fp
,
subframe
)
==
SF_S
)
num_symb
=
fp
->
dl_symbols_in_S_subframe
+
1
;
if
(
ru
->
generate_dmrs_sync
==
1
&&
slot
==
0
&&
subframe
==
1
&&
aa
==
0
)
{
if
(
ru
->
generate_dmrs_sync
==
1
&&
slot
==
0
&&
subframe
==
1
&&
aa
==
0
)
{
//int32_t dmrs[ru->frame_parms.ofdm_symbol_size*14] __attribute__((aligned(32)));
//int32_t dmrs[ru->frame_parms.ofdm_symbol_size*14] __attribute__((aligned(32)));
...
...
targets/RT/USER/lte-enb.c
View file @
90344ce5
...
@@ -635,13 +635,10 @@ void wakeup_prach_eNB(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe) {
...
@@ -635,13 +635,10 @@ void wakeup_prach_eNB(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe) {
AssertFatal
((
ret
=
pthread_mutex_lock
(
&
proc
->
mutex_RU_PRACH
))
==
0
,
"mutex_lock return %d
\n
"
,
ret
);
AssertFatal
((
ret
=
pthread_mutex_lock
(
&
proc
->
mutex_RU_PRACH
))
==
0
,
"mutex_lock return %d
\n
"
,
ret
);
for
(
i
=
0
;
i
<
eNB
->
num_RU
;
i
++
)
{
for
(
i
=
0
;
i
<
eNB
->
num_RU
;
i
++
)
{
if
(
ru
==
eNB
->
RU_list
[
i
]
)
{
if
(
ru
==
eNB
->
RU_list
[
i
]
&&
eNB
->
RU_list
[
i
]
->
wait_cnt
==
0
)
{
LOG_D
(
PHY
,
"frame %d, subframe %d: RU %d for eNB %d signals PRACH (mask %x, num_RU %d)
\n
"
,
frame
,
subframe
,
i
,
eNB
->
Mod_id
,
proc
->
RU_mask_prach
,
eNB
->
num_RU
);
LOG_D
(
PHY
,
"frame %d, subframe %d: RU %d for eNB %d signals PRACH (mask %x, num_RU %d)
\n
"
,
frame
,
subframe
,
i
,
eNB
->
Mod_id
,
proc
->
RU_mask_prach
,
eNB
->
num_RU
);
proc
->
RU_mask_prach
|=
(
1
<<
i
);
if
((
proc
->
RU_mask_prach
&
(
1
<<
i
))
>
0
)
}
else
if
(
eNB
->
RU_list
[
i
]
->
state
==
RU_SYNC
||
eNB
->
RU_list
[
i
]
->
wait_cnt
>
0
)
{
LOG_E
(
PHY
,
"eNB %d frame %d, subframe %d : previous information (PRACH) from RU %d (num_RU %d, mask %x) has not been served yet!
\n
"
,
eNB
->
Mod_id
,
frame
,
subframe
,
ru
->
idx
,
eNB
->
num_RU
,
proc
->
RU_mask_prach
);
proc
->
RU_mask_prach
|=
(
1
<<
i
);
proc
->
RU_mask_prach
|=
(
1
<<
i
);
}
}
}
}
...
...
targets/RT/USER/lte-ru.c
View file @
90344ce5
...
@@ -217,6 +217,7 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
...
@@ -217,6 +217,7 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
if
(
proc
->
symbol_mask
[
*
subframe
]
==
0
)
{
// this is normal case, if not true then we received a PULTICK before the previous subframe was finished
if
(
proc
->
symbol_mask
[
*
subframe
]
==
0
)
{
// this is normal case, if not true then we received a PULTICK before the previous subframe was finished
do
{
do
{
recv_IF4p5
(
ru
,
&
f
,
&
sf
,
&
packet_type
,
&
symbol_number
);
recv_IF4p5
(
ru
,
&
f
,
&
sf
,
&
packet_type
,
&
symbol_number
);
LOG_D
(
PHY
,
"fh_if4p5_south_in: RU %d, frame %d, subframe %d, f %d, sf %d
\n
"
,
ru
->
idx
,
*
frame
,
*
subframe
,
f
,
sf
);
if
(
oai_exit
==
1
||
ru
->
cmd
==
STOP_RU
)
break
;
if
(
oai_exit
==
1
||
ru
->
cmd
==
STOP_RU
)
break
;
if
(
packet_type
==
IF4p5_PULFFT
)
proc
->
symbol_mask
[
sf
]
=
proc
->
symbol_mask
[
sf
]
|
(
1
<<
symbol_number
);
if
(
packet_type
==
IF4p5_PULFFT
)
proc
->
symbol_mask
[
sf
]
=
proc
->
symbol_mask
[
sf
]
|
(
1
<<
symbol_number
);
else
if
(
packet_type
==
IF4p5_PULTICK
)
{
else
if
(
packet_type
==
IF4p5_PULTICK
)
{
...
@@ -230,8 +231,8 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
...
@@ -230,8 +231,8 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
}
else
if
(
packet_type
==
IF4p5_PRACH
)
{
}
else
if
(
packet_type
==
IF4p5_PRACH
)
{
// nothing in RU for RAU
// nothing in RU for RAU
}
}
LOG_D
(
PHY
,
"rx_fh_if4p5
: subframe %d symbol mask %x
\n
"
,
*
subframe
,
proc
->
symbol_mask
[
*
subframe
]);
LOG_D
(
PHY
,
"rx_fh_if4p5
for RU %d: subframe %d, sf %d, symbol mask %x
\n
"
,
ru
->
idx
,
*
subframe
,
sf
,
proc
->
symbol_mask
[
sf
]);
}
while
(
proc
->
symbol_mask
[
*
subframe
]
!=
symbol_mask_full
);
}
while
(
proc
->
symbol_mask
[
sf
]
!=
symbol_mask_full
);
}
}
else
{
else
{
f
=
*
frame
;
f
=
*
frame
;
...
@@ -437,10 +438,13 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
...
@@ -437,10 +438,13 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
proc
->
first_tx
=
0
;
proc
->
first_tx
=
0
;
symbol_mask_full
=
((
subframe_select
(
fp
,
*
subframe
)
==
SF_S
)
?
(
1
<<
fp
->
dl_symbols_in_S_subframe
)
:
(
1
<<
fp
->
symbols_per_tti
))
-
1
;
symbol_mask_full
=
((
subframe_select
(
fp
,
*
subframe
)
==
SF_S
)
?
(
1
<<
fp
->
dl_symbols_in_S_subframe
)
:
(
1
<<
fp
->
symbols_per_tti
))
-
1
;
}
else
{
}
else
{
AssertFatal
(
frame_tx
==
*
frame
,
/*
AssertFatal(frame_tx == *frame,
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
"frame_tx %d is not what we expect %d\n",frame_tx,*frame);
AssertFatal(subframe_tx == *subframe,
AssertFatal(subframe_tx == *subframe,
"In frame_tx %d : subframe_tx %d is not what we expect %d\n",frame_tx,subframe_tx,*subframe);
"In frame_tx %d : subframe_tx %d is not what we expect %d\n",frame_tx,subframe_tx,*subframe);
*/
*
frame
=
frame_tx
;
*
subframe
=
subframe_tx
;
}
}
if
(
packet_type
==
IF4p5_PDLFFT
)
{
if
(
packet_type
==
IF4p5_PDLFFT
)
{
...
@@ -1661,7 +1665,7 @@ void *ru_thread( void *param ) {
...
@@ -1661,7 +1665,7 @@ void *ru_thread( void *param ) {
proc
->
instance_cnt_asynch_rxtx
=
0
;
proc
->
instance_cnt_asynch_rxtx
=
0
;
pthread_cond_signal
(
&
proc
->
cond_asynch_rxtx
);
pthread_cond_signal
(
&
proc
->
cond_asynch_rxtx
);
AssertFatal
((
ret
=
pthread_mutex_unlock
(
&
proc
->
mutex_asynch_rxtx
))
==
0
,
"mutex_unlock returns %d
\n
"
,
ret
);
AssertFatal
((
ret
=
pthread_mutex_unlock
(
&
proc
->
mutex_asynch_rxtx
))
==
0
,
"mutex_unlock returns %d
\n
"
,
ret
);
}
else
LOG_
I
(
PHY
,
"RU %d no asynch_south interface
\n
"
,
ru
->
idx
);
}
else
LOG_
D
(
PHY
,
"RU %d no asynch_south interface
\n
"
,
ru
->
idx
);
// if this is a slave RRU, try to synchronize on the DL frequency
// if this is a slave RRU, try to synchronize on the DL frequency
if
((
ru
->
is_slave
==
1
)
&&
(
ru
->
if_south
==
LOCAL_RF
))
do_ru_synch
(
ru
);
if
((
ru
->
is_slave
==
1
)
&&
(
ru
->
if_south
==
LOCAL_RF
))
do_ru_synch
(
ru
);
...
@@ -1872,7 +1876,8 @@ void *ru_thread_synch(void *arg) {
...
@@ -1872,7 +1876,8 @@ void *ru_thread_synch(void *arg) {
&
avg
);
&
avg
);
LOG_I
(
PHY
,
"RU synch cnt %d: %d, val %llu (%d dB,%d dB)
\n
"
,
cnt
,
ru
->
rx_offset
,(
unsigned
long
long
)
peak_val
,
dB_fixed64
(
peak_val
),
dB_fixed64
(
avg
));
LOG_I
(
PHY
,
"RU synch cnt %d: %d, val %llu (%d dB,%d dB)
\n
"
,
cnt
,
ru
->
rx_offset
,(
unsigned
long
long
)
peak_val
,
dB_fixed64
(
peak_val
),
dB_fixed64
(
avg
));
cnt
++
;
cnt
++
;
if
(
/*ru->rx_offset >= 0*/
dB_fixed
(
peak_val
)
>=
85
&&
cnt
>
10
)
{
//if (/*ru->rx_offset >= 0*/dB_fixed(peak_val)>=85 && cnt>10) {
if
(
ru
->
rx_offset
>=
0
&&
avg
>
0
&&
dB_fixed
(
peak_val
/
avg
)
>=
15
&&
cnt
>
10
)
{
LOG_I
(
PHY
,
"Estimated peak_val %d dB, avg %d => timing offset %llu
\n
"
,
dB_fixed
(
peak_val
),
dB_fixed
(
avg
),(
unsigned
long
long
int
)
ru
->
rx_offset
);
LOG_I
(
PHY
,
"Estimated peak_val %d dB, avg %d => timing offset %llu
\n
"
,
dB_fixed
(
peak_val
),
dB_fixed
(
avg
),(
unsigned
long
long
int
)
ru
->
rx_offset
);
ru
->
in_synch
=
1
;
ru
->
in_synch
=
1
;
/*
/*
...
@@ -2628,7 +2633,7 @@ void init_RU(char *rf_config_file, clock_source_t clock_source,clock_source_t ti
...
@@ -2628,7 +2633,7 @@ void init_RU(char *rf_config_file, clock_source_t clock_source,clock_source_t ti
// NOTE: multiple CC_id are not handled here yet!
// NOTE: multiple CC_id are not handled here yet!
ru
->
openair0_cfg
.
clock_source
=
clock_source
;
ru
->
openair0_cfg
.
clock_source
=
clock_source
;
ru
->
openair0_cfg
.
time_source
=
time_source
;
ru
->
openair0_cfg
.
time_source
=
time_source
;
//
ru->generate_dmrs_sync = (ru->is_slave == 0) ? 1 : 0;
ru
->
generate_dmrs_sync
=
(
ru
->
is_slave
==
0
)
?
1
:
0
;
if
(
ru
->
generate_dmrs_sync
==
1
)
{
if
(
ru
->
generate_dmrs_sync
==
1
)
{
generate_ul_ref_sigs
();
generate_ul_ref_sigs
();
ru
->
dmrssync
=
(
int16_t
*
)
malloc16_clear
(
ru
->
frame_parms
.
ofdm_symbol_size
*
2
*
sizeof
(
int16_t
));
ru
->
dmrssync
=
(
int16_t
*
)
malloc16_clear
(
ru
->
frame_parms
.
ofdm_symbol_size
*
2
*
sizeof
(
int16_t
));
...
@@ -2919,6 +2924,8 @@ void RCconfig_RU(void) {
...
@@ -2919,6 +2924,8 @@ void RCconfig_RU(void) {
RC
.
ru
[
j
]
->
max_pdschReferenceSignalPower
=
*
(
RUParamList
.
paramarray
[
j
][
RU_MAX_RS_EPRE_IDX
].
uptr
);;
RC
.
ru
[
j
]
->
max_pdschReferenceSignalPower
=
*
(
RUParamList
.
paramarray
[
j
][
RU_MAX_RS_EPRE_IDX
].
uptr
);;
RC
.
ru
[
j
]
->
max_rxgain
=
*
(
RUParamList
.
paramarray
[
j
][
RU_MAX_RXGAIN_IDX
].
uptr
);
RC
.
ru
[
j
]
->
max_rxgain
=
*
(
RUParamList
.
paramarray
[
j
][
RU_MAX_RXGAIN_IDX
].
uptr
);
RC
.
ru
[
j
]
->
num_bands
=
RUParamList
.
paramarray
[
j
][
RU_BAND_LIST_IDX
].
numelt
;
RC
.
ru
[
j
]
->
num_bands
=
RUParamList
.
paramarray
[
j
][
RU_BAND_LIST_IDX
].
numelt
;
/* sf_extension is in unit of samples for 30.72MHz here, has to be scaled later */
RC
.
ru
[
j
]
->
sf_extension
=
*
(
RUParamList
.
paramarray
[
j
][
RU_SF_EXTENSION_IDX
].
uptr
);
for
(
i
=
0
;
i
<
RC
.
ru
[
j
]
->
num_bands
;
i
++
)
RC
.
ru
[
j
]
->
band
[
i
]
=
RUParamList
.
paramarray
[
j
][
RU_BAND_LIST_IDX
].
iptr
[
i
];
for
(
i
=
0
;
i
<
RC
.
ru
[
j
]
->
num_bands
;
i
++
)
RC
.
ru
[
j
]
->
band
[
i
]
=
RUParamList
.
paramarray
[
j
][
RU_BAND_LIST_IDX
].
iptr
[
i
];
}
//strcmp(local_rf, "yes") == 0
}
//strcmp(local_rf, "yes") == 0
else
{
else
{
...
...
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