Skip to content

O
OpenXG-RAN
Commit aae302f1 authored by gabrielC's avatar gabrielC
Browse files
Options

Merge branch 'pdcch_optim' into develop_integration_w30 

Conflicts:
	targets/RT/USER/lte-softmodem.c
parents b5eec87e a2cf0a22
Show whitespace changes
Inline Side-by-side
Showing with 510 additions and 117 deletions
openair1/PHY/INIT/lte_init.c
View file @ aae302f1
......@@ -764,6 +764,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
struct PhysicalConfigDedicated *physicalConfigDedicated )
{
static uint8_t first_dedicated_configuration = 0;
PHY_VARS_UE *phy_vars_ue = PHY_vars_UE_g[Mod_id][CC_id];
phy_vars_ue->total_TBS[eNB_id]=0;
......@@ -954,9 +955,13 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
get_cqipmiri_params(phy_vars_ue,eNB_id);
// disable MIB SIB decoding once we are on connected mode
LOG_I(PHY,"Disabling SIB MIB decoding \n");
first_dedicated_configuration ++;
if(first_dedicated_configuration > 1)
{
LOG_I(PHY,"Disable SIB MIB decoding \n");
phy_vars_ue->decode_SIB = 0;
phy_vars_ue->decode_MIB = 0;
}
//phy_vars_ue->pdcch_vars[1][eNB_id]->crnti = phy_vars_ue->pdcch_vars[0][eNB_id]->crnti;
if(phy_vars_ue->pdcch_vars[0][eNB_id]->crnti == 0x1234)
phy_vars_ue->pdcch_vars[0][eNB_id]->crnti = phy_vars_ue->pdcch_vars[1][eNB_id]->crnti;
......
openair1/PHY/LTE_TRANSPORT/dci.c
View file @ aae302f1
......@@ -653,7 +653,7 @@ void pdcch_channel_level(int32_t **dl_ch_estimates_ext,
//clear average level
#if defined(__x86_64__) || defined(__i386__)
avg128P = _mm_setzero_si128();
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][frame_parms->N_RB_DL*12];
dl_ch128=(__m128i *)&dl_ch_estimates_ext[(aatx<<1)+aarx][0];
#elif defined(__arm__)
#endif
......@@ -1699,19 +1699,20 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
#ifdef MU_RECEIVER
uint8_t eNB_id_i=eNB_id+1;//add 1 to eNB_id to separate from wanted signal, chosen as the B/F'd pilots from the SeNB are shifted by 1
#endif
int32_t avgs,s;
uint8_t n_pdcch_symbols = 3; //pdcch_vars[eNB_id]->num_pdcch_symbols;
int32_t avgs;
uint8_t n_pdcch_symbols;
uint8_t mi = get_mi(frame_parms,subframe);
//printf("In rx_pdcch, subframe %d, eNB_id %d, pdcch_vars %d \n",subframe,eNB_id,pdcch_vars);
for (s=0; s<n_pdcch_symbols; s++) {
// procress ofdm symbol 0
if (is_secondary_ue == 1) {
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id+1], //add 1 to eNB_id to compensate for the shifted B/F'd pilots from the SeNB
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
0,
high_speed_flag,
frame_parms);
#ifdef MU_RECEIVER
......@@ -1719,7 +1720,7 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id_i - 1],//subtract 1 to eNB_id_i to compensate for the non-shifted pilots from the PeNB
pdcch_vars[eNB_id_i]->rxdataF_ext,//shift by two to simulate transmission from a second antenna
pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,//shift by two to simulate transmission from a second antenna
s,
0,
high_speed_flag,
frame_parms);
#endif //MU_RECEIVER
......@@ -1728,7 +1729,7 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id],
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
0,
high_speed_flag,
frame_parms);
} else {
......@@ -1736,12 +1737,13 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id],
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
0,
high_speed_flag,
frame_parms);
}
}
// compute channel level based on ofdm symbol 0
pdcch_channel_level(pdcch_vars[eNB_id]->dl_ch_estimates_ext,
frame_parms,
avgP,
......@@ -1762,13 +1764,14 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
T(T_UE_PHY_PDCCH_ENERGY, T_INT(eNB_id), T_INT(0), T_INT(frame%1024), T_INT(subframe),
T_INT(avgP[0]), T_INT(avgP[1]), T_INT(avgP[2]), T_INT(avgP[3]));
#endif
for (s=0; s<n_pdcch_symbols; s++) {
// compute LLRs for ofdm symbol 0 only
pdcch_channel_compensation(pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
pdcch_vars[eNB_id]->rxdataF_comp,
(aatx>1) ? pdcch_vars[eNB_id]->rho : NULL,
frame_parms,
s,
0,
log2_maxh); // log2_maxh+I0_shift
......@@ -1788,13 +1791,13 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
pdcch_vars[eNB_id_i]->rxdataF_comp,
(aatx>1) ? pdcch_vars[eNB_id_i]->rho : NULL,
frame_parms,
s,
0,
log2_maxh); // log2_maxh+I0_shift
#ifdef DEBUG_PHY
write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
#endif
pdcch_dual_stream_correlation(frame_parms,
s,
0,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
pdcch_vars[eNB_id]->dl_ch_rho_ext,
......@@ -1813,7 +1816,7 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
pdcch_vars[eNB_id_i]->rxdataF_comp,
pdcch_vars[eNB_id]->rho,
pdcch_vars[eNB_id]->dl_ch_rho_ext,
s);
0);
#ifdef DEBUG_PHY
write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
......@@ -1822,14 +1825,13 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
#endif //MU_RECEIVER
pdcch_detection_mrc(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
s);
0);
}
if (mimo_mode == SISO)
pdcch_siso(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,s);
pdcch_siso(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,0);
else
pdcch_alamouti(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,s);
pdcch_alamouti(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,0);
#ifdef MU_RECEIVER
......@@ -1841,7 +1843,7 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
pdcch_vars[eNB_id]->dl_ch_rho_ext,
pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder)
pdcch_vars[eNB_id]->llr,
s);
0);
/*
#ifdef DEBUG_PHY
if (subframe==5) {
......@@ -1854,7 +1856,7 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
pdcch_llr(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
(char *)pdcch_vars[eNB_id]->llr,
s);
0);
/*#ifdef DEBUG_PHY
write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
#endif*/
......@@ -1864,7 +1866,6 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
#endif //MU_RECEIVER
}
#if T_TRACER
T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
......@@ -1872,7 +1873,7 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
#endif
// decode pcfich here
// decode pcfich here and find out pdcch ofdm symbol number
n_pdcch_symbols = rx_pcfich(frame_parms,
subframe,
pdcch_vars[eNB_id],
......@@ -1888,6 +1889,147 @@ int32_t rx_pdcch(PHY_VARS_UE *ue,
printf("demapping: subframe %d, mi %d, tdd_config %d\n",subframe,get_mi(frame_parms,subframe),frame_parms->tdd_config);
#endif
// process pdcch ofdm symbol 1 and 2 if necessary
for (int s=1; s<n_pdcch_symbols; s++){
if (is_secondary_ue == 1) {
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id+1], //add 1 to eNB_id to compensate for the shifted B/F'd pilots from the SeNB
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
high_speed_flag,
frame_parms);
#ifdef MU_RECEIVER
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id_i - 1],//subtract 1 to eNB_id_i to compensate for the non-shifted pilots from the PeNB
pdcch_vars[eNB_id_i]->rxdataF_ext,//shift by two to simulate transmission from a second antenna
pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,//shift by two to simulate transmission from a second antenna
s,
high_speed_flag,
frame_parms);
#endif //MU_RECEIVER
} else if (frame_parms->nb_antenna_ports_eNB>1) {
pdcch_extract_rbs_dual(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id],
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
high_speed_flag,
frame_parms);
} else {
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].rxdataF,
common_vars->common_vars_rx_data_per_thread[subframe%RX_NB_TH].dl_ch_estimates[eNB_id],
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
high_speed_flag,
frame_parms);
}
pdcch_channel_compensation(pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
pdcch_vars[eNB_id]->rxdataF_comp,
(aatx>1) ? pdcch_vars[eNB_id]->rho : NULL,
frame_parms,
s,
log2_maxh); // log2_maxh+I0_shift
#ifdef DEBUG_PHY
if (subframe==5)
write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
#endif
#ifdef MU_RECEIVER
if (is_secondary_ue) {
//get MF output for interfering stream
pdcch_channel_compensation(pdcch_vars[eNB_id_i]->rxdataF_ext,
pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
pdcch_vars[eNB_id_i]->rxdataF_comp,
(aatx>1) ? pdcch_vars[eNB_id_i]->rho : NULL,
frame_parms,
s,
log2_maxh); // log2_maxh+I0_shift
#ifdef DEBUG_PHY
write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
#endif
pdcch_dual_stream_correlation(frame_parms,
s,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,
pdcch_vars[eNB_id]->dl_ch_rho_ext,
log2_maxh);
}
#endif //MU_RECEIVER
if (frame_parms->nb_antennas_rx > 1) {
#ifdef MU_RECEIVER
if (is_secondary_ue) {
pdcch_detection_mrc_i(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
pdcch_vars[eNB_id_i]->rxdataF_comp,
pdcch_vars[eNB_id]->rho,
pdcch_vars[eNB_id]->dl_ch_rho_ext,
s);
#ifdef DEBUG_PHY
write_output("rxF_comp_d.m","rxF_c_d",&pdcch_vars[eNB_id]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
write_output("rxF_comp_i.m","rxF_c_i",&pdcch_vars[eNB_id_i]->rxdataF_comp[0][s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,1);
#endif
} else
#endif //MU_RECEIVER
pdcch_detection_mrc(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
s);
}
if (mimo_mode == SISO)
pdcch_siso(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,s);
else
pdcch_alamouti(frame_parms,pdcch_vars[eNB_id]->rxdataF_comp,s);
#ifdef MU_RECEIVER
if (is_secondary_ue) {
pdcch_qpsk_qpsk_llr(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
pdcch_vars[eNB_id_i]->rxdataF_comp,
pdcch_vars[eNB_id]->dl_ch_rho_ext,
pdcch_vars[eNB_id]->llr16, //subsequent function require 16 bit llr, but output must be 8 bit (actually clipped to 4, because of the Viterbi decoder)
pdcch_vars[eNB_id]->llr,
s);
/*
#ifdef DEBUG_PHY
if (subframe==5) {
write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
write_output("llr16_seq.m","llr16",&pdcch_vars[eNB_id]->llr16[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
}
#endif*/
} else {
#endif //MU_RECEIVER
pdcch_llr(frame_parms,
pdcch_vars[eNB_id]->rxdataF_comp,
(char *)pdcch_vars[eNB_id]->llr,
s);
/*#ifdef DEBUG_PHY
write_output("llr8_seq.m","llr8",&pdcch_vars[eNB_id]->llr[s*frame_parms->N_RB_DL*12],frame_parms->N_RB_DL*12,1,4);
#endif*/
#ifdef MU_RECEIVER
}
#endif //MU_RECEIVER
}
pdcch_demapping(pdcch_vars[eNB_id]->llr,
pdcch_vars[eNB_id]->wbar,
frame_parms,
......@@ -2810,8 +2952,8 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
LOG_I(PHY,"[DCI search nPdcch %d - common] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
else
LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x)\n",
pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask);
LOG_I(PHY,"[DCI search nPdcch %d - ue spec] Attempting candidate %d Aggregation Level %d DCI length %d at CCE %d/%d (CCEmap %x,CCEmap_cand %x) format %d\n",
pdcch_vars[eNB_id]->num_pdcch_symbols,m,L2,sizeof_bits,CCEind,nCCE,*CCEmap,CCEmap_mask,format_c);
#endif
......@@ -2900,7 +3042,7 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
}
}
LOG_D(PHY,"DCI decoding CRNTI [format: %d, nCCE[subframe: %d]: %d ], AggregationLevel %d \n",format_c, subframe, pdcch_vars[eNB_id]->nCCE[subframe],L2);
//LOG_I(PHY,"DCI decoding CRNTI [format: %d, nCCE[subframe: %d]: %d ], AggregationLevel %d \n",format_c, subframe, pdcch_vars[eNB_id]->nCCE[subframe],L2);
// memcpy(&dci_alloc[*dci_cnt].dci_pdu[0],dci_decoded_output,sizeof_bytes);
......@@ -2924,19 +3066,196 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **pdcch_vars,
}
#ifdef DEBUG_DCI_DECODING
LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %s in CCE %d (CCEmap %x)\n",
*dci_cnt,crc,1<<L,sizeof_bits,dci_format_strings[dci_alloc[*dci_cnt-1].format],CCEind,*CCEmap);
LOG_I(PHY,"[DCI search] Found DCI %d rnti %x Aggregation %d length %d format %s in CCE %d (CCEmap %x) candidate %d / %d \n",
*dci_cnt,crc,1<<L,sizeof_bits,dci_format_strings[dci_alloc[*dci_cnt-1].format],CCEind,*CCEmap,m,nb_candidates );
dump_dci(frame_parms,&dci_alloc[*dci_cnt-1]);
#endif
// if (crc==pdcch_vars[eNB_id]->crnti)
// return;
return;
} // rnti match
} // CCEmap_cand == 0
if ( agregationLevel != 0xFF &&
(format_c == format0 && m==0 && si_rnti != SI_RNTI))
{
//Only valid for OAI : Save some processing time when looking for DCI format0. From the log we see the DCI only on candidate 0.
return;
}
} // candidate loop
}
uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_UE *ue,
DCI_ALLOC_t *dci_alloc,
uint8_t DCIFormat,
uint8_t agregationLevel,
int16_t eNB_id,
uint8_t subframe)
{
uint8_t dci_cnt=0,old_dci_cnt=0;
uint32_t CCEmap0=0,CCEmap1=0,CCEmap2=0;
LTE_UE_PDCCH **pdcch_vars = ue->pdcch_vars[subframe%RX_NB_TH];
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
uint8_t mi = get_mi(&ue->frame_parms,subframe);
uint16_t ra_rnti=99;
uint8_t format0_found=0,format_c_found=0;
uint8_t tmode = ue->transmission_mode[eNB_id];
uint8_t frame_type = frame_parms->frame_type;
uint8_t format0_size_bits=0,format0_size_bytes=0;
uint8_t format1_size_bits=0,format1_size_bytes=0;
dci_detect_mode_t mode = dci_detect_mode_select(&ue->frame_parms,subframe);
switch (frame_parms->N_RB_DL) {
case 6:
if (frame_type == TDD) {
format0_size_bits = sizeof_DCI0_1_5MHz_TDD_1_6_t;
format0_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_1_5MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
} else {
format0_size_bits = sizeof_DCI0_1_5MHz_FDD_t;
format0_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
format1_size_bits = sizeof_DCI1_1_5MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
}
break;
case 25:
default:
if (frame_type == TDD) {
format0_size_bits = sizeof_DCI0_5MHz_TDD_1_6_t;
format0_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_5MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_5MHz_TDD_t);
} else {
format0_size_bits = sizeof_DCI0_5MHz_FDD_t;
format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
}
break;
case 50:
if (frame_type == TDD) {
format0_size_bits = sizeof_DCI0_10MHz_TDD_1_6_t;
format0_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_10MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_10MHz_TDD_t);
} else {
format0_size_bits = sizeof_DCI0_10MHz_FDD_t;
format0_size_bytes = sizeof(DCI0_10MHz_FDD_t);
format1_size_bits = sizeof_DCI1_10MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_10MHz_FDD_t);
}
break;
case 100:
if (frame_type == TDD) {
format0_size_bits = sizeof_DCI0_20MHz_TDD_1_6_t;
format0_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_20MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_20MHz_TDD_t);
} else {
format0_size_bits = sizeof_DCI0_20MHz_FDD_t;
format0_size_bytes = sizeof(DCI0_20MHz_FDD_t);
format1_size_bits = sizeof_DCI1_20MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_20MHz_FDD_t);
}
break;
}
if (ue->prach_resources[eNB_id])
ra_rnti = ue->prach_resources[eNB_id]->ra_RNTI;
// Now check UE_SPEC format0/1A ue_spec search spaces at aggregation 8
dci_decoding_procedure0(pdcch_vars,0,mode,
subframe,
dci_alloc,
eNB_id,
frame_parms,
mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0),
ra_rnti,
P_RNTI,
agregationLevel,
format1A,
format1A,
format1A,
format0,
format0_size_bits,
format0_size_bytes,
&dci_cnt,
&format0_found,
&format_c_found,
&CCEmap0,
&CCEmap1,
&CCEmap2);
if ((CCEmap0==0xffff)||
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
if (DCIFormat == 1)
{
if ((tmode < 3) || (tmode == 7)) {
//printf("Crnti decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
// Now check UE_SPEC format 1 search spaces at aggregation 1
//printf("[DCI search] Format 1/1A aggregation 1\n");
old_dci_cnt=dci_cnt;
dci_decoding_procedure0(pdcch_vars,0,mode,subframe,
dci_alloc,
eNB_id,
frame_parms,
mi,
((ue->decode_SIB == 1) ? SI_RNTI : 0),
ra_rnti,
P_RNTI,
0,
format1A,
format1A,
format1A,
format1,
format1_size_bits,
format1_size_bytes,
&dci_cnt,
&format0_found,
&format_c_found,
&CCEmap0,
&CCEmap1,
&CCEmap2);
if ((CCEmap0==0xffff) ||
(format_c_found==1))
return(dci_cnt);
if (dci_cnt>old_dci_cnt)
return(dci_cnt);
//printf("Crnti 1 decoding frame param agregation %d DCI %d \n",agregationLevel,DCIFormat);
}
else
{
AssertFatal(0,"Other Transmission mode not yet coded\n");
}
}
else
{
AssertFatal(0,"DCI format %d not yet implemented \n",DCIFormat);
}
return(dci_cnt);
}
uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
DCI_ALLOC_t *dci_alloc,
int do_common,
......@@ -3310,7 +3629,10 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
// printf("[DCI search] Format 0 aggregation 4\n");
//printf("[DCI search] Format 0 aggregation 1 dci_cnt %d\n",dci_cnt);
if (dci_cnt == 0)
{
// Now check UE_SPEC format 0 search spaces at aggregation 4
dci_decoding_procedure0(pdcch_vars,0,mode,
subframe,
......@@ -3343,7 +3665,11 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
// printf("[DCI search] Format 0 aggregation 2\n");
//printf("[DCI search] Format 0 aggregation 2 dci_cnt %d\n",dci_cnt);
}
if (dci_cnt == 0)
{
// Now check UE_SPEC format 0 search spaces at aggregation 2
dci_decoding_procedure0(pdcch_vars,0,mode,
subframe,
......@@ -3372,7 +3698,11 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
// printf("[DCI search] Format 0 aggregation 4\n");
//printf("[DCI search] Format 0 aggregation 4 dci_cnt %d\n",dci_cnt);
}
if (dci_cnt == 0)
{
// Now check UE_SPEC format 0 search spaces at aggregation 1
dci_decoding_procedure0(pdcch_vars,0,mode,
subframe,
......@@ -3401,9 +3731,9 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
//printf("[DCI search] Format 0 aggregation 8 dci_cnt %d\n",dci_cnt);
}
// These are for CRNTI based on transmission mode
if ((tmode < 3) || (tmode == 7)) {
// Now check UE_SPEC format 1 search spaces at aggregation 1
......@@ -3429,6 +3759,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
&CCEmap0,
&CCEmap1,
&CCEmap2);
//printf("[DCI search] Format 1 aggregation 1 dci_cnt %d\n",dci_cnt);
if ((CCEmap0==0xffff) ||
(format_c_found==1))
......@@ -3460,7 +3791,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
&CCEmap0,
&CCEmap1,
&CCEmap2);
//printf("[DCI search] Format 1 aggregation 2 dci_cnt %d\n",dci_cnt);
if ((CCEmap0==0xffff)||
(format_c_found==1))
......@@ -3492,6 +3823,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
&CCEmap0,
&CCEmap1,
&CCEmap2);
//printf("[DCI search] Format 1 aggregation 4 dci_cnt %d\n",dci_cnt);
if ((CCEmap0==0xffff)||
((format0_found==1)&&(format_c_found==1)))
......@@ -3524,6 +3856,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *ue,
&CCEmap0,
&CCEmap1,
&CCEmap2);
//printf("[DCI search] Format 1 aggregation 8 dci_cnt %d\n",dci_cnt);
if ((CCEmap0==0xffff)||
((format0_found==1)&&(format_c_found==1)))
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ aae302f1
......@@ -4781,18 +4781,17 @@ int check_dci_format1_1a_coherency(DCI_format_t dci_format,
uint8_t NPRB = 0;
long long int RIV_max = 0;
#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1-1A] AbsSubframe %d.%d dci_format %d\n", frame, subframe, dci_format);
LOG_I(PHY,"[DCI-FORMAT-1-1A] rnti %x\n", rnti);
LOG_I(PHY,"[DCI-FORMAT-1-1A] harq_pid %d\n", harq_pid);
LOG_I(PHY,"[DCI-FORMAT-1-1A] rah %d\n", rah);
LOG_I(PHY,"[DCI-FORMAT-1-1A] rballoc %x\n", rballoc);
LOG_I(PHY,"[DCI-FORMAT-1-1A] mcs1 %d\n", mcs1);
#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1-1A] rv1 %d\n", rv1);
LOG_I(PHY,"[DCI-FORMAT-1-1A] ndi1 %d\n", ndi1);
#endif
LOG_I(PHY,"[DCI-FORMAT-1-1A] TPC %d\n", TPC);
#endif
// I- check dci content minimum coherency
......@@ -6120,9 +6119,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
}
// dci is correct ==> update internal structure and prepare dl decoding
//#ifdef DEBUG_DCI
#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1A] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe);
//#endif
#endif
prepare_dl_decoding_format1_1A(format1A,
frame_parms->N_RB_DL,
&dci_info_extarcted,
......@@ -6229,9 +6228,9 @@ int generate_ue_dlsch_params_from_dci(int frame,
// dci is correct ==> update internal structure and prepare dl decoding
//#ifdef DEBUG_DCI
#ifdef DEBUG_DCI
LOG_I(PHY,"[DCI-FORMAT-1] AbsSubframe %d.%d prepare dl decoding \n", frame, subframe);
//#endif
#endif
prepare_dl_decoding_format1_1A(format1,
frame_parms->N_RB_DL,
&dci_info_extarcted,
......
openair1/PHY/LTE_TRANSPORT/proto.h
View file @ aae302f1
......@@ -1524,6 +1524,12 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
int16_t eNB_id,
uint8_t subframe);
uint16_t dci_CRNTI_decoding_procedure(PHY_VARS_UE *ue,
DCI_ALLOC_t *dci_alloc,
uint8_t DCIFormat,
uint8_t agregationLevel,
int16_t eNB_id,
uint8_t subframe);
uint16_t dci_decoding_procedure_emul(LTE_UE_PDCCH **lte_ue_pdcch_vars,
uint8_t num_ue_spec_dci,
......
openair1/PHY/defs.h
View file @ aae302f1
......@@ -75,6 +75,9 @@
#define RX_NB_TH_MAX 2
#define RX_NB_TH 2
extern uint8_t dciFormat;
extern uint8_t agregationLevel;
//#ifdef SHRLIBDEV
//extern int rxrescale;
......
openair1/PHY/vars.h
View file @ aae302f1
......@@ -78,6 +78,9 @@ unsigned char NB_INST=0;
unsigned int ULSCH_max_consecutive_errors = 20;
int number_of_cards;
uint8_t dciFormat;
uint8_t agregationLevel;
int flag_LA=0;
int flagMag;
......
openair1/SCHED/phy_procedures_lte_ue.c
View file @ aae302f1
......@@ -3084,14 +3084,34 @@ int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint
ue->high_speed_flag,
ue->is_secondary_ue);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_IN);
//printf("Decode SIB frame param agregation + DCI %d %d \n",agregationLevel,dciFormat);
//agregation level == FF means no configuration on
if(agregationLevel == 0xFF || ue->decode_SIB)
{
// search all possible dcis
dci_cnt = dci_decoding_procedure(ue,
dci_alloc_rx,
(ue->UE_mode[eNB_id] < PUSCH)? 1 : 0, // if we're in PUSCH don't listen to common search space,
// later when we need paging or RA during connection, update this ...
eNB_id,subframe_rx);
}
else
{
// search only preconfigured dcis
// search C RNTI dci
dci_cnt = dci_CRNTI_decoding_procedure(ue,
dci_alloc_rx,
dciFormat,
agregationLevel,
eNB_id,
subframe_rx);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d subframe %d PHICH RX\n",ue->Mod_id,frame_rx,subframe_rx);
......@@ -3721,7 +3741,6 @@ void ue_pdsch_procedures(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc, int eNB_id, PDSC
if(first_symbol_flag)
{
proc->first_symbol_available = 1;
printf("Set first_symbol_available to 1 \n");
}
} // CRNTI active
}
......@@ -5125,10 +5144,15 @@ int phy_procedures_UE_RX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,
((pmch_flag==1)&(l==l2))) {
LOG_D(PHY,"[UE %d] Frame %d: Calling pdcch procedures (eNB %d)\n",ue->Mod_id,frame_rx,eNB_id);
//start_meas(&ue->rx_pdcch_stats[subframe_rx%RX_NB_TH]);
if (ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,subframe_rx);
return(-1);
}
//stop_meas(&ue->rx_pdcch_stats[subframe_rx%RX_NB_TH]);
//printf("subframe %d n_pdcch_sym %d pdcch procedures %5.3f \n",
// subframe_rx, ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols,
// (ue->rx_pdcch_stats[subframe_rx%RX_NB_TH].p_time)/(cpuf*1000.0));
LOG_D(PHY,"num_pdcch_symbols %d\n",ue->pdcch_vars[subframe_rx%RX_NB_TH][eNB_id]->num_pdcch_symbols);
}
}
......
targets/RT/USER/lte-softmodem.c
View file @ aae302f1
......@@ -150,6 +150,9 @@ int chain_offset=0;
int phy_test = 0;
uint8_t usim_test = 0;
uint8_t dci_Format = 0;
uint8_t agregation_Level =0xFF;
uint8_t nb_antenna_tx = 1;
uint8_t nb_antenna_rx = 1;
......@@ -329,6 +332,8 @@ void help (void) {
printf(" --external-clock tells hardware to use an external clock reference\n");
printf(" --usim-test use XOR autentication algo in case of test usim mode\n");
printf(" --single-thread-disable. Disables single-thread mode in lte-softmodem\n");
printf(" --AgregationLevel Choose the agregation level used by tghe eNB for the OAI use 1, it will save some time of processing the pdcch\n");
printf(" --DCIformat choose the DCI format, be careful when using this option(for the moment only valid for SISO DCI format 1)\n");
printf(" -A Set timing_advance\n");
printf(" -C Set the downlink frequency for all component carriers\n");
printf(" -d Enable soft scope and L1 and L2 stats (Xforms)\n");
......@@ -643,6 +648,8 @@ static void get_options (int argc, char **argv) {
LONG_OPTION_THREADSLOT1PROCONE,
LONG_OPTION_THREADSLOT1PROCTWO,
LONG_OPTION_THREADSLOT1PROCTHREE,
LONG_OPTION_DCIFORMAT,
LONG_OPTION_AGREGATIONLEVEL,
LONG_OPTION_DEMOD_SHIFT,
#if T_TRACER
LONG_OPTION_T_PORT,
......@@ -683,6 +690,8 @@ static void get_options (int argc, char **argv) {
{"threadSlot1ProcOne", required_argument, NULL, LONG_OPTION_THREADSLOT1PROCONE},
{"threadSlot1ProcTwo", required_argument, NULL, LONG_OPTION_THREADSLOT1PROCTWO},
{"threadSlot1ProcThree", required_argument, NULL, LONG_OPTION_THREADSLOT1PROCTHREE},
{"DCIformat", required_argument, NULL, LONG_OPTION_DCIFORMAT},
{"AgregationLevel", required_argument, NULL, LONG_OPTION_AGREGATIONLEVEL},
{"dlsch-demod-shift", required_argument, NULL, LONG_OPTION_DEMOD_SHIFT},
#if T_TRACER
{"T_port", required_argument, 0, LONG_OPTION_T_PORT},
......@@ -826,6 +835,12 @@ static void get_options (int argc, char **argv) {
case LONG_OPTION_THREADSLOT1PROCTHREE:
threads.slot1_proc_three=atoi(optarg);
break;
case LONG_OPTION_DCIFORMAT:
dci_Format = atoi(optarg);
break;
case LONG_OPTION_AGREGATIONLEVEL:
agregation_Level = atoi(optarg);
break;
case LONG_OPTION_DEMOD_SHIFT: {
extern int16_t dlsch_demod_shift;
dlsch_demod_shift = atof(optarg);
......@@ -1575,6 +1590,11 @@ int main( int argc, char **argv ) {
NB_UE_INST=1;
NB_INST=1;
dciFormat = dci_Format;
agregationLevel = agregation_Level;
LOG_I(PHY,"Set dciFormat %d , agregationLevel %d \n",dciFormat, agregationLevel);
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_UE**));
PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_UE*)*MAX_NUM_CCs);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment