Commit b6288566 authored by Raymond Knopp's avatar Raymond Knopp

updates in UE for new process scheduling

parent 3fd226f7
......@@ -259,7 +259,7 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_UE_CONFIG_SIB2, VCD_FUNCTION_IN);
LOG_I(PHY,"[UE%d] Frame %d: Applying radioResourceConfigCommon from eNB%d\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx,CH_index);
LOG_I(PHY,"[UE%d] Applying radioResourceConfigCommon from eNB%d\n",Mod_id,CH_index);
frame_parms->prach_config_common.rootSequenceIndex =radioResourceConfigCommon->prach_Config.rootSequenceIndex;
......@@ -369,7 +369,7 @@ void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t CH_index,int mbsfn_Are
LTE_DL_FRAME_PARMS *frame_parms = &PHY_vars_UE_g[Mod_id][CC_id]->frame_parms;
LOG_I(PHY,"[UE%d] Frame %d: Applying MBSFN_Area_id %d for index %d\n",Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx,mbsfn_AreaId_r9,mbsfn_Area_idx);
LOG_I(PHY,"[UE%d] Applying MBSFN_Area_id %d for index %d\n",Mod_id,mbsfn_AreaId_r9,mbsfn_Area_idx);
if (mbsfn_Area_idx == 0) {
frame_parms->Nid_cell_mbsfn = (uint16_t)mbsfn_AreaId_r9;
......@@ -517,8 +517,8 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
// uint8_t prach_fmt;
// int u;
LOG_I(PHY,"[UE%d] Frame %d: Handover triggered: Applying radioResourceConfigCommon from eNB %d\n",
Mod_id,PHY_vars_UE_g[Mod_id][CC_id]->frame_rx,eNB_id);
LOG_I(PHY,"[UE%d] Handover triggered: Applying radioResourceConfigCommon from eNB %d\n",
Mod_id,eNB_id);
frame_parms->prach_config_common.rootSequenceIndex =radioResourceConfigCommon->prach_Config.rootSequenceIndex;
frame_parms->prach_config_common.prach_Config_enabled=1;
......@@ -752,7 +752,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t CH_index,
if (physicalConfigDedicated) {
LOG_D(PHY,"[UE %d] Frame %d: Received physicalConfigDedicated from eNB %d\n",Mod_id, phy_vars_ue->frame_rx,CH_index);
LOG_D(PHY,"[UE %d] Received physicalConfigDedicated from eNB %d\n",Mod_id, CH_index);
LOG_D(PHY,"------------------------------------------------------------------------\n");
if (physicalConfigDedicated->pdsch_ConfigDedicated) {
......@@ -843,7 +843,7 @@ void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t CH_index,
#endif
} else {
LOG_D(PHY,"[PHY][UE %d] Frame %d: Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id, phy_vars_ue->frame_rx,CH_index);
LOG_D(PHY,"[PHY][UE %d] Received NULL radioResourceConfigDedicated from eNB %d\n",Mod_id,CH_index);
return;
}
......
......@@ -51,7 +51,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
ncoef = 32767 - coef;
#ifdef DEBUG_PHY
LOG_D(PHY,"frame %d, slot %d: rx_offset (before) = %d\n",ue->frame_rx,ue->slot_rx,ue->rx_offset);
LOG_D(PHY,"frame %d: rx_offset (before) = %d\n",ue->proc.proc_rxtx[0].frame_rx,ue->rx_offset);
#endif //DEBUG_PHY
......@@ -95,7 +95,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"frame %d: rx_offset (after) = %d : max_pos = %d,max_pos_fil = %d (peak %d)\n",
ue->frame_rx,ue->rx_offset,max_pos,max_pos_fil,temp);
ue->proc.proc_rxtx[0].frame_rx,ue->rx_offset,max_pos,max_pos_fil,temp);
#endif //DEBUG_PHY
......
......@@ -77,7 +77,7 @@ int16_t get_PL(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
RSoffset = 3;
*/
LOG_D(PHY,"get_PL : Frame %d : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n", ue->frame_rx,
LOG_D(PHY,"get_PL : Frame %d : rsrp %f dBm/RE (%f), eNB power %d dBm/RE\n", ue->proc.proc_rxtx[0].frame_rx,
(1.0*dB_fixed_times10(ue->measurements.rsrp[eNB_index])-(10.0*ue->rx_total_gain_dB))/10.0,
10*log10((double)ue->measurements.rsrp[eNB_index]),
ue->frame_parms.pdsch_config_common.referenceSignalPower);
......@@ -172,7 +172,7 @@ int8_t set_RSRQ_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rs
}
void ue_rrc_measurements(PHY_VARS_UE *ue,
uint8_t slot,
uint8_t subframe,
uint8_t abstraction_flag)
{
......@@ -192,7 +192,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
if (abstraction_flag == 0) {
if ((ue->frame_parms.frame_type == FDD) &&
((slot == 0) || (slot == 10))) { // FDD PSS/SSS, compute noise in DTX REs
((subframe == 0) || (subframe == 5))) { // FDD PSS/SSS, compute noise in DTX REs
if (ue->frame_parms.Ncp==NORMAL) {
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
......@@ -240,7 +240,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
}
}
else if ((ue->frame_parms.frame_type == TDD) &&
(slot == 1)) { // TDD SSS, compute noise in DTX REs
(subframe == 0)) { // TDD SSS, compute noise in DTX REs
if (ue->frame_parms.Ncp==NORMAL) {
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
......@@ -294,7 +294,7 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
for (l=0,nu=0; l<=(4-ue->frame_parms.Ncp); l+=(4-ue->frame_parms.Ncp),nu=3) {
k = (nu + nushift)%6;
#ifdef DEBUG_MEAS
LOG_I(PHY,"[UE %d] Frame %d slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, k %d, l %d)\n",ue->Mod_id,ue->frame_rx,slot,Nid_cell,nushift,
LOG_I(PHY,"[UE %d] Frame %d subframe %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, k %d, l %d)\n",ue->Mod_id,ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,Nid_cell,nushift,
eNB_offset,k,l);
#endif
......@@ -376,15 +376,15 @@ void ue_rrc_measurements(PHY_VARS_UE *ue,
// if (slot == 0) {
if (eNB_offset == 0)
LOG_I(PHY,"[UE %d] Frame %d, slot %d RRC Measurements => rssi %3.1f dBm (digital: %3.1f dB, gain %d), N0 %d dBm\n",ue->Mod_id,
ue->frame_rx,slot,10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
LOG_I(PHY,"[UE %d] Frame %d, subframe %d RRC Measurements => rssi %3.1f dBm (digital: %3.1f dB, gain %d), N0 %d dBm\n",ue->Mod_id,
ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
10*log10(ue->measurements.rssi),
ue->rx_total_gain_dB,
ue->measurements.n0_power_tot_dBm);
LOG_I(PHY,"[UE %d] Frame %d, slot %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d), rsrq: %3.1f dB\n",
LOG_I(PHY,"[UE %d] Frame %d, subframe %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d), rsrq: %3.1f dB\n",
ue->Mod_id,
ue->frame_rx,slot,eNB_offset,
ue->proc.proc_rxtx[subframe&1].frame_rx,subframe,eNB_offset,
(eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
ue->measurements.rsrp[eNB_offset],
......@@ -699,9 +699,9 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
}
void lte_ue_measurements_emul(PHY_VARS_UE *ue,uint8_t last_slot,uint8_t eNB_id)
void lte_ue_measurements_emul(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id)
{
msg("[PHY] EMUL UE lte_ue_measurements_emul last slot %d, eNB_id %d\n",last_slot,eNB_id);
msg("[PHY] EMUL UE lte_ue_measurements_emul subframe %d, eNB_id %d\n",subframe,eNB_id);
}
......@@ -6236,6 +6236,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
uint8_t subframe,
DCI_format_t dci_format,
PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
......@@ -6269,12 +6270,12 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
harq_pid = 0;
else
harq_pid = subframe2harq_pid(frame_parms,
pdcch_alloc2ul_frame(frame_parms,ue->frame_rx,subframe),
pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,subframe),
pdcch_alloc2ul_subframe(frame_parms,subframe));
if (harq_pid == 255) {
LOG_E(PHY, "frame %d, subframe %d, rnti %x, format %d: illegal harq_pid!\n",
ue->frame_rx, subframe, rnti, dci_format);
proc->frame_rx, subframe, rnti, dci_format);
return(-1);
}
......@@ -6401,7 +6402,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
if (rballoc > RIV_max) {
LOG_E(PHY,"frame %d, subframe %d, rnti %x, format %d: FATAL ERROR: generate_ue_ulsch_params_from_dci, rb_alloc > RIV_max\n",
ue->frame_rx, subframe, rnti, dci_format);
proc->frame_rx, subframe, rnti, dci_format);
return(-1);
}
......@@ -6416,13 +6417,13 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
ue->Mod_id,harq_pid,ue->frame_rx,subframe,ulsch->f_pusch,
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
ulsch->f_pusch += delta_PUSCH_acc[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
} else {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
ue->Mod_id,harq_pid,ue->frame_rx,subframe,ulsch->f_pusch,
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->f_pusch,
delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC],
ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC);
ulsch->f_pusch = delta_PUSCH_abs[ue->ulsch[eNB_id]->harq_processes[harq_pid]->TPC];
......@@ -7044,7 +7045,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
}
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d, subframe %d : Programming PUSCH with n_DMRS2 %d (cshift %d), nb_rb %d, first_rb %d, mcs %d, round %d, rv %d\n",
ue->Mod_id,harq_pid,ue->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
ue->Mod_id,harq_pid,proc->frame_rx,subframe,ulsch->harq_processes[harq_pid]->n_DMRS2,cshift,ulsch->harq_processes[harq_pid]->nb_rb,ulsch->harq_processes[harq_pid]->first_rb,
ulsch->harq_processes[harq_pid]->mcs,ulsch->harq_processes[harq_pid]->round,ulsch->harq_processes[harq_pid]->rvidx);
// ulsch->n_DMRS2 = ((DCI0_5MHz_TDD_1_6_t *)dci_pdu)->cshift;
......@@ -7071,7 +7072,7 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
return(0);
} else {
LOG_E(PHY,"frame %d, subframe %d: FATAL ERROR, generate_ue_ulsch_params_from_dci, Illegal dci_format %d\n",
ue->frame_rx, subframe,dci_format);
proc->frame_rx, subframe,dci_format);
return(-1);
}
......
......@@ -123,7 +123,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
break;
default:
LOG_E(PHY,"[UE %d][FATAL] Frame %d subframe %d: Unknown PDSCH format %d\n",ue->frame_rx,subframe,type);
LOG_E(PHY,"[UE %d][FATAL] Frame %d subframe %d: Unknown PDSCH format %d\n",ue->proc.proc_rxtx[0].frame_rx,subframe,type);
return(-1);
break;
}
......
......@@ -43,6 +43,7 @@
//#define DEBUG_DRS
int generate_drs_pusch(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
short amp,
unsigned int subframe,
......@@ -70,7 +71,7 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
int32_t ref_re,ref_im;
uint8_t harq_pid = subframe2harq_pid(frame_parms,ue->frame_tx,subframe);
uint8_t harq_pid = subframe2harq_pid(frame_parms,proc->frame_tx,subframe);
cyclic_shift0 = (frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2 +
......
......@@ -239,20 +239,25 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
break;
}
ue->frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->frame_rx += frame_mod4;
ue->proc.proc_rxtx[0].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[0].frame_rx += frame_mod4;
ue->proc.proc_rxtx[1].frame_rx = (((ue->pbch_vars[0]->decoded_output[2]&3)<<6) + (ue->pbch_vars[0]->decoded_output[1]>>2))<<2;
ue->proc.proc_rxtx[1].frame_rx += frame_mod4;
#ifndef USER_MODE
// one frame delay
ue->frame_rx ++;
ue->proc.proc_rxtx[0].frame_rx ++;
ue->proc.proc_rxtx[1].frame_rx ++;
#endif
ue->frame_tx = ue->frame_rx;
ue->proc.proc_rxtx[0].frame_tx = ue->proc.proc_rxtx[0].frame_rx;
ue->proc.proc_rxtx[1].frame_tx = ue->proc.proc_rxtx[1].frame_rx;
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: pbch decoded sucessfully mode1_flag %d, tx_ant %d, frame %d, N_RB_DL %d, phich_duration %d, phich_resource %s!\n",
ue->Mod_id,
frame_parms->mode1_flag,
pbch_tx_ant,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
frame_parms->N_RB_DL,
frame_parms->phich_config_common.phich_duration,
phich_resource); //frame_parms->phich_config_common.phich_resource);
......@@ -475,7 +480,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
if (ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",ue->Mod_id);
//mac_resynch();
mac_xface->dl_phy_sync_success(ue->Mod_id,ue->frame_rx,0,1);//ue->common_vars.eNb_id);
mac_xface->dl_phy_sync_success(ue->Mod_id,ue->proc.proc_rxtx[0].frame_rx,0,1);//ue->common_vars.eNb_id);
ue->UE_mode[0] = PRACH;
}
else {
......@@ -491,7 +496,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
}
LOG_I(PHY,"[UE %d] Frame %d RRC Measurements => rssi %3.1f dBm (dig %3.1f dB, gain %d), N0 %d dBm, rsrp %3.1f dBm/RE, rsrq %3.1f dB\n",ue->Mod_id,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
10*log10(ue->measurements.rssi)-ue->rx_total_gain_dB,
10*log10(ue->measurements.rssi),
ue->rx_total_gain_dB,
......@@ -502,7 +507,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
LOG_I(PHY,"[UE %d] Frame %d MIB Information => %s, %s, NidCell %d, N_RB_DL %d, PHICH DURATION %d, PHICH RESOURCE %s, TX_ANT %d\n",
ue->Mod_id,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
duplex_string[ue->frame_parms.frame_type],
prefix_string[ue->frame_parms.Ncp],
ue->frame_parms.Nid_cell,
......@@ -513,7 +518,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
LOG_I(PHY,"[UE %d] Frame %d Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id,
ue->frame_rx,
ue->proc.proc_rxtx[0].frame_rx,
openair0_cfg[0].rx_freq[0]-ue->common_vars.freq_offset,
ue->common_vars.freq_offset);
......
......@@ -1055,6 +1055,7 @@ void generate_phich(LTE_DL_FRAME_PARMS *frame_parms,
void rx_phich(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
uint8_t subframe,
uint8_t eNB_id)
{
......@@ -1064,7 +1065,7 @@ void rx_phich(PHY_VARS_UE *ue,
LTE_UE_PDCCH **pdcch_vars = ue->pdcch_vars;
// uint8_t HI;
uint8_t harq_pid = phich_subframe_to_harq_pid(frame_parms,ue->frame_rx,subframe);
uint8_t harq_pid = phich_subframe_to_harq_pid(frame_parms,proc->frame_rx,subframe);
LTE_UE_ULSCH_t *ulsch = ue->ulsch[eNB_id];
int16_t phich_d[24],*phich_d_ptr,HI16;
// unsigned int i,aa;
......@@ -1082,10 +1083,10 @@ void rx_phich(PHY_VARS_UE *ue,
uint8_t pusch_subframe;
// check if we're expecting a PHICH in this subframe
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX\n",ue->Mod_id,harq_pid,ue->frame_rx,subframe);
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX\n",ue->Mod_id,harq_pid,proc->frame_rx,subframe);
if (ulsch->harq_processes[harq_pid]->status == ACTIVE) {
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX ACTIVE\n",ue->Mod_id,harq_pid,ue->frame_rx,subframe);
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH RX ACTIVE\n",ue->Mod_id,harq_pid,proc->frame_rx,subframe);
Ngroup_PHICH = (frame_parms->phich_config_common.phich_resource*frame_parms->N_RB_DL)/48;
if (((frame_parms->phich_config_common.phich_resource*frame_parms->N_RB_DL)%48) > 0)
......@@ -1349,14 +1350,14 @@ void rx_phich(PHY_VARS_UE *ue,
if (ue->ulsch_Msg3_active[eNB_id] == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d][RAPROC] Frame %d subframe %d Msg3 PHICH, received NAK (%d) nseq %d, ngroup %d\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe,
HI16,
nseq_PHICH,
ngroup_PHICH);
get_Msg3_alloc_ret(&ue->frame_parms,
subframe,
ue->frame_rx,
proc->frame_rx,
&ue->ulsch_Msg3_frame[eNB_id],
&ue->ulsch_Msg3_subframe[eNB_id]);
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
......@@ -1374,7 +1375,7 @@ void rx_phich(PHY_VARS_UE *ue,
//#ifdef DEBUG_PHICH
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH, received NAK (%d) nseq %d, ngroup %d\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe,
HI16,
nseq_PHICH,
......@@ -1394,7 +1395,7 @@ void rx_phich(PHY_VARS_UE *ue,
if (ue->ulsch_Msg3_active[eNB_id] == 1) {
LOG_D(PHY,"[UE %d][PUSCH %d][RAPROC] Frame %d subframe %d Msg3 PHICH, received ACK (%d) nseq %d, ngroup %d\n\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe,
HI16,
nseq_PHICH,ngroup_PHICH);
......@@ -1402,7 +1403,7 @@ void rx_phich(PHY_VARS_UE *ue,
//#ifdef PHICH_DEBUG
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d PHICH, received ACK (%d) nseq %d, ngroup %d\n\n",
ue->Mod_id,harq_pid,
ue->frame_rx,
proc->frame_rx,
subframe, HI16,
nseq_PHICH,ngroup_PHICH);
//#endif
......
......@@ -55,7 +55,7 @@ extern int mac_get_rrc_status(uint8_t Mod_id,uint8_t eNB_flag,uint8_t index);
extern openair0_config_t openair0_cfg[];
#endif
int dump_ue_stats(PHY_VARS_UE *ue, char* buffer, int length, runmode_t mode, int input_level_dBm)
int dump_ue_stats(PHY_VARS_UE *ue, UE_rxtx_proc_t *proc,char* buffer, int length, runmode_t mode, int input_level_dBm)
{
uint8_t eNB=0;
......@@ -78,7 +78,7 @@ int dump_ue_stats(PHY_VARS_UE *ue, char* buffer, int length, runmode_t mode, int
/*
len += sprintf(&buffer[len],
"[UE PROC] Frame count: %d\neNB0 RSSI %d dBm/RE (%d dB, %d dB)\neNB1 RSSI %d dBm/RE (%d dB, %d dB)neNB2 RSSI %d dBm/RE (%d dB, %d dB)\nN0 %d dBm/RE, %f dBm/%dPRB (%d dB, %d dB)\n",
ue->frame_rx,
proc->frame_rx,
ue->measurements.rx_rssi_dBm[0],
ue->measurements.rx_power_dB[0][0],
ue->measurements.rx_power_dB[0][1],
......@@ -535,7 +535,7 @@ int dump_ue_stats(PHY_VARS_UE *ue, char* buffer, int length, runmode_t mode, int
} else {
len += sprintf(&buffer[len], "[UE PROC] Frame count: %d, RSSI %3.2f dB (%d dB, %d dB), N0 %3.2f dB (%d dB, %d dB)\n",
ue->frame_rx,
proc->frame_rx,
10*log10(ue->measurements.rssi),
ue->measurements.rx_power_dB[0][0],
ue->measurements.rx_power_dB[0][1],
......
......@@ -1328,6 +1328,7 @@ int32_t generate_srs_tx(PHY_VARS_UE *phy_vars_ue,
*/
int32_t generate_drs_pusch(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
int16_t amp,
uint32_t subframe,
......@@ -1398,7 +1399,8 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
uint8_t subframe,
DCI_format_t dci_format,
PHY_VARS_UE *phy_vars_ue,
uint16_t si_rnti,
UE_rxtx_proc_t *proc,
uint16_t si_rnti,
uint16_t ra_rnti,
uint16_t p_rnti,
uint16_t cba_rnti,
......@@ -1406,7 +1408,8 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
uint8_t use_srs);
int32_t generate_ue_ulsch_params_from_rar(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id);
UE_rxtx_proc_t *proc,
uint8_t eNB_id);
double sinr_eff_cqi_calc(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id);
int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *PHY_vars_eNB,
......@@ -1424,16 +1427,13 @@ int generate_eNB_ulsch_params_from_dci(PHY_VARS_eNB *PHY_vars_eNB,
void dump_ulsch(PHY_VARS_eNB *phy_vars_eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id);
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch2(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint16_t coded_bits_per_codeword,int round);
int dump_dci(LTE_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t mode, int input_level_dBm);
int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, UE_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length);
......@@ -1550,11 +1550,13 @@ void generate_phich_top(PHY_VARS_eNB *phy_vars_eNB,
/* \brief This routine demodulates the PHICH and updates PUSCH/ULSCH parameters.
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXN_TXNp4 proc
@param subframe Subframe of received PDCCH/PHICH
@param eNB_id Index of eNB
*/
void rx_phich(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t subframe,
uint8_t eNB_id);
......@@ -1653,11 +1655,12 @@ void generate_pucch(int32_t **txdataF,
uint8_t subframe);
void generate_pucch_emul(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
PUCCH_FMT_t format,
uint8_t ncs1,
uint8_t *pucch_ack_payload,
uint8_t sr,
uint8_t subframe);
uint8_t sr);
uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
......
......@@ -403,13 +403,16 @@ void generate_pucch(int32_t **txdataF,
}
void generate_pucch_emul(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
PUCCH_FMT_t format,
uint8_t ncs1,
uint8_t *pucch_payload,
uint8_t sr,
uint8_t subframe)
uint8_t sr)
{
int subframe = proc->subframe_tx;
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.pucch_flag = format;
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.pucch_Ncs1 = ncs1;
......@@ -428,7 +431,7 @@ void generate_pucch_emul(PHY_VARS_UE *ue,
ue->pucch_payload[0] = pucch_payload[0] + (pucch_payload[1]<<1);
UE_transport_info[ue->Mod_id][ue->CC_id].cntl.pucch_payload = pucch_payload[0] + (pucch_payload[1]<<1);
} else if (format == pucch_format1) {
LOG_D(PHY,"[UE %d] Frame %d subframe %d Generating PUCCH for SR %d\n",ue->Mod_id,ue->frame_tx,subframe,sr);
LOG_D(PHY,"[UE %d] Frame %d subframe %d Generating PUCCH for SR %d\n",ue->Mod_id,proc->frame_tx,subframe,sr);
}
ue->sr[subframe] = sr;
......
......@@ -175,6 +175,7 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
int8_t delta_PUSCH_msg2[8] = {-6,-4,-2,0,2,4,6,8};
int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
unsigned char eNB_id )
{
......@@ -189,13 +190,13 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
// int current_dlsch_cqi = ue->current_dlsch_cqi[eNB_id];
uint8_t *rar = (uint8_t *)(rar_pdu+1);
uint8_t harq_pid = subframe2harq_pid(frame_parms,ue->frame_tx,subframe);
uint8_t harq_pid = subframe2harq_pid(frame_parms,proc->frame_tx,subframe);
uint16_t rballoc;
uint8_t cqireq;
uint16_t *RIV2nb_rb_LUT, *RIV2first_rb_LUT;
uint16_t RIV_max = 0;
LOG_D(PHY,"[eNB][RAPROC] Frame %d: generate_ue_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",ue->frame_tx,subframe,harq_pid);
LOG_D(PHY,"[eNB][RAPROC] Frame %d: generate_ue_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",proc->frame_tx,subframe,harq_pid);
switch (frame_parms->N_RB_DL) {
case 6:
......@@ -272,7 +273,7 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
ulsch->uci_format = HLC_subband_cqi_nopmi;
fill_CQI(ulsch,meas,eNB_id,0,ue->frame_parms.N_RB_DL,0, transmission_mode,ue->sinr_eff);
if (((ue->frame_tx % 100) == 0) || (ue->frame_tx < 10))
if (((proc->frame_tx % 100) == 0) || (proc->frame_tx < 10))
print_CQI(ulsch->o,ulsch->uci_format,eNB_id,ue->frame_parms.N_RB_DL);
} else {
ulsch->O_RI = 0;
......
......@@ -509,7 +509,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
float **chest_t_abs;
float time[FRAME_LENGTH_COMPLEX_SAMPLES];
float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
int frame = phy_vars_ue->frame_rx;
int frame = phy_vars_ue->proc.proc_rxtx[0].frame_rx;
uint32_t total_dlsch_bitrate = phy_vars_ue->bitrate[eNB_id];
int coded_bits_per_codeword = 0;
int mcs = 0;
......
......@@ -157,11 +157,11 @@ enum transmission_access_mode {
SCHEDULED_ACCESS,
CBA_ACCESS};
typedef enum {
eNodeB_3GPP=0, // classical eNodeB function
eNodeB_3GPP_BBU, // classical eNodeB function with transport interface
NGFI_RRU_IF4, // NGFI_RRU (NGFI remote radio-unit, currently split at common - ue_specific interface, IF4)
NGFI_RCC_IF4 // NGFI_RCC (NGFI radio cloud center, currently split at common - ue_specific interface, IF4)
typedef enum {
eNodeB_3GPP=0, // classical eNodeB function
eNodeB_3GPP_BBU, // eNodeB with NGFI IF5
NGFI_RRU_IF4, // NGFI_RRU (NGFI remote radio-unit, currently split at common - ue_specific interface, IF4)
NGFI_RCC_IF4 // NGFI_RCC (NGFI radio cloud center, currently split at common - ue_specific interface, IF4)
} eNB_func_t;
typedef struct UE_SCAN_INFO_s {
......@@ -250,8 +250,58 @@ typedef struct {
eNB_rxtx_proc_t proc_rxtx[2];
} eNB_proc_t;
//! \brief Number of eNB TX and RX threads.
//! This number must be equal to the number of LTE subframes (10). Each thread is responsible for a single subframe.
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
/// \brief Instance count for RXn-TXnp4 processing thread.
/// \internal This variable is protected by \ref mutex_rxtx.
int instance_cnt_rxtx;
/// pthread structure for RXn-TXnp4 processing thread
pthread_t pthread_rxtx;
/// pthread attributes for RXn-TXnp4 processing thread
pthread_attr_t attr_rxtx;
/// condition variable for tx processing thread
pthread_cond_t cond_rxtx;
/// mutex for RXn-TXnp4 processing thread
pthread_mutex_t mutex_rxtx;
/// scheduling parameters for RXn-TXnp4 thread
struct sched_param sched_param_rxtx;
} UE_rxtx_proc_t;
/// Context data structure for eNB subframe processing
typedef struct {
/// Component Carrier index
uint8_t CC_id;
/// Last RX timestamp
openair0_timestamp timestamp_rx;
/// \brief Instance count for synch thread.
/// \internal This variable is protected by \ref mutex_synch.
int instance_cnt_synch;
/// pthread attributes for prach processing thread
pthread_attr_t attr_synch;
/// scheduling parameters for synch thread
struct sched_param sched_param_synch;
/// pthread descriptor synch thread
pthread_t pthread_synch;
/// condition variable for UE synch thread;
pthread_cond_t cond_synch;
/// mutex for UE synch thread
pthread_mutex_t mutex_synch;
/// set of scheduling variables RXn-TXnp4 threads
UE_rxtx_proc_t proc_rxtx[2];
} UE_proc_t;
/// Top-level PHY Data Structure for eNB
typedef struct PHY_VARS_eNB_s {
......@@ -491,34 +541,8 @@ typedef struct {
int UE_scan_carrier;
/// \brief Indicator that UE is synchronized to an eNB
int is_synchronized;
/// \brief Instance count of TX processing thread (-1 means ready, 0 means busy)
int instance_cnt_tx;
/// \brief Instance count of RX processing thread (-1 means ready, 0 means busy)
int instance_cnt_rx;
/// \brief Instance count of initial synchronization thread (-1 means ready, 0 means busy).
/// Protected by mutex \ref mutex_synch and condition \ref cond_synch.
int instance_cnt_synch;
/// \brief Condition variable for TX processing thread
pthread_cond_t cond_tx;
/// \brief Condition variable for RX processing thread
pthread_cond_t cond_rx;
/// \brief Condition variable for initial synchronization thread.
/// The corresponding mutex is \ref mutex_synch.
pthread_cond_t cond_synch;
/// \brief Mutex for TX processing thread
pthread_mutex_t mutex_tx;
/// \brief Mutex for RX processing thread
pthread_mutex_t mutex_rx;
/// \brief Mutex for initial synchronization thread.
/// Used to protect \ref instance_cnt_synch.
/// \sa cond_synch
pthread_mutex_t mutex_synch;
/// \brief Pthread structure for RX processing thread
pthread_t thread_rx;
/// \brief Pthread structure for TX processing thread
pthread_t thread_tx;
/// \brief Pthread structure to RX processing thread
pthread_t thread_synch;
/// Data structure for UE process scheduling
UE_proc_t proc;
/// \brief Total gain of the TX chain (16-bit baseband I/Q to antenna)
uint32_t tx_total_gain_dB;
/// \brief Total gain of the RX chain (antenna to baseband I/Q) This is a function of rx_gain_mode (and the corresponding gain) and the rx_gain of the card.
......@@ -535,10 +559,6 @@ typedef struct {
int tx_total_RE;
/// \brief Maximum transmit power
int8_t tx_power_max_dBm;
/// \brief Frame counters for TX and RX processing
uint32_t frame_rx,frame_tx;
/// \brief Slot counters for TX and RX processing
uint32_t slot_tx,slot_rx;
/// \brief Number of eNB seen by UE
uint8_t n_connected_eNB;
/// \brief indicator that Handover procedure has been initiated
......@@ -587,10 +607,14 @@ typedef struct {
uint32_t high_speed_flag;
uint32_t perfect_ce;
int16_t ch_est_alpha;
int generate_ul_signal[NUMBER_OF_CONNECTED_eNB_MAX];
UE_SCAN_INFO_t scan_info[NB_BANDS_MAX];
char ulsch_no_allocation_counter[NUMBER_OF_CONNECTED_eNB_MAX];
unsigned char ulsch_Msg3_active[NUMBER_OF_CONNECTED_eNB_MAX];
uint32_t ulsch_Msg3_frame[NUMBER_OF_CONNECTED_eNB_MAX];
unsigned char ulsch_Msg3_subframe[NUMBER_OF_CONNECTED_eNB_MAX];
......
......@@ -72,12 +72,7 @@ enum openair_ERROR {
enum openair_SYNCH_STATUS {
openair_NOT_SYNCHED=1,
#ifdef OPENAIR_LTE
openair_SYNCHED,
#else
openair_SYNCHED_TO_CHSCH,
openair_SYNCHED_TO_MRSCH,
#endif
openair_SCHED_EXIT
};
......@@ -86,65 +81,6 @@ enum openair_SYNCH_STATUS {
#define DAQ_AGC_OFF 0
/*
typedef struct {
boolean_t is_eNB;
uint8_t mode;
uint8_t synch_source;
uint32_t slot_count;
uint32_t sched_cnt;
uint32_t synch_wait_cnt;
uint32_t sync_state;
uint32_t scheduler_interval_ns;
uint32_t last_adac_cnt;
uint8_t first_sync_call;
int32_t instance_cnt;
uint8_t one_shot_get_frame;
uint8_t do_synch;
uint8_t node_configured; // &1..basic config, &3..ue config &5..eNb config
uint8_t node_running;
uint8_t tx_test;
uint8_t mac_registered;
//uint8_t freq;
uint32_t freq;
uint32_t rx_gain_val;
uint32_t rx_gain_mode;
uint32_t tcxo_dac;
uint32_t auto_freq_correction;
int32_t freq_offset;
uint32_t tx_rx_switch_point;
uint32_t manual_timing_advance; /// 1 to override automatic timing advance
int32_t timing_advance;
uint32_t dual_tx; /// 1 for dual-antenna TX, 0 for single-antenna TX
uint32_t tdd; /// 1 for TDD mode, 0 for FDD mode
uint32_t rx_rf_mode;
uint32_t node_id;
uint32_t rach_detection_count;
uint32_t channel_vacant[4];
uint32_t target_ue_dl_mcs;
uint32_t target_ue_ul_mcs;
uint32_t ue_ul_nb_rb;
uint32_t ue_dl_rb_alloc;
uint32_t dlsch_rate_adaptation;
uint32_t dlsch_transmission_mode;
uint32_t ulsch_allocation_mode;
uint32_t rx_total_gain_dB;
uint32_t hw_frame;
uint32_t get_frame_done;
uint32_t use_ia_receiver;
} OPENAIR_DAQ_VARS;
*/
#ifndef USER_MODE
int32_t openair_sched_init(void);
void openair_sched_cleanup(void);
void openair_sched_exit(char *);
void openair1_restart(void);
int32_t init_dlsch_threads(void);
void cleanup_dlsch_threads(void);
#endif //USER_MODE
#ifdef OPENAIR_LTE
/** @addtogroup _PHY_PROCEDURES_
* @{
*/
......@@ -168,7 +104,7 @@ void phy_procedures_eNB_lte(uint8_t subframe,PHY_VARS_eNB **phy_vars_eNB,uint8_t
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param *phy_vars_rn pointer to RN variables
*/
void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
#ifdef Rel10
/*! \brief Top-level entry routine for relay node procedures when acting as eNB. This proc will make us of the existing eNB procs.
......@@ -187,22 +123,24 @@ int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, re
/*! \brief Scheduling for UE TX procedures in normal subframes.
@param phy_vars_ue Pointer to UE variables on which to act
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calib/normal mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
*/
void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type);
void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param last_slot Index of last slot (0-19)
@param phy_vars_ue Pointer to UE variables on which to act
@param proc Pointer to RXn_TXnp4 proc information
@param eNB_id Local id of eNB on which to act
@param abstraction_flag Indicator of PHY abstraction
@param mode calibration/debug mode
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type,PHY_VARS_RN *phy_vars_rn);
/*! \brief Scheduling for UE TX procedures in TDD S-subframes.
@param phy_vars_ue Pointer to UE variables on which to act
......@@ -385,11 +323,11 @@ uint8_t ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subfram
/*! \brief Indicates the SR TXOp in current subframe. Implements Table 10.1-5 from 36.213.
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn_TXnp4 thread context
@param eNB_id ID of eNB which is to receive the SR
@param subframe index of next subframe
@returns 1 if TXOp is active.
*/
uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
uint8_t is_SR_TXOp(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id);
/*! \brief Indicates the SR TXOp in current subframe for eNB and particular UE index. Implements Table 10.1-5 from 36.213.
@param phy_vars_eNB Pointer to eNB variables
......@@ -426,7 +364,7 @@ int32_t add_ue(int16_t rnti, PHY_VARS_eNB *phy_vars_eNB);
int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rnti);
void process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance);
void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,uint16_t timing_advance);
void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint16_t timing_advance);
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb);
......@@ -436,15 +374,15 @@ void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
subframe n-4 which is acknowledged in subframe n (for FDD) according to n1_pucch = Ncce + N1_pucch. For
TDD, this routine computes the complex procedure described in Section 10.1 of 36.213 (through tables 10.1-1,10.1-2)
@param phy_vars_ue Pointer to UE variables
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Index of eNB
@param subframe subframe on which to act
@param b Pointer to PUCCH payload (b[0],b[1])
@param SR 1 means there's a positive SR in parallel to ACK/NAK
@returns n1_pucch
*/
uint16_t get_n1_pucch(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
uint8_t subframe,
uint8_t *b,
uint8_t SR);
......@@ -497,21 +435,21 @@ UE_MODE_t get_ue_mode(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param subframe Index of subframe
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param pucch_fmt Format of PUCCH that is being transmitted
@returns Transmit power
*/
int8_t pucch_power_cntl(PHY_VARS_UE *phy_vars_ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt);
int8_t pucch_power_cntl(PHY_VARS_UE *phy_vars_ue, UE_rxtx_proc_t *proc,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt);
/*! \brief This function implements the power control mechanism for PUCCH from 36.213.
@param phy_vars_ue PHY variables
@param subframe Index of subframe
@param proc Pointer to proc descriptor
@param eNB_id Index of eNB
@param j index of type of PUSCH (SPS, Normal, Msg3)
@returns Transmit power
*/
void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,uint8_t subframe,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
int8_t get_PHR(uint8_t Mod_id, uint8_t CC_id, uint8_t eNB_index);
......@@ -543,15 +481,13 @@ int16_t get_target_pucch_rx_power(module_id_t module_idP, uint8_t CC_id);
int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,int frame, uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag);
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t subframe);
void dump_dlsch2(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint16_t coded_bits_per_codeword,int round);
/*@}*/
#endif //OPENAIR_LTE
extern int slot_irq_handler(int irq, void *cookie);
#endif
......
This source diff could not be displayed because it is too large. You can view the blob instead.
......@@ -42,7 +42,7 @@
#include "PHY/LTE_TRANSPORT/proto.h"
#include "PHY/extern.h"
int8_t pucch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt)
int8_t pucch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t subframe,uint8_t eNB_id,PUCCH_FMT_t pucch_fmt)
{
int8_t Po_PUCCH;
......@@ -98,7 +98,7 @@ int8_t pucch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FM
if (pucch_fmt!=pucch_format1) {
LOG_I(PHY,"[UE %d][PDSCH %x] frame %d, subframe %d: Po_PUCCH %d dBm : Po_NOMINAL_PUCCH %d dBm, PL %d dB, g_pucch %d dB\n",
ue->Mod_id,
ue->dlsch[eNB_id][0]->rnti,ue->frame_tx,subframe,
ue->dlsch[eNB_id][0]->rnti,proc->frame_tx,subframe,
Po_PUCCH,
ue->frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
get_PL(ue->Mod_id,ue->CC_id,eNB_id),
......@@ -106,7 +106,7 @@ int8_t pucch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,PUCCH_FM
} else {
LOG_I(PHY,"[UE %d][SR %x] frame %d, subframe %d: Po_PUCCH %d dBm : Po_NOMINAL_PUCCH %d dBm, PL %d dB g_pucch %d dB\n",
ue->Mod_id,
ue->dlsch[eNB_id][0]->rnti,ue->frame_tx,subframe,
ue->dlsch[eNB_id][0]->rnti,proc->frame_tx,subframe,
Po_PUCCH,
ue->frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
get_PL(ue->Mod_id,ue->CC_id,eNB_id),
......
......@@ -136,13 +136,13 @@ int16_t get_hundred_times_delta_IF(PHY_VARS_UE *ue,uint8_t eNB_id,uint8_t harq_p
uint8_t alpha_lut[8] = {0,40,50,60,70,80,90,100};
void pusch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag)
void pusch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag)
{
uint8_t harq_pid = subframe2harq_pid(&ue->frame_parms,
ue->frame_tx,
subframe);
proc->frame_tx,
proc->subframe_tx);
uint8_t nb_rb = ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb;
int8_t PL;
......@@ -164,7 +164,7 @@ void pusch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,uint8_t j,
ue->ulsch[eNB_id]->Po_PUSCH += (mac_xface->get_Po_NOMINAL_PUSCH(ue->Mod_id,0) + PL);
LOG_I(PHY,"[UE %d][RAPROC] frame %d, subframe %d: Msg3 Po_PUSCH %d dBm (%d,%d,100*PL=%d,%d,%d)\n",
ue->Mod_id,ue->frame_tx,subframe,ue->ulsch[eNB_id]->Po_PUSCH,
ue->Mod_id,proc->frame_tx,proc->subframe_tx,ue->ulsch[eNB_id]->Po_PUSCH,
100*mac_xface->get_Po_NOMINAL_PUSCH(ue->Mod_id,0),
hundred_times_log10_NPRB[nb_rb-1],
100*PL,
......@@ -183,7 +183,7 @@ void pusch_power_cntl(PHY_VARS_UE *ue,uint8_t subframe,uint8_t eNB_id,uint8_t j,
ue->ulsch[eNB_id]->PHR = 40;
LOG_D(PHY,"[UE %d][PUSCH %d] frame %d, subframe %d: Po_PUSCH %d dBm : tx power %d, Po_NOMINAL_PUSCH %d,log10(NPRB) %f,PHR %d, PL %d, alpha*PL %f,delta_IF %f,f_pusch %d\n",
ue->Mod_id,harq_pid,ue->frame_tx,subframe,
ue->Mod_id,harq_pid,proc->frame_tx,proc->subframe_tx,
ue->ulsch[eNB_id]->Po_PUSCH,
ue->tx_power_max_dBm,
ue->frame_parms.ul_power_control_config_common.p0_NominalPUSCH,
......
......@@ -499,7 +499,7 @@ static void *scope_thread(void *arg)
while (!oai_exit) {
if (UE_flag==1) {
len = dump_ue_stats (PHY_vars_UE_g[0][0], stats_buffer, 0, mode,rx_input_level_dBm);
len = dump_ue_stats (PHY_vars_UE_g[0][0], &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0],stats_buffer, 0, mode,rx_input_level_dBm);
//fl_set_object_label(form_stats->stats_text, stats_buffer);
fl_clear_browser(form_stats->stats_text);
fl_add_browser_line(form_stats->stats_text, stats_buffer);
......
......@@ -306,7 +306,7 @@ static void *UE_thread_synch(void *arg)
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex (UE_sync_thread)\n");
printf("starting UE synch thread (IC %d)\n",UE->instance_cnt_synch);
printf("starting UE synch thread (IC %d)\n",UE->proc.instance_cnt_synch);
ind = 0;
found = 0;
......@@ -358,34 +358,8 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
#if 0 // UHD 3.8
switch(UE->frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
break;
case 25:
openair0_cfg[card].rx_gain[i] -= 6;
break;
case 50:
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf( "Unknown number of RBs %d\n", UE->frame_parms.N_RB_DL );
break;
}
#endif
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;
printf( "UE synch: setting RX gain (%d,%d) to %f\n", card, i, openair0_cfg[card].rx_gain[i] );
#endif
}
}
......@@ -393,19 +367,19 @@ static void *UE_thread_synch(void *arg)
while (oai_exit==0) {
if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
if (pthread_mutex_lock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE initial synch thread\n" );
exit_fun("noting to add");
return &UE_thread_synch_retval;
}
while (UE->instance_cnt_synch < 0) {
while (UE->proc.instance_cnt_synch < 0) {
// the thread waits here most of the time
pthread_cond_wait( &UE->cond_synch, &UE->mutex_synch );
pthread_cond_wait( &UE->proc.cond_synch, &UE->proc.mutex_synch );
}
if (pthread_mutex_unlock(&UE->mutex_synch) != 0) {
if (pthread_mutex_unlock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][eNB] error unlocking mutex for UE Initial Synch thread\n" );
exit_fun("nothing to add");
return &UE_thread_synch_retval;
......@@ -437,36 +411,8 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz
#if 0 // UHD 3.8
switch(UE->frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
break;
case 25:
openair0_cfg[card].rx_gain[i] -= 6;
break;
case 50:
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf("Unknown number of RBs %d\n",UE->frame_parms.N_RB_DL);
break;
}
#endif
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;
printf("UE synch: setting RX gain (%d,%d) to %f\n",card,i,openair0_cfg[card].rx_gain[i]);
#endif
}
}
......@@ -537,32 +483,27 @@ static void *UE_thread_synch(void *arg)
else {
UE->is_synchronized = 1;
if( UE->mode == rx_dump_frame ){
FILE *fd;
if ((UE->frame_rx&1) == 0) { // this guarantees SIB1 is present
if ((fd = fopen("rxsig_frame0.dat","w")) != NULL) {
fwrite((void*)&UE->common_vars.rxdata[0][0],
sizeof(int32_t),
10*UE->frame_parms.samples_per_tti,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
}
else {
LOG_E(PHY,"Cannot open file for writing\n");
exit(0);
}
}
else {
UE->is_synchronized = 0;
}
}
UE->slot_rx = 0;
UE->slot_tx = 4;
if( UE->mode == rx_dump_frame ){
FILE *fd;
if ((UE->proc.proc_rxtx[0].frame_rx&1) == 0) { // this guarantees SIB1 is present
if ((fd = fopen("rxsig_frame0.dat","w")) != NULL) {
fwrite((void*)&UE->common_vars.rxdata[0][0],
sizeof(int32_t),
10*UE->frame_parms.samples_per_tti,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
}
else {
LOG_E(PHY,"Cannot open file for writing\n");
exit(0);
}
}
else {
UE->is_synchronized = 0;
}
}
}
} else {
// initial sync failed
......@@ -631,16 +572,16 @@ static void *UE_thread_synch(void *arg)
if (pthread_mutex_lock(&UE->mutex_synch) != 0) {
if (pthread_mutex_lock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE synch\n" );
exit_fun("noting to add");
return &UE_thread_synch_retval;
}
// indicate readiness
UE->instance_cnt_synch--;
UE->proc.instance_cnt_synch--;
if (pthread_mutex_unlock(&UE->mutex_synch) != 0) {
if (pthread_mutex_unlock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE synch\n" );
exit_fun("noting to add");
return &UE_thread_synch_retval;
......@@ -658,6 +599,7 @@ static void *UE_thread_synch(void *arg)
* \param arg is a pointer to a \ref PHY_VARS_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
/*
static void *UE_thread_tx(void *arg)
{
static int UE_thread_tx_retval;
......@@ -677,7 +619,7 @@ static void *UE_thread_tx(void *arg)
attr.sched_nice = 0;
attr.sched_priority = 0;
/* This creates a 1ms reservation every 10ms period*/
// This creates a 1ms reservation every 10ms period
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 900000; // each tx thread requires .5ms to finish its job
attr.sched_deadline = 1000000; // each tx thread will finish within 1ms
......@@ -695,8 +637,8 @@ static void *UE_thread_tx(void *arg)
char cpu_affinity[1024];
cpu_set_t cpuset;
/* Set affinity mask to include CPUs 1 to MAX_CPUS */
/* CPU 0 is reserved for UHD threads */
// Set affinity mask to include CPUs 1 to MAX_CPUS
// CPU 0 is reserved for UHD threads
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
......@@ -714,7 +656,7 @@ static void *UE_thread_tx(void *arg)
}
#endif
/* Check the actual affinity mask assigned to the thread */
// Check the actual affinity mask assigned to the thread
s = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0)
......@@ -836,44 +778,24 @@ static void *UE_thread_tx(void *arg)
return &UE_thread_tx_retval;
}
*/
/*!
* \brief This is the UE receive thread.
* \brief This is the UE thread for RX subframe n and TX subframe n+4.
* This thread performs the phy_procedures_UE_RX() on every received slot.
* then, if TX is enabled it performs TX for n+4.
* \param arg is a pointer to a \ref PHY_VARS_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
/*
#ifdef OAI_USRP
void rescale(int16_t *input,int length)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *input128 = (__m128i *)input;
#elif defined(__arm__)
int16x8_t *input128 = (int16x8_t *)input;
#endif
int i;
for (i=0; i<length>>2; i++) {
#if defined(__x86_64__) || defined(__i386__)
input128[i] = _mm_srai_epi16(input128[i],4);
#elif defined(__arm__)
input128[i] = vshrq_n_s16(input128[i],4);
#endif
}
}
#endif
*/
static void *UE_thread_rx(void *arg)
static void *UE_thread_rxn_txnp4(void *arg)
{
static int UE_thread_rx_retval;
PHY_VARS_UE *UE = (PHY_VARS_UE*)arg;
int i;
UE_rxtx_proc_t *proc = (UE_rxtx_proc_t *)arg;
int ret;
UE->instance_cnt_rx=-1;
PHY_VARS_UE *UE=PHY_vars_UE_g[0][proc->CC_id];
proc->instance_cnt_rxtx=-1;
#ifdef DEADLINE_SCHEDULER
......@@ -970,10 +892,10 @@ static void *UE_thread_rx(void *arg)
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
mlockall(MCL_CURRENT | MCL_FUTURE);
printf("waiting for sync (UE_thread_rx)\n");
printf("waiting for sync (UE_thread_rxn_txnp4)\n");
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (UE_thread_rx)\n");
printf("Locked sync_mutex, waiting (UE_thread_rxn_txnp4)\n");
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
......@@ -981,160 +903,76 @@ static void *UE_thread_rx(void *arg)
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex, waiting (UE_thread_rx)\n");
printf("Starting UE RX thread\n");
printf("Starting UE RXN_TXNP4 thread\n");
while (!oai_exit) {
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
if (pthread_mutex_lock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RX\n" );
exit_fun("nothing to add");
return &UE_thread_rx_retval;
}
while (UE->instance_cnt_rx < 0) {
while (proc->instance_cnt_rxtx < 0) {
// most of the time, the thread is waiting here
pthread_cond_wait( &UE->cond_rx, &UE->mutex_rx );
pthread_cond_wait( &proc->cond_rxtx, &proc->mutex_rxtx );
}
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX\n" );
if (pthread_mutex_unlock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RXn_TXnp4\n" );
exit_fun("nothing to add");
return &UE_thread_rx_retval;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_RX, 1 );
for (i=0; i<2; i++) {
if ((subframe_select( &UE->frame_parms, UE->slot_rx>>1 ) == SF_DL) ||
(UE->frame_parms.frame_type == FDD)) {
/*
#ifdef OAI_USRP
// this does the adjustments of RX signal amplitude to bring into least 12 significant bits
int slot_length = UE->frame_parms.samples_per_tti>>1;
int rx_offset = (UE->slot_rx)*slot_length + UE->rx_offset;
int frame_length = UE->frame_parms.samples_per_tti*10;
int aa;
if (rx_offset > frame_length)
rx_offset-=frame_length;
if (rx_offset >= 0) {
if (rx_offset + slot_length < frame_length)
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++)
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length);
else {
int diff = rx_offset + slot_length - frame_length;
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length-diff);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
diff);
}
}
}
else {
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][(frame_length+rx_offset)&(~0x3)],
-rx_offset);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
slot_length+rx_offset);
}
}
#endif
*/
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
if ((subframe_select( &UE->frame_parms, UE->slot_rx>>1 ) == SF_S) &&
((UE->slot_rx&1) == 0)) {
/*
#ifdef OAI_USRP
// this does the adjustments of RX signal amplitude to bring into least 12 significant bits
int slot_length = UE->frame_parms.samples_per_tti>>1;
int rx_offset = (UE->slot_rx)*slot_length + UE->rx_offset;
int frame_length = UE->frame_parms.samples_per_tti*10;
if (rx_offset > frame_length)
rx_offset-=frame_length;
int aa;
if (rx_offset >= 0) {
if (rx_offset + slot_length < frame_length)
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++)
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length);
else {
int diff = rx_offset + slot_length - frame_length;
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][rx_offset&(~0x3)],
slot_length-diff);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
diff);
}
}
}
else {
for (aa=0;aa<UE->frame_parms.nb_antennas_rx;aa++){
rescale((int16_t*)&UE->common_vars.rxdata[aa][(frame_length+rx_offset)&(~0x3)],
-rx_offset);
rescale((int16_t*)&UE->common_vars.rxdata[aa][0],
slot_length+rx_offset);
}
}
#endif
*/
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
if ((UE->mac_enabled==1) && (i==0)) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
UE->frame_tx,
UE->slot_rx>>1,
subframe_select(&UE->frame_parms,UE->slot_tx>>1),
0,
0/*FIXME CC_id*/);
if (ret == CONNECTION_LOST) {
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u RRC Connection lost, returning to PRACH\n",
UE->Mod_id, UE->frame_rx, UE->slot_tx>>1 );
UE->UE_mode[0] = PRACH;
} else if (ret == PHY_RESYNCH) {
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u RRC Connection lost, trying to resynch\n",
UE->Mod_id, UE->frame_rx, UE->slot_tx>>1 );
UE->UE_mode[0] = RESYNCH;
} else if (ret == PHY_HO_PRACH) {
LOG_I( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u, return to PRACH and perform a contention-free access\n",
UE->Mod_id, UE->frame_rx, UE->slot_tx>>1 );
UE->UE_mode[0] = PRACH;
}
}
UE->slot_rx++;
if (UE->slot_rx == 20) {
UE->slot_rx = 0;
UE->frame_rx++;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_UE, UE->frame_rx );
if ((subframe_select( &UE->frame_parms, proc->subframe_rx) == SF_DL) ||
(UE->frame_parms.frame_type == FDD) ||
(subframe_select( &UE->frame_parms, proc->subframe_rx ) == SF_S)) {
phy_procedures_UE_RX( UE, proc, 0, 0, UE->mode, no_relay, NULL );
}
if (UE->mac_enabled==1) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
proc->frame_tx,
proc->subframe_rx,
subframe_select(&UE->frame_parms,proc->subframe_tx),
0,
0/*FIXME CC_id*/);
if (ret == CONNECTION_LOST) {
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u RRC Connection lost, returning to PRACH\n",
UE->Mod_id, proc->frame_rx, proc->subframe_tx );
UE->UE_mode[0] = PRACH;
} else if (ret == PHY_RESYNCH) {
LOG_E( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u RRC Connection lost, trying to resynch\n",
UE->Mod_id, proc->frame_rx, proc->subframe_tx );
UE->UE_mode[0] = RESYNCH;
} else if (ret == PHY_HO_PRACH) {
LOG_I( PHY, "[UE %"PRIu8"] Frame %"PRIu32", subframe %u, return to PRACH and perform a contention-free access\n",
UE->Mod_id, proc->frame_rx, proc->subframe_tx );
UE->UE_mode[0] = PRACH;
}
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX_UE, UE->slot_rx>>1 );
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_RX, 0 );
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
if (pthread_mutex_lock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RX\n" );
exit_fun("noting to add");
return &UE_thread_rx_retval;
}
UE->instance_cnt_rx--;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE_INST_CNT_RX, UE->instance_cnt_rx);
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
proc->instance_cnt_rxtx--;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE_INST_CNT_RX, proc->instance_cnt_rxtx);
if (pthread_mutex_unlock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX\n" );
exit_fun("noting to add");
return &UE_thread_rx_retval;
}
}
// thread finished
return &UE_thread_rx_retval;
}
......@@ -1150,13 +988,185 @@ static void *UE_thread_rx(void *arg)
/*!
* \brief This is the main UE thread.
* This thread controls the other three UE threads:
* - UE_thread_rx
* - UE_thread_tx
* - UE_thread_rxn_txnp4 (even subframes)
* - UE_thread_rxn_txnp4 (odd subframes)
* - UE_thread_synch
* \param arg unused
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
void *UE_thread(void *arg)
void *UE_thread(void *arg) {
static int UE_thread_retval;
PHY_VARS_UE *UE = PHY_vars_UE_g[0][0];
// int tx_enabled = 0;
unsigned int rxs;
int dummy_rx[UE->frame_parms.nb_antennas_rx][UE->frame_parms.samples_per_tti];
openair0_timestamp timestamp;
void* rxp[2];
#ifdef NAS_UE
MessageDef *message_p;
#endif
int start_rx_stream = 0;
#ifdef DEADLINE_SCHEDULER
struct sched_attr attr;
unsigned int flags = 0;
attr.size = sizeof(attr);
attr.sched_flags = 0;
attr.sched_nice = 0;
attr.sched_priority = 0;//sched_get_priority_max(SCHED_DEADLINE);
// This creates a .5 ms reservation
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 100000;
attr.sched_deadline = 500000;
attr.sched_period = 500000;
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] main eNB thread: sched_setattr failed\n");
exit_fun("Nothing to add");
return &UE_thread_retval;
}
LOG_I(HW,"[SCHED][eNB] eNB main deadline thread %lu started on CPU %d\n",
(unsigned long)gettid(), sched_getcpu());
#else
struct sched_param sp;
sp.sched_priority = sched_get_priority_max(SCHED_FIFO);
pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp);
#endif
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
mlockall(MCL_CURRENT | MCL_FUTURE);
printf("waiting for sync (UE_thread)\n");
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (UE_thread)\n");
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
pthread_mutex_unlock(&sync_mutex);
printf("unlocked sync_mutex, waiting (UE_thread)\n");
printf("starting UE thread\n");
#ifdef NAS_UE
message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
itti_send_msg_to_task (TASK_NAS_UE, INSTANCE_DEFAULT, message_p);
#endif
while (!oai_exit) {
if (UE->is_synchronized == 0) {
if (pthread_mutex_lock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] verror locking mutex for UE initial synch thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
int instance_cnt_synch = UE->proc.instance_cnt_synch;
if (pthread_mutex_unlock(&UE->proc.mutex_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE initial synch thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
if (instance_cnt_synch < 0) { // we can invoke the synch
// grab 10 ms of signal and wakeup synch thread
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&rxdata[i][0];
if (UE->mode != loop_through_memory) {
rxs = openair0.trx_read_func(&openair0,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti*10,
UE->frame_parms.nb_antennas_rx);
}
instance_cnt_synch = ++UE->proc.instance_cnt_synch;
if (instance_cnt_synch == 0) {
if (pthread_cond_signal(&UE->proc.cond_synch) != 0) {
LOG_E( PHY, "[SCHED][UE] ERROR pthread_cond_signal for UE sync thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
} else {
LOG_E( PHY, "[SCHED][UE] UE sync thread busy!!\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
}
} //
else {
// grab 10 ms of signal into dummy buffer
if (UE->mode != loop_through_memory) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][0];
for (int sf=0;sf<10;sf++)
rxs = openair0.trx_read_func(&openair0,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti,
UE->frame_parms.nb_antennas_rx);
}
}
} // UE->is_synchronized==0
else {
if (start_rx_stream==0) {
start_rx_stream=1;
if (UE->mode != loop_through_memory) {
LOG_I(PHY,"Resynchronizing RX by %d samples\n",UE->rx_offset);
rxs = openair0.trx_read_func(&openair0,
&timestamp,
(void**)rxdata,
UE->rx_offset,
UE->frame_parms.nb_antennas_rx);
if (rxs != UE->rx_offset) {
exit_fun("problem in rx");
return &UE_thread_retval;
}
UE->rx_offset=0;
} //UE->mode != loop_through_memory
else
rt_sleep_ns(1000000);
// read in first symbol (to process one subframe we need symbol 0 - 14 and 1st symbol of next subframe
rxs = openair0.trx_read_func(&openair0,
&timestamp,
(void**)rxdata,
UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0,
UE->frame_parms.nb_antennas_rx);
}// start_rx_stream==0
if (UE->mode != loop_through_memory) {
for (int sf=0;sf<10;sf++)
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][sf*UE->frame_parms.samples_per_tti];
rxs = openair0.trx_read_func(&openair0,
&timestamp,
rxp,
UE->frame_parms.samples_per_tti,
UE->frame_parms.nb_antennas_rx);
}
} // UE->is_synchronized==1
} // while !oai_exit
} // UE_thread
/*
void *UE_thread_old(void *arg)
{
UNUSED(arg)
static int UE_thread_retval;
......@@ -1176,6 +1186,7 @@ void *UE_thread(void *arg)
int first_rx = 0;
RTIME T0;
unsigned int rxs;
void* rxp[2];
openair0_timestamp timestamp;
......@@ -1254,9 +1265,7 @@ void *UE_thread(void *arg)
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (dummy_dump==0) ? (void*)&rxdata[i][rxpos] : (void*)dummy[i];
/* if (dummy_dump == 0)
printf("writing %d samples to %d (first_rx %d)\n",spp - ((first_rx==1) ? rx_off_diff : 0),rxpos,first_rx);*/
if (UE->mode != loop_through_memory) {
rxs = openair0.trx_read_func(&openair0,
&timestamp,
......@@ -1342,7 +1351,7 @@ void *UE_thread(void *arg)
if (instance_cnt_rx == 0) {
LOG_D(HW,"signalling rx thread to wake up, hw_frame %d, hw_subframe %d (time %lli)\n", frame, hw_subframe, rt_get_time_ns()-T0 );
if (pthread_cond_signal(&UE->cond_rx) != 0) {
if (pthread_cond_signal(&UE->proc.cond_rx) != 0) {
LOG_E( PHY, "[SCHED][UE] ERROR pthread_cond_signal for UE RX thread\n" );
exit_fun("nothing to add");
return &UE_thread_retval;
......@@ -1538,7 +1547,7 @@ void *UE_thread(void *arg)
return &UE_thread_retval;
}
*/
/*!
* \brief Initialize the UE theads.
......@@ -1561,23 +1570,21 @@ void init_UE_threads(void)
#endif
// the threads are not yet active, therefore access is allowed without locking
UE->instance_cnt_tx = -1;
UE->instance_cnt_rx = -1;
UE->instance_cnt_synch = -1;
pthread_mutex_init(&UE->mutex_tx,NULL);
pthread_mutex_init(&UE->mutex_rx,NULL);
pthread_mutex_init(&UE->mutex_synch,NULL);
pthread_cond_init(&UE->cond_tx,NULL);
pthread_cond_init(&UE->cond_rx,NULL);
pthread_cond_init(&UE->cond_synch,NULL);
pthread_create(&UE->thread_tx,NULL,UE_thread_tx,(void*)UE);
pthread_setname_np( UE->thread_tx, "UE_thread_tx" );
pthread_create(&UE->thread_rx,NULL,UE_thread_rx,(void*)UE);
pthread_setname_np( UE->thread_rx, "UE_thread_rx" );
pthread_create(&UE->thread_synch,NULL,UE_thread_synch,(void*)UE);
pthread_setname_np( UE->thread_synch, "UE_thread_synch" );
UE->frame_tx = 0;
UE->frame_rx = 0;
UE->proc.proc_rxtx[0].instance_cnt_rxtx = -1;
UE->proc.proc_rxtx[1].instance_cnt_rxtx = -1;
UE->proc.instance_cnt_synch = -1;
pthread_mutex_init(&UE->proc.proc_rxtx[0].mutex_rxtx,NULL);
pthread_mutex_init(&UE->proc.proc_rxtx[1].mutex_rxtx,NULL);
pthread_mutex_init(&UE->proc.mutex_synch,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[0].cond_rxtx,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[1].cond_rxtx,NULL);
pthread_cond_init(&UE->proc.cond_synch,NULL);
pthread_create(&UE->proc.proc_rxtx[0].pthread_rxtx,NULL,UE_thread_rxn_txnp4,(void*)&UE->proc.proc_rxtx[0]);
pthread_setname_np( UE->proc.proc_rxtx[0].pthread_rxtx, "UE_thread_rxn_txnp4_even" );
pthread_create(&UE->proc.proc_rxtx[1].pthread_rxtx,NULL,UE_thread_rxn_txnp4,(void*)&UE->proc.proc_rxtx[1]);
pthread_setname_np( UE->proc.proc_rxtx[1].pthread_rxtx, "UE_thread_rxn_txnp4_odd" );
pthread_create(&UE->proc.pthread_synch,NULL,UE_thread_synch,(void*)UE);
pthread_setname_np( UE->proc.pthread_synch, "UE_thread_synch" );
}
......
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