Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
常顺宇
OpenXG-RAN
Commits
f4f2301c
Commit
f4f2301c
authored
4 years ago
by
lfq
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
msg4 is rcv with rfsim
parent
0cb2dbdc
Changes
12
Show whitespace changes
Inline
Side-by-side
Showing
12 changed files
with
1003 additions
and
60 deletions
+1003
-60
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
+6
-1
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+46
-2
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
+1
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+13
-0
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+53
-8
openair2/LAYER2/NR_MAC_gNB/config.c
openair2/LAYER2/NR_MAC_gNB/config.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+1
-1
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+491
-4
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+354
-36
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+6
-3
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+30
-2
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+1
-1
No files found.
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
View file @
f4f2301c
...
@@ -379,7 +379,10 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
...
@@ -379,7 +379,10 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
}
}
G
=
nr_get_G
(
nb_rb
,
nb_symb_sch
,
nb_re_dmrs
,
length_dmrs
,
mod_order
,
rel15
->
nrOfLayers
);
G
=
nr_get_G
(
nb_rb
,
nb_symb_sch
,
nb_re_dmrs
,
length_dmrs
,
mod_order
,
rel15
->
nrOfLayers
);
LOG_D
(
PHY
,
"dlsch coding A %d G %d mod_order %d
\n
"
,
A
,
G
,
mod_order
);
LOG_I
(
PHY
,
"frame %d %d dlsch coding A %d G %d mod_order %d
\n
"
,
frame
,
slot
,
A
,
G
,
mod_order
);
LOG_I
(
PHY
,
"dlsch coding nb_rb %d nb_symb_sch %d nb_re_dmrs %d, length_dmrs %d, harq_process->Nl = %d, mod %d
\n
"
,
nb_rb
,
nb_symb_sch
,
nb_re_dmrs
,
length_dmrs
,
rel15
->
nrOfLayers
,
mod_order
);
// if (dlsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
// if (dlsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
if
(
dlsch
->
harq_processes
[
harq_pid
]
->
round
==
0
)
{
// this is a new packet
if
(
dlsch
->
harq_processes
[
harq_pid
]
->
round
==
0
)
{
// this is a new packet
...
@@ -565,6 +568,8 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
...
@@ -565,6 +568,8 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
r_offset
+=
E
;
r_offset
+=
E
;
}
}
LOG_D
(
PHY
,
"dlsch coding C %d, A %d, G %d, E %d, Kb %d, F %d, Zc %d, Kr %d, BG %d
\n
"
,
dlsch
->
harq_processes
[
harq_pid
]
->
C
,
A
,
G
,
E
,
Kb
,
F
,
*
Zc
,
Kr
,
BG
);
LOG_D
(
PHY
,
"dlsch coding Kr_bytes %d, encLen %d
\n
"
,
Kr
>>
3
,
(
3
*
Kr
)
+
12
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING
,
VCD_FUNCTION_OUT
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ENCODING
,
VCD_FUNCTION_OUT
);
return
0
;
return
0
;
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
f4f2301c
...
@@ -341,6 +341,11 @@ void nr_ue_pbch_procedures(uint8_t gNB_id,
...
@@ -341,6 +341,11 @@ void nr_ue_pbch_procedures(uint8_t gNB_id,
ue
->
UE_mode
[
gNB_id
]
=
PRACH
;
ue
->
UE_mode
[
gNB_id
]
=
PRACH
;
ue
->
prach_resources
[
gNB_id
]
->
sync_frame
=
frame_rx
;
ue
->
prach_resources
[
gNB_id
]
->
sync_frame
=
frame_rx
;
ue
->
prach_resources
[
gNB_id
]
->
init_msg1
=
0
;
ue
->
prach_resources
[
gNB_id
]
->
init_msg1
=
0
;
LOG_I
(
PHY
,
"[UE %d] frame %d, nr_tti_rx %d, outofsync, return to PRACH
\n
"
,
ue
->
Mod_id
,
frame_rx
,
nr_tti_rx
);
}
}
#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_PHY_PROC
...
@@ -772,8 +777,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
...
@@ -772,8 +777,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
return
-
1
;
return
-
1
;
}
}
else
{
// This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
else
{
// This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
if
(
pdsch
==
RA_PDSCH
)
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
-
1
];
if
(
dlsch0
->
harq_processes
[
harq_pid
]
->
n_dmrs_cdm_groups
==
2
)
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
]
=
ue
->
pdsch_vars
[
ue
->
current_thread_id
[
nr_tti_rx
]][
eNB_id
]
->
llr_offset
[
m
-
1
];
else
if
(
pdsch
==
PDSCH
)
{
else
if
(
dlsch0
->
harq_processes
[
harq_pid
]
->
n_dmrs_cdm_groups
==
1
)
{
if
(
nr_rx_pdsch
(
ue
,
if
(
nr_rx_pdsch
(
ue
,
pdsch
,
pdsch
,
eNB_id
,
eNB_id
,
...
@@ -804,6 +809,45 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
...
@@ -804,6 +809,45 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
proc
->
first_symbol_available
=
1
;
proc
->
first_symbol_available
=
1
;
}
}
}
// CRNTI active
}
// CRNTI active
#if 1 // LOG_PDSCH_PARAMES
static
int
log_first_pdsch_ue
=
0
;
if
(
log_first_pdsch_ue
==
0
)
{
//log_first_pdsch_ue = 1;
LOG_I
(
MAC
,
"UE PDSCH PARAMS: frame %d %d, rnti %d, bwp (%d, %d), scs %d, codewords %d, coderate %d, mod %d, mcs (%d, %d), rv %d, dataScramId %d, layers %d, tm %d, refPoint %d
\n
"
,
proc
->
frame_rx
,
nr_tti_rx
,
dlsch0
->
rnti
,
dlsch0
->
harq_processes
[
harq_pid
]
->
BWPSize
,
dlsch0
->
harq_processes
[
harq_pid
]
->
BWPStart
,
-
1
,
//dlsch0->harq_processes[harq_pid]->SubcarrierSpacing,
-
1
,
//dlsch0->harq_processes[harq_pid]->NrOfCodewords,
dlsch0
->
harq_processes
[
harq_pid
]
->
R
,
dlsch0
->
harq_processes
[
harq_pid
]
->
Qm
,
dlsch0
->
harq_processes
[
harq_pid
]
->
mcs
,
dlsch0
->
harq_processes
[
harq_pid
]
->
mcs_table
,
dlsch0
->
harq_processes
[
harq_pid
]
->
rvidx
,
-
1
,
//dlsch0->harq_processes[harq_pid]->data_scrambling_id,
dlsch0
->
harq_processes
[
harq_pid
]
->
Nl
,
dlsch0
->
harq_processes
[
harq_pid
]
->
mimo_mode
,
-
1
//dlsch0->harq_processes[harq_pid]->refPoint
);
LOG_I
(
MAC
,
"UE PDSCH PARAMS: dlDmrsScramblingId %d, scid %d, numDmrsCdmGrpsNoData %d, dmrsPorts %d, resourceAlloc %d, rb (%d, %d), symb (%d, %d), dmrsType %d, dmrsPos %d, vrb2prb %d
\n
"
,
-
1
,
//dlsch0->harq_processes[harq_pid]->dmrs_scrambling_id[0],
-
1
,
//dlsch0->harq_processes[harq_pid]->SCID,
dlsch0
->
harq_processes
[
harq_pid
]
->
n_dmrs_cdm_groups
,
-
1
,
//dlsch0->harq_processes[harq_pid]->dmrsPorts,
-
1
,
//dlsch0->harq_processes[harq_pid]->resourceAlloc
dlsch0
->
harq_processes
[
harq_pid
]
->
start_rb
,
dlsch0
->
harq_processes
[
harq_pid
]
->
nb_rb
,
dlsch0
->
harq_processes
[
harq_pid
]
->
start_symbol
,
dlsch0
->
harq_processes
[
harq_pid
]
->
nb_symbols
,
dlsch0
->
harq_processes
[
harq_pid
]
->
dmrsConfigType
,
dlsch0
->
harq_processes
[
harq_pid
]
->
dlDmrsSymbPos
,
dlsch0
->
harq_processes
[
harq_pid
]
->
vrb_type
);
}
#endif
}
}
return
0
;
return
0
;
}
}
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
View file @
f4f2301c
...
@@ -500,7 +500,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
...
@@ -500,7 +500,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
// TbD Msg3 Retransmissions to be scheduled by DCI 0_0
// TbD Msg3 Retransmissions to be scheduled by DCI 0_0
//mac->RA_active = 0;
//mac->RA_active = 0;
mac
->
RA_window_cnt
=
-
1
;
mac
->
RA_window_cnt
=
-
1
;
mac
->
ra_state
=
RA_SUCCEEDED
;
mac
->
ra_state
=
WAIT_CONTENTION_RESOLUTION
;
mac
->
generate_nr_prach
=
2
;
mac
->
generate_nr_prach
=
2
;
LOG_I
(
MAC
,
"[MAC][UE %d][RAPROC]: RAR successfully received
\n
"
,
mod_id
);
LOG_I
(
MAC
,
"[MAC][UE %d][RAPROC]: RAR successfully received
\n
"
,
mod_id
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @
f4f2301c
...
@@ -141,6 +141,14 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
...
@@ -141,6 +141,14 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
case
NR_RNTI_CS
:
case
NR_RNTI_CS
:
break
;
break
;
case
NR_RNTI_TC
:
case
NR_RNTI_TC
:
// we use the initial DL BWP
sps
=
initialDownlinkBWP
->
genericParameters
.
cyclicPrefix
==
NULL
?
14
:
12
;
monitoringSymbolsWithinSlot
=
(
ss
->
monitoringSymbolsWithinSlot
->
buf
[
0
]
<<
(
sps
-
8
))
|
(
ss
->
monitoringSymbolsWithinSlot
->
buf
[
1
]
>>
(
16
-
sps
));
rel15
->
rnti
=
mac
->
t_crnti
;
rel15
->
BWPSize
=
NRRIV2BW
(
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
275
);
rel15
->
BWPStart
=
NRRIV2PRBOFFSET
(
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
rel15
->
SubcarrierSpacing
=
initialDownlinkBWP
->
genericParameters
.
subcarrierSpacing
;
rel15
->
dci_length_options
[
0
]
=
nr_dci_size
(
scc
,
mac
->
scg
,
def_dci_pdu_rel15
,
rel15
->
dci_format_options
[
0
],
NR_RNTI_TC
,
rel15
->
BWPSize
,
bwp_id
);
break
;
break
;
case
NR_RNTI_SP_CSI
:
case
NR_RNTI_SP_CSI
:
break
;
break
;
...
@@ -223,6 +231,10 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
...
@@ -223,6 +231,10 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
break
;
break
;
case
WAIT_CONTENTION_RESOLUTION
:
case
WAIT_CONTENTION_RESOLUTION
:
rel15
->
rnti
=
mac
->
t_crnti
;
rel15
->
rnti
=
mac
->
t_crnti
;
rel15
->
num_dci_options
=
1
;
rel15
->
dci_format_options
[
0
]
=
NR_DL_DCI_FORMAT_1_0
;
config_dci_pdu
(
mac
,
rel15
,
dl_config
,
NR_RNTI_TC
,
ss_id
);
fill_dci_search_candidates
(
ss
,
rel15
);
break
;
break
;
default:
default:
break
;
break
;
...
@@ -335,6 +347,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
...
@@ -335,6 +347,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
if(log_first == 0)
if(log_first == 0)
{
{
//log_first =1;
//log_first =1;
LOG_I(MAC, "mac->ra_state %d\n", mac->ra_state);
LOG_I(MAC, "UE PDCCH PARAMS: frame %d %d, pdus %d, rnti %d, BWPSize %d, BWPStart %d, SubcarrierSpacing %d, CCE %d %d %d %d, L %d dci_length %d / %d, dci_format %d / %d, canditats %d\n",
LOG_I(MAC, "UE PDCCH PARAMS: frame %d %d, pdus %d, rnti %d, BWPSize %d, BWPStart %d, SubcarrierSpacing %d, CCE %d %d %d %d, L %d dci_length %d / %d, dci_format %d / %d, canditats %d\n",
frame,
frame,
slot,dl_config->number_pdus,
slot,dl_config->number_pdus,
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
f4f2301c
...
@@ -2442,7 +2442,7 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
...
@@ -2442,7 +2442,7 @@ int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_in
NR_UE_MAC_INST_t
*
mac
=
get_mac_inst
(
module_id
);
NR_UE_MAC_INST_t
*
mac
=
get_mac_inst
(
module_id
);
LOG_
D
(
MAC
,
"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)
\n
"
,
LOG_
I
(
MAC
,
"Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)
\n
"
,
dci
->
rnti
,
dci
->
dci_format
,
dci
->
n_CCE
,
dci
->
payloadSize
,
*
(
unsigned
long
long
*
)
dci
->
payloadBits
);
dci
->
rnti
,
dci
->
dci_format
,
dci
->
n_CCE
,
dci
->
payloadSize
,
*
(
unsigned
long
long
*
)
dci
->
payloadBits
);
int
dci_format
=
nr_extract_dci_info
(
mac
,
dci
->
dci_format
,
dci
->
payloadSize
,
dci
->
rnti
,(
uint64_t
*
)
dci
->
payloadBits
,
def_dci_pdu_rel15
);
int
dci_format
=
nr_extract_dci_info
(
mac
,
dci
->
dci_format
,
dci
->
payloadSize
,
dci
->
rnti
,(
uint64_t
*
)
dci
->
payloadBits
,
def_dci_pdu_rel15
);
...
@@ -2461,7 +2461,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
...
@@ -2461,7 +2461,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
AssertFatal
(
mac
->
DLbwp
[
0
]
!=
NULL
,
"DLbwp[0] should not be zero here!
\n
"
);
AssertFatal
(
mac
->
DLbwp
[
0
]
!=
NULL
,
"DLbwp[0] should not be zero here!
\n
"
);
AssertFatal
(
mac
->
ULbwp
[
0
]
!=
NULL
,
"DLbwp[0] should not be zero here!
\n
"
);
AssertFatal
(
mac
->
ULbwp
[
0
]
!=
NULL
,
"DLbwp[0] should not be zero here!
\n
"
);
const
uint16_t
n_RB_DLBWP
=
(
mac
->
ra_state
==
WAIT_RAR
)
?
NRRIV2BW
(
mac
->
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
275
)
:
NRRIV2BW
(
mac
->
DLbwp
[
0
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
const
uint16_t
n_RB_DLBWP
=
(
(
mac
->
ra_state
==
WAIT_RAR
)
||
(
mac
->
ra_state
==
WAIT_CONTENTION_RESOLUTION
)
)
?
NRRIV2BW
(
mac
->
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
275
)
:
NRRIV2BW
(
mac
->
DLbwp
[
0
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
const
uint16_t
n_RB_ULBWP
=
NRRIV2BW
(
mac
->
ULbwp
[
0
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
const
uint16_t
n_RB_ULBWP
=
NRRIV2BW
(
mac
->
ULbwp
[
0
]
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
LOG_D
(
MAC
,
"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)
\n
"
,
dci_format
,
n_RB_DLBWP
,
n_RB_ULBWP
);
LOG_D
(
MAC
,
"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)
\n
"
,
dci_format
,
n_RB_DLBWP
,
n_RB_ULBWP
);
...
@@ -3305,11 +3305,12 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
...
@@ -3305,11 +3305,12 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int
rnti_type
=-
1
;
int
rnti_type
=-
1
;
if
(
rnti
==
mac
->
ra_rnti
)
rnti_type
=
NR_RNTI_RA
;
if
(
rnti
==
mac
->
ra_rnti
)
rnti_type
=
NR_RNTI_RA
;
else
if
(
rnti
==
mac
->
crnti
)
rnti_type
=
NR_RNTI_C
;
else
if
(
rnti
==
mac
->
t_crnti
)
rnti_type
=
NR_RNTI_TC
;
else
if
(
rnti
==
mac
->
t_crnti
)
rnti_type
=
NR_RNTI_TC
;
else
if
(
rnti
==
mac
->
crnti
)
rnti_type
=
NR_RNTI_C
;
else
if
(
rnti
==
0xFFFE
)
rnti_type
=
NR_RNTI_P
;
else
if
(
rnti
==
0xFFFE
)
rnti_type
=
NR_RNTI_P
;
else
if
(
rnti
==
0xFFFF
)
rnti_type
=
NR_RNTI_SI
;
else
if
(
rnti
==
0xFFFF
)
rnti_type
=
NR_RNTI_SI
;
AssertFatal
(
rnti_type
!=-
1
,
"no identified/handled rnti
\n
"
);
AssertFatal
(
rnti_type
!=-
1
,
"no identified/handled rnti
\n
"
);
AssertFatal
(
mac
->
DLbwp
[
0
]
!=
NULL
,
"DLbwp[0] shouldn't be null here!
\n
"
);
AssertFatal
(
mac
->
DLbwp
[
0
]
!=
NULL
,
"DLbwp[0] shouldn't be null here!
\n
"
);
AssertFatal
(
mac
->
ULbwp
[
0
]
!=
NULL
,
"ULbwp[0] shouldn't be null here!
\n
"
);
AssertFatal
(
mac
->
ULbwp
[
0
]
!=
NULL
,
"ULbwp[0] shouldn't be null here!
\n
"
);
...
@@ -3321,7 +3322,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
...
@@ -3321,7 +3322,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int
pos
=
0
;
int
pos
=
0
;
int
fsize
=
0
;
int
fsize
=
0
;
if
(
rnti_type
==
NR_RNTI_C
)
{
if
(
(
rnti_type
==
NR_RNTI_C
)
||
(
rnti_type
==
NR_RNTI_TC
))
{
// First find out the DCI format from the first bit (UE performed blind decoding)
// First find out the DCI format from the first bit (UE performed blind decoding)
pos
++
;
pos
++
;
dci_pdu_rel15
->
format_indicator
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
dci_pdu_rel15
->
format_indicator
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
...
@@ -3344,7 +3345,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
...
@@ -3344,7 +3345,7 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
}
}
}
}
#ifdef DEBUG_EXTRACT_DCI
#ifdef DEBUG_EXTRACT_DCI
LOG_
D
(
MAC
,
"DCI format is %d
\n
"
,
dci_format
);
LOG_
I
(
MAC
,
"DCI format is %d, type %d, rnti %d, rnti_c %d, rnti_tc %d
\n
"
,
dci_format
,
rnti_type
,
rnti
,
mac
->
crnti
,
mac
->
t_crnti
);
#endif
#endif
switch
(
dci_format
)
{
switch
(
dci_format
)
{
...
@@ -3547,38 +3548,82 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
...
@@ -3547,38 +3548,82 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
break
;
break
;
case
NR_RNTI_TC
:
case
NR_RNTI_TC
:
// indicating a DL DCI format 1bit
pos
++
;
dci_pdu_rel15
->
format_indicator
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
// Freq domain assignment 0-16 bit
// Freq domain assignment 0-16 bit
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
pos
+=
fsize
;
pos
+=
fsize
;
dci_pdu_rel15
->
frequency_domain_assignment
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
((
1
<<
fsize
)
-
1
);
dci_pdu_rel15
->
frequency_domain_assignment
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
((
1
<<
fsize
)
-
1
);
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"Freq domain assignment %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
frequency_domain_assignment
.
val
,
fsize
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// Time domain assignment 4 bit
// Time domain assignment 4 bit
pos
+=
4
;
pos
+=
4
;
dci_pdu_rel15
->
time_domain_assignment
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
0xf
;
dci_pdu_rel15
->
time_domain_assignment
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
0xf
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"Time domain assignment %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
time_domain_assignment
.
val
,
4
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
pos
+=
1
;
// VRB to PRB mapping 1 bit
// VRB to PRB mapping 1 bit
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"VRB to PRB %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
,
1
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// MCS 5bit //bit over 32, so dci_pdu ++
// MCS 5bit //bit over 32, so dci_pdu ++
pos
+=
5
;
pos
+=
5
;
dci_pdu_rel15
->
mcs
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
0x1f
;
dci_pdu_rel15
->
mcs
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
0x1f
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"MCS %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
mcs
,
5
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// New data indicator 1bit
// New data indicator 1bit
pos
+=
1
;
dci_pdu_rel15
->
ndi
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
dci_pdu_rel15
->
ndi
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
1
;
// Redundancy version 2bit
// Redundancy version 2bit
#ifdef DEBUG_EXTRACT_DCI
LOG_D
(
MAC
,
"NDI %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
ndi
,
1
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
pos
+=
2
;
pos
+=
2
;
dci_pdu_rel15
->
rv
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
3
;
dci_pdu_rel15
->
rv
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
3
;
// HARQ process number 4bit
// HARQ process number 4bit
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"RV %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
rv
,
2
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
pos
+=
4
;
pos
+=
4
;
dci_pdu_rel15
->
harq_pid
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
0xf
;
dci_pdu_rel15
->
harq_pid
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
0xf
;
#ifdef DEBUG_EXTRACT_DCI
LOG_D
(
MAC
,
"HARQ_PID %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
harq_pid
,
4
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// Downlink assignment index E2 bits
// Downlink assignment index E2 bits
pos
+=
2
;
pos
+=
2
;
dci_pdu_rel15
->
dai
[
0
].
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
3
;
dci_pdu_rel15
->
dai
[
0
].
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
3
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"DAI %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
dai
[
0
].
val
,
2
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// TPC command for scheduled PUCCH E2 bits
// TPC command for scheduled PUCCH E2 bits
pos
+=
2
;
pos
+=
2
;
dci_pdu_rel15
->
tpc
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
3
;
dci_pdu_rel15
->
tpc
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
3
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"TPC %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
tpc
,
2
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// PDSCH-to-HARQ_feedback timing indicator E3 bits
pos
+=
3
;
dci_pdu_rel15
->
pucch_resource_indicator
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
7
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"PUCCH RESOURCE INDICATOR %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
pucch_resource_indicator
,
3
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
// PDSCH-to-HARQ_feedback timing indicator E3 bits
// PDSCH-to-HARQ_feedback timing indicator E3 bits
pos
+=
3
;
pos
+=
3
;
dci_pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
7
;
dci_pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
.
val
=
(
*
dci_pdu
>>
(
dci_size
-
pos
))
&
7
;
#ifdef DEBUG_EXTRACT_DCI
LOG_I
(
MAC
,
"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
.
val
,
3
,
dci_size
-
pos
,
*
dci_pdu
);
#endif
break
;
break
;
}
}
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/config.c
View file @
f4f2301c
...
@@ -366,7 +366,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
...
@@ -366,7 +366,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
Mod_idP
]
->
UE_info
;
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
Mod_idP
]
->
UE_info
;
if
(
add_ue
==
1
&&
get_softmodem_params
()
->
phy_test
)
{
if
(
add_ue
==
1
&&
get_softmodem_params
()
->
phy_test
)
{
const
int
UE_id
=
add_new_nr_ue
(
Mod_idP
,
rnti
);
const
int
UE_id
=
add_new_nr_ue
(
Mod_idP
,
rnti
,
1
);
UE_info
->
secondaryCellGroup
[
UE_id
]
=
secondaryCellGroup
;
UE_info
->
secondaryCellGroup
[
UE_id
]
=
secondaryCellGroup
;
compute_csi_bitlen
(
secondaryCellGroup
,
UE_info
,
UE_id
);
compute_csi_bitlen
(
secondaryCellGroup
,
UE_info
,
UE_id
);
struct
NR_ServingCellConfig__downlinkBWP_ToAddModList
*
bwpList
=
struct
NR_ServingCellConfig__downlinkBWP_ToAddModList
*
bwpList
=
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
f4f2301c
...
@@ -466,7 +466,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -466,7 +466,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// Otherwise already consider 5G already connected
// Otherwise already consider 5G already connected
RC
.
nrmac
[
module_idP
]
->
current_slot
=
slot
;
RC
.
nrmac
[
module_idP
]
->
current_slot
=
slot
;
if
(
get_softmodem_params
()
->
phy_test
==
0
)
{
if
(
get_softmodem_params
()
->
phy_test
==
0
)
{
nr_schedule_RA
(
module_idP
,
frame
,
slot
);
nr_schedule_RA
(
module_idP
,
frame
,
slot
,
num_slots_per_tdd
);
nr_schedule_reception_msg3
(
module_idP
,
0
,
frame
,
slot
);
nr_schedule_reception_msg3
(
module_idP
,
0
,
frame
,
slot
);
}
}
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
f4f2301c
...
@@ -517,7 +517,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
...
@@ -517,7 +517,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC
,
0
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC
,
0
);
}
}
void
nr_schedule_RA
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
){
void
nr_schedule_RA
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
,
int
num_slots_per_tdd
){
//uint8_t i = 0;
//uint8_t i = 0;
int
CC_id
=
0
;
int
CC_id
=
0
;
...
@@ -531,17 +531,19 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
...
@@ -531,17 +531,19 @@ void nr_schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
// NR_RA_t *ra = &cc->ra[i];
// NR_RA_t *ra = &cc->ra[i];
NR_RA_t
*
ra
=
&
cc
->
ra
[
0
];
NR_RA_t
*
ra
=
&
cc
->
ra
[
0
];
if
(
ra
->
state
!=
IDLE
)
LOG_D
(
MAC
,
"RA[state:%d]
\n
"
,
ra
->
state
);
LOG_I
(
MAC
,
"RA[state:%d], frame %d %d
\n
"
,
ra
->
state
,
frameP
,
slotP
);
switch
(
ra
->
state
){
switch
(
ra
->
state
){
case
Msg2
:
case
Msg2
:
nr_generate_Msg2
(
module_idP
,
CC_id
,
frameP
,
slotP
);
nr_generate_Msg2
(
module_idP
,
CC_id
,
frameP
,
slotP
);
break
;
break
;
case
Msg4
:
case
Msg4
:
//generate_Msg4(module_idP, CC_id, frameP, slotP);
if
(
ra
->
Msg4_frame
==
frameP
&&
ra
->
Msg4_slot
==
slotP
)
nr_generate_Msg4
(
module_idP
,
CC_id
,
frameP
,
slotP
,
num_slots_per_tdd
,
ra
);
break
;
break
;
case
WAIT_Msg4_ACK
:
case
WAIT_Msg4_ACK
:
//check_Msg4_retransmission(module_idP, CC_id, frameP, slotP);
//check_Msg4_retransmission(module_idP, CC_id, frameP, slotP);
nr_check_Msg4_Ack
(
module_idP
,
CC_id
,
frameP
,
slotP
,
ra
);
break
;
break
;
default:
default:
break
;
break
;
...
@@ -967,6 +969,41 @@ void nr_generate_Msg2(module_id_t module_idP,
...
@@ -967,6 +969,41 @@ void nr_generate_Msg2(module_id_t module_idP,
vrb_map
[
rb
+
pdsch_pdu_rel15
->
rbStart
]
=
1
;
vrb_map
[
rb
+
pdsch_pdu_rel15
->
rbStart
]
=
1
;
#if 1 // LOG_PDCCH_PARAMES
static
int
log_first
=
0
;
if
(
log_first
==
0
)
{
//log_first =1;
LOG_I
(
MAC
,
"NB PDCCH PARAMS: rnti %d, BWPSize %d, BWPStart %d, SubcarrierSpacing %d, CCE %d, L %d dci_length %d dci_format %d dci index %d
\n
"
,
pdcch_pdu_rel15
->
dci_pdu
.
RNTI
[
0
],
pdcch_pdu_rel15
->
BWPSize
,
pdcch_pdu_rel15
->
BWPStart
,
pdcch_pdu_rel15
->
SubcarrierSpacing
,
pdcch_pdu_rel15
->
dci_pdu
.
CceIndex
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
pdcch_pdu_rel15
->
dci_pdu
.
AggregationLevel
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
pdcch_pdu_rel15
->
dci_pdu
.
PayloadSizeBits
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
dci_formats
[
0
],
pdcch_pdu_rel15
->
numDlDci
-
1
);
LOG_I
(
MAC
,
"NB PDCCH PARAMS: coreset:frequency_domain_resource %d %d %d %d %d %d
\n
"
,
pdcch_pdu_rel15
->
FreqDomainResource
[
0
],
pdcch_pdu_rel15
->
FreqDomainResource
[
1
],
pdcch_pdu_rel15
->
FreqDomainResource
[
2
],
pdcch_pdu_rel15
->
FreqDomainResource
[
3
],
pdcch_pdu_rel15
->
FreqDomainResource
[
4
],
pdcch_pdu_rel15
->
FreqDomainResource
[
5
]);
LOG_I
(
MAC
,
"NB PDCCH PARAMS: coreset:StartSymbolIndex %d duration %d CceRegMappingType %d RegBundleSize %d InterleaverSize %d ShiftIndex %d CoreSetType %d precoder_granularity %d, pdcch_dmrs_scrambling_id %d,scrambling_rnti %d
\n
"
,
pdcch_pdu_rel15
->
StartSymbolIndex
,
pdcch_pdu_rel15
->
DurationSymbols
,
pdcch_pdu_rel15
->
CceRegMappingType
,
pdcch_pdu_rel15
->
RegBundleSize
,
pdcch_pdu_rel15
->
InterleaverSize
,
pdcch_pdu_rel15
->
ShiftIndex
,
pdcch_pdu_rel15
->
CoreSetType
,
pdcch_pdu_rel15
->
precoderGranularity
,
pdcch_pdu_rel15
->
dci_pdu
.
ScramblingId
[
0
],
pdcch_pdu_rel15
->
dci_pdu
.
ScramblingRNTI
[
0
]);
}
#endif
#if 1 // LOG_PDSCH_PARAMES
#if 1 // LOG_PDSCH_PARAMES
static
int
log_first_pdsch_ra
=
0
;
static
int
log_first_pdsch_ra
=
0
;
if
(
log_first_pdsch_ra
==
0
)
if
(
log_first_pdsch_ra
==
0
)
...
@@ -1006,15 +1043,465 @@ void nr_generate_Msg2(module_id_t module_idP,
...
@@ -1006,15 +1043,465 @@ void nr_generate_Msg2(module_id_t module_idP,
#endif
#endif
}
}
}
void
nr_simple_dlsch_preprocessor_msg4
(
module_id_t
module_id
,
frame_t
frame
,
sub_frame_t
slot
,
int
num_slots_per_tdd
,
NR_RA_t
*
ra
,
int
UE_id
)
{
const
int
CC_id
=
0
;
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
module_id
];
NR_COMMON_channels_t
*
cc
=
&
nr_mac
->
common_channels
[
CC_id
];
NR_SearchSpace_t
*
ss
=
ra
->
ra_ss
;
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
module_id
]
->
UE_info
;
int16_t
rrc_sdu_length
=
0
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
sched_ctrl
->
rbSize
=
0
;
/* Retrieve amount of data to send for this UE */
sched_ctrl
->
num_total_bytes
=
0
;
/*
rrc_sdu_length = mac_rrc_data_req(module_idP, CC_idP, frameP, CCCH,
UE_RNTI(module_idP,UE_id),1, // 1 transport block
&cc[CC_idP].CCCH_pdu.payload[0], 0); // not used in this case
*/
rrc_sdu_length
=
500
;
sched_ctrl
->
num_total_bytes
+=
rrc_sdu_length
;
if
(
sched_ctrl
->
num_total_bytes
==
0
)
return
;
LOG_D
(
MAC
,
"[gNB %d][RAPROC] CC_id %d Frame %d, slot %d: UE_id %d, rrc_sdu_length %d
\n
"
,
module_id
,
CC_id
,
frame
,
slot
,
UE_id
,
rrc_sdu_length
);
/* Find a free CCE */
sched_ctrl
->
search_space
=
ra
->
ra_ss
;
uint8_t
nr_of_candidates
;
find_aggregation_candidates
(
&
sched_ctrl
->
aggregation_level
,
&
nr_of_candidates
,
sched_ctrl
->
search_space
);
sched_ctrl
->
coreset
=
get_coreset
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
search_space
,
0
/* common */
);
int
cid
=
sched_ctrl
->
coreset
->
controlResourceSetId
;
sched_ctrl
->
cce_index
=
allocate_nr_CCEs
(
RC
.
nrmac
[
module_id
],
sched_ctrl
->
active_bwp
,
sched_ctrl
->
coreset
,
sched_ctrl
->
aggregation_level
,
0
,
0
,
nr_of_candidates
);
if
(
sched_ctrl
->
cce_index
<
0
)
{
LOG_E
(
MAC
,
"%s(): could not find CCE for UE %d
\n
"
,
__func__
,
UE_id
);
return
;
}
UE_info
->
num_pdcch_cand
[
UE_id
][
cid
]
++
;
/* Find PUCCH occasion */
nr_acknack_scheduling
(
module_id
,
UE_id
,
frame
,
slot
,
num_slots_per_tdd
,
&
sched_ctrl
->
pucch_sched_idx
,
&
sched_ctrl
->
pucch_occ_idx
);
AssertFatal
(
sched_ctrl
->
pucch_sched_idx
>=
0
,
"no uplink slot for PUCCH found!
\n
"
);
uint8_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
sched_ctrl
->
current_harq_pid
=
slot
%
num_slots_per_tdd
;
const
int
current_harq_pid
=
sched_ctrl
->
current_harq_pid
;
NR_UE_harq_t
*
harq
=
&
sched_ctrl
->
harq_processes
[
current_harq_pid
];
NR_UE_ret_info_t
*
retInfo
=
&
sched_ctrl
->
retInfo
[
current_harq_pid
];
const
uint16_t
bwpSize
=
NRRIV2BW
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
int
rbStart
=
NRRIV2PRBOFFSET
(
sched_ctrl
->
active_bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
if
(
harq
->
round
!=
0
)
{
/* retransmission */
sched_ctrl
->
time_domain_allocation
=
retInfo
->
time_domain_allocation
;
/* ensure that there is a free place for RB allocation */
int
rbSize
=
0
;
while
(
rbSize
<
retInfo
->
rbSize
)
{
rbStart
+=
rbSize
;
/* last iteration rbSize was not enough, skip it */
rbSize
=
0
;
while
(
rbStart
<
bwpSize
&&
vrb_map
[
rbStart
])
rbStart
++
;
if
(
rbStart
>=
bwpSize
)
{
LOG_E
(
MAC
,
"cannot allocate retransmission for UE %d/RNTI %04x: no resources
\n
"
,
UE_id
,
ra
->
rnti
);
return
;
}
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map
[
rbStart
+
rbSize
]
&&
rbSize
<
retInfo
->
rbSize
)
rbSize
++
;
}
sched_ctrl
->
rbSize
=
retInfo
->
rbSize
;
sched_ctrl
->
rbStart
=
rbStart
;
/* MCS etc: just reuse from previous scheduling opportunity */
sched_ctrl
->
mcsTableIdx
=
retInfo
->
mcsTableIdx
;
sched_ctrl
->
mcs
=
retInfo
->
mcs
;
sched_ctrl
->
numDmrsCdmGrpsNoData
=
retInfo
->
numDmrsCdmGrpsNoData
;
}
else
{
// Time-domain allocation
sched_ctrl
->
time_domain_allocation
=
2
;
// modulation scheme
sched_ctrl
->
mcsTableIdx
=
0
;
sched_ctrl
->
mcs
=
9
;
sched_ctrl
->
numDmrsCdmGrpsNoData
=
2
;
// Freq-demain allocation
while
(
rbStart
<
bwpSize
&&
vrb_map
[
rbStart
])
rbStart
++
;
uint8_t
N_PRB_DMRS
=
getN_PRB_DMRS
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
numDmrsCdmGrpsNoData
);
int
nrOfSymbols
=
getNrOfSymbols
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
time_domain_allocation
);
int
rbSize
=
0
;
uint32_t
TBS
=
0
;
do
{
rbSize
++
;
TBS
=
nr_compute_tbs
(
nr_get_Qm_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
nr_get_code_rate_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
rbSize
,
nrOfSymbols
,
N_PRB_DMRS
,
// FIXME // This should be multiplied by the
// number of dmrs symbols
0
/* N_PRB_oh, 0 for initialBWP */
,
0
/* tb_scaling */
,
1
/* nrOfLayers */
)
>>
3
;
}
while
(
rbStart
+
rbSize
<
bwpSize
&&
!
vrb_map
[
rbStart
+
rbSize
]
&&
TBS
<
sched_ctrl
->
num_total_bytes
);
sched_ctrl
->
rbSize
=
rbSize
;
sched_ctrl
->
rbStart
=
rbStart
;
}
/* mark the corresponding RBs as used */
for
(
int
rb
=
0
;
rb
<
sched_ctrl
->
rbSize
;
rb
++
)
vrb_map
[
rb
+
sched_ctrl
->
rbStart
]
=
1
;
}
void
nr_get_retransmission_timing
(
frame_t
*
frameP
,
sub_frame_t
*
subframeP
)
//------------------------------------------------------------------------------
{
*
frameP
=
(
*
frameP
+
1
)
%
1024
;
*
subframeP
=
*
subframeP
;
return
;
}
}
void
nr_generate_Msg4
(
module_id_t
module_id
,
int
CC_id
,
frame_t
frame
,
sub_frame_t
slot
,
int
num_slots_per_tdd
,
NR_RA_t
*
ra
)
{
/* PREPROCESSOR */
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
module_id
]
->
UE_info
;
//NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int16_t
rrc_sdu_length
=
0
;
uint16_t
msg4_padding
=
0
;
uint16_t
msg4_post_padding
=
0
;
uint16_t
msg4_header
=
0
;
int
UE_id
=
find_nr_UE_id_msg4
(
module_id
,
ra
->
rnti
);
if
(
UE_id
<
0
)
{
LOG_E
(
MAC
,
"Can't find UE for t-crnti %x, kill RA procedure for this UE
\n
"
,
ra
->
rnti
);
nr_clear_ra_proc
(
module_id
,
CC_id
,
frame
);
return
;
}
if
(
ra
->
coreset0_configured
==
1
)
{
AssertFatal
(
1
==
0
,
"This is a standalone condition
\n
"
);
}
else
{
// on configured BWP or initial LDBWP, bandwidth parameters in DCI correspond size of initialBWP
}
nr_simple_dlsch_preprocessor_msg4
(
module_id
,
frame
,
slot
,
num_slots_per_tdd
,
ra
,
UE_id
);
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
module_id
];
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
if
(
sched_ctrl
->
rbSize
<=
0
)
{
// do nothing
//continue;
}
/* POST processing */
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
sched_ctrl
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
;
AssertFatal
(
sched_ctrl
->
time_domain_allocation
<
tdaList
->
list
.
count
,
"time_domain_allocation %d>=%d
\n
"
,
sched_ctrl
->
time_domain_allocation
,
tdaList
->
list
.
count
);
const
int
startSymbolAndLength
=
tdaList
->
list
.
array
[
sched_ctrl
->
time_domain_allocation
]
->
startSymbolAndLength
;
int
startSymbolIndex
,
nrOfSymbols
;
SLIV2SL
(
startSymbolAndLength
,
&
startSymbolIndex
,
&
nrOfSymbols
);
uint8_t
N_PRB_DMRS
=
getN_PRB_DMRS
(
sched_ctrl
->
active_bwp
,
sched_ctrl
->
numDmrsCdmGrpsNoData
);
const
uint32_t
TBS
=
nr_compute_tbs
(
nr_get_Qm_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
nr_get_code_rate_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
sched_ctrl
->
rbSize
,
nrOfSymbols
,
N_PRB_DMRS
,
// FIXME // This should be multiplied by the
// number of dmrs symbols
0
/* N_PRB_oh, 0 for initialBWP */
,
0
/* tb_scaling */
,
1
/* nrOfLayers */
)
>>
3
;
const
int
current_harq_pid
=
sched_ctrl
->
current_harq_pid
;
NR_UE_harq_t
*
harq
=
&
sched_ctrl
->
harq_processes
[
current_harq_pid
];
NR_sched_pucch
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
sched_ctrl
->
pucch_sched_idx
][
sched_ctrl
->
pucch_occ_idx
];
harq
->
feedback_slot
=
pucch
->
ul_slot
;
harq
->
is_waiting
=
1
;
UE_info
->
mac_stats
[
UE_id
].
dlsch_rounds
[
harq
->
round
]
++
;
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
gNB_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
nr_fill_nfapi_dl_pdu_common
(
module_id
,
UE_id
,
sched_ctrl
->
active_bwp
->
bwp_Id
,
sched_ctrl
->
search_space
,
sched_ctrl
->
coreset
,
dl_req
,
pucch
,
1
/* nrOfLayers */
,
sched_ctrl
->
mcs
,
sched_ctrl
->
rbSize
,
sched_ctrl
->
rbStart
,
sched_ctrl
->
numDmrsCdmGrpsNoData
,
getDmrsConfigType
(
sched_ctrl
->
active_bwp
),
sched_ctrl
->
mcsTableIdx
,
nr_get_code_rate_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
nr_get_Qm_dl
(
sched_ctrl
->
mcs
,
sched_ctrl
->
mcsTableIdx
),
TBS
,
sched_ctrl
->
time_domain_allocation
,
startSymbolIndex
,
nrOfSymbols
,
sched_ctrl
->
aggregation_level
,
sched_ctrl
->
cce_index
,
current_harq_pid
,
harq
->
ndi
,
harq
->
round
);
NR_UE_ret_info_t
*
retInfo
=
&
sched_ctrl
->
retInfo
[
current_harq_pid
];
if
(
harq
->
round
!=
0
)
{
/* retransmission */
if
(
sched_ctrl
->
rbSize
!=
retInfo
->
rbSize
)
LOG_W
(
MAC
,
"retransmission uses different rbSize (%d vs. orig %d)
\n
"
,
sched_ctrl
->
rbSize
,
retInfo
->
rbSize
);
if
(
sched_ctrl
->
time_domain_allocation
!=
retInfo
->
time_domain_allocation
)
LOG_W
(
MAC
,
"retransmission uses different time_domain_allocation (%d vs. orig %d)
\n
"
,
sched_ctrl
->
time_domain_allocation
,
retInfo
->
time_domain_allocation
);
if
(
sched_ctrl
->
mcs
!=
retInfo
->
mcs
||
sched_ctrl
->
mcsTableIdx
!=
retInfo
->
mcsTableIdx
||
sched_ctrl
->
numDmrsCdmGrpsNoData
!=
retInfo
->
numDmrsCdmGrpsNoData
)
LOG_W
(
MAC
,
"retransmission uses different table/MCS/numDmrsCdmGrpsNoData (%d/%d/%d vs. orig %d/%d/%d)
\n
"
,
sched_ctrl
->
mcsTableIdx
,
sched_ctrl
->
mcs
,
sched_ctrl
->
numDmrsCdmGrpsNoData
,
retInfo
->
mcsTableIdx
,
retInfo
->
mcs
,
retInfo
->
numDmrsCdmGrpsNoData
);
/* we do not have to do anything, since we do not require to get data
* from RLC, encode MAC CEs, or copy data to FAPI structures */
LOG_W
(
MAC
,
"%d.%2d retransmission UE %d/RNTI %04x
\n
"
,
frame
,
slot
,
UE_id
,
ra
->
rnti
);
}
else
{
/* initial transmission */
/* reserve space for timing advance of UE if necessary,
* nr_generate_dlsch_pdu() checks for ta_apply and add TA CE if necessary */
const
int
ta_len
=
(
sched_ctrl
->
ta_apply
)
?
2
:
0
;
/* Get RLC data TODO: remove random data retrieval */
int
header_length_total
=
0
;
int
header_length_last
=
0
;
int
sdu_length_total
=
0
;
int
num_sdus
=
0
;
uint16_t
sdu_lengths
[
NB_RB_MAX
]
=
{
0
};
uint8_t
mac_sdus
[
MAX_NR_DLSCH_PAYLOAD_BYTES
];
unsigned
char
sdu_lcids
[
NB_RB_MAX
]
=
{
0
};
const
int
lcid
=
DL_SCH_LCID_DTCH
;
if
(
sched_ctrl
->
num_total_bytes
>
0
)
{
LOG_I
(
MAC
,
"[gNB %d][USER-PLANE DEFAULT DRB] Frame %d : DTCH->DLSCH, Requesting "
"%d bytes from RLC (lcid %d total hdr len %d), TBS: %d
\n
\n
"
,
module_id
,
frame
,
TBS
-
ta_len
-
header_length_total
-
sdu_length_total
-
3
,
lcid
,
header_length_total
,
TBS
);
#if 0
sdu_lengths[num_sdus] = mac_rrc_data_req(module_id, CC_idP, frameP, CCCH,
UE_RNTI(module_idP,UE_id),1, // 1 transport block
&cc[CC_idP].CCCH_pdu.payload[0], 1);
LOG_D(MAC,
"[gNB %d][USER-PLANE DEFAULT DRB] Got %d bytes for DTCH %d \n",
module_id,
sdu_lengths[num_sdus],
lcid);
sdu_lcids[num_sdus] = lcid;
sdu_length_total += sdu_lengths[num_sdus];
header_length_last = 1 + 1 + (sdu_lengths[num_sdus] >= 128);
header_length_total += header_length_last;
num_sdus++;
#else
LOG_I
(
MAC
,
"Configuring DL_TX in %d.%d: random data
\n
"
,
frame
,
slot
);
// fill dlsch_buffer with random data
for
(
int
i
=
0
;
i
<
TBS
;
i
++
)
mac_sdus
[
i
]
=
(
unsigned
char
)
(
lrand48
()
&
0xff
);
sdu_lcids
[
0
]
=
0x3f
;
// DRB
sdu_lengths
[
0
]
=
TBS
-
ta_len
-
3
;
header_length_total
+=
2
+
(
sdu_lengths
[
0
]
>=
128
);
sdu_length_total
+=
sdu_lengths
[
0
];
num_sdus
+=
1
;
#endif
//ue_sched_ctl->uplane_inactivity_timer = 0;
}
else
if
(
get_softmodem_params
()
->
phy_test
)
{
LOG_D
(
MAC
,
"Configuring DL_TX in %d.%d: random data
\n
"
,
frame
,
slot
);
// fill dlsch_buffer with random data
for
(
int
i
=
0
;
i
<
TBS
;
i
++
)
mac_sdus
[
i
]
=
(
unsigned
char
)
(
lrand48
()
&
0xff
);
sdu_lcids
[
0
]
=
0x3f
;
// DRB
sdu_lengths
[
0
]
=
TBS
-
ta_len
-
3
;
header_length_total
+=
2
+
(
sdu_lengths
[
0
]
>=
128
);
sdu_length_total
+=
sdu_lengths
[
0
];
num_sdus
+=
1
;
}
UE_info
->
mac_stats
[
UE_id
].
dlsch_total_bytes
+=
TBS
;
UE_info
->
mac_stats
[
UE_id
].
lc_bytes_tx
[
lcid
]
+=
sdu_length_total
;
// Check if there is data from RLC or CE
const
int
post_padding
=
TBS
>=
2
+
header_length_total
+
sdu_length_total
+
ta_len
;
LOG_I
(
MAC
,
"Configuring DL_TX in %d.%d: TBS %d, header_length_total %d, sdu_length_total %d,ta_len %d, post_padding %d
\n
"
,
frame
,
slot
,
TBS
,
header_length_total
,
sdu_length_total
,
ta_len
,
post_padding
);
// padding param currently not in use
//padding = TBS - header_length_total - sdu_length_total - ta_len - 1;
const
int
ntx_req
=
gNB_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
;
nfapi_nr_pdu_t
*
tx_req
=
&
gNB_mac
->
TX_req
[
CC_id
].
pdu_list
[
ntx_req
];
/* pointer to directly generate the PDU into the nFAPI structure */
uint32_t
*
buf
=
tx_req
->
TLVs
[
0
].
value
.
direct
;
const
int
offset
=
nr_generate_dlsch_pdu
(
module_id
,
sched_ctrl
,
(
unsigned
char
*
)
mac_sdus
,
(
unsigned
char
*
)
buf
,
num_sdus
,
// num_sdus
sdu_lengths
,
sdu_lcids
,
255
,
// no drx
ra
->
cont_res_id
,
// contention res id
post_padding
);
// Padding: fill remainder of DLSCH with 0
if
(
post_padding
>
0
)
{
for
(
int
j
=
0
;
j
<
TBS
-
offset
;
j
++
)
buf
[
offset
+
j
]
=
0
;
}
/* the buffer has been filled by nr_generate_dlsch_pdu(), below we simply
* fill the remaining information */
tx_req
->
PDU_length
=
TBS
;
tx_req
->
PDU_index
=
gNB_mac
->
pdu_index
[
0
]
++
;
tx_req
->
num_TLV
=
1
;
tx_req
->
TLVs
[
0
].
length
=
TBS
+
2
;
gNB_mac
->
TX_req
[
CC_id
].
Number_of_PDUs
++
;
gNB_mac
->
TX_req
[
CC_id
].
SFN
=
frame
;
gNB_mac
->
TX_req
[
CC_id
].
Slot
=
slot
;
retInfo
->
rbSize
=
sched_ctrl
->
rbSize
;
retInfo
->
time_domain_allocation
=
sched_ctrl
->
time_domain_allocation
;
retInfo
->
mcsTableIdx
=
sched_ctrl
->
mcsTableIdx
;
retInfo
->
mcs
=
sched_ctrl
->
mcs
;
retInfo
->
numDmrsCdmGrpsNoData
=
sched_ctrl
->
numDmrsCdmGrpsNoData
;
#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
if
(
frame
%
100
==
0
)
{
LOG_I
(
MAC
,
"%d.%d, first 10 payload bytes, TBS size: %d
\n
"
,
frame
,
slot
,
TBS
);
for
(
int
i
=
0
;
i
<
10
;
i
++
)
LOG_I
(
MAC
,
"byte %d: %x
\n
"
,
i
,
((
uint8_t
*
)
buf
)[
i
]);
}
#endif
}
nr_get_retransmission_timing
(
&
ra
->
Msg4_frame
,
&
ra
->
Msg4_slot
);
ra
->
state
=
WAIT_Msg4_ACK
;
LOG_I
(
MAC
,
"retrx time for msg4 is %d %d
\n
"
,
ra
->
Msg4_frame
,
ra
->
Msg4_slot
);
}
void
nr_check_Msg4_Ack
(
module_id_t
module_id
,
int
CC_id
,
frame_t
frame
,
sub_frame_t
slot
,
NR_RA_t
*
ra
)
{
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
module_id
]
->
UE_info
;
int
UE_id
=
find_nr_UE_id_msg4
(
module_id
,
ra
->
rnti
);
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
current_harq_pid
=
sched_ctrl
->
current_harq_pid
;
NR_UE_harq_t
*
harq
=
&
sched_ctrl
->
harq_processes
[
current_harq_pid
];
LOG_I
(
MAC
,
"ue %d, rnti %d, harq is waiting %d, round %d, frame %d %d
\n
"
,
UE_id
,
ra
->
rnti
,
harq
->
is_waiting
,
harq
->
round
,
frame
,
slot
);
harq
->
is_waiting
=
0
;
// don't check the ack for the present
if
(
harq
->
is_waiting
==
0
)
{
if
(
harq
->
round
==
0
)
{
ra
->
state
=
IDLE
;
UE_info
->
active
[
UE_id
]
=
true
;
LOG_I
(
MAC
,
"ue %d, rnti %d is active, frame %d %d
\n
"
,
UE_id
,
ra
->
rnti
,
frame
,
slot
);
}
else
{
ra
->
state
=
Msg4
;
}
}
}
void
nr_clear_ra_proc
(
module_id_t
module_idP
,
int
CC_id
,
frame_t
frameP
){
void
nr_clear_ra_proc
(
module_id_t
module_idP
,
int
CC_id
,
frame_t
frameP
){
NR_RA_t
*
ra
=
&
RC
.
nrmac
[
module_idP
]
->
common_channels
[
CC_id
].
ra
[
0
];
NR_RA_t
*
ra
=
&
RC
.
nrmac
[
module_idP
]
->
common_channels
[
CC_id
].
ra
[
0
];
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
f4f2301c
...
@@ -716,10 +716,6 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
...
@@ -716,10 +716,6 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
}
}
#endif
#endif
}
}
void
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
void
nr_configure_pdcch
(
gNB_MAC_INST
*
nr_mac
,
...
@@ -809,6 +805,286 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
...
@@ -809,6 +805,286 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
}
}
void
nr_fill_nfapi_dl_pdu_common
(
int
Mod_idP
,
int
UE_id
,
int
bwp_id
,
NR_SearchSpace_t
*
ss
,
NR_ControlResourceSet_t
*
coreset
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
NR_sched_pucch
*
pucch_sched
,
int
nrOfLayers
,
uint8_t
mcs
,
uint16_t
rbSize
,
uint16_t
rbStart
,
uint8_t
numDmrsCdmGrpsNoData
,
nfapi_nr_dmrs_type_e
dmrsConfigType
,
uint8_t
table_idx
,
uint16_t
R
,
uint8_t
Qm
,
uint32_t
TBS
,
int
time_domain_assignment
,
int
StartSymbolIndex
,
int
NrOfSymbols
,
uint8_t
aggregation_level
,
int
CCEIndex
,
int
harq_pid
,
int
ndi
,
int
round
)
{
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
Mod_idP
];
NR_COMMON_channels_t
*
cc
=
nr_mac
->
common_channels
;
NR_ServingCellConfigCommon_t
*
scc
=
cc
->
ServingCellConfigCommon
;
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
Mod_idP
]
->
UE_info
;
NR_CellGroupConfig_t
*
secondaryCellGroup
=
UE_info
->
secondaryCellGroup
[
UE_id
];
AssertFatal
(
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
count
==
1
,
"downlinkBWP_ToAddModList has %d BWP!
\n
"
,
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
count
);
NR_BWP_Downlink_t
*
bwp
=
secondaryCellGroup
->
spCellConfig
->
spCellConfigDedicated
->
downlinkBWP_ToAddModList
->
list
.
array
[
bwp_id
-
1
];
int
dci10_bw
;
// on configured BWP or initial LDBWP, bandwidth parameters in DCI correspond size of initialBWP
dci10_bw
=
NRRIV2BW
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
275
);
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdcch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
];
memset
((
void
*
)
dl_tti_pdcch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdcch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE
;
dl_tti_pdcch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdcch_pdu
));
nfapi_nr_dl_tti_request_pdu_t
*
dl_tti_pdsch_pdu
=
&
dl_req
->
dl_tti_pdu_list
[
dl_req
->
nPDUs
+
1
];
memset
((
void
*
)
dl_tti_pdsch_pdu
,
0
,
sizeof
(
nfapi_nr_dl_tti_request_pdu_t
));
dl_tti_pdsch_pdu
->
PDUType
=
NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE
;
dl_tti_pdsch_pdu
->
PDUSize
=
(
uint8_t
)(
2
+
sizeof
(
nfapi_nr_dl_tti_pdsch_pdu
));
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
=
&
dl_tti_pdcch_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t
*
pdsch_pdu_rel15
=
&
dl_tti_pdsch_pdu
->
pdsch_pdu
.
pdsch_pdu_rel15
;
pdsch_pdu_rel15
->
pduBitmap
=
0
;
pdsch_pdu_rel15
->
rnti
=
UE_info
->
rnti
[
UE_id
];
pdsch_pdu_rel15
->
pduIndex
=
nr_mac
->
pdu_index
[
0
]
++
;
// BWP
pdsch_pdu_rel15
->
BWPSize
=
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
pdsch_pdu_rel15
->
BWPStart
=
NRRIV2PRBOFFSET
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
);
pdsch_pdu_rel15
->
SubcarrierSpacing
=
bwp
->
bwp_Common
->
genericParameters
.
subcarrierSpacing
;
if
(
bwp
->
bwp_Common
->
genericParameters
.
cyclicPrefix
)
pdsch_pdu_rel15
->
CyclicPrefix
=
*
bwp
->
bwp_Common
->
genericParameters
.
cyclicPrefix
;
else
pdsch_pdu_rel15
->
CyclicPrefix
=
0
;
pdsch_pdu_rel15
->
NrOfCodewords
=
1
;
pdsch_pdu_rel15
->
targetCodeRate
[
0
]
=
nr_get_code_rate_dl
(
mcs
,
0
);
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
2
;
pdsch_pdu_rel15
->
mcsIndex
[
0
]
=
mcs
;
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
0
;
pdsch_pdu_rel15
->
rvIndex
[
0
]
=
nr_rv_round_map
[
round
];
pdsch_pdu_rel15
->
dataScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
nrOfLayers
=
nrOfLayers
;
pdsch_pdu_rel15
->
transmissionScheme
=
0
;
pdsch_pdu_rel15
->
refPoint
=
0
;
// Point A
pdsch_pdu_rel15
->
dmrsConfigType
=
dmrsConfigType
;
pdsch_pdu_rel15
->
dlDmrsScramblingId
=
*
scc
->
physCellId
;
pdsch_pdu_rel15
->
SCID
=
0
;
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
=
numDmrsCdmGrpsNoData
;
pdsch_pdu_rel15
->
dmrsPorts
=
1
;
pdsch_pdu_rel15
->
resourceAlloc
=
1
;
pdsch_pdu_rel15
->
rbStart
=
rbStart
;
pdsch_pdu_rel15
->
rbSize
=
rbSize
;
pdsch_pdu_rel15
->
VRBtoPRBMapping
=
1
;
// non-interleaved, check if this is ok for initialBWP
pdsch_pdu_rel15
->
targetCodeRate
[
0
]
=
R
;
pdsch_pdu_rel15
->
qamModOrder
[
0
]
=
Qm
;
pdsch_pdu_rel15
->
TBSize
[
0
]
=
TBS
;
pdsch_pdu_rel15
->
mcsTable
[
0
]
=
table_idx
;
pdsch_pdu_rel15
->
StartSymbolIndex
=
StartSymbolIndex
;
pdsch_pdu_rel15
->
NrOfSymbols
=
NrOfSymbols
;
// k0 = *bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
pdsch_pdu_rel15
->
dlDmrsSymbPos
=
fill_dmrs_mask
(
NULL
,
scc
->
dmrs_TypeA_Position
,
pdsch_pdu_rel15
->
NrOfSymbols
);
dci_pdu_rel15_t
dci_pdu_rel15
[
MAX_DCI_CORESET
];
memset
(
dci_pdu_rel15
,
0
,
sizeof
(
dci_pdu_rel15_t
)
*
MAX_DCI_CORESET
);
// frequency domain assignment
if
(
bwp
->
bwp_Dedicated
->
pdsch_Config
->
choice
.
setup
->
resourceAllocation
==
NR_PDSCH_Config__resourceAllocation_resourceAllocationType1
)
dci_pdu_rel15
[
0
].
frequency_domain_assignment
.
val
=
PRBalloc_to_locationandbandwidth0
(
pdsch_pdu_rel15
->
rbSize
,
pdsch_pdu_rel15
->
rbStart
,
NRRIV2BW
(
scc
->
downlinkConfigCommon
->
initialDownlinkBWP
->
genericParameters
.
locationAndBandwidth
,
//bwp->bwp_Common->genericParameters.locationAndBandwidth,
275
));
else
AssertFatal
(
1
==
0
,
"Only frequency resource allocation type 1 is currently supported
\n
"
);
// time domain assignment
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
=
time_domain_assignment
;
// row index used here instead of SLIV;
// mcs and rv
dci_pdu_rel15
[
0
].
mcs
=
mcs
;
dci_pdu_rel15
[
0
].
rv
=
pdsch_pdu_rel15
->
rvIndex
[
0
];
// harq pid and ndi
dci_pdu_rel15
[
0
].
harq_pid
=
harq_pid
;
dci_pdu_rel15
[
0
].
ndi
=
ndi
;
// DAI
dci_pdu_rel15
[
0
].
dai
[
0
].
val
=
(
pucch_sched
->
dai_c
-
1
)
&
3
;
// TPC for PUCCH
dci_pdu_rel15
[
0
].
tpc
=
UE_info
->
UE_sched_ctrl
[
UE_id
].
tpc1
;
// table 7.2.1-1 in 38.213
// PUCCH resource indicator
dci_pdu_rel15
[
0
].
pucch_resource_indicator
=
pucch_sched
->
resource_indicator
;
// PDSCH to HARQ TI
dci_pdu_rel15
[
0
].
pdsch_to_harq_feedback_timing_indicator
.
val
=
pucch_sched
->
timing_indicator
;
// dmrs sequence initialization
dci_pdu_rel15
[
0
].
dmrs_sequence_initialization
.
val
=
pdsch_pdu_rel15
->
SCID
;
LOG_D
(
MAC
,
"[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
"time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d
\n
"
,
dci_pdu_rel15
[
0
].
frequency_domain_assignment
.
val
,
pdsch_pdu_rel15
->
rbStart
,
pdsch_pdu_rel15
->
rbSize
,
NRRIV2BW
(
bwp
->
bwp_Common
->
genericParameters
.
locationAndBandwidth
,
275
),
dci_pdu_rel15
[
0
].
time_domain_assignment
.
val
,
dci_pdu_rel15
[
0
].
vrb_to_prb_mapping
.
val
,
dci_pdu_rel15
[
0
].
mcs
,
dci_pdu_rel15
[
0
].
tb_scaling
,
dci_pdu_rel15
[
0
].
ndi
,
dci_pdu_rel15
[
0
].
rv
);
nr_configure_pdcch
(
nr_mac
,
pdcch_pdu_rel15
,
UE_info
->
rnti
[
UE_id
],
ss
,
coreset
,
scc
,
bwp
,
aggregation_level
,
CCEIndex
);
int
dci_formats
[
2
];
int
rnti_types
[
2
];
dci_formats
[
0
]
=
NR_DL_DCI_FORMAT_1_0
;
rnti_types
[
0
]
=
NR_RNTI_TC
;
fill_dci_pdu_rel15
(
scc
,
secondaryCellGroup
,
pdcch_pdu_rel15
,
dci_pdu_rel15
,
dci_formats
,
rnti_types
,
dci10_bw
,
bwp_id
);
LOG_D
(
MAC
,
"DCI params: rnti %x, rnti_type %d, dci_format %d
\n
"
,
pdcch_pdu_rel15
->
dci_pdu
.
RNTI
[
0
],
rnti_types
[
0
],
dci_formats
[
0
]);
LOG_D
(
MAC
,
"coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d
\n
"
,
(
unsigned
long
long
)
pdcch_pdu_rel15
->
FreqDomainResource
,
pdcch_pdu_rel15
->
StartSymbolIndex
,
pdcch_pdu_rel15
->
DurationSymbols
);
// I don't know why the following is not needed, but in this case we don't
// need additional calculations:
//const uint16_t N_RE_prime = NR_NB_SC_PER_RB * N_sh_symb - N_PRB_DMRS - N_PRB_oh;
//LOG_D(MAC,
// "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n",
// N_RE_prime,
// N_sh_symb,
// N_PRB_DMRS,
// N_PRB_oh);
//pdsch_pdu_rel15->nb_mod_symbols = N_RE_prime*pdsch_pdu_rel15->n_prb*pdsch_pdu_rel15->nb_codewords;
LOG_D
(
MAC
,
"DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d "
"nb_layers %d nb_codewords %d mcs %d TBS: %d
\n
"
,
pdsch_pdu_rel15
->
rbStart
,
pdsch_pdu_rel15
->
rbSize
,
pdsch_pdu_rel15
->
StartSymbolIndex
,
pdsch_pdu_rel15
->
NrOfSymbols
,
pdsch_pdu_rel15
->
nrOfLayers
,
pdsch_pdu_rel15
->
NrOfCodewords
,
pdsch_pdu_rel15
->
mcsIndex
[
0
],
TBS
);
dl_req
->
nPDUs
+=
2
;
#if 1 // LOG_PDCCH_PARAMES
static
int
log_first
=
0
;
if
(
log_first
==
0
)
{
//log_first =1;
LOG_I
(
MAC
,
"NB PDCCH PARAMS: rnti %d, BWPSize %d, BWPStart %d, SubcarrierSpacing %d, CCE %d, L %d dci_length %d dci_format %d dci index %d
\n
"
,
pdcch_pdu_rel15
->
dci_pdu
.
RNTI
[
0
],
pdcch_pdu_rel15
->
BWPSize
,
pdcch_pdu_rel15
->
BWPStart
,
pdcch_pdu_rel15
->
SubcarrierSpacing
,
pdcch_pdu_rel15
->
dci_pdu
.
CceIndex
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
pdcch_pdu_rel15
->
dci_pdu
.
AggregationLevel
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
pdcch_pdu_rel15
->
dci_pdu
.
PayloadSizeBits
[
pdcch_pdu_rel15
->
numDlDci
-
1
],
dci_formats
[
0
],
pdcch_pdu_rel15
->
numDlDci
-
1
);
LOG_I
(
MAC
,
"NB PDCCH PARAMS: coreset:frequency_domain_resource %d %d %d %d %d %d
\n
"
,
pdcch_pdu_rel15
->
FreqDomainResource
[
0
],
pdcch_pdu_rel15
->
FreqDomainResource
[
1
],
pdcch_pdu_rel15
->
FreqDomainResource
[
2
],
pdcch_pdu_rel15
->
FreqDomainResource
[
3
],
pdcch_pdu_rel15
->
FreqDomainResource
[
4
],
pdcch_pdu_rel15
->
FreqDomainResource
[
5
]);
LOG_I
(
MAC
,
"NB PDCCH PARAMS: coreset:StartSymbolIndex %d duration %d CceRegMappingType %d RegBundleSize %d InterleaverSize %d ShiftIndex %d CoreSetType %d precoder_granularity %d, pdcch_dmrs_scrambling_id %d,scrambling_rnti %d
\n
"
,
pdcch_pdu_rel15
->
StartSymbolIndex
,
pdcch_pdu_rel15
->
DurationSymbols
,
pdcch_pdu_rel15
->
CceRegMappingType
,
pdcch_pdu_rel15
->
RegBundleSize
,
pdcch_pdu_rel15
->
InterleaverSize
,
pdcch_pdu_rel15
->
ShiftIndex
,
pdcch_pdu_rel15
->
CoreSetType
,
pdcch_pdu_rel15
->
precoderGranularity
,
pdcch_pdu_rel15
->
dci_pdu
.
ScramblingId
[
0
],
pdcch_pdu_rel15
->
dci_pdu
.
ScramblingRNTI
[
0
]);
}
#endif
#if 1 // LOG_PDSCH_PARAMES
static
int
log_first_pdsch
=
0
;
if
(
log_first_pdsch
==
0
)
{
//log_first_pdsch = 1;
LOG_I
(
MAC
,
"NB PDSCH PARAMS: rnti %d, bwp (%d, %d), scs %d, codewords %d, coderate %d, mod %d, mcs (%d, %d), rv %d, dataScramId %d, layers %d, tm %d, refPoint %d
\n
"
,
pdsch_pdu_rel15
->
rnti
,
pdsch_pdu_rel15
->
BWPSize
,
pdsch_pdu_rel15
->
BWPStart
,
pdsch_pdu_rel15
->
SubcarrierSpacing
,
pdsch_pdu_rel15
->
NrOfCodewords
,
pdsch_pdu_rel15
->
targetCodeRate
[
0
],
pdsch_pdu_rel15
->
qamModOrder
[
0
],
pdsch_pdu_rel15
->
mcsIndex
[
0
],
pdsch_pdu_rel15
->
mcsTable
[
0
],
pdsch_pdu_rel15
->
rvIndex
[
0
],
pdsch_pdu_rel15
->
dataScramblingId
,
pdsch_pdu_rel15
->
nrOfLayers
,
pdsch_pdu_rel15
->
transmissionScheme
,
pdsch_pdu_rel15
->
refPoint
);
LOG_I
(
MAC
,
"NB PDSCH PARAMS: dlDmrsScramblingId %d, scid %d, numDmrsCdmGrpsNoData %d, dmrsPorts %d, resourceAlloc %d, rb (%d, %d), symb (%d, %d), dmrsType %d, dmrsPos %d, vrb2prb %d
\n
"
,
pdsch_pdu_rel15
->
dlDmrsScramblingId
,
pdsch_pdu_rel15
->
SCID
,
pdsch_pdu_rel15
->
numDmrsCdmGrpsNoData
,
pdsch_pdu_rel15
->
dmrsPorts
,
pdsch_pdu_rel15
->
resourceAlloc
,
pdsch_pdu_rel15
->
rbStart
,
pdsch_pdu_rel15
->
rbSize
,
pdsch_pdu_rel15
->
StartSymbolIndex
,
pdsch_pdu_rel15
->
NrOfSymbols
,
pdsch_pdu_rel15
->
dmrsConfigType
,
pdsch_pdu_rel15
->
dlDmrsSymbPos
,
pdsch_pdu_rel15
->
VRBtoPRBMapping
);
}
#endif
}
// This function configures pucch pdu fapi structure
// This function configures pucch pdu fapi structure
void
nr_configure_pucch
(
nfapi_nr_pucch_pdu_t
*
pucch_pdu
,
void
nr_configure_pucch
(
nfapi_nr_pucch_pdu_t
*
pucch_pdu
,
NR_ServingCellConfigCommon_t
*
scc
,
NR_ServingCellConfigCommon_t
*
scc
,
...
@@ -1202,16 +1478,16 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
...
@@ -1202,16 +1478,16 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
pos
=
fsize
;
pos
=
fsize
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
frequency_domain_assignment
.
val
&
((
1
<<
fsize
)
-
1
))
<<
(
dci_size
-
pos
));
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
frequency_domain_assignment
.
val
&
((
1
<<
fsize
)
-
1
))
<<
(
dci_size
-
pos
));
LOG_
D
(
MAC
,
"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
frequency_domain_assignment
.
val
,
fsize
,
N_RB
,
dci_size
-
pos
,
*
dci_pdu
);
LOG_
I
(
MAC
,
"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
frequency_domain_assignment
.
val
,
fsize
,
N_RB
,
dci_size
-
pos
,
*
dci_pdu
);
// Time domain assignment
// Time domain assignment
pos
+=
4
;
pos
+=
4
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
&
0xf
)
<<
(
dci_size
-
pos
));
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
&
0xf
)
<<
(
dci_size
-
pos
));
LOG_
D
(
MAC
,
"time-domain assignment %d (3
bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
time_domain_assignment
.
val
,
dci_size
-
pos
,
*
dci_pdu
);
LOG_
I
(
MAC
,
"time-domain assignment %d (4
bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
time_domain_assignment
.
val
,
dci_size
-
pos
,
*
dci_pdu
);
// VRB to PRB mapping
// VRB to PRB mapping
pos
++
;
pos
++
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
&
0x1
)
<<
(
dci_size
-
pos
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
&
0x1
)
<<
(
dci_size
-
pos
);
LOG_
D
(
MAC
,
"vrb to prb mapping %d (1 bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
,
dci_size
-
pos
,
*
dci_pdu
);
LOG_
I
(
MAC
,
"vrb to prb mapping %d (1 bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
,
dci_size
-
pos
,
*
dci_pdu
);
// MCS
// MCS
pos
+=
5
;
pos
+=
5
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
mcs
&
0x1f
)
<<
(
dci_size
-
pos
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
mcs
&
0x1f
)
<<
(
dci_size
-
pos
);
...
@@ -1370,46 +1646,71 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
...
@@ -1370,46 +1646,71 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
break
;
break
;
case
NR_RNTI_TC
:
case
NR_RNTI_TC
:
dci_pdu_rel15
->
format_indicator
=
1
;
// indicating a DL DCI format 1bit
// indicating a DL DCI format 1bit
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
format_indicator
&
1
)
<<
(
dci_size
-
pos
++
);
pos
=
1
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
format_indicator
&
0x1
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"format indicator %d (%d bits)=> %d (0x%lx), dci size %d
\n
"
,
dci_pdu_rel15
->
format_indicator
,
1
,
dci_size
-
pos
,
*
dci_pdu
,
dci_size
);
// Freq domain assignment 0-16 bit
// Freq domain assignment 0-16 bit
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
fsize
=
(
int
)
ceil
(
log2
(
(
N_RB
*
(
N_RB
+
1
))
>>
1
)
);
for
(
int
i
=
0
;
i
<
fsize
;
i
++
)
pos
+=
fsize
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
frequency_domain_assignment
.
val
>>
(
fsize
-
i
-
1
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
frequency_domain_assignment
.
val
&
((
1
<<
fsize
)
-
1
))
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"Freq domain assignment %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
frequency_domain_assignment
.
val
,
fsize
,
dci_size
-
pos
,
*
dci_pdu
);
// Time domain assignment 4 bit
// Time domain assignment 4 bit
for
(
int
i
=
0
;
i
<
4
;
i
++
)
pos
+=
4
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
>>
(
3
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
&
0xf
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"Time domain assignment %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
time_domain_assignment
.
val
,
4
,
dci_size
-
pos
,
*
dci_pdu
);
// VRB to PRB mapping 1 bit
// VRB to PRB mapping 1 bit
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
&
1
)
<<
(
dci_size
-
pos
++
);
pos
+=
1
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
&
1
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"VRB to PRB %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
,
1
,
dci_size
-
pos
,
*
dci_pdu
);
// MCS 5bit //bit over 32, so dci_pdu ++
// MCS 5bit //bit over 32, so dci_pdu ++
for
(
int
i
=
0
;
i
<
5
;
i
++
)
pos
+=
5
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
mcs
>>
(
4
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
mcs
&
0x1f
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"MCS %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
mcs
,
5
,
dci_size
-
pos
,
*
dci_pdu
);
// New data indicator 1bit
// New data indicator 1bit
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
ndi
&
1
)
<<
(
dci_size
-
pos
++
);
pos
+=
1
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
ndi
&
1
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"NDI %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
ndi
,
1
,
dci_size
-
pos
,
*
dci_pdu
);
// Redundancy version 2bit
// Redundancy version 2bit
for
(
int
i
=
0
;
i
<
2
;
i
++
)
pos
+=
2
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
rv
>>
(
1
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
rv
&
0x3
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"RV %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
rv
,
2
,
dci_size
-
pos
,
*
dci_pdu
);
// HARQ process number 4bit
// HARQ process number 4bit
for
(
int
i
=
0
;
i
<
4
;
i
++
)
pos
+=
4
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
harq_pid
>>
(
3
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
harq_pid
&
0xf
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"HARQ_PID %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
harq_pid
,
4
,
dci_size
-
pos
,
*
dci_pdu
);
// Downlink assignment index – 2 bits
// Downlink assignment index – 2 bits
for
(
int
i
=
0
;
i
<
2
;
i
++
)
pos
+=
2
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
dai
[
0
].
val
>>
(
1
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
dai
[
0
].
val
&
0x3
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"DAI %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
dai
[
0
].
val
,
2
,
dci_size
-
pos
,
*
dci_pdu
);
// TPC command for scheduled PUCCH – 2 bits
// TPC command for scheduled PUCCH – 2 bits
for
(
int
i
=
0
;
i
<
2
;
i
++
)
pos
+=
2
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
tpc
>>
(
1
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
tpc
&
0x3
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"TPC %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
tpc
,
2
,
dci_size
-
pos
,
*
dci_pdu
);
// LOG_D(MAC, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
// LOG_D(MAC, "DCI PDU: [0]->0x%08llx \t [1]->0x%08llx \t [2]->0x%08llx \t [3]->0x%08llx\n",
// dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
// dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
// pucch_resource_indicator – 3 bits
pos
+=
3
;
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
pucch_resource_indicator
&
0x7
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"pucch_resource_indicator %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
pucch_resource_indicator
,
3
,
dci_size
-
pos
,
*
dci_pdu
);
// PDSCH-to-HARQ_feedback timing indicator – 3 bits
// PDSCH-to-HARQ_feedback timing indicator – 3 bits
for
(
int
i
=
0
;
i
<
3
;
i
++
)
pos
+=
3
;
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
.
val
>>
(
2
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
.
val
&
0x7
)
<<
(
dci_size
-
pos
);
LOG_I
(
MAC
,
"PDSCH to HARQ TI %d (%d bits)=> %d (0x%lx)
\n
"
,
dci_pdu_rel15
->
pdsch_to_harq_feedback_timing_indicator
.
val
,
3
,
dci_size
-
pos
,
*
dci_pdu
);
break
;
break
;
}
}
break
;
break
;
...
@@ -1805,6 +2106,23 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
...
@@ -1805,6 +2106,23 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
return
-
1
;
return
-
1
;
}
}
int
find_nr_UE_id_msg4
(
module_id_t
mod_idP
,
rnti_t
rntiP
)
//------------------------------------------------------------------------------
{
int
UE_id
;
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
mod_idP
]
->
UE_info
;
for
(
UE_id
=
0
;
UE_id
<
MAX_MOBILES_PER_GNB
;
UE_id
++
)
{
if
(
!
UE_info
->
active
[
UE_id
])
{
if
(
UE_info
->
rnti
[
UE_id
]
==
rntiP
)
{
return
UE_id
;
}
}
}
return
-
1
;
}
void
set_Y
(
int
Y
[
3
][
160
],
rnti_t
rnti
)
{
void
set_Y
(
int
Y
[
3
][
160
],
rnti_t
rnti
)
{
const
int
A
[
3
]
=
{
39827
,
39829
,
39839
};
const
int
A
[
3
]
=
{
39827
,
39829
,
39839
};
const
int
D
=
65537
;
const
int
D
=
65537
;
...
@@ -1839,7 +2157,7 @@ int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) {
...
@@ -1839,7 +2157,7 @@ int find_nr_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP) {
}
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
){
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
,
int
isActive
){
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
mod_idP
]
->
UE_info
;
NR_UE_info_t
*
UE_info
=
&
RC
.
nrmac
[
mod_idP
]
->
UE_info
;
NR_COMMON_channels_t
*
cc
=
RC
.
nrmac
[
mod_idP
]
->
common_channels
;
NR_COMMON_channels_t
*
cc
=
RC
.
nrmac
[
mod_idP
]
->
common_channels
;
...
@@ -1859,7 +2177,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
...
@@ -1859,7 +2177,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
int
UE_id
=
i
;
int
UE_id
=
i
;
UE_info
->
num_UEs
++
;
UE_info
->
num_UEs
++
;
UE_info
->
active
[
UE_id
]
=
true
;
UE_info
->
active
[
UE_id
]
=
isActive
;
// 1: active, 0: don't active
UE_info
->
rnti
[
UE_id
]
=
rntiP
;
UE_info
->
rnti
[
UE_id
]
=
rntiP
;
add_nr_ue_list
(
&
UE_info
->
list
,
UE_id
);
add_nr_ue_list
(
&
UE_info
->
list
,
UE_id
);
set_Y
(
UE_info
->
Y
[
UE_id
],
rntiP
);
set_Y
(
UE_info
->
Y
[
UE_id
],
rntiP
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
f4f2301c
...
@@ -336,9 +336,12 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
...
@@ -336,9 +336,12 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
return
;
return
;
}
}
free
(
ra
->
preambles
.
preamble_list
);
free
(
ra
->
preambles
.
preamble_list
);
ra
->
state
=
RA_IDLE
;
//ra->state = RA_IDLE;
LOG_I
(
MAC
,
"reset RA state information for RA-RNTI %04x
\n
"
,
ra
->
rnti
);
ra
->
state
=
Msg4
;
const
int
UE_id
=
add_new_nr_ue
(
gnb_mod_idP
,
ra
->
rnti
);
ra
->
Msg4_frame
=
(
frameP
+
2
)
%
1024
;
ra
->
Msg4_slot
=
1
;
LOG_I
(
MAC
,
"set RA state to Msg4 for RA-RNTI %04x, msg4 frame %d %d
\n
"
,
ra
->
rnti
,
ra
->
Msg4_frame
,
ra
->
Msg4_slot
);
const
int
UE_id
=
add_new_nr_ue
(
gnb_mod_idP
,
ra
->
rnti
,
0
);
UE_info
->
secondaryCellGroup
[
UE_id
]
=
ra
->
secondaryCellGroup
;
UE_info
->
secondaryCellGroup
[
UE_id
]
=
ra
->
secondaryCellGroup
;
compute_csi_bitlen
(
ra
->
secondaryCellGroup
,
UE_info
,
UE_id
);
compute_csi_bitlen
(
ra
->
secondaryCellGroup
,
UE_info
,
UE_id
);
UE_info
->
UE_beam_index
[
UE_id
]
=
ra
->
beam_id
;
UE_info
->
UE_beam_index
[
UE_id
]
=
ra
->
beam_id
;
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
f4f2301c
...
@@ -84,7 +84,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
...
@@ -84,7 +84,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
/////// Random Access MAC-PHY interface functions and primitives ///////
/////// Random Access MAC-PHY interface functions and primitives ///////
void
nr_schedule_RA
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
);
void
nr_schedule_RA
(
module_id_t
module_idP
,
frame_t
frameP
,
sub_frame_t
slotP
,
int
num_slots_per_tdds
);
/* \brief Function to indicate a received preamble on PRACH. It initiates the RA procedure.
/* \brief Function to indicate a received preamble on PRACH. It initiates the RA procedure.
@param module_idP Instance ID of gNB
@param module_idP Instance ID of gNB
...
@@ -154,6 +154,32 @@ void nr_fill_nfapi_dl_pdu(int Mod_id,
...
@@ -154,6 +154,32 @@ void nr_fill_nfapi_dl_pdu(int Mod_id,
int
ndi
,
int
ndi
,
int
round
);
int
round
);
void
nr_fill_nfapi_dl_pdu_common
(
int
Mod_idP
,
int
UE_id
,
int
bwp_id
,
NR_SearchSpace_t
*
ss
,
NR_ControlResourceSet_t
*
coreset
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
NR_sched_pucch
*
pucch_sched
,
int
nrOfLayers
,
uint8_t
mcs
,
uint16_t
rbSize
,
uint16_t
rbStart
,
uint8_t
numDmrsCdmGrpsNoData
,
nfapi_nr_dmrs_type_e
dmrsConfigType
,
uint8_t
table_idx
,
uint16_t
R
,
uint8_t
Qm
,
uint32_t
TBS
,
int
time_domain_assignment
,
int
StartSymbolIndex
,
int
NrOfSymbols
,
uint8_t
aggregation_level
,
int
CCEIndex
,
int
harq_pid
,
int
ndi
,
int
round
);
int
configure_fapi_dl_pdu_phytest
(
int
Mod_id
,
int
configure_fapi_dl_pdu_phytest
(
int
Mod_id
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
nfapi_nr_dl_tti_request_body_t
*
dl_req
,
NR_sched_pucch
*
pucch_sched
,
NR_sched_pucch
*
pucch_sched
,
...
@@ -321,9 +347,11 @@ void add_nr_ue_list(NR_UE_list_t *listP, int UE_id);
...
@@ -321,9 +347,11 @@ void add_nr_ue_list(NR_UE_list_t *listP, int UE_id);
int
find_nr_UE_id
(
module_id_t
mod_idP
,
rnti_t
rntiP
);
int
find_nr_UE_id
(
module_id_t
mod_idP
,
rnti_t
rntiP
);
int
find_nr_UE_id_msg4
(
module_id_t
mod_idP
,
rnti_t
rntiP
);
int
find_nr_RA_id
(
module_id_t
mod_idP
,
int
CC_idP
,
rnti_t
rntiP
);
int
find_nr_RA_id
(
module_id_t
mod_idP
,
int
CC_idP
,
rnti_t
rntiP
);
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
);
int
add_new_nr_ue
(
module_id_t
mod_idP
,
rnti_t
rntiP
,
int
isActive
);
void
mac_remove_nr_ue
(
module_id_t
mod_id
,
rnti_t
rnti
);
void
mac_remove_nr_ue
(
module_id_t
mod_id
,
rnti_t
rnti
);
...
...
This diff is collapsed.
Click to expand it.
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @
f4f2301c
...
@@ -145,7 +145,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
...
@@ -145,7 +145,7 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
if
(
dl_info
->
dci_ind
!=
NULL
){
if
(
dl_info
->
dci_ind
!=
NULL
){
LOG_D
(
MAC
,
"[L2][IF MODULE][DL INDICATION][DCI_IND]
\n
"
);
LOG_D
(
MAC
,
"[L2][IF MODULE][DL INDICATION][DCI_IND]
\n
"
);
for
(
i
=
0
;
i
<
dl_info
->
dci_ind
->
number_of_dcis
;
++
i
){
for
(
i
=
0
;
i
<
dl_info
->
dci_ind
->
number_of_dcis
;
++
i
){
LOG_
D
(
MAC
,
">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d
\n
"
,
i
,
dl_info
->
dci_ind
->
number_of_dcis
);
LOG_
I
(
MAC
,
">>>NR_IF_Module i=%d, dl_info->dci_ind->number_of_dcis=%d
\n
"
,
i
,
dl_info
->
dci_ind
->
number_of_dcis
);
nr_scheduled_response_t
scheduled_response
;
nr_scheduled_response_t
scheduled_response
;
int8_t
ret
=
handle_dci
(
dl_info
->
module_id
,
int8_t
ret
=
handle_dci
(
dl_info
->
module_id
,
dl_info
->
cc_id
,
dl_info
->
cc_id
,
...
...
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment