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OpenXG-RAN
Commit 020f0ef9 authored by Stefan Schaffelder's avatar Stefan Schaffelder Committed by DUFRENE Louis Adrien TGI/OLS
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cdrx_configured update

parent ddc336e2
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Showing with 32 additions and 34 deletions
openair2/LAYER2/MAC/config.c
View file @ 020f0ef9
......@@ -1018,31 +1018,30 @@ void eNB_Config_Local_DRX(
/* Get struct to modify */
UE_scheduling_control = &(UE_list_mac->UE_sched_ctrl[UE_id]);
UE_scheduling_control->cdrx_configured = FALSE; // will be set to true when no error
/* Check drx_Configuration */
if (drx_Configuration == NULL) {
LOG_I(MAC, "drx_Configuration parameter is NULL, cannot configure local UE parameters\n");
UE_scheduling_control->cdrx_configured = FALSE;
return;
}
/* Check if drx config present */
if (drx_Configuration->present != LTE_DRX_Config_PR_setup) {
LOG_I(MAC, "No drx_Configuration present, don't configure local UE parameters\n");
UE_scheduling_control->cdrx_configured = FALSE;
return;
}
/* Modify scheduling control structure according to DRX configuration: doesn't support every configurations! */
UE_scheduling_control->cdrx_configured = FALSE; // will be set to true when ACK is received
UE_scheduling_control->cdrx_waiting_ack = TRUE; // set to true first, waiting for the UE to configure CDRX on its side
LOG_I(MAC, "Initial cdrx_waiting_ack state: %s\n", UE_scheduling_control->cdrx_waiting_ack ? "TRUE" : "FALSE");
UE_scheduling_control->cdrx_configured = TRUE; // will be set to true
UE_scheduling_control->cdrx_waiting_ack = TRUE; // For debugging only
UE_scheduling_control->in_active_time = FALSE;
UE_scheduling_control->dci0_ongoing_timer = 0;
UE_scheduling_control->on_duration_timer = 0;
switch (drx_Configuration->choice.setup.onDurationTimer) {
struct LTE_DRX_Config__setup *choiceSetup = &drx_Configuration->choice.setup;
switch (choiceSetup->onDurationTimer) {
case 0:
UE_scheduling_control->on_duration_timer_thres = 1;
break;
......@@ -1097,7 +1096,7 @@ void eNB_Config_Local_DRX(
}
UE_scheduling_control->drx_inactivity_timer = 0;
switch (drx_Configuration->choice.setup.drx_InactivityTimer) {
switch (choiceSetup->drx_InactivityTimer) {
case 0:
UE_scheduling_control->drx_inactivity_timer_thres = 1;
break;
......@@ -1172,7 +1171,7 @@ void eNB_Config_Local_DRX(
break;
}
if (drx_Configuration->choice.setup.shortDRX == NULL) {
if (choiceSetup->shortDRX == NULL) {
UE_scheduling_control->in_short_drx_cycle = FALSE;
UE_scheduling_control->drx_shortCycle_timer_value = 0;
UE_scheduling_control->short_drx_cycle_duration = 0;
......@@ -1180,8 +1179,8 @@ void eNB_Config_Local_DRX(
UE_scheduling_control->drx_shortCycle_timer_thres = -1;
} else {
UE_scheduling_control->in_short_drx_cycle = FALSE;
UE_scheduling_control->drx_shortCycle_timer_value = (uint8_t) drx_Configuration->choice.setup.shortDRX->drxShortCycleTimer;
switch (drx_Configuration->choice.setup.shortDRX->shortDRX_Cycle) {
UE_scheduling_control->drx_shortCycle_timer_value = (uint8_t) choiceSetup->shortDRX->drxShortCycleTimer;
switch (choiceSetup->shortDRX->shortDRX_Cycle) {
case 0:
UE_scheduling_control->short_drx_cycle_duration = 2;
break;
......@@ -1241,70 +1240,70 @@ void eNB_Config_Local_DRX(
UE_scheduling_control->in_long_drx_cycle = FALSE;
UE_scheduling_control->drx_longCycle_timer = 0;
switch (drx_Configuration->choice.setup.longDRX_CycleStartOffset.present) {
switch (choiceSetup->longDRX_CycleStartOffset.present) {
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf10:
UE_scheduling_control->drx_longCycle_timer_thres = 10;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf10;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf10;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf20:
UE_scheduling_control->drx_longCycle_timer_thres = 20;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf20;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf20;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf32:
UE_scheduling_control->drx_longCycle_timer_thres = 32;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf32;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf32;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf40:
UE_scheduling_control->drx_longCycle_timer_thres = 40;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf40;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf40;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf64:
UE_scheduling_control->drx_longCycle_timer_thres = 64;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf64;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf64;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf80:
UE_scheduling_control->drx_longCycle_timer_thres = 80;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf80;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf80;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf128:
UE_scheduling_control->drx_longCycle_timer_thres = 128;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf128;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf128;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf160:
UE_scheduling_control->drx_longCycle_timer_thres = 160;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf160;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf160;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf256:
UE_scheduling_control->drx_longCycle_timer_thres = 256;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf256;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf256;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf320:
UE_scheduling_control->drx_longCycle_timer_thres = 320;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf320;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf320;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf512:
UE_scheduling_control->drx_longCycle_timer_thres = 512;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf512;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf512;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf640:
UE_scheduling_control->drx_longCycle_timer_thres = 640;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf640;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf640;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf1024:
UE_scheduling_control->drx_longCycle_timer_thres = 1024;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf1024;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf1024;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf1280:
UE_scheduling_control->drx_longCycle_timer_thres = 1280;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf1280;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf1280;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf2048:
UE_scheduling_control->drx_longCycle_timer_thres = 2048;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf2048;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf2048;
break;
case LTE_DRX_Config__setup__longDRX_CycleStartOffset_PR_sf2560:
UE_scheduling_control->drx_longCycle_timer_thres = 2560;
UE_scheduling_control->drx_start_offset = (uint16_t) drx_Configuration->choice.setup.longDRX_CycleStartOffset.choice.sf2560;
UE_scheduling_control->drx_start_offset = (uint16_t) choiceSetup->longDRX_CycleStartOffset.choice.sf2560;
break;
default:
LOG_E(MAC, "Invalid long_DRX value in DRX local configuration\n");
......@@ -1312,7 +1311,7 @@ void eNB_Config_Local_DRX(
}
memset(UE_scheduling_control->drx_retransmission_timer, 0, sizeof(UE_scheduling_control->drx_retransmission_timer));
switch (drx_Configuration->choice.setup.drx_RetransmissionTimer) {
switch (choiceSetup->drx_RetransmissionTimer) {
case 0:
memset(UE_scheduling_control->drx_retransmission_timer_thres, 1, sizeof(UE_scheduling_control->drx_retransmission_timer_thres));
break;
......
openair2/RRC/LTE/MESSAGES/asn1_msg.c
View file @ 020f0ef9
......@@ -667,7 +667,6 @@ LTE_DRX_Config_t *do_DrxConfig(int CC_id,
} else {
struct LTE_DRX_Config__setup *choiceSetup = &drxConfig->choice.setup;
choiceSetup->onDurationTimer = configuration->radioresourceconfig[CC_id].drx_onDurationTimer;
// drxConfig->choice.setup.onDurationTimer = configuration->radioresourceconfig[CC_id].drx_onDurationTimer;
choiceSetup->drx_InactivityTimer = configuration->radioresourceconfig[CC_id].drx_InactivityTimer;
choiceSetup->drx_RetransmissionTimer = configuration->radioresourceconfig[CC_id].drx_RetransmissionTimer;
choiceSetup->longDRX_CycleStartOffset.present = configuration->radioresourceconfig[CC_id].drx_longDrx_CycleStartOffset_present;
......
openair2/RRC/LTE/rrc_eNB.c
View file @ 020f0ef9
......@@ -6503,8 +6503,8 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
if (UE_scheduling_control->cdrx_waiting_ack == TRUE) {
UE_scheduling_control->cdrx_waiting_ack = FALSE;
UE_scheduling_control->cdrx_configured = TRUE;
LOG_I(RRC, "CDRX configuration activated after RRC Connection Reconfiguration Complete reception\n");
// UE_scheduling_control->cdrx_configured = TRUE;
LOG_I(RRC, "CDRX configuration after first RRC Connection Reconfiguration Complete reception\n");
}
} // No CDRX with the CU/DU split in this version of the code
......
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