Commit 5686b2a2 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/phr_handling_for_develop' into integration_2024_w21c

parents 8820a575 ec326e85
...@@ -123,7 +123,7 @@ void nr_modulation(uint32_t *in, ...@@ -123,7 +123,7 @@ void nr_modulation(uint32_t *in,
uint8_t* in_bytes = (uint8_t*) in; uint8_t* in_bytes = (uint8_t*) in;
uint64_t* in64 = (uint64_t*) in; uint64_t* in64 = (uint64_t*) in;
int64_t* out64 = (int64_t*) out; int64_t* out64 = (int64_t*) out;
uint32_t i; uint32_t i=0;
#if defined(__SSE2__) #if defined(__SSE2__)
simde__m128i *nr_mod_table128; simde__m128i *nr_mod_table128;
...@@ -173,47 +173,49 @@ void nr_modulation(uint32_t *in, ...@@ -173,47 +173,49 @@ void nr_modulation(uint32_t *in,
return; return;
case 6: case 6:
for (i = 0; i < length - 3 * 64; i += 3 * 64) { if (length > (3*64))
uint64_t x = *in64++; for (i = 0; i < length - 3 * 64; i += 3 * 64) {
uint64_t x1 = x & 0xfff; uint64_t x = *in64++;
*out64++ = nr_64qam_mod_table[x1]; uint64_t x1 = x & 0xfff;
x1 = (x >> 12) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x >> 12) & 0xfff;
x1 = (x >> 24) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x >> 24) & 0xfff;
x1 = (x >> 36) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x >> 36) & 0xfff;
x1 = (x >> 48) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x >> 48) & 0xfff;
uint64_t x2 = (x >> 60); *out64++ = nr_64qam_mod_table[x1];
x = *in64++; uint64_t x2 = (x >> 60);
x2 |= x<<4; x = *in64++;
x1 = x2 & 0xfff; x2 |= x<<4;
*out64++ = nr_64qam_mod_table[x1]; x1 = x2 & 0xfff;
x1 = (x2 >> 12) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 12) & 0xfff;
x1 = (x2 >> 24) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 24) & 0xfff;
x1 = (x2 >> 36) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 36) & 0xfff;
x1 = (x2 >> 48) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 48) & 0xfff;
x2 = ((x>>56)&0xf0) | (x2>>60); *out64++ = nr_64qam_mod_table[x1];
x = *in64++; x2 = ((x>>56)&0xf0) | (x2>>60);
x2 |= x<<8; x = *in64++;
x1 = x2 & 0xfff; x2 |= x<<8;
*out64++ = nr_64qam_mod_table[x1]; x1 = x2 & 0xfff;
x1 = (x2 >> 12) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 12) & 0xfff;
x1 = (x2 >> 24) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 24) & 0xfff;
x1 = (x2 >> 36) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 36) & 0xfff;
x1 = (x2 >> 48) & 0xfff; *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x1]; x1 = (x2 >> 48) & 0xfff;
x2 = ((x>>52)&0xff0) | (x2>>60); *out64++ = nr_64qam_mod_table[x1];
*out64++ = nr_64qam_mod_table[x2]; x2 = ((x>>52)&0xff0) | (x2>>60);
} *out64++ = nr_64qam_mod_table[x2];
}
while (i + 24 <= length) { while (i + 24 <= length) {
uint32_t xx = 0; uint32_t xx = 0;
memcpy(&xx, in_bytes + i / 8, 3); memcpy(&xx, in_bytes + i / 8, 3);
......
...@@ -1302,11 +1302,14 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg) ...@@ -1302,11 +1302,14 @@ void RCconfig_nr_macrlc(configmodule_interface_t *cfg)
config.do_CSIRS = *GNBParamList.paramarray[0][GNB_DO_CSIRS_IDX].iptr; config.do_CSIRS = *GNBParamList.paramarray[0][GNB_DO_CSIRS_IDX].iptr;
config.do_SRS = *GNBParamList.paramarray[0][GNB_DO_SRS_IDX].iptr; config.do_SRS = *GNBParamList.paramarray[0][GNB_DO_SRS_IDX].iptr;
config.force_256qam_off = *GNBParamList.paramarray[0][GNB_FORCE256QAMOFF_IDX].iptr; config.force_256qam_off = *GNBParamList.paramarray[0][GNB_FORCE256QAMOFF_IDX].iptr;
config.force_UL256qam_off = *GNBParamList.paramarray[0][GNB_FORCEUL256QAMOFF_IDX].iptr;
config.use_deltaMCS = *GNBParamList.paramarray[0][GNB_USE_DELTA_MCS_IDX].iptr != 0;
LOG_I(GNB_APP, LOG_I(GNB_APP,
"CSI-RS %d, SRS %d, 256 QAM %s\n", "CSI-RS %d, SRS %d, 256 QAM %s, delta_MCS %s\n",
config.do_CSIRS, config.do_CSIRS,
config.do_SRS, config.do_SRS,
config.force_256qam_off ? "force off" : "may be on"); config.force_256qam_off ? "force off" : "may be on",
config.use_deltaMCS ? "on" : "off");
NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME); NR_ServingCellConfigCommon_t *scc = get_scc_config(cfg, config.minRXTXTIME);
//xer_fprint(stdout, &asn_DEF_NR_ServingCellConfigCommon, scc); //xer_fprint(stdout, &asn_DEF_NR_ServingCellConfigCommon, scc);
......
...@@ -127,6 +127,10 @@ typedef enum { ...@@ -127,6 +127,10 @@ typedef enum {
#define GNB_CONFIG_STRING_FORCE256QAMOFF "force_256qam_off" #define GNB_CONFIG_STRING_FORCE256QAMOFF "force_256qam_off"
#define GNB_CONFIG_STRING_ENABLE_SDAP "enable_sdap" #define GNB_CONFIG_STRING_ENABLE_SDAP "enable_sdap"
#define GNB_CONFIG_STRING_DRBS "drbs" #define GNB_CONFIG_STRING_DRBS "drbs"
#define GNB_CONFIG_STRING_USE_DELTA_MCS "use_deltaMCS"
#define GNB_CONFIG_HLP_USE_DELTA_MCS "Use deltaMCS-based power headroom reporting in PUSCH-Config"
#define GNB_CONFIG_HLP_FORCEUL256QAMOFF "suppress activation of UL 256 QAM despite UE support"
#define GNB_CONFIG_STRING_FORCEUL256QAMOFF "force_UL256qam_off"
#define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID" #define GNB_CONFIG_STRING_GNB_DU_ID "gNB_DU_ID"
#define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID" #define GNB_CONFIG_STRING_GNB_CU_UP_ID "gNB_CU_UP_ID"
...@@ -171,6 +175,8 @@ typedef enum { ...@@ -171,6 +175,8 @@ typedef enum {
{GNB_CONFIG_STRING_DRBS, GNB_CONFIG_HLP_STRING_DRBS, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \ {GNB_CONFIG_STRING_DRBS, GNB_CONFIG_HLP_STRING_DRBS, 0, .iptr=NULL, .defintval=1, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_GNB_DU_ID, GNB_CONFIG_HLP_GNB_DU_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \ {GNB_CONFIG_STRING_GNB_DU_ID, GNB_CONFIG_HLP_GNB_DU_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_GNB_CU_UP_ID, GNB_CONFIG_HLP_GNB_CU_UP_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \ {GNB_CONFIG_STRING_GNB_CU_UP_ID, GNB_CONFIG_HLP_GNB_CU_UP_ID, 0, .u64ptr=NULL, .defint64val=1, TYPE_UINT64, 0}, \
{GNB_CONFIG_STRING_USE_DELTA_MCS, GNB_CONFIG_HLP_USE_DELTA_MCS, 0, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
{GNB_CONFIG_STRING_FORCEUL256QAMOFF, GNB_CONFIG_HLP_FORCEUL256QAMOFF, 0, .iptr=NULL, .defintval=0, TYPE_INT, 0}, \
} }
// clang-format on // clang-format on
...@@ -202,8 +208,10 @@ typedef enum { ...@@ -202,8 +208,10 @@ typedef enum {
#define GNB_FORCE256QAMOFF_IDX 24 #define GNB_FORCE256QAMOFF_IDX 24
#define GNB_ENABLE_SDAP_IDX 25 #define GNB_ENABLE_SDAP_IDX 25
#define GNB_DRBS 26 #define GNB_DRBS 26
#define GNB_GNB_DU_ID_IDX 27 #define GNB_GNB_DU_ID_IDX 27
#define GNB_GNB_CU_UP_ID_IDX 28 #define GNB_GNB_CU_UP_ID_IDX 28
#define GNB_USE_DELTA_MCS_IDX 29
#define GNB_FORCEUL256QAMOFF_IDX 30
#define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD} #define TRACKING_AREA_CODE_OKRANGE {0x0001,0xFFFD}
#define GNBPARAMS_CHECK { \ #define GNBPARAMS_CHECK { \
...@@ -221,6 +229,24 @@ typedef enum { ...@@ -221,6 +229,24 @@ typedef enum {
{ .s5 = { NULL } }, \ { .s5 = { NULL } }, \
{ .s5 = { NULL } }, \ { .s5 = { NULL } }, \
{ .s5 = { NULL } }, \ { .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
} }
/*-------------------------------------------------------------------------------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------------------------------------------------------------------------------*/
......
...@@ -2667,9 +2667,12 @@ void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti) ...@@ -2667,9 +2667,12 @@ void mac_remove_nr_ue(gNB_MAC_INST *nr_mac, rnti_t rnti)
delete_nr_ue_data(UE, nr_mac->common_channels, &UE_info->uid_allocator); delete_nr_ue_data(UE, nr_mac->common_channels, &UE_info->uid_allocator);
} }
uint8_t nr_get_tpc(int target, int snrx10, int incr) // all values passed to this function are in dB x10
uint8_t nr_get_tpc(int target, uint8_t cqi, int incr, int tx_power)
{ {
// all values passed to this function are in dB x10 // al values passed to this function are x10
int snrx10 = (cqi * 5) - 640 - (tx_power * 10);
LOG_D(NR_MAC, "tpc : target %d, cqi %d, snrx10 %d, tx_power %d\n", target, ((int)cqi * 5) - 640, snrx10, tx_power);
if (snrx10 > target + incr) return 0; // decrease 1dB if (snrx10 > target + incr) return 0; // decrease 1dB
if (snrx10 < target - (3*incr)) return 3; // increase 3dB if (snrx10 < target - (3*incr)) return 3; // increase 3dB
if (snrx10 < target - incr) return 2; // increase 1dB if (snrx10 < target - incr) return 2; // increase 1dB
......
...@@ -1044,7 +1044,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id, ...@@ -1044,7 +1044,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
// tpc (power control) only if we received AckNack // tpc (power control) only if we received AckNack
if (uci_01->harq.harq_confidence_level == 0 && uci_01->ul_cqi != 0xff) { if (uci_01->harq.harq_confidence_level == 0 && uci_01->ul_cqi != 0xff) {
sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640; sched_ctrl->pucch_snrx10 = uci_01->ul_cqi * 5 - 640;
sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, sched_ctrl->pucch_snrx10, 30); sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, uci_01->ul_cqi, 30, 0);
} else } else
sched_ctrl->tpc1 = 1; sched_ctrl->tpc1 = 1;
} }
...@@ -1087,7 +1087,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, ...@@ -1087,7 +1087,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
// TODO PUCCH2 SNR computation is not correct -> ignore the following // TODO PUCCH2 SNR computation is not correct -> ignore the following
if (uci_234->ul_cqi != 0xff) { if (uci_234->ul_cqi != 0xff) {
sched_ctrl->pucch_snrx10 = uci_234->ul_cqi * 5 - 640; sched_ctrl->pucch_snrx10 = uci_234->ul_cqi * 5 - 640;
sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, sched_ctrl->pucch_snrx10, 30); sched_ctrl->tpc1 = nr_get_tpc(nrmac->pucch_target_snrx10, uci_234->ul_cqi, 30, 0);
} }
// TODO: handle SR // TODO: handle SR
......
...@@ -85,22 +85,30 @@ int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int ...@@ -85,22 +85,30 @@ int get_ul_tda(gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon_t *scc, int
return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots) return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
} }
static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS) static int compute_ph_factor(int mu, int tbs_bits, int rb, int n_layers, int n_symbols, int n_dmrs, long *deltaMCS, bool include_bw)
{ {
// 38.213 7.1.1 // 38.213 7.1.1
// if the PUSCH transmission is over more than one layer delta_tf = 0 // if the PUSCH transmission is over more than one layer delta_tf = 0
int delta_tf = 0; float delta_tf = 0;
if(deltaMCS != NULL && n_layers == 1) { if(deltaMCS != NULL && n_layers == 1) {
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb; const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
const float BPRE = (float) tbs_bits/n_re; //TODO change for PUSCH with CSI const float BPRE = (float) tbs_bits/n_re; //TODO change for PUSCH with CSI
const float f = pow(2, BPRE * 1.25); const float f = pow(2, BPRE * 1.25);
const float beta = 1.0f; //TODO change for PUSCH with CSI const float beta = 1.0f; //TODO change for PUSCH with CSI
delta_tf = (10 * log10((f - 1) * beta)); delta_tf = (10 * log10((f - 1) * beta));
LOG_D(NR_MAC,
"PH factor delta_tf %f (n_re %d, n_rb %d, n_dmrs %d, n_symbols %d, tbs %d BPRE %f f %f)\n",
delta_tf,
n_re,
rb,
n_dmrs,
n_symbols,
tbs_bits,
BPRE,
f);
} }
const float bw_factor = (include_bw) ? 10 * log10(rb << mu) : 0;
const int bw_factor = 10 * log10(rb << mu); return ((int)roundf(delta_tf + bw_factor));
return (delta_tf + bw_factor);
} }
// For both UL-SCH except: // For both UL-SCH except:
...@@ -280,14 +288,16 @@ static int nr_process_mac_pdu(instance_t module_idP, ...@@ -280,14 +288,16 @@ static int nr_process_mac_pdu(instance_t module_idP,
PH = phr->PH - 32 + (phr->PH - 54); PH = phr->PH - 32 + (phr->PH - 54);
// in sched_ctrl we set normalized PH wrt MCS and PRBs // in sched_ctrl we set normalized PH wrt MCS and PRBs
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL; long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_ctrl->ph = PH + sched_ctrl->ph = PH
compute_ph_factor(ul_bwp->scs, + compute_ph_factor(ul_bwp->scs,
sched_pusch->tb_size<<3, sched_pusch->tb_size << 3,
sched_pusch->rbSize, sched_pusch->rbSize,
sched_pusch->nrOfLayers, sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, //n_symbols sched_pusch->tda_info.nrOfSymbols, // n_symbols
sched_pusch->dmrs_info.num_dmrs_symb*sched_pusch->dmrs_info.N_PRB_DMRS, //n_dmrs sched_pusch->dmrs_info.num_dmrs_symb * sched_pusch->dmrs_info.N_PRB_DMRS, // n_dmrs
deltaMCS); deltaMCS,
true);
sched_ctrl->ph0 = PH;
/* 38.133 Table10.1.18.1-1 */ /* 38.133 Table10.1.18.1-1 */
sched_ctrl->pcmax = PCMAX - 29; sched_ctrl->pcmax = PCMAX - 29;
LOG_D(NR_MAC, "SINGLE ENTRY PHR R1 %d PH %d (%d dB) R2 %d PCMAX %d (%d dBm)\n", LOG_D(NR_MAC, "SINGLE ENTRY PHR R1 %d PH %d (%d dB) R2 %d PCMAX %d (%d dBm)\n",
...@@ -628,15 +638,38 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -628,15 +638,38 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
rssi); rssi);
// if not missed detection (10dB threshold for now) // if not missed detection (10dB threshold for now)
if (rssi>0) { if (rssi > 0) {
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640; int txpower_calc = UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.phr_txpower_calc;
if (ul_cqi != 0xff) { UE->mac_stats.deltaMCS = txpower_calc;
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, UE_scheduling_control->pusch_snrx10, 30); UE->mac_stats.NPRB = UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.rbSize;
} if (ul_cqi != 0xff)
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30, txpower_calc);
if (UE_scheduling_control->ph < 0 && UE_scheduling_control->tpc0 > 1)
UE_scheduling_control->tpc0 = 1;
if (timing_advance != 0xffff) if (timing_advance != 0xffff)
UE_scheduling_control->ta_update = timing_advance; UE_scheduling_control->ta_update = timing_advance;
UE_scheduling_control->raw_rssi = rssi; UE_scheduling_control->raw_rssi = rssi;
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - (txpower_calc * 10);
if (UE_scheduling_control->tpc0 > 1)
LOG_D(NR_MAC,
"[UE %04x] %d.%d. PUSCH TPC %d and TA %d pusch_snrx10 %d rssi %d phrx_tx_power %d PHR (1PRB) %d mcs %d, nb_rb %d\n",
UE->rnti,
frameP,
slotP,
UE_scheduling_control->tpc0,
UE_scheduling_control->ta_update,
UE_scheduling_control->pusch_snrx10,
UE_scheduling_control->raw_rssi,
txpower_calc,
UE_scheduling_control->ph,
UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.mcs,
UE_scheduling_control->ul_harq_processes[harq_pid].sched_pusch.rbSize);
NR_UE_ul_harq_t *cur_harq = &UE_scheduling_control->ul_harq_processes[harq_pid];
if (cur_harq->round == 0)
UE->mac_stats.pusch_snrx10 = UE_scheduling_control->pusch_snrx10;
LOG_D(NR_MAC, "[UE %04x] PUSCH TPC %d and TA %d\n",UE->rnti,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update); LOG_D(NR_MAC, "[UE %04x] PUSCH TPC %d and TA %d\n",UE->rnti,UE_scheduling_control->tpc0,UE_scheduling_control->ta_update);
} }
else{ else{
...@@ -764,10 +797,9 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -764,10 +797,9 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
ra->rnti); ra->rnti);
NR_UE_sched_ctrl_t *UE_scheduling_control = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *UE_scheduling_control = &UE->UE_sched_ctrl;
if (ul_cqi != 0xff) { if (ul_cqi != 0xff) {
UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640; UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, ul_cqi, 30, UE_scheduling_control->sched_pusch.phr_txpower_calc);
UE_scheduling_control->tpc0 = nr_get_tpc(target_snrx10, UE_scheduling_control->pusch_snrx10, 30); UE_scheduling_control->pusch_snrx10 = ul_cqi * 5 - 640 - UE_scheduling_control->sched_pusch.phr_txpower_calc * 10;
} }
if (timing_advance != 0xffff) if (timing_advance != 0xffff)
UE_scheduling_control->ta_update = timing_advance; UE_scheduling_control->ta_update = timing_advance;
...@@ -780,7 +812,6 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP, ...@@ -780,7 +812,6 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
reset_ul_harq_list(UE_scheduling_control); reset_ul_harq_list(UE_scheduling_control);
nr_clear_ra_proc(ra); nr_clear_ra_proc(ra);
process_CellGroup(ra->CellGroup, UE); process_CellGroup(ra->CellGroup, UE);
} else { } else {
LOG_A(NR_MAC, "[RAPROC] RA-Msg3 received (sdu_lenP %d)\n", sdu_lenP); LOG_A(NR_MAC, "[RAPROC] RA-Msg3 received (sdu_lenP %d)\n", sdu_lenP);
LOG_D(NR_MAC, "[RAPROC] Received Msg3:\n"); LOG_D(NR_MAC, "[RAPROC] Received Msg3:\n");
...@@ -1458,13 +1489,21 @@ static void nr_ue_max_mcs_min_rb(int mu, ...@@ -1458,13 +1489,21 @@ static void nr_ue_max_mcs_min_rb(int mu,
update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm); update_ul_ue_R_Qm(*mcs, ul_bwp->mcs_table, ul_bwp->pusch_Config, &R, &Qm);
long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL; long *deltaMCS = ul_bwp->pusch_Config ? ul_bwp->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
tbs_bits = nr_compute_tbs(Qm, R, *Rb,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
0, // nb_rb_oh
0,
sched_pusch->nrOfLayers);
int tx_power = compute_ph_factor(mu, int tx_power = compute_ph_factor(mu,
tbs_bits, tbs_bits,
*Rb, *Rb,
sched_pusch->nrOfLayers, sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb, sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS); deltaMCS,
true);
while (ph_limit < tx_power && *Rb > minRb) { while (ph_limit < tx_power && *Rb > minRb) {
(*Rb)--; (*Rb)--;
...@@ -1479,8 +1518,10 @@ static void nr_ue_max_mcs_min_rb(int mu, ...@@ -1479,8 +1518,10 @@ static void nr_ue_max_mcs_min_rb(int mu,
*Rb, *Rb,
sched_pusch->nrOfLayers, sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb, sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS); deltaMCS,
true);
LOG_D(NR_MAC, "Checking %d RBs, MCS %d, ph_limit %d, tx_power %d\n",*Rb,*mcs,ph_limit,tx_power);
} }
while (ph_limit < tx_power && *mcs > 0) { while (ph_limit < tx_power && *mcs > 0) {
...@@ -1497,8 +1538,10 @@ static void nr_ue_max_mcs_min_rb(int mu, ...@@ -1497,8 +1538,10 @@ static void nr_ue_max_mcs_min_rb(int mu,
*Rb, *Rb,
sched_pusch->nrOfLayers, sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS*sched_pusch->dmrs_info.num_dmrs_symb, sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS); deltaMCS,
true);
LOG_D(NR_MAC, "Checking %d RBs, MCS %d, ph_limit %d, tx_power %d\n",*Rb,*mcs,ph_limit,tx_power);
} }
if (ph_limit < tx_power) if (ph_limit < tx_power)
...@@ -1667,7 +1710,7 @@ static void pf_ul(module_id_t module_id, ...@@ -1667,7 +1710,7 @@ static void pf_ul(module_id_t module_id,
gNB_MAC_INST *nrmac = RC.nrmac[module_id]; gNB_MAC_INST *nrmac = RC.nrmac[module_id];
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = nrmac->common_channels[CC_id].ServingCellConfigCommon;
const int min_rb = 5; const int min_rb = nrmac->min_grant_prb;
// UEs that could be scheduled // UEs that could be scheduled
UEsched_t UE_sched[MAX_MOBILES_PER_GNB] = {0}; UEsched_t UE_sched[MAX_MOBILES_PER_GNB] = {0};
int remainUEs = max_num_ue; int remainUEs = max_num_ue;
...@@ -1743,9 +1786,10 @@ static void pf_ul(module_id_t module_id, ...@@ -1743,9 +1786,10 @@ static void pf_ul(module_id_t module_id,
const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */ const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */
if (bo->harq_round_max == 1) if (bo->harq_round_max == 1)
sched_pusch->mcs = max_mcs; sched_pusch->mcs = max_mcs;
else else {
sched_pusch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame); sched_pusch->mcs = get_mcs_from_bler(bo, stats, &sched_ctrl->ul_bler_stats, max_mcs, frame);
LOG_D(NR_MAC,"%d.%d starting mcs %d bleri %f\n",frame,slot,sched_pusch->mcs,sched_ctrl->ul_bler_stats.bler);
}
/* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled /* Schedule UE on SR or UL inactivity and no data (otherwise, will be scheduled
* based on data to transmit) */ * based on data to transmit) */
if (B == 0 && do_sched) { if (B == 0 && do_sched) {
...@@ -1814,6 +1858,25 @@ static void pf_ul(module_id_t module_id, ...@@ -1814,6 +1858,25 @@ static void pf_ul(module_id_t module_id,
0, // nb_rb_oh 0, // nb_rb_oh
0, 0,
sched_pusch->nrOfLayers) >> 3; sched_pusch->nrOfLayers) >> 3;
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
sched_pusch->tb_size << 3,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
false);
LOG_D(NR_MAC,
"pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n",
frame,
slot,
UE->rnti,
sched_pusch->rbSize,
sched_pusch->mcs,
sched_pusch->tb_size << 3,
sched_pusch->phr_txpower_calc);
/* Mark the corresponding RBs as used */ /* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize; n_rb_sched -= sched_pusch->rbSize;
...@@ -1930,6 +1993,19 @@ static void pf_ul(module_id_t module_id, ...@@ -1930,6 +1993,19 @@ static void pf_ul(module_id_t module_id,
&TBS, &TBS,
&rbSize); &rbSize);
// Calacualte the normalized tx_power for PHR
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tbs_bits = TBS << 3;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
tbs_bits,
rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
false);
sched_pusch->rbSize = rbSize; sched_pusch->rbSize = rbSize;
sched_pusch->tb_size = TBS; sched_pusch->tb_size = TBS;
LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n", LOG_D(NR_MAC,"rbSize %d (max_rbSize %d), TBS %d, est buf %d, sched_ul %d, B %d, CCE %d, num_dmrs_symb %d, N_PRB_DMRS %d\n",
...@@ -2324,6 +2400,19 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n ...@@ -2324,6 +2400,19 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R); pusch_pdu->maintenance_parms_v3.ldpcBaseGraph = get_BG(sched_pusch->tb_size<<3,sched_pusch->R);
// Calacualte the normalized tx_power for PHR
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
int tbs_bits = pusch_pdu->pusch_data.tb_size << 3;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs,
tbs_bits,
sched_pusch->rbSize,
sched_pusch->nrOfLayers,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb,
deltaMCS,
false);
NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info; NR_UE_ServingCell_Info_t *sc_info = &UE->sc_info;
if (sc_info->rateMatching_PUSCH) { if (sc_info->rateMatching_PUSCH) {
// TBS_LBRM according to section 5.4.2.1 of 38.212 // TBS_LBRM according to section 5.4.2.1 of 38.212
......
...@@ -273,7 +273,7 @@ NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc, ...@@ -273,7 +273,7 @@ NR_pusch_dmrs_t get_ul_dmrs_params(const NR_ServingCellConfigCommon_t *scc,
const NR_tda_info_t *tda_info, const NR_tda_info_t *tda_info,
const int Layers); const int Layers);
uint8_t nr_get_tpc(int target, int snrx10, int incr); uint8_t nr_get_tpc(int target, uint8_t cqi, int incr, int tx_power);
int get_spf(nfapi_nr_config_request_scf_t *cfg); int get_spf(nfapi_nr_config_request_scf_t *cfg);
......
...@@ -156,15 +156,24 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset ...@@ -156,15 +156,24 @@ size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset
for (int i = 1; i < gNB->ul_bler.harq_round_max; i++) for (int i = 1; i < gNB->ul_bler.harq_round_max; i++)
output += snprintf(output, end - output, "/%"PRIu64, stats->ul.rounds[i]); output += snprintf(output, end - output, "/%"PRIu64, stats->ul.rounds[i]);
char deltaMCS_str[100]="\0";
if (UE->current_UL_BWP.pusch_Config && UE->current_UL_BWP.pusch_Config->pusch_PowerControl->deltaMCS) {
sprintf(deltaMCS_str,"deltaMCS %d\n",UE->mac_stats.deltaMCS);
}
output += snprintf(output, output += snprintf(output,
end - output, end - output,
", ulsch_errors %"PRIu64", ulsch_DTX %d, BLER %.5f MCS (%d) %d\n", ", ulsch_errors %"PRIu64", ulsch_DTX %d, BLER %.5f MCS (%d) %d (Qm %d %s dB) NPRB %d SNR %d.%d dB\n",
stats->ul.errors, stats->ul.errors,
stats->ulsch_DTX, stats->ulsch_DTX,
sched_ctrl->ul_bler_stats.bler, sched_ctrl->ul_bler_stats.bler,
UE->current_UL_BWP.mcs_table, UE->current_UL_BWP.mcs_table,
sched_ctrl->ul_bler_stats.mcs); sched_ctrl->ul_bler_stats.mcs,
nr_get_Qm_ul(sched_ctrl->ul_bler_stats.mcs,UE->current_UL_BWP.mcs_table),
deltaMCS_str,
UE->mac_stats.NPRB,
sched_ctrl->pusch_snrx10 / 10,
sched_ctrl->pusch_snrx10 % 10);
output += snprintf(output, output += snprintf(output,
end - output, end - output,
"UE %04x: MAC: TX %14"PRIu64" RX %14"PRIu64" bytes\n", "UE %04x: MAC: TX %14"PRIu64" RX %14"PRIu64" bytes\n",
......
...@@ -135,6 +135,8 @@ typedef struct nr_mac_config_t { ...@@ -135,6 +135,8 @@ typedef struct nr_mac_config_t {
int do_CSIRS; int do_CSIRS;
int do_SRS; int do_SRS;
bool force_256qam_off; bool force_256qam_off;
bool force_UL256qam_off;
bool use_deltaMCS;
//int pusch_TargetSNRx10; //int pusch_TargetSNRx10;
//int pucch_TargetSNRx10; //int pucch_TargetSNRx10;
} nr_mac_config_t; } nr_mac_config_t;
...@@ -383,6 +385,7 @@ typedef struct NR_sched_pusch { ...@@ -383,6 +385,7 @@ typedef struct NR_sched_pusch {
int time_domain_allocation; int time_domain_allocation;
NR_tda_info_t tda_info; NR_tda_info_t tda_info;
NR_pusch_dmrs_t dmrs_info; NR_pusch_dmrs_t dmrs_info;
int phr_txpower_calc;
} NR_sched_pusch_t; } NR_sched_pusch_t;
typedef struct NR_sched_srs { typedef struct NR_sched_srs {
...@@ -551,6 +554,9 @@ typedef struct { ...@@ -551,6 +554,9 @@ typedef struct {
/// PHR info: power headroom level (dB) /// PHR info: power headroom level (dB)
int ph; int ph;
/// PHR info: power headroom level (dB) for 1 PRB
int ph0;
/// PHR info: nominal UE transmit power levels (dBm) /// PHR info: nominal UE transmit power levels (dBm)
int pcmax; int pcmax;
...@@ -649,6 +655,9 @@ typedef struct NR_mac_stats { ...@@ -649,6 +655,9 @@ typedef struct NR_mac_stats {
int cumul_rsrp; int cumul_rsrp;
uint8_t num_rsrp_meas; uint8_t num_rsrp_meas;
char srs_stats[50]; // Statistics may differ depending on SRS usage char srs_stats[50]; // Statistics may differ depending on SRS usage
int pusch_snrx10;
int deltaMCS;
int NPRB;
} NR_mac_stats_t; } NR_mac_stats_t;
typedef struct NR_bler_options { typedef struct NR_bler_options {
......
...@@ -1200,6 +1200,7 @@ static void set_dl_mcs_table(int scs, ...@@ -1200,6 +1200,7 @@ static void set_dl_mcs_table(int scs,
} }
static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config, static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config,
const bool use_deltaMCS,
const NR_ServingCellConfigCommon_t *scc, const NR_ServingCellConfigCommon_t *scc,
const NR_UE_NR_Capability_t *uecap) const NR_UE_NR_Capability_t *uecap)
{ {
...@@ -1256,9 +1257,12 @@ static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusc ...@@ -1256,9 +1257,12 @@ static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusc
asn1cSeqAdd(&pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList->list, plrefRS); asn1cSeqAdd(&pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList->list, plrefRS);
pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL; pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL; pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL;
if (!pusch_Config->pusch_PowerControl->deltaMCS) if (use_deltaMCS) {
pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS)); if (!pusch_Config->pusch_PowerControl->deltaMCS)
*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled; pusch_Config->pusch_PowerControl->deltaMCS = calloc(1, sizeof(*pusch_Config->pusch_PowerControl->deltaMCS));
*pusch_Config->pusch_PowerControl->deltaMCS = NR_PUSCH_PowerControl__deltaMCS_enabled;
}
else free(pusch_Config->pusch_PowerControl->deltaMCS);
pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = NULL; pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = NULL;
pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToReleaseList = NULL; pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToReleaseList = NULL;
pusch_Config->frequencyHopping = NULL; pusch_Config->frequencyHopping = NULL;
...@@ -1470,7 +1474,7 @@ static void config_uplinkBWP(NR_BWP_Uplink_t *ubwp, ...@@ -1470,7 +1474,7 @@ static void config_uplinkBWP(NR_BWP_Uplink_t *ubwp,
pusch_Config = clone_pusch_config(servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop] pusch_Config = clone_pusch_config(servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]
->bwp_Dedicated->pusch_Config->choice.setup); ->bwp_Dedicated->pusch_Config->choice.setup);
} }
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config, scc, configuration->force_256qam_off ? NULL : uecap); ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config, configuration->use_deltaMCS, scc, configuration->force_UL256qam_off ? NULL : uecap);
long maxMIMO_Layers = servingcellconfigdedicated && long maxMIMO_Layers = servingcellconfigdedicated &&
servingcellconfigdedicated->uplinkConfig servingcellconfigdedicated->uplinkConfig
...@@ -2341,7 +2345,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid, ...@@ -2341,7 +2345,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
config_pucch_resset1(pucch_Config, NULL); config_pucch_resset1(pucch_Config, NULL);
set_pucch_power_config(pucch_Config, configuration->do_CSIRS); set_pucch_power_config(pucch_Config, configuration->do_CSIRS);
initialUplinkBWP->pusch_Config = config_pusch(NULL, scc, NULL); initialUplinkBWP->pusch_Config = config_pusch(NULL, configuration->use_deltaMCS, scc, NULL);
long maxMIMO_Layers = uplinkConfig && uplinkConfig->pusch_ServingCellConfig long maxMIMO_Layers = uplinkConfig && uplinkConfig->pusch_ServingCellConfig
&& uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1 && uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1
...@@ -2665,7 +2669,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, ...@@ -2665,7 +2669,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
scc); scc);
NR_BWP_UplinkDedicated_t *ul_bwp_Dedicated = SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP; NR_BWP_UplinkDedicated_t *ul_bwp_Dedicated = SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, ul_bwp_Dedicated->pusch_Config->choice.setup); set_ul_mcs_table(configuration->force_UL256qam_off ? NULL : uecap, scc, ul_bwp_Dedicated->pusch_Config->choice.setup);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list = struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list =
SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList; SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
...@@ -2683,7 +2687,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, ...@@ -2683,7 +2687,7 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
int bwp_size = NRRIV2BW(ul_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); int bwp_size = NRRIV2BW(ul_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (ul_bwp->bwp_Dedicated->pusch_Config) { if (ul_bwp->bwp_Dedicated->pusch_Config) {
NR_PUSCH_Config_t *pusch_Config = ul_bwp->bwp_Dedicated->pusch_Config->choice.setup; NR_PUSCH_Config_t *pusch_Config = ul_bwp->bwp_Dedicated->pusch_Config->choice.setup;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, pusch_Config); set_ul_mcs_table(configuration->force_UL256qam_off ? NULL : uecap, scc, pusch_Config);
if (pusch_Config->maxRank == NULL) { if (pusch_Config->maxRank == NULL) {
pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank)); pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank));
} }
...@@ -2878,7 +2882,7 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC ...@@ -2878,7 +2882,7 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
pusch_Config = clone_pusch_config( pusch_Config = clone_pusch_config(
servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup); servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup);
} }
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config, servingcellconfigcommon, uecap); initialUplinkBWP->pusch_Config = config_pusch(pusch_Config, configuration->use_deltaMCS,servingcellconfigcommon, uecap);
long maxMIMO_Layers = long maxMIMO_Layers =
servingcellconfigdedicated->uplinkConfig && servingcellconfigdedicated->uplinkConfig->pusch_ServingCellConfig servingcellconfigdedicated->uplinkConfig && servingcellconfigdedicated->uplinkConfig->pusch_ServingCellConfig
......
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