Implemented eMBMS FFT procedures (scheduling)

	ACKNOWLEDGEMENT:
 	1. This commit was developed at Vicomtech (https://www.vicomtech.org) under UE project CDN-X-ALL: "CDN edge-cloud computing for efficient cache and reliable streaming aCROSS Aggregated unicast-multicast LinkS"
 	2. Project funded by Fed4FIRE+ OC5 (https://www.fed4fire.eu)
Signed-off-by: javier.morgade@ieee.org <javier.morgade@ieee.org>

openair1/SCHED/phy_procedures_lte_eNb.c

@@ -123,7 +123,7 @@ void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
   //  uint8_t sync_area=255;
 #endif
   int             subframe = proc->subframe_tx;
-  AssertFatal (1 == 0, "pmch not tested for the moment, exiting\n");
+  AssertFatal (1 == 1, "pmch not tested for the moment, exiting\n");
   // This is DL-Cell spec pilots in Control region
   generate_pilots_slot (eNB, eNB->common_vars.txdataF, AMP, subframe << 1, 1);
 #if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0))
@@ -136,6 +136,7 @@ void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
     proc->frame_tx,
     subframe);
   */
+  mch_pduP= &RC.mac[eNB->Mod_id]->common_channels[eNB->CC_id].MCH_pdu;
   if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0
     LOG_D(PHY,"[eNB%"PRIu8"] Frame %d subframe %d : Got MCH pdu for MBSFN (MCS %"PRIu8", TBS %d) \n",
           eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->mcs,
@@ -149,6 +150,7 @@ void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
 
   if (mch_pduP) {
     fill_eNB_dlsch_MCH (eNB, mch_pduP->mcs, 1, 0);
+    eNB->dlsch_MCH->harq_ids[proc->frame_tx%2][subframe] = 0;
     // Generate PMCH
     generate_mch (eNB, proc, (uint8_t *) mch_pduP->payload);
   } else {

openair1/SCHED/ru_procedures.c

@@ -94,10 +94,25 @@ void feptx0(RU_t *ru,int slot) {
 					                      fp->nb_prefix_samples,
 					                      CYCLIC_PREFIX);
     else {
+	if(is_pmch_subframe(ru->proc.frame_tx,subframe,fp)){
+               if(slot==0){//just use one slot chance
+                        normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
+                                                           (int*)&ru->common.txdata[aa][slot_offset],
+                                                                   2,
+                                                                   fp);
+                        PHY_ofdm_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF+fp->ofdm_symbol_size*2],
+                                                              (int*)&ru->common.txdata[aa][slot_offset+((fp->ofdm_symbol_size>>2)*2+fp->ofdm_symbol_size*2)],
+                                                              fp->ofdm_symbol_size,
+                                                              10,
+                                                              fp->ofdm_symbol_size>>2,
+                                                              CYCLIC_PREFIX);
+                       LOG_D(PHY,"SFN/SF:RU:TX:%d/%d Generating slot %d F(%d) t(%d) IS PMCH(%d)\n",ru->proc.frame_tx, ru->proc.subframe_tx,slot,slot*slot_sizeF+fp->ofdm_symbol_size*2,slot_offset+((fp->ofdm_symbol_size>>2)*2+fp->ofdm_symbol_size*2),is_pmch_subframe(ru->proc.frame_tx,subframe,fp));
+                }
+	}else{
 	     /* AssertFatal(ru->generate_dmrs_sync==1 && (fp->frame_type != TDD || ru->is_slave == 1),
 			  "ru->generate_dmrs_sync should not be set, frame_type %d, is_slave %d\n",
 			  fp->frame_type,ru->is_slave);
-*/
+	*/
 	      int num_symb = 7;
 
 	      if (subframe_select(fp,subframe) == SF_S) num_symb=fp->dl_symbols_in_S_subframe+1;
@@ -121,8 +136,7 @@ void feptx0(RU_t *ru,int slot) {
 				(int*)&ru->common.txdata[aa][slot_offset],
 				num_symb,
 				fp);
-
-       
+	}
   }
    /* 
     len = fp->samples_per_tti>>1;
@@ -311,6 +325,18 @@ void feptx_ofdm(RU_t *ru) {
                      fp->nb_prefix_samples,
                      CYCLIC_PREFIX);
       } else {
+       if(is_pmch_subframe(ru->proc.frame_tx,subframe,fp)/*subframe==1*/){
+        normal_prefix_mod(&ru->common.txdataF_BF[aa][0],
+                          dummy_tx_b,
+                          2,
+                          fp);
+        PHY_ofdm_mod(&ru->common.txdataF_BF[aa][fp->ofdm_symbol_size*2],
+                        dummy_tx_b+((fp->ofdm_symbol_size>>2)*2+fp->ofdm_symbol_size*2),
+                     fp->ofdm_symbol_size,
+                     10,
+                     fp->ofdm_symbol_size>>2,
+                    CYCLIC_PREFIX);
+        }else{
         normal_prefix_mod(&ru->common.txdataF_BF[aa][slot_offset_F],
                           dummy_tx_b,
                           7,
@@ -322,6 +348,7 @@ void feptx_ofdm(RU_t *ru) {
 			    7,
 			    fp);
 	}
+      }
 
       // if S-subframe generate first slot only
       if (subframe_select(fp,subframe) == SF_S)

openair1/SCHED_UE/phy_procedures_lte_ue.c

@@ -2896,7 +2896,7 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PMCH_D
 
       dlsch_unscrambling(&ue->frame_parms,1,ue->dlsch_MCH[0],
                          ue->dlsch_MCH[0]->harq_processes[0]->G,
-                         ue->pdsch_vars_MCH[0]->llr[0],0,subframe_rx<<1);
+                         ue->pdsch_vars_MCH[ue->current_thread_id[subframe_rx]][0]->llr[0],0,subframe_rx<<1);
       LOG_D(PHY,"start turbo decode for MCH %d.%d --> nb_rb %d \n", frame_rx, subframe_rx, ue->dlsch_MCH[0]->harq_processes[0]->nb_rb);
       LOG_D(PHY,"start turbo decode for MCH %d.%d --> rb_alloc_even %x \n", frame_rx, subframe_rx, (unsigned int)((intptr_t)ue->dlsch_MCH[0]->harq_processes[0]->rb_alloc_even));
       LOG_D(PHY,"start turbo decode for MCH %d.%d --> Qm %d \n", frame_rx, subframe_rx, ue->dlsch_MCH[0]->harq_processes[0]->Qm);
@@ -2904,7 +2904,7 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PMCH_D
       LOG_D(PHY,"start turbo decode for MCH %d.%d --> G  %d \n", frame_rx, subframe_rx, ue->dlsch_MCH[0]->harq_processes[0]->G);
       LOG_D(PHY,"start turbo decode for MCH %d.%d --> Kmimo  %d \n", frame_rx, subframe_rx, ue->dlsch_MCH[0]->Kmimo);
       ret = dlsch_decoding(ue,
-                           ue->pdsch_vars_MCH[0]->llr[0],
+                           ue->pdsch_vars_MCH[ue->current_thread_id[subframe_rx]][0]->llr[0],
                            &ue->frame_parms,
                            ue->dlsch_MCH[0],
                            ue->dlsch_MCH[0]->harq_processes[0],