Skip to content

O
OpenXG-RAN
Commit 667a4987 authored by Rohit Gupta's avatar Rohit Gupta
Browse files
Options

Merge branch 'develop' into Feature-6-fix_test_core_network_with_scenarios

parents 85ea6023 47352355
Show whitespace changes
Inline Side-by-side
Showing with 4024 additions and 1518 deletions
cmake_targets/autotests/README.txt
View file @ 667a4987
......@@ -189,6 +189,22 @@ Obj.# Case# Test# Description
01 75 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
01 75 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
01 80 00 lte-softmodem + RRH tests with BladeRF RF as eNB and ALU EPC w/ Bandrich COTS UE for TX/1RX
01 80 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
01 80 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
01 80 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
01 80 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
01 80 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
01 80 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
01 85 00 lte-softmodem + RRH tests with USRP X310 RF as eNB and ALU EPC w/ Bandrich COTS UE for TX/1RX
01 85 00 Band 7 FDD 5MHz UL Throughput for 300 sec for 1TX/1RX
01 85 01 Band 7 FDD 10MHz UL Throughput for 300 sec for 1TX/1RX
01 85 02 Band 7 FDD 20MHz UL Throughput for 300 sec for 1TX/1RX
01 85 03 Band 7 FDD 5MHz DL Throughput for 300 sec for 1TX/1RX
01 85 04 Band 7 FDD 10MHz DL Throughput for 300 sec for 1TX/1RX
01 85 05 Band 7 FDD 20MHz DL Throughput for 300 sec for 1TX/1RX
01 64 lte-softmodem-noS1 tests
......
cmake_targets/autotests/run_exec_autotests.bash
View file @ 667a4987
......@@ -12,7 +12,7 @@ trap handle_ctrl_c INT
source $OPENAIR_DIR/cmake_targets/tools/test_helper
#SUDO="sudo -E "
SUDO="sudo -E -S"
tdir=$OPENAIR_DIR/cmake_targets/autotests
rm -fr $tdir/bin
mkdir -p $tdir/bin
......@@ -404,14 +404,12 @@ until [ -z "$1" ]
esac
done
if [ "$SET_PASSWORD" == "1" ]; then
mypassword=$passwd
else
read -s -p "Enter Password: " mypassword
if [ "$SET_PASSWORD" != "1" ]; then
read -s -p "Enter Password: " passwd
fi
tmpfile=`mktemp`
echo \'$passwd\' | $SUDO echo $HOME >& $tmpfile
echo $passwd | $SUDO echo $HOME > $tmpfile
tstsudo=`cat $tmpfile`
if [ "$tstsudo" != "$HOME" ]; then
echo "$USER might not have sudo privileges. Exiting"
......@@ -509,7 +507,7 @@ for search_expr in "${test_case_array[@]}"
if [ "$class" == "compilation" ]; then
test_compile "$name" "$compile_prog" "$compile_prog_args" "$pre_exec" "$pre_exec_args" "$main_exec" "$main_exec_args" "search_array_true[@]" "$search_expr_false" "$nruns" "$pre_compile_prog" "$class" "$compile_prog_out" "$tags"
elif [ "$class" == "execution" ]; then
$SUDO killall -q oaisim_nos1
echo \'passwd\' | $SUDO killall -q oaisim_nos1
test_compile_and_run "$name" "$compile_prog" "$compile_prog_args" "$pre_exec" "$pre_exec_args" "$main_exec" "$main_exec_args" "search_array_true[@]" "$search_expr_false" "$nruns" "$pre_compile_prog" "$class" "$compile_prog_out" "$tags" "$mypassword" "$test_config_file"
else
echo "Unexpected class of test case...Skipping the test case $name ...."
......
cmake_targets/autotests/test_case_list.xml
View file @ 667a4987
......@@ -10,7 +10,7 @@
<CleanUpAluLteBox>sudo -S -E /opt/ltebox/tools/stop_ltebox</CleanUpAluLteBox>
<ExmimoRfStop>$OPENAIR_DIR/cmake_targets/build_oai -w EXMIMO -c; sudo -S -E $OPENAIR_DIR/cmake_targets/tools/stop_exmimo2; uname -a; dmesg|tail</ExmimoRfStop>
<Timeout_execution>36000</Timeout_execution>
<TestCaseExclusionList>0102+ 0104+ 015502 015505 015506 015507 015508 015509 015510 015511 015602 015605 015702 015705 015802 015805 016002 016005 016102 016105 016302 016305 016502 016505 017002 017005 017502 017505</TestCaseExclusionList>
<TestCaseExclusionList>0102+ 010304 010305 0104+ 015502 015505 015506 015507 015508 015509 015510 015511 015602 015605 015702 015705 015802 015805 0159+ 0160+ 0161+ 0162+ 0163+ 0165+ 0170+ 017502 017505</TestCaseExclusionList>
<nruns_lte-softmodem>3</nruns_lte-softmodem>
<MachineListGeneric>mozart calisson stevens nano amerique</MachineListGeneric>
<testCase id="010101" >
......@@ -329,22 +329,19 @@
<testCase id="010200">
<class>execution</class>
<desc>Run OAISIM Rel10 TDD, 1 eNB + 1 UE (5 MHz/10MHz/20MHz), (TM 1,2) and search for errors, segmentation fault or exit</desc>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args>--oaisim --noS1 -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<test_config_file>$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf frame_type \"TDD\"
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf eutra_band 38
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf downlink_frequency 2580000000L
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf uplink_frequency_offset 0</test_config_file>
<test_config_file></test_config_file>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 </main_exec_args>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -s15 </main_exec_args>
<tags>oaisim_noS1.tdd.5MHz.TM1 oaisim_noS1.tdd.10MHz.TM1 oaisim_noS1.tdd.20MHz.TM1 oaisim_noS1.tdd.5MHz.TM2 oaisim_noS1.tdd.10MHz.TM2 oaisim_noS1.tdd.20MHz.TM2</tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -354,22 +351,19 @@
<testCase id="010201">
<class>execution</class>
<desc>Run OAISIM Rel10 TDD, 1 eNB + 1 UE (5 MHz/10MHz/20MHz), (TM 1,2) in PHY_ABSTRACTION mode and search for errors, segmentation fault or exit</desc>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args>--oaisim --noS1 -c </compile_prog_args>
<test_config_file>$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf frame_type \"TDD\"
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf eutra_band 38
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf downlink_frequency 2580000000L
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf uplink_frequency_offset 0</test_config_file>
<test_config_file></test_config_file>
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -a </main_exec_args>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -a -s15 </main_exec_args>
<tags>oaisim_noS1.tdd.5MHz.TM1 oaisim_noS1.tdd.10MHz.TM1 oaisim_noS1.tdd.20MHz.TM1 oaisim_noS1.tdd.5MHz.TM2 oaisim_noS1.tdd.10MHz.TM2 oaisim_noS1.tdd.20MHz.TM2</tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -379,22 +373,19 @@
<testCase id="010202">
<class>execution</class>
<desc>Run OAISIM Rel10 TDD, 1 eNB + 3 UEs (5 MHz/10MHz/20MHz), (TM 1,2) and search for errors, segmentation fault or exit</desc>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args>--oaisim --noS1 -c </compile_prog_args>
<test_config_file>$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf frame_type \"TDD\"
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf eutra_band 38
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf downlink_frequency 2580000000L
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf uplink_frequency_offset 0</test_config_file>
<test_config_file></test_config_file>
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2</main_exec_args>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -s15 </main_exec_args>
<tags>oaisim_noS1.tdd.5MHz.TM1 oaisim_noS1.tdd.10MHz.TM1 oaisim_noS1.tdd.20MHz.TM1 oaisim_noS1.tdd.5MHz.TM2 oaisim_noS1.tdd.10MHz.TM2 oaisim_noS1.tdd.20MHz.TM2 </tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0" "Received RRCConnectionReconfigurationComplete from UE 1" "Received RRCConnectionReconfigurationComplete from UE 2"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -404,22 +395,19 @@
<testCase id="010203">
<class>execution</class>
<desc>Run OAISIM Rel10 TDD, 1 eNB + 3 UEs (5 MHz) in PHY_ABSTRACTION mode and search for errors, segmentation fault or exit</desc>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args>--oaisim --noS1 -c </compile_prog_args>
<test_config_file>$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf frame_type \"TDD\"
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf eutra_band 38
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf downlink_frequency 2580000000L
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf uplink_frequency_offset 0</test_config_file>
<test_config_file></test_config_file>
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -a</main_exec_args>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -a -s15
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -a -s15</main_exec_args>
<tags>oaisim_noS1.tdd.5MHz.TM1 oaisim_noS1.tdd.10MHz.TM1 oaisim_noS1.tdd.20MHz.TM1 oaisim_noS1.tdd.5MHz.TM2 oaisim_noS1.tdd.10MHz.TM2 oaisim_nos1.tdd.20MHz.TM2</tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0" "Received RRCConnectionReconfigurationComplete from UE 1" "Received RRCConnectionReconfigurationComplete from UE 2"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -429,22 +417,19 @@
<testCase id="010204">
<class>execution</class>
<desc>Run OAI Rel10 TDD, 1 eNB + 1 UE (5 MHz) without abstraction mode, send ping from from eNB to UE, and check that there is no packet losses</desc>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args>--oaisim --noS1 -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<test_config_file>$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf frame_type \"TDD\"
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf eutra_band 38
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf downlink_frequency 2580000000L
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf uplink_frequency_offset 0</test_config_file>
<test_config_file></test_config_file>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -c26
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -c26
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -c26
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -c26
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -c26
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -c26</main_exec_args>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -c26
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -c26
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -c26
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -c26
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -c26
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -c26</main_exec_args>
<tags>oaisim_noS1.tdd.5MHz.TM1 oaisim_noS1.tdd.10MHz.TM1 oaisim_noS1.tdd.20MHz.TM1 oaisim_noS1.tdd.5MHz.TM2 oaisim_noS1.tdd.10MHz.TM2 oaisim_noS1.tdd.20MHz.TM2 </tags>
<search_expr_true>"DL and UL loss rate below 10"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -454,22 +439,19 @@
<testCase id="010205">
<class>execution</class>
<desc>Run OAI Rel10 TDD, 1 eNB + 1 UE (5 MHz) in PHY_ABSTRACTION mode, send ping from from eNB to UE, and check that there is no packet losses</desc>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<pre_compile_prog>cp -vf $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf </pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args>--oaisim --noS1 -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<test_config_file>$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf frame_type \"TDD\"
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf eutra_band 38
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf downlink_frequency 2580000000L
$OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf uplink_frequency_offset 0</test_config_file>
<test_config_file></test_config_file>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -c26 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -c26 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -c26 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -c26 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -c26 -a
-O $OPENAIR_LOGDIR/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -c26 -a</main_exec_args>
<main_exec_args> -O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -c26 -a
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -c26 -a
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -c26 -a
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -c26 -a
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -c26 -a
-O $OPENAIR_LOGDIR/enb.band38.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -c26 -a</main_exec_args>
<tags>oaisim_noS1.tdd.5MHz.TM1 oaisim_noS1.tdd.10MHz.TM1 oaisim_noS1.tdd.20MHz.TM1 oaisim_noS1.tdd.5MHz.TM2 oaisim_noS1.tdd.10MHz.TM2 oaisim_noS1.tdd.20MHz.TM2 </tags>
<search_expr_true>"DL and UL loss rate below 10"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -485,12 +467,12 @@
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -F</main_exec_args>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -F -s15</main_exec_args>
<tags>oaisim_noS1.FDD.5MHz.TM1 oaisim_noS1.FDD.10MHz.TM1 oaisim_noS1.FDD.20MHz.TM1 oaisim_noS1.FDD.5MHz.TM2 oaisim_noS1.FDD.10MHz.TM2 oaisim_noS1.FDD.20MHz.TM2</tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -506,12 +488,12 @@
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -F -a</main_exec_args>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 1 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 1 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 1 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 25 -x 2 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 50 -x 2 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u1 -n100 -R 100 -x 2 -F -a -s15</main_exec_args>
<tags>oaisim_noS1.FDD.5MHz.TM1 oaisim_noS1.FDD.10MHz.TM1 oaisim_noS1.FDD.20MHz.TM1 oaisim_noS1.FDD.5MHz.TM2 oaisim_noS1.FDD.10MHz.TM2 oaisim_noS1.FDD.20MHz.TM2</tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -527,12 +509,12 @@
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -F
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -F </main_exec_args>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -F -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -F -s15</main_exec_args>
<tags>oaisim_noS1.FDD.5MHz.TM1 oaisim_noS1.FDD.10MHz.TM1 oaisim_noS1.FDD.20MHz.TM1 oaisim_noS1.FDD.5MHz.TM2 oaisim_noS1.FDD.10MHz.TM2 oaisim_noS1.FDD.20MHz.TM2 </tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0" "Received RRCConnectionReconfigurationComplete from UE 1" "Received RRCConnectionReconfigurationComplete from UE 2"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -548,12 +530,12 @@
<pre_exec>$OPENAIR_DIR/cmake_targets/tools/init_nas_nos1</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec>$OPENAIR_DIR/cmake_targets/oaisim_noS1_build_oai/build/oaisim_nos1</main_exec>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -F -a
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -F -a</main_exec_args>
<main_exec_args> -O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 1 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 1 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 1 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 25 -x 2 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 50 -x 2 -F -a -s15
-O $OPENAIR_TARGETS/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.generic.oaisim.local_no_mme.conf -A AWGN -b1 -u3 -n100 -R 100 -x 2 -F -a -s15</main_exec_args>
<tags>oaisim_noS1.FDD.5MHz.TM1 oaisim_noS1.FDD.10MHz.TM1 oaisim_noS1.FDD.20MHz.TM1 oaisim_noS1.FDD.5MHz.TM2 oaisim_noS1.FDD.10MHz.TM2 oaisim_noS1.FDD.20MHz.TM2</tags>
<search_expr_true>"Received RRCConnectionReconfigurationComplete from UE 0" "Received RRCConnectionReconfigurationComplete from UE 1" "Received RRCConnectionReconfigurationComplete from UE 2"</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -5539,45 +5521,47 @@
<eNB>mozart</eNB>
<TimeOut_cmd>390</TimeOut_cmd>
<eNB_working_dir>/tmp</eNB_working_dir>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf N_RB_DL 25
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=5;tx_sample_advance=70;tx_scheduling_advance=9;"</eNB_config_file>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -g3 -x -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf N_RB_DL 25
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf pdsch_referenceSignalPower -26
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=4;tx_sample_advance=70;tx_scheduling_advance=9;rrh_gw_active=\"yes\";"</eNB_config_file>
<eNB_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</eNB_compile_prog>
<eNB_compile_prog_args>--eNB -w None -t ETHERNET -x -c --disable-deadline </eNB_compile_prog_args>
<eNB_pre_exec></eNB_pre_exec>
<eNB_pre_exec_args></eNB_pre_exec_args>
<eNB_main_exec>sleep 5; $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf -W </eNB_main_exec_args>
<eNB_main_exec>sleep 5; sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf -W </eNB_main_exec_args>
<eNB_traffic_exec></eNB_traffic_exec>
<eNB_traffic_exec_args></eNB_traffic_exec_args>
<eNB_search_expr_true></eNB_search_expr_true>
<eNB_search_expr_false></eNB_search_expr_false>
<eNB_terminate_missing_procs>False</eNB_terminate_missing_procs>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -x -m1 -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<UE_working_dir>/tmp</UE_working_dir>
<UE_config_file></UE_config_file>
<UE_compile_prog></UE_compile_prog>
......@@ -5619,39 +5603,50 @@
<testCase id="017501" >
<class>lte-softmodem</class>
<desc></desc>
<eNB>calisson</eNB>
<RRH>calisson</RRH>
<eNB>mozart</eNB>
<UE>stevens</UE>
<EPC>amerique</EPC>
<TimeOut_cmd>390</TimeOut_cmd>
<eNB_working_dir>/tmp</eNB_working_dir>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf N_RB_DL 50
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1U \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_PORT_FOR_S1U 2152</eNB_config_file>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf N_RB_DL 50
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf pdsch_referenceSignalPower -29
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=4;tx_sample_advance=113;tx_scheduling_advance=9;rrh_gw_active=\"yes\";"</eNB_config_file>
<eNB_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</eNB_compile_prog>
<eNB_compile_prog_args>--eNB -w USRP -x -c </eNB_compile_prog_args>
<eNB_compile_prog_args>--eNB -w None -t ETHERNET -x -c --disable-deadline </eNB_compile_prog_args>
<eNB_pre_exec></eNB_pre_exec>
<eNB_pre_exec_args></eNB_pre_exec_args>
<eNB_main_exec>$OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf -W </eNB_main_exec_args>
<eNB_main_exec>sleep 5; sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf -W </eNB_main_exec_args>
<eNB_traffic_exec></eNB_traffic_exec>
<eNB_traffic_exec_args></eNB_traffic_exec_args>
<eNB_search_expr_true></eNB_search_expr_true>
<eNB_search_expr_false></eNB_search_expr_false>
<eNB_terminate_missing_procs>True</eNB_terminate_missing_procs>
<eNB_terminate_missing_procs>False</eNB_terminate_missing_procs>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -x -m1 -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<UE_working_dir>/tmp</UE_working_dir>
<UE_config_file></UE_config_file>
......@@ -5693,39 +5688,50 @@
<testCase id="017502" >
<class>lte-softmodem</class>
<desc></desc>
<eNB>calisson</eNB>
<RRH>calisson</RRH>
<eNB>mozart</eNB>
<UE>stevens</UE>
<EPC>amerique</EPC>
<TimeOut_cmd>390</TimeOut_cmd>
<eNB_working_dir>/tmp</eNB_working_dir>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf N_RB_DL 100
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1U \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_PORT_FOR_S1U 2152</eNB_config_file>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf N_RB_DL 100
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf pdsch_referenceSignalPower -32
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=4;tx_sample_advance=115;tx_scheduling_advance=11;rrh_gw_active=\"yes\";"</eNB_config_file>
<eNB_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</eNB_compile_prog>
<eNB_compile_prog_args>--eNB -w USRP -x -c </eNB_compile_prog_args>
<eNB_compile_prog_args>--eNB -w None -t ETHERNET -x -c --disable-deadline </eNB_compile_prog_args>
<eNB_pre_exec></eNB_pre_exec>
<eNB_pre_exec_args></eNB_pre_exec_args>
<eNB_main_exec>$OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf -W </eNB_main_exec_args>
<eNB_main_exec>sleep 5; sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf -W </eNB_main_exec_args>
<eNB_traffic_exec></eNB_traffic_exec>
<eNB_traffic_exec_args></eNB_traffic_exec_args>
<eNB_search_expr_true></eNB_search_expr_true>
<eNB_search_expr_false></eNB_search_expr_false>
<eNB_terminate_missing_procs>True</eNB_terminate_missing_procs>
<eNB_terminate_missing_procs>False</eNB_terminate_missing_procs>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -x -m1 -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<UE_working_dir>/tmp</UE_working_dir>
<UE_config_file></UE_config_file>
......@@ -5767,39 +5773,50 @@
<testCase id="017503" >
<class>lte-softmodem</class>
<desc></desc>
<eNB>calisson</eNB>
<RRH>calisson</RRH>
<eNB>mozart</eNB>
<UE>stevens</UE>
<EPC>amerique</EPC>
<TimeOut_cmd>390</TimeOut_cmd>
<eNB_working_dir>/tmp</eNB_working_dir>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf N_RB_DL 25
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1U \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_PORT_FOR_S1U 2152</eNB_config_file>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf N_RB_DL 25
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf pdsch_referenceSignalPower -26
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=4;tx_sample_advance=70;tx_scheduling_advance=9;rrh_gw_active=\"yes\";"</eNB_config_file>
<eNB_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</eNB_compile_prog>
<eNB_compile_prog_args>--eNB -w USRP -x -c </eNB_compile_prog_args>
<eNB_compile_prog_args>--eNB -w None -t ETHERNET -x -c --disable-deadline </eNB_compile_prog_args>
<eNB_pre_exec></eNB_pre_exec>
<eNB_pre_exec_args></eNB_pre_exec_args>
<eNB_main_exec>$OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf -W </eNB_main_exec_args>
<eNB_main_exec>sleep 5; sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf -W </eNB_main_exec_args>
<eNB_traffic_exec></eNB_traffic_exec>
<eNB_traffic_exec_args></eNB_traffic_exec_args>
<eNB_search_expr_true></eNB_search_expr_true>
<eNB_search_expr_false></eNB_search_expr_false>
<eNB_terminate_missing_procs>True</eNB_terminate_missing_procs>
<eNB_terminate_missing_procs>False</eNB_terminate_missing_procs>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -x -m1 -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<UE_working_dir>/tmp</UE_working_dir>
<UE_config_file></UE_config_file>
......@@ -5840,39 +5857,50 @@
<testCase id="017504" >
<class>lte-softmodem</class>
<desc></desc>
<eNB>calisson</eNB>
<RRH>calisson</RRH>
<eNB>mozart</eNB>
<UE>stevens</UE>
<EPC>amerique</EPC>
<TimeOut_cmd>390</TimeOut_cmd>
<eNB_working_dir>/tmp</eNB_working_dir>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf N_RB_DL 50
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1U \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_PORT_FOR_S1U 2152</eNB_config_file>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf N_RB_DL 50
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf pdsch_referenceSignalPower -29
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=4;tx_sample_advance=113;tx_scheduling_advance=9;rrh_gw_active=\"yes\";"</eNB_config_file>
<eNB_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</eNB_compile_prog>
<eNB_compile_prog_args>--eNB -w USRP -x -c </eNB_compile_prog_args>
<eNB_compile_prog_args>--eNB -w None -t ETHERNET -x -c --disable-deadline </eNB_compile_prog_args>
<eNB_pre_exec></eNB_pre_exec>
<eNB_pre_exec_args></eNB_pre_exec_args>
<eNB_main_exec>$OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf -W </eNB_main_exec_args>
<eNB_main_exec>sleep 5; sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf -W </eNB_main_exec_args>
<eNB_traffic_exec></eNB_traffic_exec>
<eNB_traffic_exec_args></eNB_traffic_exec_args>
<eNB_search_expr_true></eNB_search_expr_true>
<eNB_search_expr_false></eNB_search_expr_false>
<eNB_terminate_missing_procs>True</eNB_terminate_missing_procs>
<eNB_terminate_missing_procs>False</eNB_terminate_missing_procs>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -x -m1 -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<UE_working_dir>/tmp</UE_working_dir>
<UE_config_file></UE_config_file>
......@@ -5913,39 +5941,50 @@
<testCase id="017505" >
<class>lte-softmodem</class>
<desc></desc>
<eNB>calisson</eNB>
<RRH>calisson</RRH>
<eNB>mozart</eNB>
<UE>stevens</UE>
<EPC>amerique</EPC>
<TimeOut_cmd>390</TimeOut_cmd>
<eNB_working_dir>/tmp</eNB_working_dir>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf N_RB_DL 100
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_INTERFACE_NAME_FOR_S1U \"eth5\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.82/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf ENB_PORT_FOR_S1U 2152</eNB_config_file>
<eNB_config_file>targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tracking_area_code \"1\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_country_code \"208\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mobile_network_code \"92\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf N_RB_DL 100
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf mme_ip_address "ipv4=\"192.168.12.26\";ipv6=\"192:168:30::17\";active=\"yes\";preference=\"ipv4\";"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf downlink_frequency 2660000000L
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf uplink_frequency_offset -120000000
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf tx_gain 90
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rx_gain 125
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf pdsch_referenceSignalPower -32
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf frame_type \"FDD\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_rx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf nb_antennas_tx 1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1_MME \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1_MME \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_INTERFACE_NAME_FOR_S1U \"eth6\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_IPV4_ADDRESS_FOR_S1U \"192.168.12.111/24\"
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf ENB_PORT_FOR_S1U 2152
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf rrh_gw_config "local_if_name=\"eth0\";remote_address=\"10:60:4b:75:80:83\";local_address=\"98:90:96:df:66:07\";local_port=50000;remote_port=50000;tr_preference=\"raw\";rf_preference=\"usrp_b200\";iq_txshift=4;tx_sample_advance=115;tx_scheduling_advance=11;rrh_gw_active=\"yes\";"</eNB_config_file>
<eNB_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</eNB_compile_prog>
<eNB_compile_prog_args>--eNB -w USRP -x -c </eNB_compile_prog_args>
<eNB_compile_prog_args>--eNB -w None -t ETHERNET -x -c --disable-deadline </eNB_compile_prog_args>
<eNB_pre_exec></eNB_pre_exec>
<eNB_pre_exec_args></eNB_pre_exec_args>
<eNB_main_exec>$OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.usrpb210.epc.remote.conf -W </eNB_main_exec_args>
<eNB_main_exec>sleep 5; $OPENAIR_DIR/cmake_targets/lte_build_oai/build/lte-softmodem</eNB_main_exec>
<eNB_main_exec_args> -O $OPENAIR_DIR/targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.rrh.usrpb210.conf -W </eNB_main_exec_args>
<eNB_traffic_exec></eNB_traffic_exec>
<eNB_traffic_exec_args></eNB_traffic_exec_args>
<eNB_search_expr_true></eNB_search_expr_true>
<eNB_search_expr_false></eNB_search_expr_false>
<eNB_terminate_missing_procs>True</eNB_terminate_missing_procs>
<eNB_terminate_missing_procs>False</eNB_terminate_missing_procs>
<RRH_compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</RRH_compile_prog>
<RRH_compile_prog_args>--RRH -w USRP -t ETHERNET -c --disable-deadline </RRH_compile_prog_args>
<RRH_pre_exec></RRH_pre_exec>
<RRH_pre_exec_args></RRH_pre_exec_args>
<RRH_main_exec>sudo -E chrt -f 99 $OPENAIR_DIR/cmake_targets/rrh_gw/build/rrh_gw</RRH_main_exec>
<RRH_main_exec_args> -n1 -x -m1 -i eth1 </RRH_main_exec_args>
<RRH_terminate_missing_procs>False</RRH_terminate_missing_procs>
<UE_working_dir>/tmp</UE_working_dir>
<UE_config_file></UE_config_file>
......
cmake_targets/build_oai
View file @ 667a4987
......@@ -42,13 +42,13 @@ THIS_SCRIPT_PATH=$(dirname $(readlink -f $0))
source $THIS_SCRIPT_PATH/tools/build_helper
MSC_GEN="False"
XFORMS="False"
XFORMS="True"
PRINT_STATS="False"
VCD_TIMING="False"
LOWLATENCY_FLAG_USER="False"
FORCE_LOWLATENCY_FLAG_USER=""
REL="Rel10"
HW="EXMIMO"
HW="None"
TP="None"
NOS1=0
EPC=0
......@@ -91,7 +91,7 @@ Options
default is Rel10,
Rel8 limits the implementation to 3GPP Release 8 version
-w | --hardware
EXMIMO (Default), USRP, BLADERF, LMSSDR, None
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, None (Default)
Adds this RF board support (in external packages installation and in compilation)
-t | --transport protocol
ETHERNET , None
......@@ -760,9 +760,9 @@ fi
rm -fr $OPENAIR_DIR/cmake_targets/autotests/log
mkdir -p $OPENAIR_DIR/cmake_targets/autotests/log
if [ "$RUN_GROUP" -eq "1" ]; then
$OPENAIR_DIR/cmake_targets/autotests/run_exec_autotests.bash -g "$TEST_CASE_GROUP" -p '$mypassword' >& $OPENAIR_DIR/cmake_targets/autotests/log/autotests.log &
$OPENAIR_DIR/cmake_targets/autotests/run_exec_autotests.bash -g "$TEST_CASE_GROUP" -p $mypassword >& $OPENAIR_DIR/cmake_targets/autotests/log/autotests.log &
else
$OPENAIR_DIR/cmake_targets/autotests/run_exec_autotests.bash -p '$mypassword' >& $OPENAIR_DIR/cmake_targets/autotests/log/autotests.log &
$OPENAIR_DIR/cmake_targets/autotests/run_exec_autotests.bash -p $mypassword >& $OPENAIR_DIR/cmake_targets/autotests/log/autotests.log &
fi
wait
else
......
cmake_targets/lte-simulators/CMakeLists.txt
View file @ 667a4987
......@@ -2,7 +2,7 @@ cmake_minimum_required(VERSION 2.8)
set(PACKAGE_NAME "unitary_tests_simulators")
set(PHYSIM True)
set(RF_BOARD None)
set(XFORMS False)
set(XFORMS True)
set(DEBUG_PHY False)
set(MU_RECIEVER False)
......
cmake_targets/tools/build_helper
View file @ 667a4987
......@@ -290,7 +290,7 @@ install_asn1c_from_source(){
asn1_install_dir=$OPENAIR_DIR/cmake_targets/log/asn1c_install_log.txt
echo_info "\nInstalling ASN1. The log file for ASN1 installation is here: $asn1_install_dir "
(
rm -rf /tmp/asn1c-r1516
$SUDO rm -rf /tmp/asn1c-r1516
mkdir -p /tmp/asn1c-r1516
cd /tmp/asn1c-r1516
rm -rf /tmp/asn1c-r1516/*
......
cmake_targets/tools/run_enb_s1_usrp
View file @ 667a4987
......@@ -29,9 +29,9 @@
################################################################################
# file run_enb_s1_usrp
# brief run script for eNB USRP.
# author Lionel GAUTHIER
# author Lionel GAUTHIER and Navid Nikaein
# company Eurecom
# email: lionel.gauthier@eurecom.fr
# email: lionel.gauthier@eurecom.fr and navid.nikaein@eurecom.fr
################################
......@@ -56,6 +56,8 @@ function help()
echo_error "Mandatory arguments to long options are mandatory for short options too."
echo_error " -g, --gdb Run with GDB."
echo_error " -h, --help Print this help."
echo_error " -e, --ulsch-max-errors num-errs maximum allowed number of uplink errors"
echo_error " -f, --rf-config-file filename RF specific configuration file"
echo_error " -K, --itti-dump-file filename ITTI dump file containing all ITTI events occuring during EPC runtime.(can omit file name if last argument)"
echo_error " -M, --target-dl-mcs mcs Downlink target MCS."
echo_error " -m, --mscgen directory Generate mscgen output files in a directory"
......@@ -137,6 +139,26 @@ function main()
shift;
exit 0
;;
-e | --ulsch-max-errors)
ulsch_max_errors=$2
echo "setting --ulsch-max-errors to $ulsch_max_errors"
exe_arguments="$exe_arguments --ulsch-max-errors=$ulsch_max_errors"
shift 2;
;;
-f | --rf-config-file)
rf_config_file=$2
# can omit file name if last arg on the line
if [ "x$rf_config_file" = "x" ]; then
rf_config_file=null
shift 1;
else
shift 2;
fi
if [ "$rf_config_file" != "null" ]; then
echo "setting --rf-config-file to $rf_config_file"
exe_arguments="$exe_arguments --rf-config-file=$rf_config_file"
fi
;;
-K | --itti-dump-file)
itti_dump_file=$2
# can omit file name if last arg on the line
......
openair1/PHY/LTE_ESTIMATION/adjust_gain.c
View file @ 667a4987
......@@ -38,23 +38,16 @@ extern int card;
#endif
void
phy_adjust_gain (PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id)
phy_adjust_gain (PHY_VARS_UE *phy_vars_ue, uint32_t rx_power_fil_dB, uint8_t eNB_id)
{
uint16_t rx_power_fil_dB;
#ifdef EXMIMO
exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr;
uint16_t i;
#endif
int rssi;
rssi = dB_fixed(phy_vars_ue->PHY_measurements.rssi);
if (rssi>0) rx_power_fil_dB = rssi;
else rx_power_fil_dB = phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id];
LOG_D(PHY,"Gain control: rssi %d (%d,%d)\n",
rssi,
rx_power_fil_dB,
phy_vars_ue->PHY_measurements.rssi,
phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id]
);
......
openair1/PHY/LTE_ESTIMATION/defs.h
View file @ 667a4987
......@@ -213,6 +213,7 @@ int8_t set_RSRQ_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,floa
//! Automatic gain control
void phy_adjust_gain (PHY_VARS_UE *phy_vars_ue,
uint32_t rx_power_fil_dB,
unsigned char eNB_id);
int lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB,
......
openair1/PHY/LTE_ESTIMATION/lte_sync_time.c
View file @ 667a4987
......@@ -483,13 +483,10 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
*eNB_id = sync_source;
#ifdef DEBUG_PHY
msg("[PHY][UE] lte_sync_time: Sync source = %d, Peak found at pos %d, val = %d\n",
sync_source,peak_pos,peak_val);
LOG_D(PHY,"[UE] lte_sync_time: Sync source = %d, Peak found at pos %d, val = %d (%d dB)\n",sync_source,peak_pos,peak_val,dB_fixed(peak_val)/2);
#ifdef DEBUG_PHY
if (debug_cnt == 0) {
write_output("sync_corr0_ue.m","synccorr0",sync_corr_ue0,2*length,1,2);
write_output("sync_corr1_ue.m","synccorr1",sync_corr_ue1,2*length,1,2);
......
openair1/PHY/LTE_TRANSPORT/initial_sync.c
View file @ 667a4987
......@@ -280,7 +280,6 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
uint8_t flip_fdd_ncp,flip_fdd_ecp,flip_tdd_ncp,flip_tdd_ecp;
// uint16_t Nid_cell_fdd_ncp=0,Nid_cell_fdd_ecp=0,Nid_cell_tdd_ncp=0,Nid_cell_tdd_ecp=0;
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_ue->lte_frame_parms;
int i;
int ret=-1;
int aarx,rx_power=0;
/*#ifdef OAI_USRP
......@@ -309,34 +308,6 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
LOG_I(PHY,"[UE%d] Initial sync : Estimated PSS position %d, Nid2 %d\n",phy_vars_ue->Mod_id,sync_pos,phy_vars_ue->lte_ue_common_vars.eNb_id);
#endif
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
rx_power += signal_energy(&phy_vars_ue->lte_ue_common_vars.rxdata[aarx][sync_pos2],
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
phy_vars_ue->PHY_measurements.rx_power_avg_dB[0] = dB_fixed(rx_power/frame_parms->nb_antennas_rx);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync : Estimated power: %d dB\n",phy_vars_ue->Mod_id,phy_vars_ue->PHY_measurements.rx_power_avg_dB[0] );
#endif
#ifdef EXMIMO
if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) &&
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
//phy_adjust_gain(phy_vars_ue,0);
gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[0],0);
#else
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
phy_adjust_gain(phy_vars_ue,0);
#endif
#endif
#endif
#endif
// SSS detection
// PSS is hypothesized in last symbol of first slot in Frame
......@@ -525,20 +496,20 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
#endif
if (phy_vars_ue->UE_scan_carrier == 0) {
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",phy_vars_ue->Mod_id);
//mac_resynch();
mac_xface->dl_phy_sync_success(phy_vars_ue->Mod_id,phy_vars_ue->frame_rx,0,1);//phy_vars_ue->lte_ue_common_vars.eNb_id);
#endif //OPENAIR2
phy_vars_ue->UE_mode[0] = PRACH;
}
else {
phy_vars_ue->UE_mode[0] = PUSCH;
}
generate_pcfich_reg_mapping(frame_parms);
generate_phich_reg_mapping(frame_parms);
// init_prach625(frame_parms);
#ifndef OPENAIR2
phy_vars_ue->UE_mode[0] = PUSCH;
#else
phy_vars_ue->UE_mode[0] = PRACH;
#endif
//phy_vars_ue->lte_ue_pbch_vars[0]->pdu_errors=0;
phy_vars_ue->lte_ue_pbch_vars[0]->pdu_errors_conseq=0;
//phy_vars_ue->lte_ue_pbch_vars[0]->pdu_errors_last=0;
......@@ -592,6 +563,65 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
}
// gain control
if (ret!=0) { //we are not synched, so we cannot use rssi measurement (which is based on channel estimates)
rx_power = 0;
// do a measurement on the best guess of the PSS
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
rx_power += signal_energy(&phy_vars_ue->lte_ue_common_vars.rxdata[aarx][sync_pos2],
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
/*
// do a measurement on the full frame
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
rx_power += signal_energy(&phy_vars_ue->lte_ue_common_vars.rxdata[aarx][0],
frame_parms->samples_per_tti*10);
*/
// we might add a low-pass filter here later
phy_vars_ue->PHY_measurements.rx_power_avg[0] = rx_power/frame_parms->nb_antennas_rx;
phy_vars_ue->PHY_measurements.rx_power_avg_dB[0] = dB_fixed(phy_vars_ue->PHY_measurements.rx_power_avg[0]);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync : Estimated power: %d dB\n",phy_vars_ue->Mod_id,phy_vars_ue->PHY_measurements.rx_power_avg_dB[0] );
#endif
#ifdef EXMIMO
if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) &&
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
//phy_adjust_gain(phy_vars_ue,0);
gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[0],0);
#else
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
phy_adjust_gain(phy_vars_ue,phy_vars_ue->PHY_measurements.rx_power_avg_dB[0],0);
#endif
#endif
#endif
#endif
}
else {
#ifdef EXMIMO
if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) &&
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
//phy_adjust_gain(phy_vars_ue,0);
gain_control_all(dB_fixed(phy_vars_ue->PHY_measurements.rssi),0);
#else
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
phy_adjust_gain(phy_vars_ue,dB_fixed(phy_vars_ue->PHY_measurements.rssi),0);
#endif
#endif
#endif
#endif
}
// exit_fun("debug exit");
return ret;
}
......
openair1/PHY/LTE_TRANSPORT/print_stats.c
View file @ 667a4987
......@@ -107,10 +107,10 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
len += sprintf(&buffer[len], "[UE PROC] timing_advance = %d\n",phy_vars_ue->timing_advance);
if (phy_vars_ue->UE_mode[0]==PUSCH) {
len += sprintf(&buffer[len], "[UE PROC] Po_PUSCH = %d dBm (PL %d dB, Po_NOMINAL_PUSCH %d dBm, PHR %d dB)\n",
PHY_vars_UE_g[0][0]->ulsch_ue[0]->Po_PUSCH,
phy_vars_ue->ulsch_ue[0]->Po_PUSCH,
get_PL(phy_vars_ue->Mod_id,phy_vars_ue->CC_id,0),
mac_xface->get_Po_NOMINAL_PUSCH(phy_vars_ue->Mod_id,0),
PHY_vars_UE_g[0][0]->ulsch_ue[0]->PHR);
phy_vars_ue->lte_frame_parms.ul_power_control_config_common.p0_NominalPUSCH,
phy_vars_ue->ulsch_ue[0]->PHR);
len += sprintf(&buffer[len], "[UE PROC] Po_PUCCH = %d dBm (Po_NOMINAL_PUCCH %d dBm, g_pucch %d dB)\n",
get_PL(phy_vars_ue->Mod_id,phy_vars_ue->CC_id,0)+
phy_vars_ue->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH+
......@@ -582,9 +582,7 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length)
len += sprintf(&buffer[len],"%4d ",
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dBm[i]);
if ((i>0) && ((i%25) == 0))
len += sprintf(&buffer[len],"\n ",
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dBm[i]);
len += sprintf(&buffer[len],"\n");
}
len += sprintf(&buffer[len],"\n");
len += sprintf(&buffer[len],"\n[eNB PROC] PERFORMANCE PARAMETERS\n");
......@@ -644,7 +642,6 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length)
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_above/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
PUCCH1_THRES+phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm-dB_fixed(phy_vars_eNB->lte_frame_parms.N_RB_UL),
phy_vars_eNB->eNB_UE_stats[UE_id].sector);
......
openair1/PHY/defs.h
View file @ 667a4987
......@@ -278,6 +278,9 @@ typedef struct PHY_VARS_eNB_s {
int **dl_precoder_SeNB[3];
char log2_maxp; /// holds the maximum channel/precoder coefficient
/// if ==0 enables phy only test mode
int mac_enabled;
/// For emulation only (used by UE abstraction to retrieve DCI)
uint8_t num_common_dci[2]; // num_dci in even/odd subframes
uint8_t num_ue_spec_dci[2]; // num_dci in even/odd subframes
......@@ -579,6 +582,9 @@ typedef struct {
/// holds the maximum channel/precoder coefficient
char log2_maxp;
/// if ==0 enables phy only test mode
int mac_enabled;
/// Flag to initialize averaging of PHY measurements
int init_averaging;
......
openair1/SCHED/phy_mac_stub.c 0 → 100644
View file @ 667a4987
/*******************************************************************************
OpenAirInterface
Copyright(c) 1999 - 2014 Eurecom
OpenAirInterface is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with OpenAirInterface.The full GNU General Public License is
included in this distribution in the file called "COPYING". If not,
see <http://www.gnu.org/licenses/>.
Contact Information
OpenAirInterface Admin: openair_admin@eurecom.fr
OpenAirInterface Tech : openair_tech@eurecom.fr
OpenAirInterface Dev : openair4g-devel@lists.eurecom.fr
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/
/*! \file phy_mac_stub.c
* \brief stimulates the phy without mac
* \author R. Knopp, F. Kaltenberger, N. Nikaein
* \date 2011
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr,navid.nikaein@eurecom.fr
* \note
* \warning
*/
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "MAC_INTERFACE/defs.h"
#include "MAC_INTERFACE/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "LAYER2/MAC/extern.h"
#ifdef EMOS
#include "SCHED/phy_procedures_emos.h"
#endif
void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_eNB)
{
int i;
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
uint32_t rballoc = 0x7FFF;
uint32_t rballoc2 = 0x000F;
int subframe = phy_vars_eNB->proc[sched_subframe].subframe_tx;
LTE_eNB_DLSCH_t *DLSCH_ptr = phy_vars_eNB->dlsch_eNB[0][0];
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
uint32_t bcch_pdu;
uint64_t dlsch_pdu;
DCI_pdu->Num_common_dci = 0;
DCI_pdu->Num_ue_spec_dci=0;
switch (subframe) {
case 5:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = SI_RNTI;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 0;
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 6:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
}
break;
case 25:
default:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_FDD_t;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
}
break;
case 50:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_FDD_t;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
}
break;
case 100:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_FDD_t;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
}
break;
}
break; //subframe switch
/*
case 6:
DCI_pdu->Num_ue_spec_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1236;
DCI_pdu->dci_alloc[0].format = format2_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1.rballoc = 0x00ff;
DLSCH_alloc_pdu1.TPC = 0;
DLSCH_alloc_pdu1.dai = 0;
DLSCH_alloc_pdu1.harq_pid = 0;
DLSCH_alloc_pdu1.tb_swap = 0;
DLSCH_alloc_pdu1.mcs1 = 0;
DLSCH_alloc_pdu1.ndi1 = 1;
DLSCH_alloc_pdu1.rv1 = 0;
DLSCH_alloc_pdu1.tpmi = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1,sizeof(DCI2_5MHz_2A_M10PRB_TDD_t));
break;
*/
default:
case 7:
DCI_pdu->Num_ue_spec_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
if (transmission_mode<3) {
//user 1
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 25:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
case 50:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_FDD_t;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_TDD_t;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
}
break;
case 100:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_TDD_t;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_20MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
}
} else if (transmission_mode==4) {
DCI_pdu->Num_ue_spec_dci = 1;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_FDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format2;
DCI_pdu->dci_alloc[0].ra_flag = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
} else if (transmission_mode==5) {
DCI_pdu->Num_ue_spec_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 0;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
phy_vars_eNB->eNB_UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
}
break; //subframe switch
/*
case 8:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
*/
/*
case 9:
DCI_pdu->Num_ue_spec_dci = 1;
//user 1
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD)
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_FDD_t ;
else
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
// user 2
/*
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
break;
*/
/*default:
break;*/
}
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
}
void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eNB)
{
int i;
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
//uint32_t rballoc = 0x00F0;
//uint32_t rballoc2 = 0x000F;
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
DCI_pdu->Num_common_dci = 0;
DCI_pdu->Num_ue_spec_dci=0;
switch (subframe) {
case 5:
DCI_pdu->Num_ue_spec_dci = 1;
if (transmission_mode<3) {
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = rballoc2;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
*/
} else if (transmission_mode==5) {
DCI_pdu->Num_ue_spec_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = 1;
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu1E.harq_pid = 1;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
}
break;
case 7:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
case 9:
DCI_pdu->Num_ue_spec_dci = 1;
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
/*
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
break;
default:
break;
}
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
}
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 667a4987
......@@ -52,12 +52,10 @@
//#define DEBUG_PHY_PROC (Already defined in cmake)
//#define DEBUG_ULSCH
//#ifdef OPENAIR2
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
//#endif
#include "assertions.h"
#include "msc.h"
......@@ -479,689 +477,6 @@ void phy_procedures_emos_eNB_RX(unsigned char subframe,PHY_VARS_eNB *phy_vars_eN
}
#endif
#ifndef OPENAIR2
void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_eNB)
{
int i;
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
uint32_t rballoc = 0x7FFF;
uint32_t rballoc2 = 0x000F;
int subframe = phy_vars_eNB->proc[sched_subframe].subframe_tx;
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
uint32_t bcch_pdu;
uint64_t dlsch_pdu;
DCI_pdu->Num_common_dci = 0;
DCI_pdu->Num_ue_spec_dci=0;
switch (subframe) {
case 5:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = SI_RNTI;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 0;
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 6:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
}
break;
case 25:
default:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_FDD_t;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
}
break;
case 50:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_FDD_t;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
}
break;
case 100:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_FDD_t;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
}
break;
}
case 6:
/*
DCI_pdu->Num_ue_spec_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1236;
DCI_pdu->dci_alloc[0].format = format2_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1.rballoc = 0x00ff;
DLSCH_alloc_pdu1.TPC = 0;
DLSCH_alloc_pdu1.dai = 0;
DLSCH_alloc_pdu1.harq_pid = 0;
DLSCH_alloc_pdu1.tb_swap = 0;
DLSCH_alloc_pdu1.mcs1 = 0;
DLSCH_alloc_pdu1.ndi1 = 1;
DLSCH_alloc_pdu1.rv1 = 0;
DLSCH_alloc_pdu1.tpmi = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1,sizeof(DCI2_5MHz_2A_M10PRB_TDD_t));
*/
break;
case 7:
DCI_pdu->Num_ue_spec_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
if (transmission_mode<3) {
//user 1
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 25:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
case 50:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_FDD_t;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_TDD_t;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
}
break;
case 100:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_TDD_t;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_20MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
}
} else if (transmission_mode==5) {
DCI_pdu->Num_ue_spec_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = 0;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 0;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
phy_vars_eNB->eNB_UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
}
break;
/*
case 8:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
*/
case 9:
DCI_pdu->Num_ue_spec_dci = 1;
//user 1
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD)
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_FDD_t ;
else
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
// user 2
/*
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
break;
default:
break;
}
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
}
#ifdef EMOS
void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eNB)
{
int i;
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
//uint32_t rballoc = 0x00F0;
//uint32_t rballoc2 = 0x000F;
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
DCI_pdu->Num_common_dci = 0;
DCI_pdu->Num_ue_spec_dci=0;
switch (subframe) {
case 5:
DCI_pdu->Num_ue_spec_dci = 1;
if (transmission_mode<3) {
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = rballoc2;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
*/
} else if (transmission_mode==5) {
DCI_pdu->Num_ue_spec_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = 1;
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu1E.harq_pid = 1;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
}
break;
case 7:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
case 9:
DCI_pdu->Num_ue_spec_dci = 1;
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
/*
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
break;
default:
break;
}
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
}
#endif //EMOS
#endif //OPENAIR2
#define AMP_OVER_SQRT2 ((AMP*ONE_OVER_SQRT2_Q15)>>15)
#define AMP_OVER_2 (AMP>>1)
......@@ -1308,10 +623,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
uint8_t harq_pid;
DCI_PDU *DCI_pdu;
uint8_t *DLSCH_pdu=NULL;
#ifndef OPENAIR2
DCI_PDU DCI_pdu_tmp;
uint8_t DLSCH_pdu_tmp[768*8];
#endif
int8_t UE_id;
uint8_t num_pdcch_symbols=0;
uint8_t ul_subframe;
......@@ -1353,13 +666,12 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
}
#ifdef OPENAIR2
// Get scheduling info for next subframe
if (phy_vars_eNB->CC_id == 0)
if (phy_vars_eNB->mac_enabled==1) {
if (phy_vars_eNB->CC_id == 0) {
mac_xface->eNB_dlsch_ulsch_scheduler(phy_vars_eNB->Mod_id,0,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);//,1);
#endif
}
}
if (abstraction_flag==0) {
// clear the transmit data array for the current subframe
......@@ -1687,36 +999,22 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
#endif
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
// Parse DCI received from MAC
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
DCI_pdu = mac_xface->get_dci_sdu(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
phy_vars_eNB->proc[sched_subframe].frame_tx,
subframe);
#else
DCI_pdu = &DCI_pdu_tmp;
#ifdef EMOS
/*
if (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)%3 == 0) && (next_slot == 0)) {
//openair_daq_vars.target_ue_dl_mcs = (openair_daq_vars.target_ue_dl_mcs+1)%28;
openair_daq_vars.target_ue_dl_mcs = taus()%28;
LOG_D(PHY,"[MYEMOS] frame %d, increasing MCS to %d\n",phy_vars_eNB->proc[sched_subframe].frame_tx,openair_daq_vars.target_ue_dl_mcs);
}
*/
/*
if (phy_vars_eNB->proc[sched_subframe].frame_tx > 28000) {
LOG_E(PHY,"More that 28000 frames reached! Exiting!\n");
}
*/
#endif
else {
DCI_pdu = &DCI_pdu_tmp;
#ifdef EMOS_CHANNEL
fill_dci_emos(DCI_pdu,sched_subframe,phy_vars_eNB);
#else
fill_dci(DCI_pdu,sched_subframe,phy_vars_eNB);
#endif
#endif
}
// clear existing ulsch dci allocations before applying info from MAC (this is table
ul_subframe = pdcch_alloc2ul_subframe(&phy_vars_eNB->lte_frame_parms,subframe);
......@@ -1783,6 +1081,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %"PRIu8"] SI generate_eNB_dlsch_params_from_dci\n", phy_vars_eNB->Mod_id);
#endif
generate_eNB_dlsch_params_from_dci(frame,
subframe,
&DCI_pdu->dci_alloc[i].dci_pdu[0],
......@@ -1817,6 +1116,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %"PRIu8"] RA generate_eNB_dlsch_params_from_dci\n", phy_vars_eNB->Mod_id);
#endif
generate_eNB_dlsch_params_from_dci(frame,
subframe,
&DCI_pdu->dci_alloc[i].dci_pdu[0],
......@@ -1851,17 +1151,20 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
else if (DCI_pdu->dci_alloc[i].format != format0) { // this is a normal DLSCH allocation
#ifdef OPENAIR2
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB] Searching for RNTI %"PRIx16"\n",DCI_pdu->dci_alloc[i].rnti);
#endif
if (phy_vars_eNB->mac_enabled==1)
UE_id = find_ue((int16_t)DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB);
#else
else
UE_id = i;
#endif
if (UE_id>=0) {
// dump_dci(&phy_vars_eNB->lte_frame_parms,&DCI_pdu->dci_alloc[i]);
if ((frame%100)==0) {
LOG_D(PHY,"Frame %3d, SF %d \n",frame,subframe);
dump_dci(&phy_vars_eNB->lte_frame_parms,&DCI_pdu->dci_alloc[i]);
}
#if defined(SMBV) && !defined(EXMIMO)
// Configure this user
if (smbv_is_config_frame(phy_vars_eNB->proc[sched_subframe].frame_tx) && (smbv_frame_cnt < 4)) {
......@@ -1871,6 +1174,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
}
#endif
generate_eNB_dlsch_params_from_dci(frame,
subframe,
&DCI_pdu->dci_alloc[i].dci_pdu[0],
......@@ -1931,14 +1235,13 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
if (harq_pid==255) {
LOG_E(PHY,"[eNB %"PRIu8"] Frame %d: Bad harq_pid for ULSCH allocation\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx);
//mac_exit_wrapper("Invalid harq_pid (255) detected");
return; // not reached
return;
}
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1)
UE_id = find_ue((int16_t)DCI_pdu->dci_alloc[i].rnti,phy_vars_eNB);
#else
else
UE_id = i;
#endif
if (UE_id<0) {
LOG_E(PHY,"[eNB %"PRIu8"] Frame %d: Unknown UE_id for rnti %"PRIx16"\n",phy_vars_eNB->Mod_id,phy_vars_eNB->proc[sched_subframe].frame_tx,DCI_pdu->dci_alloc[i].rnti);
......@@ -1967,6 +1270,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
//dump_dci(&phy_vars_eNB->lte_frame_parms,&DCI_pdu->dci_alloc[i]);
//LOG_D(PHY,"[eNB] cba generate_eNB_ulsch_params_from_dci for ue %d for dci rnti %x\n", UE_id, DCI_pdu->dci_alloc[i].rnti);
generate_eNB_ulsch_params_from_dci(&DCI_pdu->dci_alloc[i].dci_pdu[0],
DCI_pdu->dci_alloc[i].rnti,
sched_subframe,
......@@ -2068,19 +1372,19 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
input_buffer_length = phy_vars_eNB->dlsch_eNB_SI->harq_processes[0]->TBS/8;
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
DLSCH_pdu = mac_xface->get_dlsch_sdu(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
phy_vars_eNB->proc[sched_subframe].frame_tx,
SI_RNTI,
0);
#else
}
else {
DLSCH_pdu = DLSCH_pdu_tmp;
for (i=0; i<input_buffer_length; i++)
DLSCH_pdu[i] = (unsigned char)(taus()&0xff);
#endif
}
#if defined(SMBV) && !defined(EXMIMO)
......@@ -2170,7 +1474,6 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
input_buffer_length = phy_vars_eNB->dlsch_eNB_ra->harq_processes[0]->TBS/8;
#ifdef OPENAIR2
int16_t crnti = mac_xface->fill_rar(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
phy_vars_eNB->proc[sched_subframe].frame_tx,
......@@ -2219,15 +1522,14 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
phy_vars_eNB->ulsch_eNB[(uint32_t)UE_id]->Msg3_frame,
phy_vars_eNB->ulsch_eNB[(uint32_t)UE_id]->Msg3_subframe);
#else
/*
for (i=0; i<input_buffer_length; i++)
dlsch_input_buffer[i]= (unsigned char) i; //(taus()&0xff);
dlsch_input_buffer[1] = (phy_vars_eNB->eNB_UE_stats[0].UE_timing_offset)>>(2+4); // 7 MSBs of timing advance + divide by 4
dlsch_input_buffer[2] = ((phy_vars_eNB->eNB_UE_stats[0].UE_timing_offset)<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
//LOG_I(PHY,"UE %d: timing_offset = %d\n",UE_id,phy_vars_eNB->eNB_UE_stats[0].UE_timing_offset);
#endif
*/
#if defined(SMBV) && !defined(EXMIMO)
......@@ -2296,10 +1598,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
phy_vars_eNB->proc[sched_subframe].frame_tx, subframe, re_allocated);
#endif
#ifdef OPENAIR2
} //max user count
#endif
phy_vars_eNB->dlsch_eNB_ra->active = 0;
}
......@@ -2356,20 +1656,20 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
phy_vars_eNB->eNB_UE_stats[(uint32_t)UE_id].dlsch_trials[harq_pid][0]++;
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
DLSCH_pdu = mac_xface->get_dlsch_sdu(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
phy_vars_eNB->proc[sched_subframe].frame_tx,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rnti,
0);
phy_vars_eNB->eNB_UE_stats[UE_id].total_TBS_MAC += phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->TBS;
#else
}
else {
DLSCH_pdu = DLSCH_pdu_tmp;
for (i=0; i<input_buffer_length; i++)
DLSCH_pdu[i] = (unsigned char)(taus()&0xff);
#endif
}
#if defined(SMBV) && !defined(EXMIMO)
......@@ -2755,7 +2055,7 @@ void process_HARQ_feedback(uint8_t UE_id,
// then Increment DLSCH round index
dlsch_harq_proc->round++;
if (dlsch_harq_proc->round == dlsch->Mdlharq) {
if (dlsch_harq_proc->round == 1/*dlsch->Mdlharq*/) {
// This was the last round for DLSCH so reset round and increment l2_error counter
#ifdef DEBUG_PHY_PROC
LOG_W(PHY,"[eNB %d][PDSCH %x/%d] DLSCH retransmissions exhausted, dropping packet\n",phy_vars_eNB->Mod_id,
......@@ -3061,7 +2361,8 @@ void prach_procedures(PHY_VARS_eNB *phy_vars_eNB,uint8_t sched_subframe,uint8_t
preamble_energy_max/10,
preamble_energy_max%10,
preamble_delay_list[preamble_max]);
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
uint8_t update_TA=4;
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
......@@ -3082,16 +2383,14 @@ void prach_procedures(PHY_VARS_eNB *phy_vars_eNB,uint8_t sched_subframe,uint8_t
break;
}
mac_xface->initiate_ra_proc(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
frame,
preamble_max,
preamble_delay_list[preamble_max]*update_TA,
0,subframe,0);
}
#endif
} else {
MSC_LOG_EVENT(MSC_PHY_ENB, "0 RA Failed add user, too many");
LOG_I(PHY,"[eNB %d][RAPROC] frame %d, subframe %d: Unable to add user, max user count reached\n",
......@@ -3277,11 +2576,13 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
if ((i == 1) && (phy_vars_eNB->cooperation_flag > 0) && (two_ues_connected == 1))
break;
*/
#ifdef OPENAIR2
if (phy_vars_eNB->eNB_UE_stats[i].mode == RA_RESPONSE)
if (phy_vars_eNB->mac_enabled==1) {
if (phy_vars_eNB->eNB_UE_stats[i].mode == RA_RESPONSE) {
process_Msg3(phy_vars_eNB,sched_subframe,i,harq_pid);
}
}
#endif
/*
#ifdef DEBUG_PHY_PROC
......@@ -3518,12 +2819,12 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
LOG_I(PHY,"[eNB %d][RAPROC] maxHARQ_Msg3Tx reached, abandoning RA procedure for UE %d\n",
phy_vars_eNB->Mod_id, i);
phy_vars_eNB->eNB_UE_stats[i].mode = PRACH;
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
mac_xface->cancel_ra_proc(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
frame,
phy_vars_eNB->eNB_UE_stats[i].crnti);
#endif
}
remove_ue(phy_vars_eNB->eNB_UE_stats[i].crnti,phy_vars_eNB,abstraction_flag);
phy_vars_eNB->ulsch_eNB[(uint32_t)i]->Msg3_active = 0;
//phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_active = 0;
......@@ -3649,7 +2950,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors = 0;
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 1) {
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
//#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[eNB %d][RAPROC] Frame %d Terminating ra_proc for harq %d, UE %d\n",
phy_vars_eNB->Mod_id,
......@@ -3682,7 +2983,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->b,
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->TBS>>3);
*/
#endif
}
phy_vars_eNB->eNB_UE_stats[i].mode = PUSCH;
phy_vars_eNB->ulsch_eNB[i]->Msg3_flag = 0;
......@@ -3731,7 +3032,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
//dump_ulsch(phy_vars_eNB,sched_subframe,i);
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
// if (phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->calibration_flag == 0) {
mac_xface->rx_sdu(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
......@@ -3758,7 +3059,7 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
stop_meas(&phy_vars_eNB->localization_stats);
#endif
#endif
}
}
// estimate timing advance for MAC
......@@ -3909,12 +3210,12 @@ void phy_procedures_eNB_RX(const unsigned char sched_subframe,PHY_VARS_eNB *phy_
phy_vars_eNB->ulsch_eNB[i]->rnti,frame,subframe);
}
#ifdef OPENAIR2
if (phy_vars_eNB->mac_enabled==1) {
mac_xface->SR_indication(phy_vars_eNB->Mod_id,
phy_vars_eNB->CC_id,
frame,
phy_vars_eNB->dlsch_eNB[i][0]->rnti,subframe);
#endif
}
}
}// do_SR==1
......
openair1/SCHED/phy_procedures_lte_ue.c
View file @ 667a4987
......@@ -59,20 +59,15 @@ extern int card;
#endif
#endif
//#define DEBUG_PHY_PROC
#define UE_TX_POWER (-10)
#define DEBUG_PHY_PROC
//#ifdef OPENAIR2
#ifndef PUCCH
#define PUCCH
#endif
//#endif
//#ifdef OPENAIR2
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
#include "UTIL/LOG/log.h"
//#endif
#ifdef EMOS
fifo_dump_emos_UE emos_dump_UE;
......@@ -87,9 +82,6 @@ fifo_dump_emos_UE emos_dump_UE;
# endif
#endif
#ifndef OPENAIR2
//#define DIAG_PHY
#endif
#define DLSCH_RB_ALLOC 0x1fbf // skip DC RB (total 23/25 RBs)
#define DLSCH_RB_ALLOC_12 0x0aaa // skip DC RB (total 23/25 RBs)
......@@ -454,7 +446,7 @@ uint16_t get_n1_pucch(PHY_VARS_UE *phy_vars_ue,
if (frame_parms->frame_type == FDD ) { // FDD
sf = (subframe<4)? subframe+6 : subframe-4;
printf("n1_pucch_UE: subframe %d, nCCE %d\n",sf,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
LOG_D(PHY,"n1_pucch_UE: subframe %d, nCCE %d\n",sf,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
if (SR == 0)
return(frame_parms->pucch_config_common.n1PUCCH_AN + phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
......@@ -642,16 +634,12 @@ void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
#endif
int dummy_tx_buffer[3840*4] __attribute__((aligned(16)));
#ifndef OPENAIR2
PRACH_RESOURCES_t prach_resources_local;
#endif
void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type)
{
#ifndef OPENAIR2
int i;
#endif
uint16_t first_rb, nb_rb;
uint8_t harq_pid;
unsigned int input_buffer_length;
......@@ -724,8 +712,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
subframe_tx);
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
if ((phy_vars_ue->ulsch_ue_Msg3_active[eNB_id] == 1) &&
(phy_vars_ue->ulsch_ue_Msg3_frame[eNB_id] == frame_tx) &&
(phy_vars_ue->ulsch_ue_Msg3_subframe[eNB_id] == subframe_tx)) { // Initial Transmission of Msg3
......@@ -756,8 +743,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
Msg3_flag=0;
}
#endif
}
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
......@@ -856,19 +842,17 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#endif
stop_meas(&phy_vars_ue->ulsch_encoding_stats);
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
// signal MAC that Msg3 was sent
mac_xface->Msg3_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
#endif
}
} else {
input_buffer_length = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS/8;
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
// LOG_D(PHY,"[UE %d] ULSCH : Searching for MAC SDUs\n",Mod_id);
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round==0) {
//if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
......@@ -905,7 +889,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
LOG_T(PHY,"\n");
#endif
#endif
#else //OPENAIR2
}
else {
// the following lines were necessary for the calibration in CROWN
/*
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
......@@ -928,8 +913,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
for (i=0;i<input_buffer_length;i++)
ulsch_input_buffer[i]= i;
*/
}
#endif //OPENAIR2
start_meas(&phy_vars_ue->ulsch_encoding_stats);
if (abstraction_flag==0) {
......@@ -961,12 +946,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
}
if (abstraction_flag == 0) {
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
pusch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,1, abstraction_flag);
phy_vars_ue->tx_power_dBm = phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH;
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
}
else {
phy_vars_ue->tx_power_dBm = phy_vars_ue->tx_power_max_dBm;
}
phy_vars_ue->tx_total_RE = nb_rb*12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
......@@ -1023,16 +1009,18 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
if (is_SR_TXOp(phy_vars_ue,eNB_id,subframe_tx)==1) {
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d: got SR_TXOp, Checking for SR for PUSCH from MAC\n",
Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,frame_tx,subframe_tx);
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
SR_payload = mac_xface->ue_get_SR(Mod_id,
CC_id,
frame_tx,
eNB_id,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
subframe_tx); // subframe used for meas gap
#else
}
else {
SR_payload = 1;
#endif
}
if (SR_payload>0) {
generate_ul_signal = 1;
......@@ -1041,8 +1029,9 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
} else {
phy_vars_ue->sr[subframe_tx]=0;
}
} else
} else {
SR_payload=0;
}
if (get_ack(&phy_vars_ue->lte_frame_parms,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack,
......@@ -1057,12 +1046,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
pucch_ack_payload,
SR_payload);
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,format);
}
else {
Po_PUCCH = phy_vars_ue->tx_power_max_dBm;
}
phy_vars_ue->tx_power_dBm = Po_PUCCH;
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
phy_vars_ue->tx_total_RE = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
......@@ -1120,12 +1110,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
}
} else if (SR_payload==1) { // no ACK/NAK but SR is triggered by MAC
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,pucch_format1);
}
else {
Po_PUCCH = phy_vars_ue->tx_power_max_dBm;
}
phy_vars_ue->tx_power_dBm = Po_PUCCH;
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
phy_vars_ue->tx_total_RE = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
......@@ -1345,20 +1336,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
// }// slot_tx is even
// else { // slot_tx is odd, do the PRACH here
#ifdef OPENAIR2
if ((phy_vars_ue->UE_mode[eNB_id] == PRACH) && (phy_vars_ue->lte_frame_parms.prach_config_common.prach_Config_enabled==1)) {
#else
if (1) {
#endif
// check if we have PRACH opportunity
if (is_prach_subframe(&phy_vars_ue->lte_frame_parms,frame_tx,subframe_tx)) {
phy_vars_ue->generate_prach=0;
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1){
// ask L2 for RACH transport
if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) {
phy_vars_ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(Mod_id,
......@@ -1368,7 +1352,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
subframe_tx);
// LOG_I(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,phy_vars_ue->prach_resources[eNB_id],UE_mac_inst[Mod_id].radioResourceConfigCommon);
}
#endif
}
if (phy_vars_ue->prach_resources[eNB_id]!=NULL) {
......@@ -1391,16 +1375,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
phy_vars_ue->prach_resources[eNB_id]->ra_TDD_map_index,
phy_vars_ue->prach_resources[eNB_id]->ra_RNTI);
#ifdef OPENAIR2
if (mode != calib_prach_tx)
if ((phy_vars_ue->mac_enabled==1) && (mode != calib_prach_tx)) {
phy_vars_ue->tx_power_dBm = phy_vars_ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(Mod_id,CC_id,eNB_id);
}
else {
phy_vars_ue->tx_power_dBm = phy_vars_ue->tx_power_max_dBm;
phy_vars_ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
}
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
phy_vars_ue->tx_total_RE = 96;
......@@ -1431,12 +1412,12 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
} else {
UE_transport_info[Mod_id][CC_id].cntl.prach_flag=1;
UE_transport_info[Mod_id][CC_id].cntl.prach_id=phy_vars_ue->prach_resources[eNB_id]->ra_PreambleIndex;
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1){
mac_xface->Msg1_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
#endif
}
}
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, subframe %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n",
......@@ -1549,13 +1530,13 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t
if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) &&
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
if (phy_vars_ue->frame_rx%100==0)
gain_control_all(phy_vars_ue->PHY_measurements.rx_power_avg_dB[eNB_id],0);
gain_control_all(dB_fixed(phy_vars_ue->PHY_measurements.rssi),0);
#else
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
phy_adjust_gain (phy_vars_ue,0);
phy_adjust_gain (phy_vars_ue,dB_fixed(phy_vars_ue->PHY_measurements.rssi),0);
#endif
#endif
#endif
......@@ -1822,10 +1803,10 @@ void lte_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
frame_tx += ((int)(phy_vars_ue->lte_ue_pbch_vars[eNB_id]->decoded_output[1]&0xfc));
frame_tx += pbch_phase;
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
mac_xface->dl_phy_sync_success(phy_vars_ue->Mod_id,frame_rx,eNB_id,
phy_vars_ue->UE_mode[eNB_id]==NOT_SYNCHED ? 1 : 0);
#endif
}
#ifdef EMOS
//emos_dump_UE.frame_tx = frame_tx;
......@@ -1906,16 +1887,15 @@ void lte_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
phy_vars_ue->Mod_id,frame_rx, slot_rx);
phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors_conseq++;
phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors++;
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
mac_xface->out_of_sync_ind(phy_vars_ue->Mod_id,frame_rx,eNB_id);
#else
}
else{
if (phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors_conseq>=100) {
LOG_E(PHY,"More that 100 consecutive PBCH errors! Exiting!\n");
mac_xface->macphy_exit("More that 100 consecutive PBCH errors!");
}
#endif
}
}
if (frame_rx % 100 == 0) {
......@@ -2105,10 +2085,10 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#ifdef DEBUG_PHY_PROC
// if (subframe_rx == 9) { //( frame_rx % 100 == 0) {
if ( frame_rx % 100 == 0) {
LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
//dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
// }
dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
}
#endif
......@@ -2416,9 +2396,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
int eNB_id_i = 1;
uint8_t dual_stream_UE = 0;
#endif
#ifndef OPENAIR2
uint8_t *rar;
#endif
int pmch_flag=0;
uint8_t sync_area=255;
int pmch_mcs=-1;
......@@ -2427,9 +2405,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
int slot_rx = phy_vars_ue->slot_rx;
int subframe_rx = slot_rx>>1;
int subframe_prev = (subframe_rx+9)%10;
#ifdef OPENAIR2
int CC_id = phy_vars_ue->CC_id;
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
......@@ -2678,18 +2654,12 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if (ret == (1+phy_vars_ue->dlsch_ue[eNB_id][0]->max_turbo_iterations)) {
phy_vars_ue->dlsch_errors[eNB_id]++;
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d DLSCH in error (rv %d,mcs %d,TBS %d)\n",
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
harq_pid,frame_rx,subframe_prev,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->TBS);
/*
if (abstraction_flag ==0 )
dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
mac_xface->macphy_exit(""); */
#endif
} else {
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d (slot_rx %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
......@@ -2708,14 +2678,14 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
LOG_T(PHY,"\n");
#endif
#endif
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
mac_xface->ue_send_sdu(phy_vars_ue->Mod_id,
CC_id,
frame_rx,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->b,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->TBS>>3,
eNB_id);
#endif
}
phy_vars_ue->total_TBS[eNB_id] = phy_vars_ue->total_TBS[eNB_id] +
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->TBS;
phy_vars_ue->total_received_bits[eNB_id] = phy_vars_ue->total_TBS[eNB_id] +
......@@ -2885,7 +2855,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[3]);
#endif
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
/*
printf("\n\n");
for (i=0;i<phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS>>3;i++)
......@@ -2898,11 +2868,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
eNB_id,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->b,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS>>3);
/*
if ((frame_rx % 160) < 10)
printf("sending SI to L2 in frame %d\n",frame_rx);
*/
#endif
}
}
}
......@@ -3018,8 +2984,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
subframe_prev, phy_vars_ue->UE_mode[eNB_id]);
#endif
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
if ((phy_vars_ue->UE_mode[eNB_id] != PUSCH) && (phy_vars_ue->prach_resources[eNB_id]->Msg3!=NULL)) {
LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Invoking MAC for RAR (current preamble %d)\n",
phy_vars_ue->Mod_id,frame_rx-((subframe_prev==9) ? 1 : 0),
......@@ -3076,14 +3041,13 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_ue->prach_resources[eNB_id]->ra_PreambleIndex);
}
} // mode != PUSCH
#else //OPENAIR2
}
else {
rar = phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->b+1;
timing_advance = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
//timing_advance = phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->b[0];
process_timing_advance_rar(phy_vars_ue,timing_advance);
#endif
}
} //ret <= MAX_ITERATIONS
/*
......@@ -3635,24 +3599,21 @@ void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstr
int CC_id =0;
#endif
int frame_rx = phy_vars_ue->frame_rx;
#ifdef OPENAIR2
int frame_tx = phy_vars_ue->frame_tx;
#endif
int slot_rx = phy_vars_ue->slot_rx;
int slot_tx = phy_vars_ue->slot_tx;
int subframe_tx = slot_tx>>1;
int subframe_rx = slot_rx>>1;
#undef DEBUG_PHY_PROC
#ifdef OPENAIR2
UE_L2_STATE_t ret;
#endif
#ifndef OPENAIR2
if (phy_vars_ue->mac_enabled == 0) {
phy_vars_ue->UE_mode[eNB_id]=PUSCH;
phy_vars_ue->prach_resources[eNB_id] = &prach_resources_local;
prach_resources_local.ra_RNTI = 0xbeef;
prach_resources_local.ra_PreambleIndex = 0;
#endif
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,1);
......@@ -3851,10 +3812,8 @@ void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstr
phy_procedures_UE_RX(phy_vars_ue,eNB_id,abstraction_flag,mode,r_type,phy_vars_rn);
}
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
if (slot_rx%2==0) {
ret = mac_xface->ue_scheduler(phy_vars_ue->Mod_id,
frame_tx,
subframe_rx,
......@@ -3879,11 +3838,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstr
phy_vars_ue->UE_mode[eNB_id] = PRACH;
}
}
#endif
// if (last_slot == 19)
// phy_vars_ue->frame++;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,0);
stop_meas(&phy_vars_ue->phy_proc);
......
openair1/SIMULATION/LTE_PHY/dlsim.c
View file @ 667a4987
......@@ -61,25 +61,7 @@
extern unsigned int dlsch_tbs25[27][25],TBStable[27][110];
extern unsigned char offset_mumimo_llr_drange_fix;
#ifdef XFORMS
#include "PHY/TOOLS/lte_phy_scope.h"
#endif
//#define AWGN
//#define NO_DCI
//#define ABSTRACTION
/*
#define RBmask0 0x00fc00fc
#define RBmask1 0x0
#define RBmask2 0x0
#define RBmask3 0x0
*/
PHY_VARS_eNB *PHY_vars_eNB;
PHY_VARS_UE *PHY_vars_UE;
......@@ -237,10 +219,9 @@ int main(int argc, char **argv)
short *uncoded_ber_bit=NULL;
uint8_t N_RB_DL=25,osf=1;
frame_t frame_type = FDD;
#ifdef XFORMS
int xforms=0;
FD_lte_phy_scope_ue *form_ue;
char title[255];
#endif
uint32_t DLSCH_RB_ALLOC = 0x1fff;
int numCCE=0;
int dci_length_bytes=0,dci_length=0;
......@@ -305,7 +286,7 @@ int main(int argc, char **argv)
// num_layers = 1;
perfect_ce = 0;
while ((c = getopt (argc, argv, "ahdpZDe:Em:n:o:s:f:t:c:g:r:F:x:y:z:AM:N:I:i:O:R:S:C:T:b:u:v:w:B:PLl:Y")) != -1) {
while ((c = getopt (argc, argv, "ahdpZDe:Em:n:o:s:f:t:c:g:r:F:x:y:z:AM:N:I:i:O:R:S:C:T:b:u:v:w:B:PLl:XY")) != -1) {
switch (c) {
case 'a':
awgn_flag = 1;
......@@ -557,6 +538,10 @@ int main(int argc, char **argv)
break;
case 'X':
xforms=1;
break;
case 'Y':
perfect_ce=1;
break;
......@@ -636,7 +621,7 @@ int main(int argc, char **argv)
if ((transmission_mode > 1) && (n_tx != 2))
printf("n_tx must be >1 for transmission_mode %d\n",transmission_mode);
#ifdef XFORMS
if (xforms==1) {
fl_initialize (&argc, argv, NULL, 0, 0);
form_ue = create_lte_phy_scope_ue();
sprintf (title, "LTE PHY SCOPE eNB");
......@@ -648,8 +633,7 @@ int main(int argc, char **argv)
fl_set_object_label(form_ue->button_0, "IA Receiver ON");
fl_set_object_color(form_ue->button_0, FL_GREEN, FL_GREEN);
}
#endif
}
if (transmission_mode==5) {
n_users = 2;
......@@ -3496,13 +3480,13 @@ PMI_FEEDBACK:
// PHY_vars_UE->dlsch_ue[0][0]->harq_processes[0]->round++;
}
#ifdef XFORMS
if (xforms==1) {
phy_scope_UE(form_ue,
PHY_vars_UE,
eNB_id,
0,// UE_id
subframe);
#endif
}
} //round
......
openair1/SIMULATION/LTE_PHY/mbmssim.c
View file @ 667a4987
......@@ -173,7 +173,9 @@ int main(int argc, char **argv)
lte_frame_type_t frame_type = FDD;
uint32_t Nsoft = 1827072;
/*
#ifdef XFORMS
FD_lte_phy_scope_ue *form_ue;
char title[255];
......@@ -183,6 +185,7 @@ int main(int argc, char **argv)
sprintf (title, "LTE DL SCOPE UE");
fl_show_form (form_ue->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
#endif
*/
logInit();
number_of_cards = 1;
......@@ -382,14 +385,14 @@ int main(int argc, char **argv)
0);
// Create transport channel structures for 2 transport blocks (MIMO)
PHY_vars_eNB->dlsch_eNB_MCH = new_eNB_dlsch(1,8,N_RB_DL,0);
PHY_vars_eNB->dlsch_eNB_MCH = new_eNB_dlsch(1,8,Nsoft,N_RB_DL,0);
if (!PHY_vars_eNB->dlsch_eNB_MCH) {
printf("Can't get eNB dlsch structures\n");
exit(-1);
}
PHY_vars_UE->dlsch_ue_MCH[0] = new_ue_dlsch(1,8,MAX_TURBO_ITERATIONS_MBSFN,N_RB_DL,0);
PHY_vars_UE->dlsch_ue_MCH[0] = new_ue_dlsch(1,8,Nsoft,MAX_TURBO_ITERATIONS_MBSFN,N_RB_DL,0);
PHY_vars_eNB->lte_frame_parms.num_MBSFN_config = 1;
PHY_vars_eNB->lte_frame_parms.MBSFN_config[0].radioframeAllocationPeriod = 0;
......
openair1/SIMULATION/LTE_PHY/ulsim.c
View file @ 667a4987
......@@ -52,9 +52,7 @@
#include "LAYER2/MAC/vars.h"
#include "OCG_vars.h"
#ifdef XFORMS
#include "PHY/TOOLS/lte_phy_scope.h"
#endif
extern unsigned short dftsizes[33];
extern short *ul_ref_sigs[30][2][33];
......@@ -74,12 +72,9 @@ node_desc_t *ue_data[NUMBER_OF_UE_MAX];
extern uint16_t beta_ack[16],beta_ri[16],beta_cqi[16];
//extern char* namepointer_chMag ;
#ifdef XFORMS
int xforms=0;
FD_lte_phy_scope_enb *form_enb;
char title[255];
#endif
/*the following parameters are used to control the processing times*/
double t_tx_max = -1000000000; /*!< \brief initial max process time for tx */
......@@ -204,7 +199,7 @@ int main(int argc, char **argv)
logInit();
while ((c = getopt (argc, argv, "hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:L")) != -1) {
while ((c = getopt (argc, argv, "hapZEbm:n:Y:X:x:s:w:e:q:d:D:O:c:r:i:f:y:c:oA:C:R:g:N:l:S:T:QB:PI:LF")) != -1) {
switch (c) {
case 'a':
channel_model = AWGN;
......@@ -454,6 +449,10 @@ int main(int argc, char **argv)
max_turbo_iterations=atoi(optarg);
break;
case 'F':
xforms=1;
break;
case 'Z':
dump_table = 1;
break;
......@@ -594,12 +593,12 @@ int main(int argc, char **argv)
}
#ifdef XFORMS
if (xforms==1) {
fl_initialize (&argc, argv, NULL, 0, 0);
form_enb = create_lte_phy_scope_enb();
sprintf (title, "LTE PHY SCOPE eNB");
fl_show_form (form_enb->lte_phy_scope_enb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
#endif
}
PHY_vars_UE->lte_ue_pdcch_vars[0]->crnti = 14;
......@@ -1354,9 +1353,9 @@ int main(int argc, char **argv)
if ((errs[0]>=100) && (trials>(n_frames/2)))
break;
#ifdef XFORMS
if (xforms==1)
phy_scope_eNB(form_enb,PHY_vars_eNB,0);
#endif
/*calculate the total processing time for each packet, get the max, min, and number of packets that exceed t>3000us*/
double t_tx = (double)PHY_vars_UE->phy_proc_tx.p_time/cpu_freq_GHz/1000.0;
......
openair2/LAYER2/MAC/l1_helpers.c
View file @ 667a4987
......@@ -47,8 +47,8 @@ int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,uint8_t CC_id)
if (CC_id>0) {
LOG_E(MAC,"Transmission on secondary CCs is not supported yet\n");
mac_xface->macphy_exit("MAC FATAL CC_id>0");
return 0; // not reached
//mac_xface->macphy_exit("MAC FATAL CC_id>0");
return 0;
}
if (UE_mac_inst[module_idP].radioResourceConfigCommon) {
......@@ -56,7 +56,8 @@ int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,uint8_t CC_id)
}
else {
LOG_E(MAC,"[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",module_idP,CC_id);
mac_xface->macphy_exit("FATAL radioResourceConfigCommon is NULL");
//mac_xface->macphy_exit("FATAL radioResourceConfigCommon is NULL");
return 0;
}
return(-120 + (rach_ConfigCommon->powerRampingParameters.preambleInitialReceivedTargetPower<<1) +
......
targets/ARCH/LMSSDR/enb_sodera_lowband_Lrx_10MHz_rx19dB_txfull.ini 0 → 100644
View file @ 667a4987
[reference_clocks]
sxr_ref_clk_mhz=30.72
sxt_ref_clk_mhz=30.72
[lms7002_registers_b]
0x05A7=0x0000
0x05A5=0x0000
0x05A2=0x0000
0x05A0=0x0000
0x0599=0x0000
0x0598=0x0000
0x0596=0x0000
0x0594=0x0000
0x0592=0x0000
0x0591=0x0000
0x0590=0x0000
0x058E=0x0000
0x058C=0x0000
0x059D=0x0000
0x058A=0x0000
0x0589=0x0000
0x0587=0x0000
0x0585=0x0000
0x0595=0x0000
0x0584=0x0000
0x059F=0x0000
0x0583=0x0000
0x0582=0x0000
0x0567=0x0000
0x0566=0x0000
0x0565=0x0000
0x0564=0x0000
0x0563=0x0000
0x0562=0x0000
0x055F=0x0000
0x055D=0x0000
0x055A=0x0000
0x058F=0x0000
0x0557=0x0000
0x0593=0x0000
0x0554=0x0000
0x0552=0x0000
0x0551=0x0000
0x0550=0x0000
0x054D=0x0000
0x054C=0x0000
0x0549=0x0000
0x0547=0x0000
0x0546=0x0000
0x0545=0x0000
0x0544=0x0000
0x0543=0x0000
0x0553=0x0000
0x0542=0x0000
0x0541=0x0000
0x0527=0x0000
0x0526=0x0000
0x0524=0x0000
0x0525=0x0000
0x0523=0x0000
0x0521=0x0000
0x055C=0x0000
0x051A=0x0000
0x0519=0x0000
0x0518=0x0000
0x0514=0x0000
0x0513=0x0000
0x0511=0x0000
0x05A6=0x0000
0x051E=0x0000
0x050F=0x0000
0x0516=0x0000
0x050E=0x0000
0x050C=0x0000
0x050B=0x0000
0x050A=0x0000
0x0509=0x0000
0x0507=0x0000
0x0506=0x0000
0x0503=0x0000
0x04E7=0x0000
0x04E6=0x0000
0x0512=0x0000
0x04E5=0x0000
0x04E4=0x0000
0x0321=0x0000
0x0320=0x0000
0x0323=0x0000
0x031B=0x0000
0x0319=0x0000
0x0260=0x0000
0x031F=0x0000
0x0360=0x0000
0x0312=0x0000
0x0310=0x0000
0x0245=0x0000
0x0581=0x0000
0x045D=0x0000
0x030E=0x0000
0x0203=0x0000
0x0482=0x0000
0x0588=0x0000
0x0308=0x0000
0x048A=0x0000
0x0307=0x0000
0x0282=0x0000
0x038C=0x0000
0x0510=0x0000
0x0302=0x0000
0x0301=0x0000
0x0309=0x0000
0x0300=0x0000
0x044E=0x0000
0x034F=0x0000
0x055B=0x0000
0x0114=0x008D
0x02E5=0x0000
0x02E4=0x0000
0x02E1=0x0000
0x02D5=0x0000
0x0259=0x0000
0x0517=0x0000
0x0481=0x0000
0x030B=0x0000
0x0392=0x0000
0x02DE=0x0000
0x02DD=0x0000
0x0297=0x0000
0x0209=0x0000
0x0400=0x0081
0x02D8=0x0000
0x0104=0x0088
0x0103=0x0A12
0x0347=0x0000
0x0457=0x0000
0x058D=0x0000
0x02D7=0x0000
0x02D1=0x0000
0x04C8=0x0000
0x02D3=0x0000
0x02CB=0x0000
0x0250=0x0000
0x0306=0x0000
0x04A4=0x0000
0x044A=0x0000
0x054B=0x0000
0x02C7=0x0000
0x02C1=0x0000
0x031D=0x0000
0x0440=0x0020
0x045E=0x0000
0x02C4=0x0000
0x02C2=0x0000
0x02DB=0x0000
0x0357=0x0000
0x0201=0x07FF
0x0483=0x0000
0x05A4=0x0000
0x02A3=0x0000
0x02A1=0x0000
0x028D=0x0000
0x02D2=0x0000
0x039C=0x0000
0x02A0=0x0000
0x010E=0x2040
0x030A=0x0000
0x029F=0x0000
0x029C=0x0000
0x029E=0x0000
0x011D=0x9555
0x039E=0x0000
0x0296=0x0000
0x0555=0x0000
0x0349=0x0000
0x0295=0x0000
0x010D=0x009E
0x04C4=0x0000
0x0292=0x0000
0x02CF=0x0000
0x04D1=0x0000
0x0291=0x0000
0x02DF=0x0000
0x0290=0x0000
0x020A=0x0080
0x0102=0x3180
0x0388=0x0000
0x0120=0xB9FF
0x0317=0x0000
0x0244=0x0000
0x059B=0x0000
0x0322=0x0000
0x010F=0x3042
0x0119=0x18CB
0x02A6=0x0000
0x051F=0x0000
0x029A=0x0000
0x049A=0x0000
0x059E=0x0000
0x04D7=0x0000
0x0318=0x0000
0x02A7=0x0000
0x0200=0x0081
0x02C5=0x0000
0x0122=0x033F
0x0110=0x0BF4
0x0204=0x0000
0x0252=0x0000
0x011E=0x05DC
0x049B=0x0000
0x0294=0x0000
0x011C=0xAD41
0x02D6=0x0000
0x0311=0x0000
0x0117=0x280C
0x0540=0x0000
0x02A4=0x0000
0x0485=0x0000
0x02E0=0x0000
0x0118=0x018C
0x0489=0x0000
0x04A7=0x0000
0x0101=0x7800
0x0558=0x0000
0x02C6=0x0000
0x05A1=0x0000
0x02C9=0x0000
0x0500=0x0000
0x039D=0x0000
0x011F=0x3680
0x030C=0x0000
0x04DF=0x0000
0x0281=0x0000
0x0106=0x3182
0x028E=0x0000
0x0326=0x0000
0x0113=0x03C3
0x04CB=0x0000
0x0391=0x0000
0x0105=0x0007
0x02D9=0x0000
0x02CE=0x0000
0x044F=0x0000
0x038B=0x0000
0x02D4=0x0000
0x0107=0x318C
0x0495=0x0000
0x0246=0x0000
0x0303=0x0000
0x02E6=0x0000
0x045B=0x0000
0x0100=0x3409
0x0340=0x0000
0x0208=0x0070
0x0111=0x0083
0x0247=0x0000
0x024B=0x0000
0x045C=0x0000
0x024D=0x0000
0x0202=0x07FF
0x0383=0x0000
0x054A=0x0000
0x0401=0x07FF
0x0206=0x0000
0x0124=0x0000
0x0341=0x0000
0x0287=0x0000
0x0501=0x0000
0x034C=0x0000
0x030F=0x0000
0x025D=0x0000
0x0406=0x0000
0x051B=0x0000
0x0313=0x0000
0x010A=0x104C
0x0461=0x0000
0x0121=0x356A
0x0115=0x0009
0x0112=0xC0E6
0x039A=0x0000
0x02CC=0x0000
0x0116=0x8180
0x04A0=0x0000
0x0108=0x9442
0x020B=0x4000
0x0251=0x0000
0x0488=0x0000
0x0241=0x0000
0x038F=0x0000
0x02DC=0x0000
0x024C=0x0000
0x0494=0x0000
0x051D=0x0000
0x0243=0x0000
0x0556=0x0000
0x040A=0x0000
0x04CD=0x0000
0x0249=0x0000
0x0261=0x0000
0x024A=0x0000
0x0285=0x0000
0x0280=0x0000
0x0346=0x0000
0x024E=0x0000
0x024F=0x0000
0x0253=0x0000
0x0255=0x0000
0x0502=0x0000
0x0258=0x0000
0x0298=0x0000
0x05A3=0x0000
0x0367=0x0000
0x0240=0x0020
0x0256=0x0000
0x0242=0x0000
0x025A=0x0000
0x04E2=0x0000
0x04C5=0x0000
0x025B=0x0000
0x020C=0x7FFF
0x0205=0x0000
0x0361=0x0000
0x0515=0x0000
0x025C=0x0000
0x0355=0x0000
0x044C=0x0000
0x010C=0x88FD
0x0284=0x0000
0x0396=0x0000
0x0286=0x0000
0x028F=0x0000
0x031C=0x0000
0x031A=0x0000
0x0363=0x0000
0x0289=0x0000
0x059C=0x0000
0x04DD=0x0000
0x028A=0x0000
0x040C=0x0000
0x028B=0x0000
0x0450=0x0000
0x0352=0x0000
0x028C=0x0000
0x04C2=0x0000
0x025E=0x0000
0x04DA=0x0000
0x0327=0x0000
0x0380=0x0000
0x0342=0x0000
0x0343=0x0000
0x0561=0x0000
0x0344=0x0000
0x0586=0x0000
0x0484=0x0000
0x0345=0x0000
0x0505=0x0000
0x035B=0x0000
0x034A=0x0000
0x0455=0x0000
0x011A=0x2E02
0x034B=0x0000
0x034D=0x0000
0x035C=0x0000
0x034E=0x0000
0x0293=0x0000
0x03A6=0x0000
0x0350=0x0000
0x0445=0x0000
0x048F=0x0000
0x0351=0x0000
0x0353=0x0000
0x050D=0x0000
0x02CD=0x0000
0x0490=0x0000
0x0354=0x0000
0x0348=0x0000
0x0498=0x0000
0x0356=0x0000
0x0316=0x0000
0x030D=0x0000
0x040E=0x0000
0x0522=0x0000
0x049F=0x0000
0x029D=0x0000
0x04A3=0x0000
0x0359=0x0000
0x0299=0x0000
0x0452=0x0000
0x02C8=0x0000
0x035A=0x0000
0x0449=0x0000
0x0442=0x0000
0x035D=0x0000
0x035E=0x0000
0x0597=0x0000
0x035F=0x0000
0x0325=0x0000
0x0364=0x0000
0x0365=0x0000
0x0366=0x0000
0x0381=0x0000
0x0288=0x0000
0x0382=0x0000
0x0384=0x0000
0x0315=0x0000
0x0385=0x0000
0x054F=0x0000
0x0389=0x0000
0x04E3=0x0000
0x040F=0x0000
0x0386=0x0000
0x054E=0x0000
0x02D0=0x0000
0x03A0=0x0000
0x0387=0x0000
0x0362=0x0000
0x038A=0x0000
0x0395=0x0000
0x038D=0x0000
0x02E7=0x0000
0x0324=0x0000
0x038E=0x0000
0x0305=0x0000
0x0393=0x0000
0x0459=0x0000
0x0394=0x0000
0x0123=0x267B
0x0497=0x0000
0x0398=0x0000
0x0408=0x0000
0x0399=0x0000
0x039B=0x0000
0x0248=0x0000
0x039F=0x0000
0x049E=0x0000
0x059A=0x0000
0x048D=0x0000
0x051C=0x0000
0x03A2=0x0000
0x03A3=0x0000
0x03A4=0x0000
0x03A5=0x0000
0x0520=0x0000
0x03A7=0x0000
0x055E=0x0000
0x0402=0x07FF
0x0403=0x0000
0x04D8=0x0000
0x0560=0x0000
0x0404=0x0000
0x0254=0x0000
0x0405=0x0000
0x0407=0x0000
0x0580=0x0000
0x0409=0x0000
0x040B=0x7FFF
0x040D=0x0000
0x0441=0x0000
0x0508=0x0000
0x0443=0x0000
0x0444=0x0000
0x04CA=0x0000
0x0446=0x0000
0x0454=0x0000
0x0448=0x0000
0x044B=0x0000
0x02E2=0x0000
0x044D=0x0000
0x0390=0x0000
0x0451=0x0000
0x0453=0x0000
0x0559=0x0000
0x0456=0x0000
0x0314=0x0000
0x0458=0x0000
0x02DA=0x0000
0x045A=0x0000
0x0447=0x0000
0x0460=0x0000
0x0480=0x0000
0x045F=0x0000
0x0486=0x0000
0x0487=0x0000
0x0358=0x0000
0x048B=0x0000
0x048C=0x0000
0x0283=0x0000
0x048E=0x0000
0x029B=0x0000
0x0491=0x0000
0x0492=0x0000
0x04A1=0x0000
0x0493=0x0000
0x04C3=0x0000
0x0496=0x0000
0x02C0=0x0000
0x0499=0x0000
0x02E3=0x0000
0x0397=0x0000
0x049C=0x0000
0x04C7=0x0000
0x049D=0x0000
0x0109=0x61C1
0x04A2=0x0000
0x04A5=0x0000
0x04A6=0x0000
0x0257=0x0000
0x04D6=0x0000
0x031E=0x0000
0x04C0=0x0000
0x02CA=0x0000
0x04C9=0x0000
0x02C3=0x0000
0x04C1=0x0000
0x0207=0x0000
0x04C6=0x0000
0x02A5=0x0000
0x04CC=0x0000
0x04CE=0x0000
0x025F=0x0000
0x04CF=0x0000
0x04D0=0x0000
0x0548=0x0000
0x04D2=0x0000
0x04D3=0x0000
0x0504=0x0000
0x04D4=0x0000
0x0304=0x0000
0x04D5=0x0000
0x04D9=0x0000
0x04DB=0x0000
0x04DC=0x0000
0x058B=0x0000
0x04DE=0x0000
0x04E0=0x0000
0x02A2=0x0000
0x03A1=0x0000
0x04E1=0x0000
[lms7002_registers_a]
0x05A7=0x0000
0x05A5=0x0000
0x05A2=0x0000
0x0599=0x0000
0x0598=0xF61D
0x0596=0x0A94
0x0594=0xF40D
0x0592=0x0DF1
0x0591=0xFCFE
0x0590=0xEF99
0x058E=0x1316
0x058C=0xEA50
0x059D=0x0000
0x058A=0x17DC
0x0585=0xDAA2
0x0595=0x00BC
0x0584=0xE7E2
0x059F=0x0000
0x0583=0x2E45
0x0582=0x150F
0x0567=0x4049
0x0566=0x0906
0x0565=0xB77F
0x0563=0x4F91
0x055F=0x5852
0x055D=0xA6B5
0x055A=0xBE2A
0x058F=0x0605
0x0557=0x4C24
0x0593=0x00D8
0x0554=0x6901
0x0552=0x8D44
0x0551=0xD7B7
0x0550=0x79FA
0x054C=0x7FFF
0x0549=0x18C9
0x0547=0xD7B7
0x0546=0x8D44
0x0545=0x364E
0x0544=0x6901
0x0543=0xBD96
0x0553=0x364E
0x0542=0xA2B5
0x0541=0x4C24
0x0527=0xACB9
0x0526=0xBE2A
0x0525=0x57AC
0x0523=0xA6B5
0x0521=0x5852
0x055C=0x3347
0x051A=0x0906
0x0518=0xEFF2
0x0514=0xE7E2
0x0513=0xDAA2
0x0511=0x1D10
0x05A6=0x0000
0x051E=0xF524
0x050F=0xEA5F
0x0516=0x150F
0x050E=0x17DC
0x050C=0xEA50
0x050B=0xF5EF
0x050A=0x1316
0x0509=0x0605
0x0507=0xFCFE
0x0506=0x0DF1
0x0503=0x00BC
0x04E7=0x0000
0x04E6=0x0000
0x04E4=0x0000
0x04E0=0x0000
0x058B=0x0F45
0x04DE=0x0000
0x04DC=0x0000
0x04DB=0x0000
0x04D9=0x0000
0x04D8=0x0000
0x059E=0x0000
0x04D7=0x0000
0x0504=0xF40D
0x04D4=0x0000
0x04D3=0x0000
0x0548=0x79FA
0x04D2=0x0000
0x04D1=0x0000
0x04D0=0x0000
0x04CE=0x0000
0x04C8=0x0000
0x04E2=0x0000
0x04C5=0x0000
0x04C4=0x0000
0x04C2=0x0000
0x04A7=0x0000
0x04A6=0x0000
0x04A5=0x0000
0x04A1=0x0000
0x04A0=0x0000
0x0522=0xDB10
0x049F=0x0000
0x049E=0x0000
0x04C7=0x0000
0x049D=0x0000
0x049B=0x0000
0x049A=0x0000
0x04C3=0x0000
0x0496=0x0000
0x0494=0x0000
0x02D3=0x0000
0x02D1=0x0000
0x02CB=0x0000
0x0250=0x0000
0x0096=0x0000
0x04C1=0x0000
0x02C3=0x0000
0x02C4=0x0000
0x02C2=0x0000
0x0499=0x0000
0x02C0=0x0000
0x0201=0x07FF
0x0483=0x0000
0x05A4=0x0000
0x02A3=0x0000
0x008B=0x2756
0x02A1=0x0000
0x028D=0x0000
0x029C=0x0000
0x029E=0x0000
0x0297=0x0000
0x0296=0x0000
0x0555=0xBD96
0x0349=0x0000
0x010D=0x015C
0x02CF=0x0000
0x0291=0x0000
0x02DF=0x0000
0x0290=0x0000
0x0021=0x0E9F
0x0450=0x0000
0x0558=0x5009
0x02C6=0x0000
0x0101=0x7800
0x059C=0x0000
0x04DD=0x0000
0x028A=0x0000
0x0121=0x3652
0x0285=0x0000
0x0280=0x0000
0x0319=0x0000
0x04CF=0x0000
0x025F=0x0000
0x025D=0x0000
0x030F=0x0000
0x0406=0x0000
0x02C5=0x0000
0x0200=0x0301
0x0281=0x0000
0x04A2=0x0000
0x0109=0x8CC1
0x0355=0x0000
0x044C=0x0000
0x025B=0x0000
0x0298=0x0000
0x0502=0x0A94
0x0258=0x0000
0x0255=0x0000
0x04D6=0x0000
0x0257=0x0000
0x0252=0x0000
0x0204=0xC016
0x024F=0x0000
0x04CC=0x0000
0x02A5=0x0000
0x0497=0x0000
0x0123=0x067B
0x0495=0x0000
0x0246=0x0000
0x051D=0x4F91
0x0243=0x0000
0x0556=0xA2B5
0x040A=0x1000
0x025A=0x0000
0x0242=0x0000
0x020C=0x8000
0x0251=0x0000
0x02DD=0x0000
0x0020=0xFFFD
0x0488=0x0000
0x020A=0x0080
0x0102=0x3180
0x04C6=0x0000
0x0207=0x0000
0x04DA=0x0000
0x025E=0x0000
0x0206=0x0000
0x00A3=0x6565
0x02E2=0x0000
0x044D=0x0000
0x0292=0x0000
0x002A=0x0086
0x0245=0x0000
0x0581=0xC89D
0x045D=0x0000
0x024D=0x0000
0x002B=0x4032
0x02A0=0x0000
0x010E=0x0285
0x0286=0x0000
0x009E=0x658C
0x0088=0x04F0
0x0085=0x0001
0x0295=0x0000
0x0089=0x0048
0x0256=0x0000
0x0093=0x0000
0x0092=0x0001
0x031B=0x0000
0x0111=0x0099
0x0095=0x0000
0x02A7=0x0000
0x0203=0x2F99
0x030E=0x0000
0x0482=0x0000
0x05A0=0x0000
0x009C=0x658C
0x0381=0x0000
0x0122=0x033F
0x0110=0x0BFF
0x0100=0xB409
0x0028=0x0101
0x0026=0x0101
0x0524=0x3347
0x009D=0x6565
0x0294=0x0000
0x0106=0x3182
0x028E=0x0000
0x0326=0x0000
0x0113=0x03C3
0x04CB=0x0000
0x0391=0x0000
0x05A1=0x0000
0x02C9=0x0000
0x0500=0xF61D
0x039D=0x0000
0x011F=0x3680
0x0395=0x0000
0x024B=0x0000
0x045C=0x0000
0x0247=0x0000
0x0512=0x196B
0x04E5=0x0000
0x0024=0x50D8
0x0353=0x0000
0x050D=0x0F45
0x02CD=0x0000
0x0490=0x0000
0x0501=0xFDFB
0x034C=0x0000
0x00AA=0x0000
0x0350=0x0000
0x0445=0x0000
0x048F=0x0000
0x008A=0x0491
0x0453=0x0000
0x0124=0x0000
0x0260=0x0000
0x00A1=0x6565
0x0356=0x0000
0x0241=0x0000
0x04CD=0x0000
0x0249=0x0000
0x002C=0x0000
0x038F=0x0000
0x008C=0x267B
0x0459=0x0000
0x0394=0x0000
0x054D=0xF7A3
0x00A6=0x0001
0x002D=0xFFFF
0x00AC=0x2000
0x0253=0x0000
0x028B=0x0000
0x040C=0x40F8
0x0099=0x6565
0x0310=0x0000
0x00A2=0x6565
0x0589=0xEA5F
0x002F=0x3840
0x0597=0xFDFB
0x035F=0x0000
0x0562=0xF524
0x0025=0x0101
0x011C=0xAD41
0x011D=0x2AAA
0x039E=0x0000
0x0289=0x0000
0x0282=0x0000
0x0307=0x0000
0x038C=0x0000
0x0087=0x0000
0x0399=0x0000
0x054B=0xF7A3
0x02C7=0x0000
0x0519=0x4049
0x009F=0x658C
0x0515=0x2E45
0x025C=0x0000
0x00A5=0x6565
0x0301=0x0000
0x02C1=0x0000
0x0259=0x0000
0x02D5=0x0000
0x02E1=0x0000
0x0517=0xC89D
0x0481=0x0000
0x00A8=0x0000
0x02D2=0x0000
0x039C=0x0000
0x0564=0x0000
0x00AB=0x0040
0x0261=0x0000
0x002E=0x0000
0x02DE=0x0000
0x0540=0x5009
0x02A4=0x0000
0x0485=0x0000
0x0489=0x0000
0x00AD=0x03FF
0x024A=0x0000
0x0029=0x0101
0x0097=0x0000
0x011E=0x061D
0x00AE=0x0000
0x00A7=0x6565
0x020B=0x4000
0x0098=0x0000
0x0108=0xFC26
0x0027=0x05E4
0x0117=0x100C
0x0383=0x0000
0x0202=0x0794
0x054A=0x8184
0x00A4=0x6565
0x0401=0x07FF
0x0086=0x4101
0x010C=0x8865
0x02D8=0x0000
0x0347=0x0000
0x0457=0x0000
0x0103=0x0A12
0x0104=0x0088
0x0357=0x0000
0x02DB=0x0000
0x0400=0x0101
0x009B=0x6565
0x0105=0x0007
0x05A3=0x0000
0x0240=0x0028
0x0367=0x0000
0x044F=0x0000
0x038B=0x0000
0x0284=0x0000
0x0396=0x0000
0x051F=0xAB08
0x029A=0x0000
0x0361=0x0000
0x0205=0x0000
0x0119=0x18DF
0x02A6=0x0000
0x010F=0x3042
0x04C0=0x0000
0x031E=0x0000
0x02CC=0x0000
0x0116=0x8180
0x0587=0x1D10
0x0023=0x5550
0x048C=0x0000
0x0112=0x3171
0x039A=0x0000
0x0320=0x0000
0x0323=0x0000
0x0115=0x0009
0x00A9=0x8000
0x0244=0x0000
0x0094=0x0000
0x0317=0x0000
0x0208=0x0170
0x0340=0x0000
0x058D=0xF5EF
0x02D7=0x0000
0x04A3=0x0000
0x029D=0x0000
0x0388=0x0000
0x0120=0xB9FF
0x04C9=0x0000
0x02CA=0x0000
0x0209=0x0000
0x0082=0x8001
0x0107=0x318C
0x02D4=0x0000
0x02CE=0x0000
0x02D9=0x0000
0x02E4=0x0000
0x024C=0x0000
0x02DC=0x0000
0x0118=0x018C
0x02E0=0x0000
0x055B=0x57AC
0x0114=0x0110
0x02E5=0x0000
0x02E6=0x0000
0x045B=0x0000
0x034F=0x0000
0x0300=0x0000
0x044E=0x0000
0x0510=0xE6C7
0x0302=0x0000
0x0303=0x0000
0x04D5=0x0000
0x0304=0x0000
0x0306=0x0000
0x04A4=0x0000
0x044A=0x0000
0x049C=0x0000
0x02E3=0x0000
0x0397=0x0000
0x0588=0xE6C7
0x0308=0x0000
0x048A=0x0000
0x0309=0x0000
0x029F=0x0000
0x030A=0x0000
0x0392=0x0000
0x030B=0x0000
0x04DF=0x0000
0x030C=0x0000
0x02D6=0x0000
0x0311=0x0000
0x024E=0x0000
0x0346=0x0000
0x0312=0x0000
0x051B=0xB77F
0x010A=0x104C
0x0461=0x0000
0x0313=0x0000
0x0360=0x0000
0x028C=0x0000
0x0352=0x0000
0x040E=0x0003
0x030D=0x0000
0x0316=0x0000
0x031F=0x0000
0x0318=0x0000
0x0287=0x0000
0x0341=0x0000
0x028F=0x0000
0x031C=0x0000
0x031A=0x0000
0x0363=0x0000
0x031D=0x0000
0x0440=0x0024
0x045E=0x0000
0x0321=0x0000
0x059B=0x0000
0x0322=0x0000
0x0327=0x0000
0x0380=0x0000
0x0342=0x0000
0x0343=0x0000
0x0561=0xAB08
0x0344=0x0000
0x0586=0x196B
0x0484=0x0000
0x0345=0x0000
0x0505=0x00D8
0x035B=0x0000
0x0498=0x0000
0x0084=0x0400
0x0348=0x0000
0x034A=0x0000
0x0455=0x0000
0x011A=0x2E14
0x034B=0x0000
0x034D=0x0000
0x035C=0x0000
0x034E=0x0000
0x0293=0x0000
0x03A6=0x0000
0x0351=0x0000
0x0354=0x0000
0x048B=0x0000
0x0358=0x0000
0x0359=0x0000
0x0299=0x0000
0x0452=0x0000
0x02C8=0x0000
0x035A=0x0000
0x0449=0x0000
0x0442=0x0000
0x035D=0x0000
0x035E=0x0000
0x038A=0x0000
0x0362=0x0000
0x0081=0x0000
0x0325=0x0000
0x0364=0x0000
0x0365=0x0000
0x0366=0x0000
0x0288=0x0000
0x0382=0x0000
0x0384=0x0000
0x0315=0x0000
0x0385=0x0000
0x054F=0x18C9
0x0389=0x0000
0x04E3=0x0000
0x040F=0x43E4
0x0386=0x0000
0x054E=0x8184
0x009A=0x658C
0x02D0=0x0000
0x03A0=0x0000
0x0387=0x0000
0x038D=0x0000
0x02E7=0x0000
0x0324=0x0000
0x038E=0x0000
0x0305=0x0000
0x0393=0x0000
0x0398=0x0000
0x0408=0x0000
0x039B=0x0000
0x0248=0x0000
0x039F=0x0000
0x04E1=0x0000
0x02A2=0x0000
0x03A1=0x0000
0x059A=0x0000
0x048D=0x0000
0x051C=0x0000
0x03A2=0x0000
0x03A3=0x0000
0x03A4=0x0000
0x03A5=0x0000
0x0520=0x174B
0x03A7=0x0000
0x055E=0xDB10
0x0402=0x07D9
0x0403=0x0013
0x0560=0x174B
0x00A0=0x6565
0x0404=0x0000
0x0254=0x0000
0x0405=0x0000
0x0407=0x0000
0x0580=0xEFF2
0x0409=0x0000
0x040B=0x000F
0x040D=0x0000
0x0441=0x0000
0x0508=0xEF99
0x0443=0x0000
0x0444=0x0000
0x04CA=0x0000
0x0446=0x0000
0x0454=0x0000
0x0448=0x0000
0x044B=0x0000
0x0390=0x0000
0x0451=0x0000
0x0559=0xACB9
0x0456=0x0000
0x0314=0x0000
0x0458=0x0000
0x02DA=0x0000
0x045A=0x0000
0x0447=0x0000
0x0460=0x0000
0x0480=0x0000
0x045F=0x0000
0x0486=0x0000
0x0487=0x0000
0x0283=0x0000
0x0022=0x07FF
0x048E=0x0000
0x029B=0x0000
0x0491=0x0000
0x0492=0x0000
0x0493=0x0000
[file_info]
version=1
type=lms7002m_minimal_config
targets/ARCH/LMSSDR/enb_sodera_lowband_Lrx_5MHz_rx19dB_txfull.ini 0 → 100644
View file @ 667a4987
[reference_clocks]
sxr_ref_clk_mhz=30.72
sxt_ref_clk_mhz=30.72
[lms7002_registers_b]
0x05A7=0x0000
0x05A5=0x0000
0x05A2=0x0000
0x05A0=0x0000
0x0599=0x0000
0x0598=0x0000
0x0596=0x0000
0x0594=0x0000
0x0592=0x0000
0x0591=0x0000
0x0590=0x0000
0x058E=0x0000
0x058C=0x0000
0x059D=0x0000
0x058A=0x0000
0x0589=0x0000
0x0587=0x0000
0x0585=0x0000
0x0595=0x0000
0x0584=0x0000
0x059F=0x0000
0x0583=0x0000
0x0582=0x0000
0x0567=0x0000
0x0566=0x0000
0x0565=0x0000
0x0564=0x0000
0x0563=0x0000
0x0562=0x0000
0x055F=0x0000
0x055D=0x0000
0x055A=0x0000
0x058F=0x0000
0x0557=0x0000
0x0593=0x0000
0x0554=0x0000
0x0552=0x0000
0x0551=0x0000
0x0550=0x0000
0x054D=0x0000
0x054C=0x0000
0x0549=0x0000
0x0547=0x0000
0x0546=0x0000
0x0545=0x0000
0x0544=0x0000
0x0543=0x0000
0x0553=0x0000
0x0542=0x0000
0x0541=0x0000
0x0527=0x0000
0x0526=0x0000
0x0524=0x0000
0x0525=0x0000
0x0523=0x0000
0x0521=0x0000
0x055C=0x0000
0x051A=0x0000
0x0519=0x0000
0x0518=0x0000
0x0514=0x0000
0x0513=0x0000
0x0511=0x0000
0x05A6=0x0000
0x051E=0x0000
0x050F=0x0000
0x0516=0x0000
0x050E=0x0000
0x050C=0x0000
0x050B=0x0000
0x050A=0x0000
0x0509=0x0000
0x0507=0x0000
0x0506=0x0000
0x0503=0x0000
0x04E7=0x0000
0x04E6=0x0000
0x0512=0x0000
0x04E5=0x0000
0x04E4=0x0000
0x0321=0x0000
0x0320=0x0000
0x0323=0x0000
0x031B=0x0000
0x0319=0x0000
0x0260=0x0000
0x031F=0x0000
0x0360=0x0000
0x0312=0x0000
0x0310=0x0000
0x0245=0x0000
0x0581=0x0000
0x045D=0x0000
0x030E=0x0000
0x0203=0x0000
0x0482=0x0000
0x0588=0x0000
0x0308=0x0000
0x048A=0x0000
0x0307=0x0000
0x0282=0x0000
0x038C=0x0000
0x0510=0x0000
0x0302=0x0000
0x0301=0x0000
0x0309=0x0000
0x0300=0x0000
0x044E=0x0000
0x034F=0x0000
0x055B=0x0000
0x0114=0x008D
0x02E5=0x0000
0x02E4=0x0000
0x02E1=0x0000
0x02D5=0x0000
0x0259=0x0000
0x0517=0x0000
0x0481=0x0000
0x030B=0x0000
0x0392=0x0000
0x02DE=0x0000
0x02DD=0x0000
0x0297=0x0000
0x0209=0x0000
0x0400=0x0081
0x02D8=0x0000
0x0104=0x0088
0x0103=0x0A12
0x0347=0x0000
0x0457=0x0000
0x058D=0x0000
0x02D7=0x0000
0x02D1=0x0000
0x04C8=0x0000
0x02D3=0x0000
0x02CB=0x0000
0x0250=0x0000
0x0306=0x0000
0x04A4=0x0000
0x044A=0x0000
0x054B=0x0000
0x02C7=0x0000
0x02C1=0x0000
0x031D=0x0000
0x0440=0x0020
0x045E=0x0000
0x02C4=0x0000
0x02C2=0x0000
0x02DB=0x0000
0x0357=0x0000
0x0201=0x07FF
0x0483=0x0000
0x05A4=0x0000
0x02A3=0x0000
0x02A1=0x0000
0x028D=0x0000
0x02D2=0x0000
0x039C=0x0000
0x02A0=0x0000
0x010E=0x2040
0x030A=0x0000
0x029F=0x0000
0x029C=0x0000
0x029E=0x0000
0x011D=0x699D
0x039E=0x0000
0x0296=0x0000
0x0555=0x0000
0x0349=0x0000
0x0295=0x0000
0x010D=0x009E
0x04C4=0x0000
0x0292=0x0000
0x02CF=0x0000
0x04D1=0x0000
0x0291=0x0000
0x02DF=0x0000
0x0290=0x0000
0x020A=0x0080
0x0102=0x3180
0x0388=0x0000
0x0120=0xB9FF
0x0317=0x0000
0x0244=0x0000
0x059B=0x0000
0x0322=0x0000
0x010F=0x3042
0x0119=0x18CB
0x02A6=0x0000
0x051F=0x0000
0x029A=0x0000
0x049A=0x0000
0x059E=0x0000
0x04D7=0x0000
0x0318=0x0000
0x02A7=0x0000
0x0200=0x0081
0x02C5=0x0000
0x0122=0x033F
0x0110=0x0BF4
0x0204=0x0000
0x0252=0x0000
0x011E=0x06B9
0x049B=0x0000
0x0294=0x0000
0x011C=0xAD41
0x02D6=0x0000
0x0311=0x0000
0x0117=0x280C
0x0540=0x0000
0x02A4=0x0000
0x0485=0x0000
0x02E0=0x0000
0x0118=0x018C
0x0489=0x0000
0x04A7=0x0000
0x0101=0x7800
0x0558=0x0000
0x02C6=0x0000
0x05A1=0x0000
0x02C9=0x0000
0x0500=0x0000
0x039D=0x0000
0x011F=0x3680
0x030C=0x0000
0x04DF=0x0000
0x0281=0x0000
0x0106=0x3182
0x028E=0x0000
0x0326=0x0000
0x0113=0x03C3
0x04CB=0x0000
0x0391=0x0000
0x0105=0x0007
0x02D9=0x0000
0x02CE=0x0000
0x044F=0x0000
0x038B=0x0000
0x02D4=0x0000
0x0107=0x318C
0x0495=0x0000
0x0246=0x0000
0x0303=0x0000
0x02E6=0x0000
0x045B=0x0000
0x0100=0x3409
0x0340=0x0000
0x0208=0x0070
0x0111=0x0083
0x0247=0x0000
0x024B=0x0000
0x045C=0x0000
0x024D=0x0000
0x0202=0x07FF
0x0383=0x0000
0x054A=0x0000
0x0401=0x07FF
0x0206=0x0000
0x0124=0x0000
0x0341=0x0000
0x0287=0x0000
0x0501=0x0000
0x034C=0x0000
0x030F=0x0000
0x025D=0x0000
0x0406=0x0000
0x051B=0x0000
0x0313=0x0000
0x010A=0x104C
0x0461=0x0000
0x0121=0x333C
0x0115=0x0009
0x0112=0xC0E6
0x039A=0x0000
0x02CC=0x0000
0x0116=0x8180
0x04A0=0x0000
0x0108=0x9442
0x020B=0x4000
0x0251=0x0000
0x0488=0x0000
0x0241=0x0000
0x038F=0x0000
0x02DC=0x0000
0x024C=0x0000
0x0494=0x0000
0x051D=0x0000
0x0243=0x0000
0x0556=0x0000
0x040A=0x0000
0x04CD=0x0000
0x0249=0x0000
0x0261=0x0000
0x024A=0x0000
0x0285=0x0000
0x0280=0x0000
0x0346=0x0000
0x024E=0x0000
0x024F=0x0000
0x0253=0x0000
0x0255=0x0000
0x0502=0x0000
0x0258=0x0000
0x0298=0x0000
0x05A3=0x0000
0x0367=0x0000
0x0240=0x0020
0x0256=0x0000
0x0242=0x0000
0x025A=0x0000
0x04E2=0x0000
0x04C5=0x0000
0x025B=0x0000
0x020C=0x7FFF
0x0205=0x0000
0x0361=0x0000
0x0515=0x0000
0x025C=0x0000
0x0355=0x0000
0x044C=0x0000
0x010C=0x88FD
0x0284=0x0000
0x0396=0x0000
0x0286=0x0000
0x028F=0x0000
0x031C=0x0000
0x031A=0x0000
0x0363=0x0000
0x0289=0x0000
0x059C=0x0000
0x04DD=0x0000
0x028A=0x0000
0x040C=0x0000
0x028B=0x0000
0x0450=0x0000
0x0352=0x0000
0x028C=0x0000
0x04C2=0x0000
0x025E=0x0000
0x04DA=0x0000
0x0327=0x0000
0x0380=0x0000
0x0342=0x0000
0x0343=0x0000
0x0561=0x0000
0x0344=0x0000
0x0586=0x0000
0x0484=0x0000
0x0345=0x0000
0x0505=0x0000
0x035B=0x0000
0x034A=0x0000
0x0455=0x0000
0x011A=0x2E02
0x034B=0x0000
0x034D=0x0000
0x035C=0x0000
0x034E=0x0000
0x0293=0x0000
0x03A6=0x0000
0x0350=0x0000
0x0445=0x0000
0x048F=0x0000
0x0351=0x0000
0x0353=0x0000
0x050D=0x0000
0x02CD=0x0000
0x0490=0x0000
0x0354=0x0000
0x0348=0x0000
0x0498=0x0000
0x0356=0x0000
0x0316=0x0000
0x030D=0x0000
0x040E=0x0000
0x0522=0x0000
0x049F=0x0000
0x029D=0x0000
0x04A3=0x0000
0x0359=0x0000
0x0299=0x0000
0x0452=0x0000
0x02C8=0x0000
0x035A=0x0000
0x0449=0x0000
0x0442=0x0000
0x035D=0x0000
0x035E=0x0000
0x0597=0x0000
0x035F=0x0000
0x0325=0x0000
0x0364=0x0000
0x0365=0x0000
0x0366=0x0000
0x0381=0x0000
0x0288=0x0000
0x0382=0x0000
0x0384=0x0000
0x0315=0x0000
0x0385=0x0000
0x054F=0x0000
0x0389=0x0000
0x04E3=0x0000
0x040F=0x0000
0x0386=0x0000
0x054E=0x0000
0x02D0=0x0000
0x03A0=0x0000
0x0387=0x0000
0x0362=0x0000
0x038A=0x0000
0x0395=0x0000
0x038D=0x0000
0x02E7=0x0000
0x0324=0x0000
0x038E=0x0000
0x0305=0x0000
0x0393=0x0000
0x0459=0x0000
0x0394=0x0000
0x0123=0x267B
0x0497=0x0000
0x0398=0x0000
0x0408=0x0000
0x0399=0x0000
0x039B=0x0000
0x0248=0x0000
0x039F=0x0000
0x049E=0x0000
0x059A=0x0000
0x048D=0x0000
0x051C=0x0000
0x03A2=0x0000
0x03A3=0x0000
0x03A4=0x0000
0x03A5=0x0000
0x0520=0x0000
0x03A7=0x0000
0x055E=0x0000
0x0402=0x07FF
0x0403=0x0000
0x04D8=0x0000
0x0560=0x0000
0x0404=0x0000
0x0254=0x0000
0x0405=0x0000
0x0407=0x0000
0x0580=0x0000
0x0409=0x0000
0x040B=0x7FFF
0x040D=0x0000
0x0441=0x0000
0x0508=0x0000
0x0443=0x0000
0x0444=0x0000
0x04CA=0x0000
0x0446=0x0000
0x0454=0x0000
0x0448=0x0000
0x044B=0x0000
0x02E2=0x0000
0x044D=0x0000
0x0390=0x0000
0x0451=0x0000
0x0453=0x0000
0x0559=0x0000
0x0456=0x0000
0x0314=0x0000
0x0458=0x0000
0x02DA=0x0000
0x045A=0x0000
0x0447=0x0000
0x0460=0x0000
0x0480=0x0000
0x045F=0x0000
0x0486=0x0000
0x0487=0x0000
0x0358=0x0000
0x048B=0x0000
0x048C=0x0000
0x0283=0x0000
0x048E=0x0000
0x029B=0x0000
0x0491=0x0000
0x0492=0x0000
0x04A1=0x0000
0x0493=0x0000
0x04C3=0x0000
0x0496=0x0000
0x02C0=0x0000
0x0499=0x0000
0x02E3=0x0000
0x0397=0x0000
0x049C=0x0000
0x04C7=0x0000
0x049D=0x0000
0x0109=0x61C1
0x04A2=0x0000
0x04A5=0x0000
0x04A6=0x0000
0x0257=0x0000
0x04D6=0x0000
0x031E=0x0000
0x04C0=0x0000
0x02CA=0x0000
0x04C9=0x0000
0x02C3=0x0000
0x04C1=0x0000
0x0207=0x0000
0x04C6=0x0000
0x02A5=0x0000
0x04CC=0x0000
0x04CE=0x0000
0x025F=0x0000
0x04CF=0x0000
0x04D0=0x0000
0x0548=0x0000
0x04D2=0x0000
0x04D3=0x0000
0x0504=0x0000
0x04D4=0x0000
0x0304=0x0000
0x04D5=0x0000
0x04D9=0x0000
0x04DB=0x0000
0x04DC=0x0000
0x058B=0x0000
0x04DE=0x0000
0x04E0=0x0000
0x02A2=0x0000
0x03A1=0x0000
0x04E1=0x0000
[lms7002_registers_a]
0x05A7=0x0000
0x05A5=0x0000
0x05A2=0x0000
0x0599=0x0000
0x0598=0xF61D
0x0596=0x0A94
0x0594=0xF40D
0x0592=0x0DF1
0x0591=0xFCFE
0x0590=0xEF99
0x058E=0x1316
0x058C=0xEA50
0x059D=0x0000
0x058A=0x17DC
0x0585=0xDAA2
0x0595=0x00BC
0x0584=0xE7E2
0x059F=0x0000
0x0583=0x2E45
0x0582=0x150F
0x0567=0x4049
0x0566=0x0906
0x0565=0xB77F
0x0563=0x4F91
0x055F=0x5852
0x055D=0xA6B5
0x055A=0xBE2A
0x058F=0x0605
0x0557=0x4C24
0x0593=0x00D8
0x0554=0x6901
0x0552=0x8D44
0x0551=0xD7B7
0x0550=0x79FA
0x054C=0x7FFF
0x0549=0x18C9
0x0547=0xD7B7
0x0546=0x8D44
0x0545=0x364E
0x0544=0x6901
0x0543=0xBD96
0x0553=0x364E
0x0542=0xA2B5
0x0541=0x4C24
0x0527=0xACB9
0x0526=0xBE2A
0x0525=0x57AC
0x0523=0xA6B5
0x0521=0x5852
0x055C=0x3347
0x051A=0x0906
0x0518=0xEFF2
0x0514=0xE7E2
0x0513=0xDAA2
0x0511=0x1D10
0x05A6=0x0000
0x051E=0xF524
0x050F=0xEA5F
0x0516=0x150F
0x050E=0x17DC
0x050C=0xEA50
0x050B=0xF5EF
0x050A=0x1316
0x0509=0x0605
0x0507=0xFCFE
0x0506=0x0DF1
0x0503=0x00BC
0x04E7=0x0000
0x04E6=0x0000
0x04E4=0x0000
0x04E0=0x0000
0x058B=0x0F45
0x04DE=0x0000
0x04DC=0x0000
0x04DB=0x0000
0x04D9=0x0000
0x04D8=0x0000
0x059E=0x0000
0x04D7=0x0000
0x0504=0xF40D
0x04D4=0x0000
0x04D3=0x0000
0x0548=0x79FA
0x04D2=0x0000
0x04D1=0x0000
0x04D0=0x0000
0x04CE=0x0000
0x04C8=0x0000
0x04E2=0x0000
0x04C5=0x0000
0x04C4=0x0000
0x04C2=0x0000
0x04A7=0x0000
0x04A6=0x0000
0x04A5=0x0000
0x04A1=0x0000
0x04A0=0x0000
0x0522=0xDB10
0x049F=0x0000
0x049E=0x0000
0x04C7=0x0000
0x049D=0x0000
0x049B=0x0000
0x049A=0x0000
0x04C3=0x0000
0x0496=0x0000
0x0494=0x0000
0x02D3=0x0000
0x02D1=0x0000
0x02CB=0x0000
0x0250=0x0000
0x0096=0x0000
0x04C1=0x0000
0x02C3=0x0000
0x02C4=0x0000
0x02C2=0x0000
0x0499=0x0000
0x02C0=0x0000
0x0201=0x07FF
0x0483=0x0000
0x05A4=0x0000
0x02A3=0x0000
0x008B=0x278A
0x02A1=0x0000
0x028D=0x0000
0x029C=0x0000
0x029E=0x0000
0x0297=0x0000
0x0296=0x0000
0x0555=0xBD96
0x0349=0x0000
0x010D=0x015C
0x02CF=0x0000
0x0291=0x0000
0x02DF=0x0000
0x0290=0x0000
0x0021=0x0E9F
0x0450=0x0000
0x0558=0x5009
0x02C6=0x0000
0x0101=0x7800
0x059C=0x0000
0x04DD=0x0000
0x028A=0x0000
0x0121=0x313C
0x0285=0x0000
0x0280=0x0000
0x0319=0x0000
0x04CF=0x0000
0x025F=0x0000
0x025D=0x0000
0x030F=0x0000
0x0406=0x0000
0x02C5=0x0000
0x0200=0x0301
0x0281=0x0000
0x04A2=0x0000
0x0109=0x03C1
0x0355=0x0000
0x044C=0x0000
0x025B=0x0000
0x0298=0x0000
0x0502=0x0A94
0x0258=0x0000
0x0255=0x0000
0x04D6=0x0000
0x0257=0x0000
0x0252=0x0000
0x0204=0xFFAD
0x024F=0x0000
0x04CC=0x0000
0x02A5=0x0000
0x0497=0x0000
0x0123=0x267B
0x0495=0x0000
0x0246=0x0000
0x051D=0x4F91
0x0243=0x0000
0x0556=0xA2B5
0x040A=0x1000
0x025A=0x0000
0x0242=0x0000
0x020C=0x8000
0x0251=0x0000
0x02DD=0x0000
0x0020=0xFFFD
0x0488=0x0000
0x020A=0x0000
0x0102=0x3180
0x04C6=0x0000
0x0207=0x0000
0x04DA=0x0000
0x025E=0x0000
0x0206=0x0000
0x00A3=0x6565
0x02E2=0x0000
0x044D=0x0000
0x0292=0x0000
0x002A=0x0086
0x0245=0x0000
0x0581=0xC89D
0x045D=0x0000
0x024D=0x0000
0x002B=0x4032
0x02A0=0x0000
0x010E=0x070C
0x0286=0x0000
0x009E=0x658C
0x0088=0x0530
0x0085=0x0001
0x0295=0x0000
0x0089=0x00A0
0x0256=0x0000
0x0093=0x0000
0x0092=0x0001
0x031B=0x0000
0x0111=0x0099
0x0095=0x0000
0x02A7=0x0000
0x0203=0x2F6C
0x030E=0x0000
0x0482=0x0000
0x05A0=0x0000
0x009C=0x658C
0x0381=0x0000
0x0122=0x033F
0x0110=0x0BFF
0x0100=0xB409
0x0028=0x0101
0x0026=0x0101
0x0524=0x3347
0x009D=0x6565
0x0294=0x0000
0x0106=0x3182
0x028E=0x0000
0x0326=0x0000
0x0113=0x03C3
0x04CB=0x0000
0x0391=0x0000
0x05A1=0x0000
0x02C9=0x0000
0x0500=0xF61D
0x039D=0x0000
0x011F=0x3680
0x0395=0x0000
0x024B=0x0000
0x045C=0x0000
0x0247=0x0000
0x0512=0x196B
0x04E5=0x0000
0x0024=0x50D8
0x0353=0x0000
0x050D=0x0F45
0x02CD=0x0000
0x0490=0x0000
0x0501=0xFDFB
0x034C=0x0000
0x00AA=0x0000
0x0350=0x0000
0x0445=0x0000
0x048F=0x0000
0x008A=0x0491
0x0453=0x0000
0x0124=0x0000
0x0260=0x0000
0x00A1=0x6565
0x0356=0x0000
0x0241=0x0000
0x04CD=0x0000
0x0249=0x0000
0x002C=0x0100
0x038F=0x0000
0x008C=0x267B
0x0459=0x0000
0x0394=0x0000
0x054D=0xF7A3
0x00A6=0x0001
0x002D=0xFFFF
0x00AC=0x2000
0x0253=0x0000
0x028B=0x0000
0x040C=0x40F8
0x0099=0x6565
0x0310=0x0000
0x00A2=0x6565
0x0589=0xEA5F
0x002F=0x3840
0x0597=0xFDFB
0x035F=0x0000
0x0562=0xF524
0x0025=0x0101
0x011C=0xAD41
0x011D=0xFEEE
0x039E=0x0000
0x0289=0x0000
0x0282=0x0000
0x0307=0x0000
0x038C=0x0000
0x0087=0x0000
0x0399=0x0000
0x054B=0xF7A3
0x02C7=0x0000
0x0519=0x4049
0x009F=0x658C
0x0515=0x2E45
0x025C=0x0000
0x00A5=0x6565
0x0301=0x0000
0x02C1=0x0000
0x0259=0x0000
0x02D5=0x0000
0x02E1=0x0000
0x0517=0xC89D
0x0481=0x0000
0x00A8=0x0000
0x02D2=0x0000
0x039C=0x0000
0x0564=0x0000
0x00AB=0x0040
0x0261=0x0000
0x002E=0x0000
0x02DE=0x0000
0x0540=0x5009
0x02A4=0x0000
0x0485=0x0000
0x0489=0x0000
0x00AD=0x03FF
0x024A=0x0000
0x0029=0x0101
0x0097=0x0000
0x011E=0x0663
0x00AE=0x0000
0x00A7=0x6565
0x020B=0x0000
0x0098=0x0000
0x0108=0xFC26
0x0027=0x05E4
0x0117=0x1939
0x0383=0x0000
0x0202=0x07F9
0x054A=0x8184
0x00A4=0x6565
0x0401=0x07ED
0x0086=0x4101
0x010C=0x8865
0x02D8=0x0000
0x0347=0x0000
0x0457=0x0000
0x0103=0x0A12
0x0104=0x0088
0x0357=0x0000
0x02DB=0x0000
0x0400=0x0101
0x009B=0x6565
0x0105=0x0007
0x05A3=0x0000
0x0240=0x0028
0x0367=0x0000
0x044F=0x0000
0x038B=0x0000
0x0284=0x0000
0x0396=0x0000
0x051F=0xAB08
0x029A=0x0000
0x0361=0x0000
0x0205=0x0000
0x0119=0x529F
0x02A6=0x0000
0x010F=0x3042
0x04C0=0x0000
0x031E=0x0000
0x02CC=0x0000
0x0116=0x8180
0x0587=0x1D10
0x0023=0x5550
0x048C=0x0000
0x0112=0x20E5
0x039A=0x0000
0x0320=0x0000
0x0323=0x0000
0x0115=0x0009
0x00A9=0x8000
0x0244=0x0000
0x0094=0x0000
0x0317=0x0000
0x0208=0x0170
0x0340=0x0000
0x058D=0xF5EF
0x02D7=0x0000
0x04A3=0x0000
0x029D=0x0000
0x0388=0x0000
0x0120=0xB9FF
0x04C9=0x0000
0x02CA=0x0000
0x0209=0x0000
0x0082=0x8001
0x0107=0x318C
0x02D4=0x0000
0x02CE=0x0000
0x02D9=0x0000
0x02E4=0x0000
0x024C=0x0000
0x02DC=0x0000
0x0118=0x218C
0x02E0=0x0000
0x055B=0x57AC
0x0114=0x0170
0x02E5=0x0000
0x02E6=0x0000
0x045B=0x0000
0x034F=0x0000
0x0300=0x0000
0x044E=0x0000
0x0510=0xE6C7
0x0302=0x0000
0x0303=0x0000
0x04D5=0x0000
0x0304=0x0000
0x0306=0x0000
0x04A4=0x0000
0x044A=0x0000
0x049C=0x0000
0x02E3=0x0000
0x0397=0x0000
0x0588=0xE6C7
0x0308=0x0000
0x048A=0x0000
0x0309=0x0000
0x029F=0x0000
0x030A=0x0000
0x0392=0x0000
0x030B=0x0000
0x04DF=0x0000
0x030C=0x0000
0x02D6=0x0000
0x0311=0x0000
0x024E=0x0000
0x0346=0x0000
0x0312=0x0000
0x051B=0xB77F
0x010A=0x184C
0x0461=0x0000
0x0313=0x0000
0x0360=0x0000
0x028C=0x0000
0x0352=0x0000
0x040E=0x0000
0x030D=0x0000
0x0316=0x0000
0x031F=0x0000
0x0318=0x0000
0x0287=0x0000
0x0341=0x0000
0x028F=0x0000
0x031C=0x0000
0x031A=0x0000
0x0363=0x0000
0x031D=0x0000
0x0440=0x0024
0x045E=0x0000
0x0321=0x0000
0x059B=0x0000
0x0322=0x0000
0x0327=0x0000
0x0380=0x0000
0x0342=0x0000
0x0343=0x0000
0x0561=0xAB08
0x0344=0x0000
0x0586=0x196B
0x0484=0x0000
0x0345=0x0000
0x0505=0x00D8
0x035B=0x0000
0x0498=0x0000
0x0084=0x0400
0x0348=0x0000
0x034A=0x0000
0x0455=0x0000
0x011A=0x2E03
0x034B=0x0000
0x034D=0x0000
0x035C=0x0000
0x034E=0x0000
0x0293=0x0000
0x03A6=0x0000
0x0351=0x0000
0x0354=0x0000
0x048B=0x0000
0x0358=0x0000
0x0359=0x0000
0x0299=0x0000
0x0452=0x0000
0x02C8=0x0000
0x035A=0x0000
0x0449=0x0000
0x0442=0x0000
0x035D=0x0000
0x035E=0x0000
0x038A=0x0000
0x0362=0x0000
0x0081=0x0000
0x0325=0x0000
0x0364=0x0000
0x0365=0x0000
0x0366=0x0000
0x0288=0x0000
0x0382=0x0000
0x0384=0x0000
0x0315=0x0000
0x0385=0x0000
0x054F=0x18C9
0x0389=0x0000
0x04E3=0x0000
0x040F=0x0000
0x0386=0x0000
0x054E=0x8184
0x009A=0x658C
0x02D0=0x0000
0x03A0=0x0000
0x0387=0x0000
0x038D=0x0000
0x02E7=0x0000
0x0324=0x0000
0x038E=0x0000
0x0305=0x0000
0x0393=0x0000
0x0398=0x0000
0x0408=0x0000
0x039B=0x0000
0x0248=0x0000
0x039F=0x0000
0x04E1=0x0000
0x02A2=0x0000
0x03A1=0x0000
0x059A=0x0000
0x048D=0x0000
0x051C=0x0000
0x03A2=0x0000
0x03A3=0x0000
0x03A4=0x0000
0x03A5=0x0000
0x0520=0x174B
0x03A7=0x0000
0x055E=0xDB10
0x0402=0x07FF
0x0403=0x009C
0x0560=0x174B
0x00A0=0x6565
0x0404=0x0000
0x0254=0x0000
0x0405=0x0000
0x0407=0x0000
0x0580=0xEFF2
0x0409=0x0000
0x040B=0x000F
0x040D=0x0000
0x0441=0x0000
0x0508=0xEF99
0x0443=0x0000
0x0444=0x0000
0x04CA=0x0000
0x0446=0x0000
0x0454=0x0000
0x0448=0x0000
0x044B=0x0000
0x0390=0x0000
0x0451=0x0000
0x0559=0xACB9
0x0456=0x0000
0x0314=0x0000
0x0458=0x0000
0x02DA=0x0000
0x045A=0x0000
0x0447=0x0000
0x0460=0x0000
0x0480=0x0000
0x045F=0x0000
0x0486=0x0000
0x0487=0x0000
0x0283=0x0000
0x0022=0x07FF
0x048E=0x0000
0x029B=0x0000
0x0491=0x0000
0x0492=0x0000
0x0493=0x0000
[file_info]
version=1
type=lms7002m_minimal_config
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band13.tm1.50PRB.lmssdr.conf
View file @ 667a4987
......@@ -17,7 +17,7 @@ eNBs =
mobile_country_code = "208";
mobile_network_code = "95";
mobile_network_code = "93";
////////// Physical parameters:
......@@ -133,7 +133,7 @@ eNBs =
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.62";
mme_ip_address = ( { ipv4 = "192.168.12.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
......@@ -142,11 +142,11 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth4";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.242/24";
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.212/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth4";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.242/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.212/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band13.tm1.lmssdr.conf
View file @ 667a4987
......@@ -17,7 +17,7 @@ eNBs =
mobile_country_code = "208";
mobile_network_code = "95";
mobile_network_code = "93";
////////// Physical parameters:
......@@ -36,7 +36,7 @@ eNBs =
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
rx_gain = 107;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
......@@ -133,7 +133,7 @@ eNBs =
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.62";
mme_ip_address = ( { ipv4 = "192.168.12.11";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
......@@ -142,11 +142,11 @@ eNBs =
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth4";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.242/24";
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.212/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth4";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.242/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.212/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band38.generic.oaisim.local_no_mme.conf 0 → 100644
View file @ 667a4987
Active_eNBs = ( "eNB_Eurecom_LTEBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
eNBs =
(
{
////////// Identification parameters:
eNB_ID = 0xe00;
cell_type = "CELL_MACRO_ENB";
eNB_name = "eNB_Eurecom_LTEBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = "1";
mobile_country_code = "208";
mobile_network_code = "10";
////////// Physical parameters:
component_carriers = (
{
frame_type = "TDD";
tdd_config = 3;
tdd_config_s = 0;
prefix_type = "NORMAL";
eutra_band = 38;
downlink_frequency = 2580000000L;
uplink_frequency_offset = 0;
Nid_cell = 0;
N_RB_DL = 25;
Nid_cell_mbsfn = 0;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 25;
rx_gain = 20;
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = 0;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
pusch_hoppingMode = "interSubFrame";
pusch_hoppingOffset = 0;
pusch_groupHoppingEnabled = "ENABLE";
pusch_groupAssignment = 0;
pusch_sequenceHoppingEnabled = "DISABLE";
pusch_nDMRS1 = 0;
phich_duration = "NORMAL";
phich_resource = "ONESIXTH";
srs_enable = "DISABLE";
/* srs_BandwidthConfig =;
srs_SubframeConfig =;
srs_ackNackST =;
srs_MaxUpPts =;*/
pusch_p0_Nominal = -108;
pusch_alpha = "AL1";
pucch_p0_Nominal = -108;
msg3_delta_Preamble = 6;
pucch_deltaF_Format1 = "deltaF2";
pucch_deltaF_Format1b = "deltaF3";
pucch_deltaF_Format2 = "deltaF0";
pucch_deltaF_Format2a = "deltaF0";
pucch_deltaF_Format2b = "deltaF0";
rach_numberOfRA_Preambles = 64;
rach_preamblesGroupAConfig = "DISABLE";
/*
rach_sizeOfRA_PreamblesGroupA = ;
rach_messageSizeGroupA = ;
rach_messagePowerOffsetGroupB = ;
*/
rach_powerRampingStep = 2;
rach_preambleInitialReceivedTargetPower = -100;
rach_preambleTransMax = 10;
rach_raResponseWindowSize = 10;
rach_macContentionResolutionTimer = 48;
rach_maxHARQ_Msg3Tx = 4;
pcch_default_PagingCycle = 128;
pcch_nB = "oneT";
bcch_modificationPeriodCoeff = 2;
ue_TimersAndConstants_t300 = 1000;
ue_TimersAndConstants_t301 = 1000;
ue_TimersAndConstants_t310 = 1000;
ue_TimersAndConstants_t311 = 10000;
ue_TimersAndConstants_n310 = 20;
ue_TimersAndConstants_n311 = 1;
}
);
////////// MME parameters:
mme_ip_address = ( { ipv4 = "0.0.0.0";
ipv6 = "0::0";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "none";
ENB_IPV4_ADDRESS_FOR_S1_MME = "0.0.0.0/24";
ENB_INTERFACE_NAME_FOR_S1U = "none";
ENB_IPV4_ADDRESS_FOR_S1U = "0.0.0.0/24";
ENB_PORT_FOR_S1U = 2153; # Spec 2152
};
log_config :
{
global_log_level ="trace";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="trace";
phy_log_verbosity ="medium";
mac_log_level ="trace";
mac_log_verbosity ="medium";
rlc_log_level ="trace";
rlc_log_verbosity ="medium";
pdcp_log_level ="trace";
pdcp_log_verbosity ="medium";
rrc_log_level ="trace";
rrc_log_verbosity ="medium";
gtpu_log_level ="debug";
gtpu_log_verbosity ="medium";
udp_log_level ="debug";
udp_log_verbosity ="medium";
osa_log_level ="debug";
osa_log_verbosity ="low";
};
}
);
targets/RT/USER/lte-softmodem.c
View file @ 667a4987
......@@ -293,6 +293,7 @@ static int tx_max_power[MAX_NUM_CCs]; /* = {0,0}*/;
char rf_config_file[1024];
int chain_offset=0;
int phy_test = 0;
#ifndef EXMIMO
char ref[128] = "internal";
......@@ -472,7 +473,7 @@ void help (void) {
printf(" -d Enable soft scope and L1 and L2 stats (Xforms)\n");
printf(" -F Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n");
printf(" -g Set the global log level, valide options: (9:trace, 8/7:debug, 6:info, 4:warn, 3:error)\n");
printf(" -G Set the global log level \n");
printf(" -G Set the global log verbosity \n");
printf(" -h provides this help message!\n");
printf(" -K Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n");
printf(" -m Set the maximum downlink MCS\n");
......@@ -577,12 +578,12 @@ static void *scope_thread(void *arg)
0,7);
} else {
#ifdef OPENAIR2
if (PHY_vars_eNB_g[0][0]->mac_enabled==1) {
len = dump_eNB_l2_stats (stats_buffer, 0);
//fl_set_object_label(form_stats_l2->stats_text, stats_buffer);
fl_clear_browser(form_stats_l2->stats_text);
fl_add_browser_line(form_stats_l2->stats_text, stats_buffer);
#endif
}
len = dump_eNB_stats (PHY_vars_eNB_g[0][0], stats_buffer, 0);
if (MAX_NUM_CCs>1)
......@@ -2117,7 +2118,8 @@ static void get_options (int argc, char **argv)
LONG_OPTION_SCANCARRIER,
LONG_OPTION_MAXPOWER,
LONG_OPTION_DUMP_FRAME,
LONG_OPTION_LOOPMEMORY
LONG_OPTION_LOOPMEMORY,
LONG_OPTION_PHYTEST
};
static const struct option long_options[] = {
......@@ -2135,15 +2137,19 @@ static void get_options (int argc, char **argv)
{"ue-max-power", required_argument, NULL, LONG_OPTION_MAXPOWER},
{"ue-dump-frame", no_argument, NULL, LONG_OPTION_DUMP_FRAME},
{"loop-memory", required_argument, NULL, LONG_OPTION_LOOPMEMORY},
{"phy-test", no_argument, NULL, LONG_OPTION_PHYTEST},
{NULL, 0, NULL, 0}
};
while ((c = getopt_long (argc, argv, "A:a:C:dEK:g:F:G:hqO:m:SUVRM:r:P:Ws:t:Tx:",long_options,NULL)) != -1) {
switch (c) {
case LONG_OPTION_RF_CONFIG_FILE:
if (strlen(optarg)<=1024)
if ((strcmp("null", optarg) == 0) || (strcmp("NULL", optarg) == 0)) {
printf("no configuration filename is provided\n");
}
else if (strlen(optarg)<=1024){
strcpy(rf_config_file,optarg);
else {
}else {
printf("Configuration filename is too long\n");
exit(-1);
}
......@@ -2214,6 +2220,11 @@ static void get_options (int argc, char **argv)
case LONG_OPTION_DUMP_FRAME:
mode = rx_dump_frame;
break;
case LONG_OPTION_PHYTEST:
phy_test = 1;
break;
case 'A':
timing_advance = atoi (optarg);
break;
......@@ -2269,7 +2280,6 @@ static void get_options (int argc, char **argv)
case 't':
target_ul_mcs = atoi (optarg);
break;
#ifdef OPENAIR2
case 'W':
opt_enabled=1;
......@@ -2304,7 +2314,6 @@ static void get_options (int argc, char **argv)
}
break;
#endif
case 'V':
ouput_vcd = 1;
......@@ -2412,8 +2421,8 @@ static void get_options (int argc, char **argv)
case 'x':
transmission_mode = atoi(optarg);
if (transmission_mode > 2) {
printf("Transmission mode > 2 (%d) not supported for the moment\n",transmission_mode);
if (transmission_mode > 7) {
printf("Transmission mode %d not supported for the moment\n",transmission_mode);
exit(-1);
}
break;
......@@ -2508,8 +2517,6 @@ static void get_options (int argc, char **argv)
}
#ifdef OPENAIR2
init_all_otg(0);
g_otg->seed = 0;
init_seeds(g_otg->seed);
......@@ -2527,7 +2534,6 @@ static void get_options (int argc, char **argv)
init_predef_traffic(enb_properties->properties[i]->num_otg_elements, 1);
#endif
glog_level = enb_properties->properties[i]->glog_level;
glog_verbosity = enb_properties->properties[i]->glog_verbosity;
......@@ -2589,9 +2595,7 @@ int main( int argc, char **argv )
int CC_id;
uint16_t Nid_cell = 0;
uint8_t cooperation_flag=0, abstraction_flag=0;
#ifndef OPENAIR2
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
#endif
#ifdef ENABLE_TCXO
unsigned int tcxo = 114;
......@@ -2659,8 +2663,8 @@ int main( int argc, char **argv )
if (UE_flag==1) {
printf("configuring for UE\n");
set_comp_log(HW, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(PHY, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(MAC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RLC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PDCP, LOG_INFO, LOG_HIGH, 1);
......@@ -2676,15 +2680,9 @@ int main( int argc, char **argv )
printf("configuring for eNB\n");
set_comp_log(HW, hw_log_level, hw_log_verbosity, 1);
#ifdef OPENAIR2
set_comp_log(PHY, phy_log_level, phy_log_verbosity, 1);
if (opt_enabled == 1 )
set_comp_log(OPT, opt_log_level, opt_log_verbosity, 1);
#else
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
#endif
set_comp_log(MAC, mac_log_level, mac_log_verbosity, 1);
set_comp_log(RLC, rlc_log_level, rlc_log_verbosity, 1);
set_comp_log(PDCP, pdcp_log_level, pdcp_log_verbosity, 1);
......@@ -2740,8 +2738,6 @@ int main( int argc, char **argv )
MSC_INIT(MSC_E_UTRAN, THREAD_MAX+TASK_MAX);
#endif
#ifdef OPENAIR2
if (opt_type != OPT_NONE) {
radio_type_t radio_type;
......@@ -2754,7 +2750,6 @@ int main( int argc, char **argv )
LOG_E(OPT,"failed to run OPT \n");
}
#endif
#ifdef PDCP_USE_NETLINK
netlink_init();
#if defined(PDCP_USE_NETLINK_QUEUES)
......@@ -2824,8 +2819,13 @@ int main( int argc, char **argv )
PHY_vars_UE_g[0][CC_id] = init_lte_UE(frame_parms[CC_id], 0,abstraction_flag,transmission_mode);
UE[CC_id] = PHY_vars_UE_g[0][CC_id];
printf("PHY_vars_UE_g[0][%d] = %p\n",CC_id,UE[CC_id]);
#ifndef OPENAIR2
if (phy_test==1)
UE[CC_id]->mac_enabled = 0;
else
UE[CC_id]->mac_enabled = 1;
if (UE[CC_id]->mac_enabled == 0) {
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
......@@ -2835,9 +2835,7 @@ int main( int argc, char **argv )
UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
#endif
}
UE[CC_id]->UE_scan = UE_scan;
UE[CC_id]->UE_scan_carrier = UE_scan_carrier;
......@@ -2847,13 +2845,12 @@ int main( int argc, char **argv )
UE[CC_id]->lte_frame_parms.frame_type,
UE[CC_id]->X_u);
if (UE[CC_id]->mac_enabled == 1)
UE[CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1234;
#ifndef OPENAIR2
else
UE[CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1235;
#endif
#ifdef EXMIMO
for (i=0; i<4; i++) {
UE[CC_id]->rx_gain_max[i] = rxg_max[i];
UE[CC_id]->rx_gain_med[i] = rxg_med[i];
......@@ -2887,9 +2884,7 @@ int main( int argc, char **argv )
UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
#ifdef EXMIMO
//N_TA_offset
if (UE[CC_id]->lte_frame_parms.frame_type == TDD) {
if (UE[CC_id]->lte_frame_parms.N_RB_DL == 100)
......@@ -2901,7 +2896,6 @@ int main( int argc, char **argv )
} else {
UE[CC_id]->N_TA_offset = 0;
}
#else
//already taken care of in lte-softmodem
UE[CC_id]->N_TA_offset = 0;
......@@ -2925,8 +2919,12 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0][CC_id] = init_lte_eNB(frame_parms[CC_id],0,frame_parms[CC_id]->Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
PHY_vars_eNB_g[0][CC_id]->CC_id = CC_id;
#ifndef OPENAIR2
if (phy_test==1)
PHY_vars_eNB_g[0][CC_id]->mac_enabled = 0;
else
PHY_vars_eNB_g[0][CC_id]->mac_enabled = 1;
if (PHY_vars_eNB_g[0][CC_id]->mac_enabled == 0) {
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
......@@ -2936,8 +2934,7 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(i%3);
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
#endif
}
compute_prach_seq(&PHY_vars_eNB_g[0][CC_id]->lte_frame_parms.prach_config_common,
PHY_vars_eNB_g[0][CC_id]->lte_frame_parms.frame_type,
......@@ -3147,16 +3144,12 @@ int main( int argc, char **argv )
mac_xface = malloc(sizeof(MAC_xface));
#ifdef OPENAIR2
int eMBMS_active=0;
l2_init(frame_parms[0],eMBMS_active,(uecap_xer_in==1)?uecap_xer:NULL,
0,// cba_group_active
0); // HO flag
#endif
mac_xface->macphy_exit = &exit_fun;
#if defined(ENABLE_ITTI)
......@@ -3169,15 +3162,14 @@ int main( int argc, char **argv )
printf("ITTI tasks created\n");
#endif
#ifdef OPENAIR2
if (phy_test==0) {
if (UE_flag==1) {
printf("Filling UE band info\n");
fill_ue_band_info();
mac_xface->dl_phy_sync_success (0, 0, 0, 1);
} else
mac_xface->mrbch_phy_sync_failure (0, 0, 0);
#endif
}
/* #ifdef OPENAIR2
//if (otg_enabled) {
......@@ -3568,9 +3560,6 @@ int main( int argc, char **argv )
}
}
#ifdef OPENAIR2
//cleanup_pdcp_thread();
#endif
#ifdef RTAI
stop_rt_timer();
......@@ -3605,13 +3594,9 @@ int main( int argc, char **argv )
if (ouput_vcd)
VCD_SIGNAL_DUMPER_CLOSE();
#ifdef OPENAIR2
if (opt_enabled == 1)
terminate_opt();
#endif
logClean();
return 0;
......
targets/RT/USER/lte-ue.c
View file @ 667a4987
......@@ -925,9 +925,7 @@ static void *UE_thread_rx(void *arg)
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
#ifdef OPENAIR2
if (i==0) {
if ((UE->mac_enabled==1) && (i==0)) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
UE->frame_tx,
UE->slot_rx>>1,
......@@ -950,7 +948,6 @@ static void *UE_thread_rx(void *arg)
}
}
#endif
UE->slot_rx++;
if (UE->slot_rx == 20) {
......
targets/SIMU/USER/channel_sim.c
View file @ 667a4987
......@@ -169,8 +169,6 @@ void do_DL_sig(double **r_re0,double **r_im0,
int32_t **dl_channel_est = PHY_vars_UE_g[UE_id][CC_id]->lte_ue_common_vars.dl_ch_estimates[0];
// double scale = pow(10.0,(enb_data[att_eNB_id]->tx_power_dBm + eNB2UE[att_eNB_id][UE_id]->path_loss_dB + (double) PHY_vars_UE_g[UE_id]->rx_total_gain_dB)/20.0);
double scale = pow(10.0,(frame_parms->pdsch_config_common.referenceSignalPower+eNB2UE[att_eNB_id][UE_id][CC_id]->path_loss_dB + (double) PHY_vars_UE_g[UE_id][CC_id]->rx_total_gain_dB)/20.0);
//this factor is not really needed (it was actually wrong in the non abstraction mode)
//scale = scale * sqrt(512.0/300.0); //TODO: make this variable for all BWs
LOG_D(OCM,"scale =%lf (%d dB)\n",scale,(int) (20*log10(scale)));
// freq_channel(desc1,frame_parms->N_RB_DL,nb_samples);
//write_output("channel.m","ch",desc1->ch[0],desc1->channel_length,1,8);
......@@ -204,12 +202,13 @@ void do_DL_sig(double **r_re0,double **r_im0,
// calculate the SNR for the attached eNB (this assumes eNB always uses PMI stored in eNB_UE_stats; to be improved)
init_snr(eNB2UE[att_eNB_id][UE_id][CC_id], enb_data[att_eNB_id], ue_data[UE_id], PHY_vars_UE_g[UE_id][CC_id]->sinr_dB, &PHY_vars_UE_g[UE_id][CC_id]->N0,
PHY_vars_UE_g[UE_id][CC_id]->transmission_mode[att_eNB_id], PHY_vars_eNB_g[att_eNB_id][CC_id]->eNB_UE_stats[UE_id].DL_pmi_single,PHY_vars_eNB_g[att_eNB_id][CC_id]->mu_mimo_mode[UE_id].dl_pow_off);
PHY_vars_UE_g[UE_id][CC_id]->transmission_mode[att_eNB_id], PHY_vars_eNB_g[att_eNB_id][CC_id]->eNB_UE_stats[UE_id].DL_pmi_single,
PHY_vars_eNB_g[att_eNB_id][CC_id]->mu_mimo_mode[UE_id].dl_pow_off,PHY_vars_eNB_g[att_eNB_id][CC_id]->lte_frame_parms.N_RB_DL);
// calculate sinr here
for (eNB_id = 0; eNB_id < NB_eNB_INST; eNB_id++) {
if (att_eNB_id != eNB_id) {
calculate_sinr(eNB2UE[eNB_id][UE_id][CC_id], enb_data[eNB_id], ue_data[UE_id], PHY_vars_UE_g[UE_id][CC_id]->sinr_dB);
calculate_sinr(eNB2UE[eNB_id][UE_id][CC_id], enb_data[eNB_id], ue_data[UE_id], PHY_vars_UE_g[UE_id][CC_id]->sinr_dB,PHY_vars_eNB_g[att_eNB_id][CC_id]->lte_frame_parms.N_RB_DL);
}
}
} // hold channel
......@@ -220,18 +219,6 @@ void do_DL_sig(double **r_re0,double **r_im0,
Call do_OFDM_mod from phy_procedures_eNB_TX function
*/
//for (UE_id=0;UE_id<NB_UE_INST;UE_id++) {
// Compute RX signal for UE = UE_id
/*
for (i=0;i<(frame_parms->samples_per_tti>>1);i++) {
for (aa=0;aa<nb_antennas_rx;aa++) {
r_re[aa][i]=0.0;
r_im[aa][i]=0.0;
}
}
*/
// printf("r_re[0] %p\n",r_re[0]);
for (aa=0; aa<nb_antennas_rx; aa++) {
memset((void*)r_re[aa],0,(frame_parms->samples_per_tti>>1)*sizeof(double));
......
targets/SIMU/USER/oaisim.c
View file @ 667a4987
......@@ -75,9 +75,9 @@
#include "SCHED/defs.h"
#include "SCHED/vars.h"
#ifdef XFORMS
//#ifdef XFORMS
#include "PHY/TOOLS/lte_phy_scope.h"
#endif
//#endif
#ifdef SMBV
// Rohde&Schwarz SMBV100A vector signal generator
......@@ -163,9 +163,10 @@ extern uint16_t Nid_cell;
extern LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
#ifdef XFORMS
//#ifdef XFORMS
int otg_enabled;
#endif
int xforms=0;
//#endif
time_stats_t oaisim_stats;
time_stats_t oaisim_stats_f;
......@@ -446,17 +447,18 @@ l2l1_task (void *args_p)
char fname[64], vname[64];
int sf;
protocol_ctxt_t ctxt;
#ifdef XFORMS
//#ifdef XFORMS
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
// at eNB 0, an UL scope for every UE
FD_lte_phy_scope_ue *form_ue[NUMBER_OF_UE_MAX];
FD_lte_phy_scope_ue *form_ue[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
FD_lte_phy_scope_enb *form_enb[NUMBER_OF_UE_MAX];
char title[255];
char xname[32] = "oaisim";
int xargc = 1;
char *xargv[1];
#endif
//#endif
#define PRINT_STATS
#ifdef PRINT_STATS
int len;
FILE *UE_stats[NUMBER_OF_UE_MAX];
......@@ -485,31 +487,34 @@ l2l1_task (void *args_p)
PHY_vars_eNB_g[eNB_inst][CC_id]->proc[9].frame_tx = 1;
}
#ifdef XFORMS
//#ifdef XFORMS
if (xforms==1) {
xargv[0] = xname;
fl_initialize (&xargc, xargv, NULL, 0, 0);
eNB_inst = 0;
for (UE_inst = 0; UE_inst < NB_UE_INST; UE_inst++) {
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
// DL scope at UEs
form_ue[UE_inst] = create_lte_phy_scope_ue();
sprintf (title, "LTE DL SCOPE eNB %d to UE %d", eNB_inst, UE_inst);
fl_show_form (form_ue[UE_inst]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
form_ue[CC_id][UE_inst] = create_lte_phy_scope_ue();
sprintf (title, "LTE DL SCOPE eNB %d to UE %d CC_id %d", eNB_inst, UE_inst, CC_id);
fl_show_form (form_ue[CC_id][UE_inst]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
if (openair_daq_vars.use_ia_receiver == 1) {
fl_set_button(form_ue[CC_id][UE_inst]->button_0,1);
fl_set_object_label(form_ue[CC_id][UE_inst]->button_0, "IA Receiver ON");
fl_set_object_color(form_ue[CC_id][UE_inst]->button_0, FL_GREEN, FL_GREEN);
}
}
// UL scope at eNB 0
form_enb[UE_inst] = create_lte_phy_scope_enb();
sprintf (title, "LTE UL SCOPE UE %d to eNB %d", UE_inst, eNB_inst);
fl_show_form (form_enb[UE_inst]->lte_phy_scope_enb, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
if (openair_daq_vars.use_ia_receiver == 1) {
fl_set_button(form_ue[UE_inst]->button_0,1);
fl_set_object_label(form_ue[UE_inst]->button_0, "IA Receiver ON");
fl_set_object_color(form_ue[UE_inst]->button_0, FL_GREEN, FL_GREEN);
}
}
#endif
//#endif
#ifdef PRINT_STATS
......@@ -1176,23 +1181,26 @@ l2l1_task (void *args_p)
1, 1);
}
#ifdef XFORMS
//#ifdef XFORMS
if (xforms==1) {
eNB_inst = 0;
for (UE_inst = 0; UE_inst < NB_UE_INST; UE_inst++) {
phy_scope_UE(form_ue[UE_inst],
PHY_vars_UE_g[UE_inst][0],
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
phy_scope_UE(form_ue[CC_id][UE_inst],
PHY_vars_UE_g[UE_inst][CC_id],
eNB_inst,
UE_inst,
7);
}
phy_scope_eNB(form_enb[UE_inst],
PHY_vars_eNB_g[eNB_inst][0],
UE_inst);
}
#endif
}
//#endif
#ifdef SMBV
......
targets/SIMU/USER/oaisim.h
View file @ 667a4987
......@@ -62,9 +62,9 @@ void extract_position(node_list* input_node_list, node_desc_t**, int nb_nodes);/
void get_beta_map(void);//Abstraction changes
void get_MIESM_param(void);
void init_snr(channel_desc_t *, node_desc_t *, node_desc_t *, double*, double*, uint8_t, uint16_t, uint8_t);//Abstraction changes
void init_snr(channel_desc_t *, node_desc_t *, node_desc_t *, double*, double*, uint8_t, uint16_t, uint8_t, uint16_t);//Abstraction changes
void init_snr_up(channel_desc_t *, node_desc_t *, node_desc_t *, double*, double*, uint16_t, uint16_t);//Abstraction changes
void calculate_sinr(channel_desc_t *, node_desc_t *, node_desc_t *, double *sinr_dB);//Abstraction changes
void calculate_sinr(channel_desc_t *, node_desc_t *, node_desc_t *, double *sinr_dB, uint16_t);//Abstraction changes
void get_beta_map(void);
int dlsch_abstraction_EESM(double* sinr_dB, uint32_t rb_alloc[4], uint8_t mcs, uint8_t); //temporary testing for PHY abstraction
int dlsch_abstraction_MIESM(double* sinr_dB,uint8_t TM, uint32_t rb_alloc[4], uint8_t mcs,uint8_t);
......
targets/SIMU/USER/oaisim_functions.c
View file @ 667a4987
......@@ -136,6 +136,8 @@ int td = 0;
int td_avg = 0;
int sleep_time_us = 0;
int phy_test = 0;
#ifdef OPENAIR2
// omv related info
//pid_t omv_pid;
......@@ -170,6 +172,8 @@ extern pdcp_mbms_t pdcp_mbms_array_eNB[NUMBER_OF_eNB_MAX][maxServiceCount][maxSe
extern time_stats_t dl_chan_stats;
extern time_stats_t ul_chan_stats;
extern int xforms;
void get_simulation_options(int argc, char *argv[])
{
int option;
......@@ -206,6 +210,9 @@ void get_simulation_options(int argc, char *argv[])
LONG_OPTION_MALLOC_TRACE_ENABLED,
LONG_OPTION_CBA_BACKOFF_TIMER,
LONG_OPTION_PHYTEST,
LONG_OPTION_XFORMS,
};
static struct option long_options[] = {
......@@ -237,11 +244,18 @@ void get_simulation_options(int argc, char *argv[])
{"cba-backoff", required_argument, 0, LONG_OPTION_CBA_BACKOFF_TIMER},
{"phy-test", no_argument, NULL, LONG_OPTION_PHYTEST},
{"xforms", no_argument, 0, LONG_OPTION_XFORMS},
{NULL, 0, NULL, 0}
};
while ((option = getopt_long (argc, argv, "aA:b:B:c:C:D:d:eE:f:FGg:hHi:IJ:j:k:K:l:L:m:M:n:N:oO:p:P:qQ:rR:s:S:t:T:u:U:vV:w:W:x:X:y:Y:z:Z:", long_options, NULL)) != -1) {
switch (option) {
case LONG_OPTION_PHYTEST:
phy_test = 1;
break;
case LONG_OPTION_ENB_CONF:
if (optarg) {
free(conf_config_file_name); // prevent memory leak if option is used multiple times
......@@ -396,6 +410,10 @@ void get_simulation_options(int argc, char *argv[])
break;
#endif
case LONG_OPTION_XFORMS:
xforms=1;
break;
case 'a':
abstraction_flag = 1;
break;
......@@ -976,13 +994,21 @@ void init_openair1(void)
}
}
for (eNB_id=0; eNB_id<NB_eNB_INST; eNB_id++)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if (phy_test==1)
PHY_vars_eNB_g[eNB_id][CC_id]->mac_enabled=0;
else
PHY_vars_eNB_g[eNB_id][CC_id]->mac_enabled=1;
}
// init_ue_status();
for (UE_id=0; UE_id<NB_UE_INST; UE_id++)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_UE_g[UE_id][CC_id]->tx_power_max_dBm=23;
PHY_vars_UE_g[UE_id][CC_id]->rx_total_gain_dB=160;
PHY_vars_UE_g[UE_id][CC_id]->rx_total_gain_dB=100;
// update UE_mode for each eNB_id not just 0
if (abstraction_flag == 0)
......@@ -992,6 +1018,11 @@ void init_openair1(void)
PHY_vars_UE_g[UE_id][CC_id]->UE_mode[0] = PRACH;
}
if (phy_test==1)
PHY_vars_UE_g[UE_id][CC_id]->mac_enabled=0;
else
PHY_vars_UE_g[UE_id][CC_id]->mac_enabled=1;
PHY_vars_UE_g[UE_id][CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1235 + UE_id;
PHY_vars_UE_g[UE_id][CC_id]->current_dlsch_cqi[0] = 10;
......@@ -1260,8 +1291,7 @@ void update_ocm()
//pathloss: -132.24 dBm/15kHz RE + target SNR - eNB TX power per RE
if (eNB_id == (UE_id % NB_eNB_INST)) {
eNB2UE[eNB_id][UE_id][CC_id]->path_loss_dB = -132.24 + snr_dB - PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.pdsch_config_common.referenceSignalPower;
UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB = -132.24 + snr_dB -
PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.pdsch_config_common.referenceSignalPower; //+20 to offset the difference in tx power of the UE wrt eNB
UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB = -132.24 + snr_dB - PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.pdsch_config_common.referenceSignalPower;
} else {
eNB2UE[eNB_id][UE_id][CC_id]->path_loss_dB = -132.24 + sinr_dB - PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.pdsch_config_common.referenceSignalPower;
UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB = -132.24 + sinr_dB - PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.pdsch_config_common.referenceSignalPower;
......@@ -1280,6 +1310,7 @@ void update_ocm()
#ifdef OPENAIR2
void update_otg_eNB(module_id_t enb_module_idP, unsigned int ctime)
{
#if defined(USER_MODE) && defined(OAI_EMU)
int rrc_state=0;
......
targets/SIMU/USER/sinr_sim.c
View file @ 667a4987
......@@ -244,20 +244,19 @@ void calc_path_loss(node_desc_t* enb_data, node_desc_t* ue_data, channel_desc_t
void init_snr(channel_desc_t* eNB2UE, node_desc_t *enb_data, node_desc_t *ue_data, double* sinr_dB, double* N0, uint8_t transmission_mode, uint16_t q, uint8_t dl_power_off)
void init_snr(channel_desc_t* eNB2UE, node_desc_t *enb_data, node_desc_t *ue_data, double* sinr_dB, double* N0, uint8_t transmission_mode, uint16_t q, uint8_t dl_power_off, uint16_t nb_rb)
{
uint16_t nb_rb = 25; //No. of resource blocks
double thermal_noise,abs_channel,channelx, channely,channelx_i, channely_i ;
int count;
int aarx,aatx;
uint8_t qq;
/* Thermal noise is calculated using 10log10(K*T*B) K = Boltzmann's constant T = room temperature B = bandwidth */
thermal_noise = -174 + 10*log10(eNB2UE->sampling_rate*1e6); //value in dBm
/* Thermal noise is calculated using 10log10(K*T*B) K = Boltzmann's constant T = room temperature B = bandwidth*/
thermal_noise = -174 + 10*log10(15000); //per RE; value in dBm
//for (aarx=0; aarx<eNB2UE->nb_rx; aarx++)
*N0 = thermal_noise + ue_data->rx_noise_level;//? all the element have the same noise level?????
*N0 = thermal_noise + ue_data->rx_noise_level;
LOG_D(OCM,"Path loss %lf, noise (N0) %lf, signal %lf, snr %lf\n",
eNB2UE->path_loss_dB,
......@@ -549,15 +548,14 @@ void init_snr_up(channel_desc_t* UE2eNB, node_desc_t *enb_data, node_desc_t *ue_
#endif
void calculate_sinr(channel_desc_t* eNB2UE, node_desc_t *enb_data, node_desc_t *ue_data, double *sinr_dB)
void calculate_sinr(channel_desc_t* eNB2UE, node_desc_t *enb_data, node_desc_t *ue_data, double *sinr_dB, uint16_t nb_rb)
{
double sir, thermal_noise;
short nb_rb = 25; //No. of resource blocks
short count;
/* Thermal noise is calculated using 10log10(K*T*B) K = Boltzmann's constant T = room temperature B = bandwidth */
thermal_noise = -174 + 10*log10(eNB2UE->sampling_rate*1e6); //value in dBm
thermal_noise = -174 + 10*log10(15000); //per RE, value in dBm
for (count = 0; count < 12 * nb_rb; count++) {
sir = enb_data->tx_power_dBm
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment