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Commit 669724c1 authored by nepes's avatar nepes
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Merge branch 'eMTC-testing' of https://gitlab.eurecom.fr/oai/openairinterface5g into eMTC-testing

parents b28b1441 87f415d2
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README.txt
View file @ 669724c1
......@@ -62,3 +62,4 @@ v1.0.0 -> January 2019. This version first implements the architectural split de
New tools: config library, telnet server, ...
A lot of bugfixes and a proper automated Continuous Integration process validates contributions.
v1.0.1 -> February 2019: Bug fix for the UE L1 simulator.
v1.0.2 -> February 2019: Full OAI support for 3.13.1 UHD
ci-scripts/buildOnVM.sh
View file @ 669724c1
......@@ -94,14 +94,21 @@ function build_on_vm {
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
fi
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
fi
echo "############################################################"
echo "Copying GIT repo into VM ($VM_NAME)"
......
ci-scripts/cppcheck_suppressions.list
View file @ 669724c1
......@@ -67,6 +67,15 @@ syntaxError:openair1/SIMULATION/LTE_PHY/dlsim_tm4.c
// omg, otg commented out in cmakelist to be cleaned up definitely?
arrayIndexOutOfBounds:openair2/UTIL/OMG/omg.c
uninitvar:openair2/UTIL/OTG/otg_rx_socket.c
//-----------------------------------------------------------------------------
// cppcheck is not able to understand that buf is initialized at the first
// iteration of the loop.
nullPointer:common/utils/T/local_tracer.c:243
//-----------------------------------------------------------------------------
// once again cppcheck is not to understand that fds is initialized in the
// first iteration of the loop
nullPointer:common/utils/T/tracer/multi.c:264
nullPointer:common/utils/T/tracer/multi.c:265
//
//*****************************************************************************
//
......
ci-scripts/createVM.sh
View file @ 669724c1
......@@ -49,6 +49,35 @@ function create_usage {
echo ""
}
function acquire_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
local unlocked="0"
touch ${FlockFile} 2>/dev/null
if [[ $? -ne 0 ]]
then
echo "Cannot access lock file ${FlockFile}"
exit 2
fi
while [ $unlocked -eq 0 ]
do
exec 5>${FlockFile}
flock -nx 5
if [[ $? -ne 0 ]]
then
echo "Another instance of VM creation is running"
sleep 10
else
unlocked="1"
fi
done
chmod 666 ${FlockFile} 2>/dev/null
}
function release_vm_create_lock {
local FlockFile="/tmp/vmclone.lck"
rm -Rf ${FlockFile}
}
function create_vm {
echo "############################################################"
echo "OAI CI VM script"
......@@ -60,10 +89,12 @@ function create_vm {
echo "############################################################"
echo "Creating VM ($VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $VM_NAME release=xenial --memory $VM_MEMORY --cpu $VM_CPU --unsafe-caching --template ci-scripts/template-host.xml
echo "Waiting for VM to be started"
uvt-kvm wait $VM_NAME --insecure
VM_IP_ADDR=`uvt-kvm ip $VM_NAME`
echo "$VM_NAME has for IP addr = $VM_IP_ADDR"
release_vm_create_lock
}
ci-scripts/runTestOnVM.sh
View file @ 669724c1
......@@ -317,11 +317,18 @@ function install_epc_on_vm {
echo "############################################################"
echo "Creating test EPC VM ($LOC_EPC_VM_NAME) on Ubuntu Cloud Image base"
echo "############################################################"
acquire_vm_create_lock
uvt-kvm create $LOC_EPC_VM_NAME release=xenial --unsafe-caching
echo "Waiting for VM to be started"
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
release_vm_create_lock
else
echo "Waiting for VM to be started"
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
fi
uvt-kvm wait $LOC_EPC_VM_NAME --insecure
local LOC_EPC_VM_IP_ADDR=`uvt-kvm ip $LOC_EPC_VM_NAME`
echo "$LOC_EPC_VM_NAME has for IP addr = $LOC_EPC_VM_IP_ADDR"
scp -o StrictHostKeyChecking=no /etc/apt/apt.conf.d/01proxy ubuntu@$LOC_EPC_VM_IP_ADDR:/home/ubuntu
......
common/utils/T/tracer/gui/notify.c
View file @ 669724c1
......@@ -46,7 +46,7 @@ void unregister_notifier(gui *_g, unsigned long notifier_id) {
if (g->notifiers[i].id == notifier_id) break;
if (i == g->notifiers_count)
ERR("%s:%d: notifier_id %ld not found\n", __FILE__,__LINE__,notifier_id);
ERR("%s:%d: notifier_id %lu not found\n", __FILE__,__LINE__,notifier_id);
free(g->notifiers[i].notification);
memmove(g->notifiers + i, g->notifiers + i + 1,
......
common/utils/T/tracer/textlog.c
View file @ 669724c1
......@@ -195,5 +195,8 @@ int main(int n, char **v)
handle_event(h, e);
}
free(on_off_name);
free(on_off_action);
return 0;
}
common/utils/T/tracer/utils.c
View file @ 669724c1
......@@ -273,6 +273,6 @@ void PUTX2(OBUF *o, int i) {
void PUTUL(OBUF *o, unsigned long l) {
char s[128];
sprintf(s, "%ld", l);
sprintf(s, "%lu", l);
PUTS(o, s);
}
openair1/PHY/TOOLS/lte_phy_scope_tm4.c
View file @ 669724c1
......@@ -812,9 +812,6 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
free(bit1);
free(bit_pdcch);
free(llr_pdcch);
for (arx=0;arx<nb_antennas_rx;arx++) {
free(chest_t_abs[arx]);
}
//This is done to avoid plotting old data when TB0 is disabled, and TB1 is mapped onto CW0
/*if (phy_vars_ue->transmission_mode[eNB_id]==3 && phy_vars_ue->transmission_mode[eNB_id]==4){
......
openair2/LAYER2/MAC/eNB_scheduler_RA.c
View file @ 669724c1
......@@ -239,21 +239,27 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
} // non-BL/CE UE case
}
void
generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
sub_frame_t subframeP, RA_t * ra)
//------------------------------------------------------------------------------
/*
* Generate the RAR (message2)
*/
void generate_Msg2(module_id_t module_idP,
int CC_idP,
frame_t frameP,
sub_frame_t subframeP,
RA_t *ra)
//------------------------------------------------------------------------------
{
eNB_MAC_INST *mac = RC.mac[module_idP];
COMMON_channels_t *cc = mac->common_channels;
uint8_t *vrb_map;
int first_rb;
int N_RB_DL;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
nfapi_dl_config_request_body_t *dl_req_body;
uint8_t *vrb_map = NULL;
int first_rb = 0;
int N_RB_DL = 0;
nfapi_dl_config_request_pdu_t *dl_config_pdu = NULL;
nfapi_tx_request_pdu_t *TX_req = NULL;
nfapi_dl_config_request_body_t *dl_req_body = NULL;
vrb_map = cc[CC_idP].vrb_map;
dl_req_body = &mac->DL_req[CC_idP].dl_config_request_body;
......@@ -261,74 +267,81 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth);
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
int rmax = 0;
int rep = 0;
int reps = 0;
int num_nb = 0;
int rmax = 0;
int rep = 0;
int reps = 0;
int num_nb = 0;
first_rb = 0;
struct LTE_PRACH_ConfigSIB_v1310 *ext4_prach;
LTE_PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13;
struct LTE_PRACH_ConfigSIB_v1310 *ext4_prach = NULL;
LTE_PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = NULL;
LTE_PRACH_ParametersCE_r13_t *p[4] = { NULL, NULL, NULL, NULL };
uint16_t absSF = (10 * frameP) + subframeP;
uint16_t absSF_Msg2 = (10 * ra->Msg2_frame) + ra->Msg2_subframe;
if (absSF > absSF_Msg2)
return; // we're not ready yet, need to be to start ==
uint16_t absSF = (10 * frameP) + subframeP;
uint16_t absSF_Msg2 = (10 * ra->Msg2_frame) + ra->Msg2_subframe;
if (cc[CC_idP].mib->message.schedulingInfoSIB1_BR_r13 > 0 &&
cc[CC_idP].radioResourceConfigCommon_BR) {
if (absSF > absSF_Msg2) {
return; // we're not ready yet
}
if (cc[CC_idP].mib->message.schedulingInfoSIB1_BR_r13 > 0 && cc[CC_idP].radioResourceConfigCommon_BR) {
ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13;
switch (prach_ParametersListCE_r13->list.count) {
case 4:
p[3] = prach_ParametersListCE_r13->list.array[3];
case 3:
p[2] = prach_ParametersListCE_r13->list.array[2];
case 2:
p[1] = prach_ParametersListCE_r13->list.array[1];
case 1:
p[0] = prach_ParametersListCE_r13->list.array[0];
break;
default:
AssertFatal (1 == 0, "Illegal count for prach_ParametersListCE_r13 %d\n", (int) prach_ParametersListCE_r13->list.count);
break;
case 4:
p[3] = prach_ParametersListCE_r13->list.array[3];
case 3:
p[2] = prach_ParametersListCE_r13->list.array[2];
case 2:
p[1] = prach_ParametersListCE_r13->list.array[1];
case 1:
p[0] = prach_ParametersListCE_r13->list.array[0];
break;
default:
AssertFatal (1 == 0, "Illegal count for prach_ParametersListCE_r13 %d\n", (int) prach_ParametersListCE_r13->list.count);
break;
}
}
if (ra->rach_resource_type > 0) {
/* This uses an MPDCCH Type 2 common allocation according to Section 9.1.5 36-213
* Parameters:
* p = 2 + 4 PRB set (number of PRB pairs 3)
* rmax = mpdcch-NumRepetition-RA-r13 => Table 9.1.5-3
* if CELevel = 0,1 => Table 9.1.5-1b for MPDCCH candidates
* if CELevel = 2,3 => Table 9.1.5-2b for MPDCCH candidates
* distributed transmission
*/
// This uses an MPDCCH Type 2 common allocation according to Section 9.1.5 36-213
// Parameters:
// p=2+4 PRB set (number of PRB pairs 3)
// rmax = mpdcch-NumRepetition-RA-r13 => Table 9.1.5-3
// if CELevel = 0,1 => Table 9.1.5-1b for MPDCCH candidates
// if CELevel = 2,3 => Table 9.1.5-2b for MPDCCH candidates
// distributed transmission
// rmax from SIB2 information
AssertFatal (rmax < 9, "rmax>8!\n");
/* rmax from SIB2 information */
AssertFatal (rmax < 9, "rmax > 8!\n"); // not sure of this assertion
rmax = 1 << p[ra->rach_resource_type - 1]->mpdcch_NumRepetition_RA_r13;
// choose r1 by default for RAR (Table 9.1.5-5)
/* Choose r1 by default for RAR (Table 9.1.5-5) */
rep = 0;
// get actual repetition count from Table 9.1.5-3
/* Get actual repetition count from Table 9.1.5-3 */
reps = (rmax <= 8) ? (1 << rep) : (rmax >> (3 - rep));
// get narrowband according to higher-layer config
/* Get narrowband according to higher-layer config */
num_nb = p[ra->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.count;
ra->msg2_narrowband = *p[ra->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[ra->preamble_index % num_nb]-1;
first_rb = narrowband_to_first_rb (&cc[CC_idP], ra->msg2_narrowband);
ra->msg2_narrowband = *p[ra->rach_resource_type - 1]->mpdcch_NarrowbandsToMonitor_r13.list.array[ra->preamble_index % num_nb] - 1;
first_rb = narrowband_to_first_rb(&cc[CC_idP], ra->msg2_narrowband);
if ((ra->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition (mac, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) {
if ((ra->msg2_mpdcch_repetition_cnt == 0) && (mpdcch_sf_condition(mac, CC_idP, frameP, subframeP, rmax, TYPE2, -1) > 0)) {
ra->msg2_mpdcch_done = 0;
// MPDCCH configuration for RAR
LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2 for CE Level %d, Programming MPDCCH %d repetitions\n", module_idP, frameP, subframeP, ra->rach_resource_type-1,reps);
/* MPDCCH configuration for RAR */
LOG_I(MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2 for CE Level %d, Programming MPDCCH %d repetitions\n",
module_idP,
frameP,
subframeP,
ra->rach_resource_type - 1,
reps);
memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MPDCCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu));
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_format = (ra->rach_resource_type > 1) ? 11 : 10;
......@@ -336,7 +349,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_prb_pairs = 6;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mpdcch_tansmission_type = 1; // imposed (9.1.5 in 213) for Type 2 Common search space
AssertFatal (cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 != NULL, "cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13 is null\n");
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.start_symbol = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.ecce_index = 0; // Note: this should be dynamic
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.aggregation_level = 24; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4
......@@ -346,7 +361,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.drms_scrambling_init = cc[CC_idP].physCellId;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6) | (ra->msg2_narrowband<<5);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV(6, 0, 6) | (ra->msg2_narrowband<<5);
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 0; // adjust according to size of RAR, 208 bits with N1A_PRB=3
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 0; // fix to 4 for now
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
......@@ -373,51 +388,64 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.direct_indication = 0;
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.total_dci_length_including_padding = 0; // this is not needed by OAI L1, but should be filled in
dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.number_of_tx_antenna_ports = 1;
ra->msg2_mpdcch_repetition_cnt++;
dl_req_body->number_pdu++;
ra->Msg2_subframe = (ra->Msg2_subframe + 9) % 10;
} // repetition_count == 0 && SF condition met
} //repetition_count==0 && SF condition met
if (ra->msg2_mpdcch_repetition_cnt > 0) { // we're in a stream of repetitions
if ((ra->msg2_mpdcch_repetition_cnt == reps) && (ra->msg2_mpdcch_done == 0)) { // this is the last mpdcch repetition
ra->msg2_mpdcch_done = 1;
if ((ra->msg2_mpdcch_repetition_cnt == reps)&&
(ra->msg2_mpdcch_done == 0)){ // this is the last mpdcch repetition
ra->msg2_mpdcch_done = 1;
if (cc[CC_idP].tdd_Config == NULL) { // FDD case
if (cc[CC_idP].tdd_Config == NULL) { // FDD case
// wait 2 subframes for PDSCH transmission
if (subframeP > 7)
ra->Msg2_frame = (frameP + 1) & 1023;
else
ra->Msg2_frame = frameP;
ra->Msg2_subframe = (subframeP + 2) % 10; // +2 is the "n+x" from Section 7.1.11 in 36.213
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, programmed Msg2 for %d.%d\n", module_idP, frameP, subframeP, ra->Msg2_frame,ra->Msg2_subframe);
ra->Msg2_subframe = (subframeP + 2) % 10; // +2 is the "n+x" from Section 7.1.11 in 36.213
LOG_I(MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, programmed Msg2 for %d.%d\n",
module_idP,
frameP,
subframeP,
ra->Msg2_frame,
ra->Msg2_subframe);
} else {
AssertFatal (1 == 0, "TDD case not done yet\n");
AssertFatal(1 == 0, "TDD case not done yet\n");
}
} // mpdcch_repetition_count == reps
else if (ra->msg2_mpdcch_done == 0) {
LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, MPDCCH repetition %d\n", module_idP, frameP, subframeP, ra->msg2_mpdcch_repetition_cnt);
} else if (ra->msg2_mpdcch_done == 0) { // mpdcch_repetition_count != reps
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, MPDCCH repetition %d\n",
module_idP,
frameP,
subframeP,
ra->msg2_mpdcch_repetition_cnt);
ra->msg2_mpdcch_repetition_cnt++;
}
if ((ra->Msg2_frame == frameP) && (ra->Msg2_subframe == subframeP)) {
// Program PDSCH
LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming PDSCH\n", module_idP, frameP, subframeP);
if((ra->Msg2_frame == frameP) && (ra->Msg2_subframe == subframeP)) {
/* Program PDSCH */
LOG_I(MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming PDSCH\n",
module_idP,
frameP,
subframeP);
dl_config_pdu = &dl_req_body->dl_config_pdu_list[dl_req_body->number_pdu];
memset ((void *) dl_config_pdu, 0, sizeof (nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_dlsch_pdu));
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index = mac->pdu_index[CC_idP];
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.rnti = ra->RA_rnti;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 2;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV (N_RB_DL, first_rb, 6);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; //QPSK
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.virtual_resource_block_assignment_flag = 0; // localized
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = getRIV(N_RB_DL, first_rb, 6);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.modulation = 2; // QPSK
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.redundancy_version = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1; // first block
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_blocks = 1; // first block
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transport_block_to_codeword_swap_flag = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_scheme = (cc[CC_idP].p_eNB == 1) ? 0 : 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.number_of_layers = 1;
......@@ -427,28 +455,36 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pa = 4; // 0 dB
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.delta_power_offset_index = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.ngap = 0;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize (cc[CC_idP].mib->message.dl_Bandwidth); // ignored
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.nprb = get_subbandsize(cc[CC_idP].mib->message.dl_Bandwidth); // ignored
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.transmission_mode = (cc[CC_idP].p_eNB == 1) ? 1 : 2;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_prb_per_subband = 1;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.num_bf_vector = 1;
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
// Rel10 fields
/* Rel10 fields */
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = cc[CC_idP].sib1_v13ext->bandwidthReducedAccessRelatedInfo_r13->startSymbolBR_r13;
// Rel13 fields
/* Rel13 fields */
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = (ra->rach_resource_type < 3) ? 1 : 2;;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not SI message
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not SI message
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = (10 * frameP) + subframeP;
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.drms_table_flag = 0;
dl_req_body->number_pdu++;
fill_rar_br (mac, CC_idP, ra, frameP, subframeP, cc[CC_idP].RAR_pdu.payload, ra->rach_resource_type - 1) ;
// Program UL processing for Msg3, same as regular LTE
fill_rar_br(mac, CC_idP, ra, frameP, subframeP, cc[CC_idP].RAR_pdu.payload, ra->rach_resource_type - 1);
/* Program UL processing for Msg3, same as regular LTE */
get_Msg3alloc (&cc[CC_idP], subframeP, frameP, &ra->Msg3_frame, &ra->Msg3_subframe);
add_msg3 (module_idP, CC_idP, ra, frameP, subframeP);
ra->state = WAITMSG3;
// DL request
LOG_I (MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming TX Req\n", module_idP, frameP, subframeP);
ra->state = WAITMSG3;
/* DL request */
LOG_I(MAC, "[eNB %d][RAPROC] Frame %d, Subframe %d : In generate_Msg2, Programming TX Req\n",
module_idP,
frameP,
subframeP);
mac->TX_req[CC_idP].sfn_sf = (frameP << 4) + subframeP;
TX_req = &mac->TX_req[CC_idP].tx_request_body.tx_pdu_list[mac->TX_req[CC_idP].tx_request_body.number_of_pdus];
TX_req->pdu_length = 7; // This should be changed if we have more than 1 preamble
......@@ -459,7 +495,6 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
}
}
} else
#endif
......@@ -571,104 +606,115 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
} // Msg2 frame/subframe condition
} // else BL/CE
}
void
generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
sub_frame_t subframeP, RA_t * ra)
{
//------------------------------------------------------------------------------
/*
* Generate message 4 of RA procedure (RRC connection setup)
*/
void
generate_Msg4(module_id_t module_idP,
int CC_idP,
frame_t frameP,
sub_frame_t subframeP,
RA_t * ra)
//------------------------------------------------------------------------------
{
eNB_MAC_INST *mac = RC.mac[module_idP];
COMMON_channels_t *cc = mac->common_channels;
int16_t rrc_sdu_length;
UE_list_t *UE_list = &(mac->UE_list);
int16_t rrc_sdu_length = 0;
uint16_t msg4_padding = 0;
uint16_t msg4_post_padding = 0;
uint16_t msg4_header = 0;
int UE_id = -1;
uint16_t msg4_padding;
uint16_t msg4_post_padding;
uint16_t msg4_header;
int first_rb = 0;
int N_RB_DL = 0;
uint8_t lcid = 0;
uint8_t offset = 0;
uint8_t *vrb_map = NULL;
uint8_t *vrb_map;
int first_rb;
int N_RB_DL;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
nfapi_ul_config_request_pdu_t *ul_config_pdu;
nfapi_tx_request_pdu_t *TX_req;
UE_list_t *UE_list=&mac->UE_list;
nfapi_dl_config_request_t *dl_req;
nfapi_dl_config_request_body_t *dl_req_body;
nfapi_ul_config_request_body_t *ul_req_body;
uint8_t lcid;
uint8_t offset;
nfapi_dl_config_request_pdu_t *dl_config_pdu = NULL;
nfapi_ul_config_request_pdu_t *ul_config_pdu = NULL;
nfapi_tx_request_pdu_t *TX_req = NULL;
nfapi_dl_config_request_t *dl_req = NULL;
nfapi_dl_config_request_body_t *dl_req_body = NULL;
nfapi_ul_config_request_body_t *ul_req_body = NULL;
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
int rmax = 0;
int rep = 0;
int reps = 0;
int rmax = 0;
int rep = 0;
int reps = 0;
first_rb = 0;
struct LTE_PRACH_ConfigSIB_v1310 *ext4_prach;
struct LTE_PUCCH_ConfigCommon_v1310 *ext4_pucch;
LTE_PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13;
struct LTE_N1PUCCH_AN_InfoList_r13 *pucch_N1PUCCH_AN_InfoList_r13;
struct LTE_PRACH_ConfigSIB_v1310 *ext4_prach = NULL;
struct LTE_PUCCH_ConfigCommon_v1310 *ext4_pucch = NULL;
LTE_PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = NULL;
struct LTE_N1PUCCH_AN_InfoList_r13 *pucch_N1PUCCH_AN_InfoList_r13 = NULL;
LTE_PRACH_ParametersCE_r13_t *p[4] = { NULL, NULL, NULL, NULL };
int pucchreps[4] = { 1, 1, 1, 1 };
int n1pucchan[4] = { 0, 0, 0, 0 };
if (cc[CC_idP].mib->message.schedulingInfoSIB1_BR_r13 > 0 &&
cc[CC_idP].radioResourceConfigCommon_BR) {
if (cc[CC_idP].mib->message.schedulingInfoSIB1_BR_r13 > 0 && cc[CC_idP].radioResourceConfigCommon_BR) {
ext4_prach = cc[CC_idP].radioResourceConfigCommon_BR->ext4->prach_ConfigCommon_v1310;
ext4_pucch = cc[CC_idP].radioResourceConfigCommon_BR->ext4->pucch_ConfigCommon_v1310;
prach_ParametersListCE_r13 = &ext4_prach->prach_ParametersListCE_r13;
ext4_pucch = cc[CC_idP].radioResourceConfigCommon_BR->ext4->pucch_ConfigCommon_v1310;
pucch_N1PUCCH_AN_InfoList_r13 = ext4_pucch->n1PUCCH_AN_InfoList_r13;
AssertFatal (prach_ParametersListCE_r13 != NULL, "prach_ParametersListCE_r13 is null\n");
AssertFatal (pucch_N1PUCCH_AN_InfoList_r13 != NULL, "pucch_N1PUCCH_AN_InfoList_r13 is null\n");
// check to verify CE-Level compatibility in SIB2_BR
/* Check to verify CE-Level compatibility in SIB2_BR */
AssertFatal (prach_ParametersListCE_r13->list.count == pucch_N1PUCCH_AN_InfoList_r13->list.count, "prach_ParametersListCE_r13->list.count!= pucch_N1PUCCH_AN_InfoList_r13->list.count\n");
switch (prach_ParametersListCE_r13->list.count) {
case 4:
p[3] = prach_ParametersListCE_r13->list.array[3];
n1pucchan[3] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[3];
AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level3 shouldn't be NULL\n");
pucchreps[3] = (int) (4 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13);
case 3:
p[2] = prach_ParametersListCE_r13->list.array[2];
n1pucchan[2] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[2];
AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level2 shouldn't be NULL\n");
pucchreps[2] = (int) (4 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13);
case 2:
p[1] = prach_ParametersListCE_r13->list.array[1];
n1pucchan[1] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[1];
AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level1_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level1 shouldn't be NULL\n");
pucchreps[1] = (int) (1 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level1_r13);
case 1:
p[0] = prach_ParametersListCE_r13->list.array[0];
n1pucchan[0] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[0];
AssertFatal (ext4_pucch->pucch_NumRepetitionCE_Msg4_Level0_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level0 shouldn't be NULL\n");
pucchreps[0] = (int) (1 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level0_r13);
break;
default:
AssertFatal (1 == 0, "Illegal count for prach_ParametersListCE_r13 %d\n", prach_ParametersListCE_r13->list.count);
case 4:
p[3] = prach_ParametersListCE_r13->list.array[3];
n1pucchan[3] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[3];
AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level3 shouldn't be NULL\n");
pucchreps[3] = (int) (4 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level3_r13);
case 3:
p[2] = prach_ParametersListCE_r13->list.array[2];
n1pucchan[2] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[2];
AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level2 shouldn't be NULL\n");
pucchreps[2] = (int) (4 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level2_r13);
case 2:
p[1] = prach_ParametersListCE_r13->list.array[1];
n1pucchan[1] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[1];
AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level1_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level1 shouldn't be NULL\n");
pucchreps[1] = (int) (1 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level1_r13);
case 1:
p[0] = prach_ParametersListCE_r13->list.array[0];
n1pucchan[0] = *pucch_N1PUCCH_AN_InfoList_r13->list.array[0];
AssertFatal(ext4_pucch->pucch_NumRepetitionCE_Msg4_Level0_r13 != NULL, "pucch_NumRepetitionCE_Msg4_Level0 shouldn't be NULL\n");
pucchreps[0] = (int) (1 << *ext4_pucch->pucch_NumRepetitionCE_Msg4_Level0_r13);
break;
default:
AssertFatal(1 == 0, "Illegal count for prach_ParametersListCE_r13 %d\n", prach_ParametersListCE_r13->list.count);
}
}
#endif
vrb_map = cc[CC_idP].vrb_map;
dl_req = &mac->DL_req[CC_idP];
dl_req_body = &dl_req->dl_config_request_body;
dl_config_pdu = &dl_req_body->dl_config_pdu_list[dl_req_body->number_pdu];
N_RB_DL = to_prb(cc[CC_idP].mib->message.dl_Bandwidth);
UE_id = find_UE_id(module_idP, ra->rnti);
if (UE_id < 0) {
LOG_E(MAC,"Can't find UE for t-crnti %x, kill RA procedure for this UE\n",ra->rnti);
LOG_E(MAC, "Can't find UE for t-crnti %x, kill RA procedure for this UE\n",
ra->rnti);
cancel_ra_proc(module_idP, CC_idP, frameP, ra->rnti);
return;
}
......
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @ 669724c1
This source diff could not be displayed because it is too large. You can view the blob instead.
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
View file @ 669724c1
......@@ -295,7 +295,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
......@@ -418,7 +419,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
......@@ -541,7 +543,8 @@ void dlsch_scheduler_pre_ue_select_fairRR(
CC_id,
UE_id,
subframeP,
S_DL_NONE);
S_DL_NONE,
rnti);
end_flag[CC_id] = 1;
break;
}
......@@ -810,7 +813,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
unsigned char ta_len = 0;
unsigned char sdu_lcids[NB_RB_MAX], lcid, offset, num_sdus = 0;
uint16_t nb_rb, nb_rb_temp, nb_available_rb;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], rnti, padding = 0, post_padding = 0;
uint16_t TBS, j, sdu_lengths[NB_RB_MAX], padding = 0, post_padding = 0;
rnti_t rnti = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
unsigned char round = 0;
unsigned char harq_pid = 0;
......@@ -1215,8 +1219,11 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
}
add_ue_dlsch_info(module_idP,
CC_id, UE_id, subframeP,
S_DL_SCHEDULED);
CC_id,
UE_id,
subframeP,
S_DL_SCHEDULED,
rnti);
//eNB_UE_stats->dlsch_trials[round]++;
UE_list->eNB_UE_stats[CC_id][UE_id].
num_retransmission += 1;
......@@ -1678,10 +1685,10 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
if (opt_enabled == 1) {
trace_pdu(DIRECTION_DOWNLINK, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP,UE_id),
TBS, module_idP, WS_RA_RNTI, UE_RNTI(module_idP, UE_id),
eNB->frame, eNB->subframe,0,0);
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
module_idP, CC_id, frameP, UE_RNTI(module_idP,UE_id), TBS);
module_idP, CC_id, frameP, UE_RNTI(module_idP, UE_id), TBS);
}
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP),
......@@ -1691,7 +1698,8 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
CC_id,
UE_id,
subframeP,
S_DL_SCHEDULED);
S_DL_SCHEDULED,
rnti);
// store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1;
......
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
View file @ 669724c1
This source diff could not be displayed because it is too large. You can view the blob instead.
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @ 669724c1
......@@ -686,7 +686,7 @@ rx_sdu(const module_id_t enb_mod_idP,
rx_lengths[i],
payload_ptr - sduP);
if ((UE_id = add_new_ue(enb_mod_idP, CC_idP, mac->common_channels[CC_idP].ra->rnti, harq_pid
if ((UE_id = add_new_ue(enb_mod_idP, CC_idP, ra->rnti, harq_pid
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
, mac->common_channels[CC_idP].ra->rach_resource_type
#endif
......@@ -1909,426 +1909,486 @@ schedule_ulsch_rnti(module_id_t module_idP,
}
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
//-----------------------------------------------------------------------------
/*
* default ULSCH scheduler for LTE-M
*/
void schedule_ulsch_rnti_emtc(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
int *emtc_active)
frame_t frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
int *emtc_active)
//-----------------------------------------------------------------------------
{
int UE_id;
int UE_id = -1;
rnti_t rnti = -1;
uint8_t round = 0;
uint8_t round_UL = 0;
uint8_t harq_pid = 0;
uint8_t status = 0;
uint32_t cshift,ndi;
int32_t normalized_rx_power;
int32_t target_rx_power=-90;
int n;
int CC_id = 0;
int N_RB_UL;
uint32_t cshift = 0;
uint32_t ndi = 0;
int32_t normalized_rx_power = 0;
int32_t target_rx_power = -90;
int n = 0;
int CC_id = 0;
int N_RB_UL = 0;
int sched_frame = frameP;
int rvidx_tab[4] = {0,2,3,1};
int tpc = 0;
int cqi_req = 0;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = eNB->common_channels;
UE_list_t *UE_list=&eNB->UE_list;
UE_TEMPLATE *UE_template;
UE_sched_ctrl *UE_sched_ctrl;
int sched_frame=frameP;
int rvidx_tab[4] = {0,2,3,1};
int tpc=0;
int cqi_req=0;
UE_list_t *UE_list = &(eNB->UE_list);
UE_TEMPLATE *UE_template = NULL;
UE_sched_ctrl *UE_sched_ctrl = NULL;
if (sched_subframeP<subframeP) sched_frame++;
if (sched_subframeP < subframeP) {
sched_frame++;
}
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &(eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body);
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = NULL;
nfapi_ul_config_request_body_t *ul_req_tmp = &eNB->UL_req_tmp[CC_id][sched_subframeP].ul_config_request_body;
nfapi_ul_config_request_body_t *ul_req_tmp = &(eNB->UL_req_tmp[CC_id][sched_subframeP].ul_config_request_body);
// loop over all active UEs
if ((frameP&1) == 1) return;
/* If frameP odd don't schedule */
if ((frameP & 1) == 1) {
return;
}
for (UE_id=UE_list->head_ul; UE_id>=0; UE_id=UE_list->next_ul[UE_id]) {
/* Loop over all active UEs */
for (UE_id = UE_list->head_ul; UE_id >= 0; UE_id = UE_list->next_ul[UE_id]) {
UE_template = &(UE_list->UE_template[UE_PCCID(module_idP, UE_id)][UE_id]);
if (UE_list->UE_template[UE_PCCID(module_idP,UE_id)][UE_id].rach_resource_type == 0) continue;
/* LTE-M device */
if (UE_template->rach_resource_type == 0) {
continue;
}
// don't schedule if Msg4 is not received yet
if (UE_list->UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured==FALSE) {
LOG_D(MAC,"[eNB %d] frame %d subfarme %d, UE %d: not configured, skipping UE scheduling \n",
module_idP,frameP,subframeP,UE_id);
/* Don't schedule if Msg4 is not received yet */
if (UE_template->configured == FALSE) {
LOG_D(MAC,"[eNB %d] frame %d subframe %d, UE %d: not configured, skipping UE scheduling \n",
module_idP,
frameP,
subframeP,
UE_id);
continue;
}
rnti = UE_RNTI(module_idP,UE_id);
rnti = UE_RNTI(module_idP, UE_id);
if (rnti == NOT_A_RNTI) {
LOG_W(MAC,"[eNB %d] frame %d subframe %d, UE %d: no RNTI \n",
module_idP,
frameP,
subframeP,
UE_id);
if (rnti==NOT_A_RNTI) {
LOG_W(MAC,"[eNB %d] frame %d subfarme %d, UE %d: no RNTI \n", module_idP,frameP,subframeP,UE_id);
continue;
}
// loop over all active UL CC_ids for this UE
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
// This is the actual CC_id in the list
CC_id = UE_list->ordered_ULCCids[n][UE_id];
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
/* Loop over all active UL CC_ids for this UE */
for (n = 0; n < UE_list->numactiveULCCs[UE_id]; n++) {
/* This is the actual CC_id in the list */
CC_id = UE_list->ordered_ULCCids[n][UE_id];
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
UE_template = &UE_list->UE_template[CC_id][UE_id];
UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
UE_template = &(UE_list->UE_template[CC_id][UE_id]);
harq_pid = 0;
round = UE_sched_ctrl->round_UL[CC_id][harq_pid];
AssertFatal(round<8,"round %d > 7 for UE %d/%x\n",round,UE_id,rnti);
round_UL = UE_sched_ctrl->round_UL[CC_id][harq_pid];
AssertFatal(round_UL < 8,"round_UL %d > 7 for UE %d/%x\n",
round_UL,
UE_id,
rnti);
LOG_D(MAC,"[eNB %d] frame %d subframe %d,Checking PUSCH %d for BL/CE UE %d/%x CC %d : aggregation level %d, N_RB_UL %d\n",
module_idP,frameP,subframeP,harq_pid,UE_id,rnti,CC_id, 24,N_RB_UL);
module_idP,
frameP,
subframeP,
harq_pid,
UE_id,
rnti,
CC_id,
24, // agregation level
N_RB_UL);
RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = UE_template->estimated_ul_buffer;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP]);
if ((UE_template->ul_SR >0 || round > 0 || status < RRC_CONNECTED)&&(subframeP==5))
// if there is information on bsr of DCCH, DTCH or if there is UL_SR, or if there is a packet to retransmit, or we want to schedule a periodic feedback every 10 frames
{
LOG_I(MAC,"[eNB %d][PUSCH %d] Frame %d subframe %d Scheduling UE %d/%x in round %d(SR %d,UL_inactivity timer %d,UL_failure timer %d,cqi_req_timer %d)\n",
module_idP,harq_pid,frameP,subframeP,UE_id,rnti,round,UE_template->ul_SR,
UE_sched_ctrl->ul_inactivity_timer,
UE_sched_ctrl->ul_failure_timer,
UE_sched_ctrl->cqi_req_timer);
// reset the scheduling request
emtc_active[CC_id]=1;
UE_template->ul_SR = 0;
status = mac_eNB_get_rrc_status(module_idP,rnti);
/*
if (status < RRC_CONNECTED)
cqi_req = 0;
else if (UE_sched_ctrl->cqi_req_timer>300) {
cqi_req = 1;
UE_sched_ctrl->cqi_req_timer=0;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO, UE_template->estimated_ul_buffer);
if ((UE_template->ul_SR > 0 || round_UL > 0 || status < RRC_CONNECTED) && (subframeP == 5)) {
/*
* if there is information on bsr of DCCH, DTCH,
* or if there is UL_SR,
* or if there is a packet to retransmit,
* or we want to schedule a periodic feedback every frame
*/
LOG_I(MAC,"[eNB %d][PUSCH %d] Frame %d subframe %d Scheduling UE %d/%x in round_UL %d(SR %d,UL_inactivity timer %d,UL_failure timer %d,cqi_req_timer %d)\n",
module_idP,
harq_pid,
frameP,
subframeP,
UE_id,
rnti,
round_UL,
UE_template->ul_SR,
UE_sched_ctrl->ul_inactivity_timer,
UE_sched_ctrl->ul_failure_timer,
UE_sched_ctrl->cqi_req_timer);
/* Reset the scheduling request */
emtc_active[CC_id] = 1;
UE_template->ul_SR = 0;
status = mac_eNB_get_rrc_status(module_idP,rnti);
cqi_req = 0;
}
else
cqi_req = 0;
*/
cqi_req = 0;
/* Power control: compute the expected ULSCH RX power (for the stats) */
/* This is the normalized RX power and this should be constant (regardless of mcs) */
normalized_rx_power = UE_sched_ctrl->pusch_snr[CC_id];
target_rx_power = 178;
//power control
//compute the expected ULSCH RX power (for the stats)
// this is the normalized RX power and this should be constant (regardless of mcs
normalized_rx_power = UE_sched_ctrl->pusch_snr[CC_id];
target_rx_power = 178;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame*10+UE_template->pusch_tpc_tx_subframe;
if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) //frame wrap-around
{
UE_template->pusch_tpc_tx_frame=frameP;
UE_template->pusch_tpc_tx_subframe=subframeP;
if (normalized_rx_power>(target_rx_power+4)) {
tpc = 0; //-1
UE_sched_ctrl->tpc_accumulated[CC_id]--;
} else if (normalized_rx_power<(target_rx_power-4)) {
tpc = 2; //+1
UE_sched_ctrl->tpc_accumulated[CC_id]++;
} else {
tpc = 1; //0
}
/* This assumes accumulated tpc */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame * 10 + UE_template->pusch_tpc_tx_subframe;
if (((framex10psubframe + 10) <= (frameP * 10 + subframeP)) || // normal case
((framex10psubframe > (frameP * 10 + subframeP)) && (((10240 - framex10psubframe + frameP * 10 + subframeP) >= 10)))) // frame wrap-around
{
UE_template->pusch_tpc_tx_frame = frameP;
UE_template->pusch_tpc_tx_subframe = subframeP;
if (normalized_rx_power > (target_rx_power + 4)) {
tpc = 0; //-1
UE_sched_ctrl->tpc_accumulated[CC_id]--;
} else if (normalized_rx_power < (target_rx_power - 4)) {
tpc = 2; //+1
UE_sched_ctrl->tpc_accumulated[CC_id]++;
} else {
tpc = 1; //0
}
} else {
tpc = 1; //0
}
//tpc = 1;
}
if (tpc != 1) {
LOG_D(MAC,"[eNB %d] ULSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
module_idP,
frameP,
subframeP,
harq_pid,
tpc,
UE_sched_ctrl->tpc_accumulated[CC_id],
normalized_rx_power,
target_rx_power);
}
if (tpc!=1) {
LOG_D(MAC,"[eNB %d] ULSCH scheduler: frame %d, subframe %d, harq_pid %d, tpc %d, accumulated %d, normalized/target rx power %d/%d\n",
module_idP,frameP,subframeP,harq_pid,tpc,
UE_sched_ctrl->tpc_accumulated[CC_id],normalized_rx_power,target_rx_power);
}
/* New transmission */
if (round_UL == 0) {
ndi = 1 - UE_template->oldNDI_UL[harq_pid];
UE_template->oldNDI_UL[harq_pid] = ndi;
UE_template->mcs_UL[harq_pid] = 4;
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid], 6);
// new transmission
if (round==0) {
ndi = 1-UE_template->oldNDI_UL[harq_pid];
UE_template->oldNDI_UL[harq_pid]=ndi;
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1=4;
UE_template->mcs_UL[harq_pid] = 4;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=UE_template->mcs_UL[harq_pid];
// buffer_occupancy = UE_template->ul_total_buffer;
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],6);
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=6;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid];
// buffer_occupancy -= TBS;
T(T_ENB_MAC_UE_UL_SCHEDULE, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(0), T_INT(6),
T_INT(UE_template->TBS_UL[harq_pid]), T_INT(ndi));
// bad indices : 20 (40 PRB), 21 (45 PRB), 22 (48 PRB)
//store for possible retransmission
UE_template->nb_rb_ul[harq_pid] = 6;
UE_sched_ctrl->ul_scheduled |= (1<<harq_pid);
if (UE_id == UE_list->head)
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SCHEDULED,UE_sched_ctrl->ul_scheduled);
// adjust total UL buffer status by TBS, wait for UL sdus to do final update
UE_template->scheduled_ul_bytes += UE_template->TBS_UL[harq_pid];
LOG_D(MAC, "scheduled_ul_bytes, new %d\n", UE_template->scheduled_ul_bytes);
// Cyclic shift for DM RS
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
// save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift;
AssertFatal (UE_template->physicalConfigDedicated != NULL,
"UE_template->physicalConfigDedicated is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4 != NULL,
"UE_template->physicalConfigDedicated->ext4 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present == LTE_EPDCCH_Config_r11__config_r11_PR_setup,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present != setup\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 = NULL\n");
LTE_EPDCCH_SetConfig_r11_t *epdcch_setconfig_r11 = UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11->list.array[0];
AssertFatal(epdcch_setconfig_r11 != NULL, "epdcch_setconfig_r11 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2!=NULL, "epdcch_setconfig_r11->ext2 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13!=NULL,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13!=NULL,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->present==LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13_PR_setup,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->present is not setup\n");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310!=NULL,
"epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 is null");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present==LTE_EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310_PR_setup,
"epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present is not setup\n");
LOG_I(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL 6-0A MPDCCH for BL/CE UE %d/%x, ulsch_frame %d, ulsch_subframe %d,UESS MPDCCH Narrowband %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,(int)epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1);
UE_template->first_rb_ul[harq_pid] = narrowband_to_first_rb (cc,
epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1);
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu));
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_format = (UE_template->rach_resource_type > 1) ? 5 : 4;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type > 1) ? 2 : 1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_narrowband = epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_prb_pairs = 6; // checked above that it has to be this
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_transmission_type = epdcch_setconfig_r11->transmissionType_r11; // distibuted
AssertFatal(UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11!=NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11 is null\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.start_symbol = *UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ecce_index = 0; // Note: this should be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.aggreagation_level = 24; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti_type = 4; // other
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti = rnti;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type < 3) ? 1 : 2;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.drms_scrambling_init = epdcch_setconfig_r11->dmrs_ScramblingSequenceInt_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.transmission_power = 6000; // 0dB
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_start = UE_template->first_rb_ul[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_resource_blocks = 6;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.pusch_repetition_levels = 0;
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13==
LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13__setup__mpdcch_pdsch_HoppingConfig_r13_off,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->mpdcch_pdsch_HoppingConfig_r13 is not off\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.frequency_hopping_flag = 1-epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.redudency_version = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.new_data_indication = UE_template->oldNDI_UL[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.harq_process = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tpc = tpc;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.csi_request = cqi_req;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ul_inex = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dai_presence_flag = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dl_assignment_index = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.srs_request = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_subframe_repetition_number = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tcp_bitmap = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.total_dci_length_include_padding = 29; // hard-coded for 10 MHz
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_tx_antenna_ports = 1;
hi_dci0_req->number_of_dci++;
LOG_I(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for BL/CE UE %d/%x, ulsch_frame %d, ulsch_subframe %d, UESS mpdcch narrowband %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,
(int)epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1);
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
cc,
UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
UE_template->first_rb_ul[harq_pid], // resource_block_start
UE_template->nb_rb_ul[harq_pid], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid],
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
UE_template->oldNDI_UL[harq_pid], // new_data_indication
rvidx_tab[round&3], // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
UE_template->TBS_UL[harq_pid]
);
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
1, //total_number_of_repetitions
1, //repetition_number
(frameP*10)+subframeP);
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power = normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power = target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1 = 4;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2 = UE_template->mcs_UL[harq_pid];
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx += 6;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS = UE_template->TBS_UL[harq_pid];
T(T_ENB_MAC_UE_UL_SCHEDULE,
T_INT(module_idP),
T_INT(CC_id),
T_INT(rnti),
T_INT(frameP),
T_INT(subframeP),
T_INT(harq_pid),
T_INT(UE_template->mcs_UL[harq_pid]),
T_INT(0),
T_INT(6),
T_INT(UE_template->TBS_UL[harq_pid]),
T_INT(ndi));
ul_req_tmp->number_of_pdus++;
eNB->ul_handle++;
/* Store for possible retransmission */
UE_template->nb_rb_ul[harq_pid] = 6;
UE_sched_ctrl->ul_scheduled |= (1 << harq_pid);
add_ue_ulsch_info(module_idP,
CC_id,
UE_id,
subframeP,
S_UL_SCHEDULED);
if (UE_id == UE_list->head) {
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SCHEDULED, UE_sched_ctrl->ul_scheduled);
}
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
/* Adjust total UL buffer status by TBS, wait for UL sdus to do final update */
UE_template->scheduled_ul_bytes += UE_template->TBS_UL[harq_pid];
}
else { // round > 0 => retransmission
T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(UE_template->mcs_UL[harq_pid]), T_INT(0), T_INT(6),
T_INT(round));
AssertFatal (UE_template->physicalConfigDedicated != NULL,
"UE_template->physicalConfigDedicated is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4 != NULL,
"UE_template->physicalConfigDedicated->ext4 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present == LTE_EPDCCH_Config_r11__config_r11_PR_setup,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present != setup\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 = NULL\n");
LTE_EPDCCH_SetConfig_r11_t *epdcch_setconfig_r11 = UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11->list.array[0];
AssertFatal(epdcch_setconfig_r11 != NULL, "epdcch_setconfig_r11 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2!=NULL, "epdcch_setconfig_r11->ext2 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13!=NULL,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13!=NULL,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->present==LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13_PR_setup,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->present is not setup\n");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310!=NULL,
"epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 is null");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present==LTE_EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310_PR_setup,
"epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present is not setup\n");
LOG_I(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL 6-0A MPDCCH for BL/CE UE %d/%x, ulsch_frame %d, ulsch_subframe %d,UESS MPDCCH Narrowband %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,(int)epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1);
UE_template->first_rb_ul[harq_pid] = narrowband_to_first_rb (cc,
epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1);
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu));
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_format = (UE_template->rach_resource_type > 1) ? 5 : 4;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type > 1) ? 2 : 1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_narrowband = epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_prb_pairs = 6; // checked above that it has to be this
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_transmission_type = epdcch_setconfig_r11->transmissionType_r11; // distibuted
AssertFatal(UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11!=NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11 is null\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.start_symbol = *UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ecce_index = 0; // Note: this should be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.aggreagation_level = 24; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti_type = 4; // other
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti = rnti;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type < 3) ? 1 : 2;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.drms_scrambling_init = epdcch_setconfig_r11->dmrs_ScramblingSequenceInt_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.transmission_power = 6000; // 0dB
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_start = UE_template->first_rb_ul[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_resource_blocks = 6;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.pusch_repetition_levels = 0;
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13==
LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13__setup__mpdcch_pdsch_HoppingConfig_r13_off,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->mpdcch_pdsch_HoppingConfig_r13 is not off\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.frequency_hopping_flag = 1-epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.redudency_version = rvidx_tab[round&3];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.new_data_indication = UE_template->oldNDI_UL[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.harq_process = harq_pid;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tpc = tpc;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.csi_request = cqi_req;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ul_inex = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dai_presence_flag = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dl_assignment_index = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.srs_request = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_subframe_repetition_number = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tcp_bitmap = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.total_dci_length_include_padding = 29; // hard-coded for 10 MHz
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_tx_antenna_ports = 1;
hi_dci0_req->number_of_dci++;
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
cc,
UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
UE_template->first_rb_ul[harq_pid], // resource_block_start
UE_template->nb_rb_ul[harq_pid], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid],
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
UE_template->oldNDI_UL[harq_pid], // new_data_indication
rvidx_tab[round&3], // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
UE_template->TBS_UL[harq_pid]
);
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
1, //total_number_of_repetitions
1, //repetition_number
(frameP*10)+subframeP);
ul_req_tmp->number_of_pdus++;
eNB->ul_handle++;
LOG_D(MAC, "scheduled_ul_bytes, new %d\n", UE_template->scheduled_ul_bytes);
}
} // UE_is_to_be_scheduled
/* Cyclic shift for DMRS */
cshift = 0; // values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
/* save it for a potential retransmission */
UE_template->cshift[harq_pid] = cshift;
AssertFatal (UE_template->physicalConfigDedicated != NULL, "UE_template->physicalConfigDedicated is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4 != NULL, "UE_template->physicalConfigDedicated->ext4 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 != NULL, "UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present == LTE_EPDCCH_Config_r11__config_r11_PR_setup,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present != setup\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 = NULL\n");
LTE_EPDCCH_SetConfig_r11_t *epdcch_setconfig_r11 = UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11->list.array[0];
AssertFatal(epdcch_setconfig_r11 != NULL, "epdcch_setconfig_r11 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2 != NULL, "epdcch_setconfig_r11->ext2 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13 != NULL, "epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->present == LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13_PR_setup,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->present is not setup\n");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 != NULL, "epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 is null");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present == LTE_EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310_PR_setup,
"epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present is not setup\n");
LOG_I(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL 6-0A MPDCCH for BL/CE UE %d/%x, ulsch_frame %d, ulsch_subframe %d, UESS MPDCCH Narrowband %d\n",
harq_pid,
frameP,
subframeP,
UE_id,
rnti,
sched_frame,
sched_subframeP,
(int)epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 - 1);
UE_template->first_rb_ul[harq_pid] = narrowband_to_first_rb (cc, epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 - 1);
hi_dci0_pdu = &(hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci + hi_dci0_req->number_of_hi]);
memset((void*) hi_dci0_pdu, 0, sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu));
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_format = (UE_template->rach_resource_type > 1) ? 5 : 4;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type > 1) ? 2 : 1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_narrowband = epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 - 1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_prb_pairs = 6; // checked above that it has to be this
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_transmission_type = epdcch_setconfig_r11->transmissionType_r11; // distibuted
AssertFatal(UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11 is null\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.start_symbol = *UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ecce_index = 0; // Note: this should be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.aggreagation_level = 24; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti_type = 4; // other
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti = rnti;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type < 3) ? 1 : 2; // already set above...
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.drms_scrambling_init = epdcch_setconfig_r11->dmrs_ScramblingSequenceInt_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.transmission_power = 6000; // 0dB
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_start = UE_template->first_rb_ul[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_resource_blocks = 6;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB = 3
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.pusch_repetition_levels = 0;
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13 == LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13__setup__mpdcch_pdsch_HoppingConfig_r13_off,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->mpdcch_pdsch_HoppingConfig_r13 is not off\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.frequency_hopping_flag = 1 - epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.redudency_version = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.new_data_indication = UE_template->oldNDI_UL[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.harq_process = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tpc = tpc;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.csi_request = cqi_req;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ul_inex = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dai_presence_flag = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dl_assignment_index = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.srs_request = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_subframe_repetition_number = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tcp_bitmap = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.total_dci_length_include_padding = 29; // hard-coded for 10 MHz
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_tx_antenna_ports = 1;
hi_dci0_req->number_of_dci++;
LOG_I(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG. Request for BL/CE UE %d/%x, ulsch_frame %d, ulsch_subframe %d, UESS mpdcch narrowband %d\n",
harq_pid,
frameP,
subframeP,
UE_id,
rnti,
sched_frame,
sched_subframeP,
(int)epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 - 1);
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
cc,
UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
UE_template->first_rb_ul[harq_pid], // resource_block_start
UE_template->nb_rb_ul[harq_pid], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid],
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
UE_template->oldNDI_UL[harq_pid], // new_data_indication
rvidx_tab[round_UL&3], // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
UE_template->TBS_UL[harq_pid]
);
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
UE_template->rach_resource_type > 2 ? 2 : 1,
1, // total_number_of_repetitions
1, // repetition_number
(frameP * 10) + subframeP);
ul_req_tmp->number_of_pdus++;
eNB->ul_handle++;
add_ue_ulsch_info(module_idP,
CC_id,
UE_id,
subframeP,
S_UL_SCHEDULED);
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n",
module_idP,
CC_id,
frameP,
subframeP,
UE_id);
} else { // round_UL > 0 => retransmission
/* In LTE-M the UL HARQ process is asynchronous */
T(T_ENB_MAC_UE_UL_SCHEDULE_RETRANSMISSION,
T_INT(module_idP),
T_INT(CC_id),
T_INT(rnti),
T_INT(frameP),
T_INT(subframeP),
T_INT(harq_pid),
T_INT(UE_template->mcs_UL[harq_pid]),
T_INT(0),
T_INT(6),
T_INT(round_UL));
AssertFatal (UE_template->physicalConfigDedicated != NULL, "UE_template->physicalConfigDedicated is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4 != NULL, "UE_template->physicalConfigDedicated->ext4 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 != NULL, "UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11 is null\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present == LTE_EPDCCH_Config_r11__config_r11_PR_setup,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.present != setup\n");
AssertFatal (UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11 = NULL\n");
LTE_EPDCCH_SetConfig_r11_t *epdcch_setconfig_r11 = UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.setConfigToAddModList_r11->list.array[0];
AssertFatal(epdcch_setconfig_r11 != NULL, "epdcch_setconfig_r11 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2 != NULL, "epdcch_setconfig_r11->ext2 is null\n");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13 != NULL, "epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13 != NULL, "epdcch_setconfig_r11->ext2->mpdcch_config_r13 is null");
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->present == LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13_PR_setup,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->present is not setup\n");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 != NULL, "epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310 is null");
AssertFatal(epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present == LTE_EPDCCH_SetConfig_r11__ext2__numberPRB_Pairs_v1310_PR_setup,
"epdcch_setconfig_r11->ext2->numberPRB_Pairs_v1310->present is not setup\n");
LOG_I(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL 6-0A MPDCCH for BL/CE UE %d/%x, ulsch_frame %d, ulsch_subframe %d,UESS MPDCCH Narrowband %d\n",
harq_pid,
frameP,
subframeP,
UE_id,
rnti,
sched_frame,
sched_subframeP,
(int)epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 - 1);
UE_template->first_rb_ul[harq_pid] = narrowband_to_first_rb(cc, epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13-1);
hi_dci0_pdu = &(hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi]);
memset((void*) hi_dci0_pdu, 0, sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_MPDCCH_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = (uint8_t) (2 + sizeof (nfapi_dl_config_mpdcch_pdu));
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_format = (UE_template->rach_resource_type > 1) ? 5 : 4;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type > 1) ? 2 : 1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_narrowband = epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_Narrowband_r13 - 1;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_prb_pairs = 6; // checked above that it has to be this
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_assignment = 0; // Note: this can be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mpdcch_transmission_type = epdcch_setconfig_r11->transmissionType_r11; // distibuted
AssertFatal(UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11 != NULL,
"UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11 is null\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.start_symbol = *UE_template->physicalConfigDedicated->ext4->epdcch_Config_r11->config_r11.choice.setup.startSymbol_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ecce_index = 0; // Note: this should be dynamic
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.aggreagation_level = 24; // OK for CEModeA r1-3 (9.1.5-1b) or CEModeB r1-4
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti_type = 4; // other
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.rnti = rnti;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ce_mode = (UE_template->rach_resource_type < 3) ? 1 : 2;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.drms_scrambling_init = epdcch_setconfig_r11->dmrs_ScramblingSequenceInt_r11;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.transmission_power = 6000; // 0dB
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.resource_block_start = UE_template->first_rb_ul[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_resource_blocks = 6;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.pusch_repetition_levels = 0;
AssertFatal(epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13 == LTE_EPDCCH_SetConfig_r11__ext2__mpdcch_config_r13__setup__mpdcch_pdsch_HoppingConfig_r13_off,
"epdcch_setconfig_r11->ext2->mpdcch_config_r13->mpdcch_pdsch_HoppingConfig_r13 is not off\n");
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.frequency_hopping_flag = 1 - epdcch_setconfig_r11->ext2->mpdcch_config_r13->choice.setup.mpdcch_pdsch_HoppingConfig_r13;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.redudency_version = rvidx_tab[round_UL&3];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.new_data_indication = UE_template->oldNDI_UL[harq_pid];
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.harq_process = harq_pid;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tpc = tpc;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.csi_request = cqi_req;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.ul_inex = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dai_presence_flag = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dl_assignment_index = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.srs_request = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.dci_subframe_repetition_number = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.tcp_bitmap = 0;
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.total_dci_length_include_padding = 29; // hard-coded for 10 MHz
hi_dci0_pdu->mpdcch_dci_pdu.mpdcch_dci_pdu_rel13.number_of_tx_antenna_ports = 1;
hi_dci0_req->number_of_dci++;
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
cqi_req,
cc,
UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
UE_template->first_rb_ul[harq_pid], // resource_block_start
UE_template->nb_rb_ul[harq_pid], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid],
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
UE_template->oldNDI_UL[harq_pid], // new_data_indication
rvidx_tab[round_UL&3], // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
UE_template->TBS_UL[harq_pid]
);
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp->ul_config_pdu_list[ul_req_tmp->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
1, //total_number_of_repetitions
1, //repetition_number
(frameP * 10) + subframeP);
ul_req_tmp->number_of_pdus++;
eNB->ul_handle++;
}
} // UE_is_to_be_scheduled
} // ULCCs
} // loop over UE_id
}
......
openair2/LAYER2/MAC/mac_proto.h
View file @ 669724c1
......@@ -441,7 +441,7 @@ void init_ue_sched_info(void);
void add_ue_ulsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_ULSCH_STATUS status);
void add_ue_dlsch_info(module_id_t module_idP, int CC_id, int UE_id,
sub_frame_t subframe, UE_DLSCH_STATUS status);
sub_frame_t subframe, UE_DLSCH_STATUS status, rnti_t rnti);
int find_UE_id(module_id_t module_idP, rnti_t rnti);
int find_RA_id(module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI(module_id_t module_idP, int UE_id);
......@@ -1209,7 +1209,6 @@ void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
void fill_nfapi_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information *
harq_information, uint8_t cce_idxP);
......@@ -1221,9 +1220,10 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
sub_frame_t subframeP);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP, uint8_t cce_idxP);
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
uint8_t cce_idxP);
void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t * dl_config_pdu,
uint8_t aggregation_level,
......
openair2/LAYER2/MAC/pre_processor.c
View file @ 669724c1
......@@ -460,7 +460,12 @@ void decode_slice_positioning(module_id_t Mod_idP,
// This fuction sorts the UE in order their dlsch buffer and CQI
void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subframeP) {
void
sort_UEs(module_id_t Mod_idP,
int slice_idx,
int frameP,
sub_frame_t subframeP)
{
int i;
int list[MAX_MOBILES_PER_ENB];
int list_size = 0;
......@@ -468,16 +473,13 @@ void sort_UEs(module_id_t Mod_idP, int slice_idx, int frameP, sub_frame_t subfra
UE_list_t *UE_list = &RC.mac[Mod_idP]->UE_list;
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_list->active[i] == FALSE) continue;
if (UE_RNTI(Mod_idP, i) == NOT_A_RNTI) continue;
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1) continue;
if (!ue_dl_slice_membership(Mod_idP, i, slice_idx)) continue;
list[list_size] = i;
list_size++;
if (UE_list->active[i] == TRUE &&
UE_RNTI(Mod_idP, i) != NOT_A_RNTI &&
UE_list->UE_sched_ctrl[i].ul_out_of_sync != 1 &&
ue_dl_slice_membership(Mod_idP, i, slice_idx)) {
list[list_size++] = i;
}
}
decode_sorting_policy(Mod_idP, slice_idx);
......@@ -1170,12 +1172,15 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
uint8_t CC_id;
uint16_t i, j;
int min_rb_unit[NFAPI_CC_MAX];
slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
eNB_MAC_INST *eNB = RC.mac[Mod_id];
slice_info_t *sli = &eNB->slice_info;
uint16_t (*nb_rbs_required)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_required;
uint16_t (*nb_rbs_accounted)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_accounted;
uint16_t (*nb_rbs_remaining)[MAX_MOBILES_PER_ENB] = sli->pre_processor_results[slice_idx].nb_rbs_remaining;
uint8_t (*MIMO_mode_indicator)[N_RBG_MAX] = sli->pre_processor_results[slice_idx].MIMO_mode_indicator;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
UE_list_t *UE_list = &eNB->UE_list;
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
#ifdef TM5
......@@ -1191,7 +1196,10 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
// Initialize scheduling information for all active UEs
memset(&sli->pre_processor_results[slice_idx], 0, sizeof(sli->pre_processor_results[slice_idx]));
// FIXME: After the memset above, some of the resets in reset() are redundant
dlsch_scheduler_pre_processor_reset(Mod_id, slice_idx, frameP, subframeP,
dlsch_scheduler_pre_processor_reset(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit,
nb_rbs_required,
rballoc_sub,
......@@ -1199,44 +1207,63 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
mbsfn_flag); // FIXME: Not sure if useful
// STATUS
// Store the DLSCH buffer for each logical channel
store_dlsch_buffer(Mod_id, slice_idx, frameP, subframeP);
store_dlsch_buffer(Mod_id,
slice_idx,
frameP,
subframeP);
// Calculate the number of RBs required by each UE on the basis of logical channel's buffer
assign_rbs_required(Mod_id, slice_idx, frameP, subframeP, nb_rbs_required, min_rb_unit);
assign_rbs_required(Mod_id,
slice_idx,
frameP,
subframeP,
nb_rbs_required,
min_rb_unit);
// Sorts the user on the basis of dlsch logical channel buffer and CQI
sort_UEs(Mod_id, slice_idx, frameP, subframeP);
sort_UEs(Mod_id,
slice_idx,
frameP,
subframeP);
// ACCOUNTING
// This procedure decides the number of RBs to allocate
dlsch_scheduler_pre_processor_accounting(Mod_id, slice_idx, frameP, subframeP,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted);
dlsch_scheduler_pre_processor_accounting(Mod_id,
slice_idx,
frameP,
subframeP,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted);
// POSITIONING
// This procedure does the main allocation of the RBs
dlsch_scheduler_pre_processor_positioning(Mod_id, slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
dlsch_scheduler_pre_processor_positioning(Mod_id,
slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
// SHARING
// If there are available RBs left in the slice, allocate them to the highest priority UEs
if (RC.mac[Mod_id]->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id, slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
if (eNB->slice_info.intraslice_share_active) {
dlsch_scheduler_pre_processor_intraslice_sharing(Mod_id,
slice_idx,
min_rb_unit,
nb_rbs_required,
nb_rbs_accounted,
nb_rbs_remaining,
rballoc_sub,
MIMO_mode_indicator);
}
#ifdef TM5
// This has to be revisited!!!!
for (CC_id = 0; CC_id < RC.nb_mac_CC[Mod_id]; CC_id++) {
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id];
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
i1 = 0;
i2 = 0;
......@@ -1244,35 +1271,25 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (j = 0; j < N_RBG; j++) {
if (MIMO_mode_indicator[CC_id][j] == 2) {
i1 = i1 + 1;
i1++;
} else if (MIMO_mode_indicator[CC_id][j] == 1) {
i2 = i2 + 1;
i2++;
} else if (MIMO_mode_indicator[CC_id][j] == 0) {
i3 = i3 + 1;
i3++;
}
}
if ((i1 < N_RBG) && (i2 > 0) && (i3 == 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_SUMIMO_transmissions + 1;
}
if (i3 == N_RBG && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions +
1;
}
if ((i1 < N_RBG) && (i3 > 0)) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->
check_for_MUMIMO_transmissions + 1;
if (i1 < N_RBG) {
if (i2 > 0 && i3 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_SUMIMO_transmissions + 1;
} else if (i3 > 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_MUMIMO_transmissions + 1;
}
} else if (i3 == N_RBG && i1 == 0 && i2 == 0) {
PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->FULL_MUMIMO_transmissions + 1;
}
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions = PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions + 1;
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions =
PHY_vars_eNB_g[Mod_id][CC_id]->check_for_total_transmissions +
1;
}
#endif
......@@ -1283,22 +1300,30 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
for (i = 0; i < UE_num_active_CC(UE_list, UE_id); i++) {
CC_id = UE_list->ordered_CCids[i][UE_id];
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
COMMON_channels_t *cc = &RC.mac[Mod_id]->common_channels[CC_id];
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
int N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
if (ue_sched_ctl->pre_nb_available_rbs[CC_id] > 0) {
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n", UE_id);
LOG_D(MAC, "dl power offset UE%d = %d \n", UE_id, ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n", UE_id);
LOG_D(MAC, "******************DL Scheduling Information for UE%d ************************\n",
UE_id);
LOG_D(MAC, "dl power offset UE%d = %d \n",
UE_id,
ue_sched_ctl->dl_pow_off[CC_id]);
LOG_D(MAC, "***********RB Alloc for every subband for UE%d ***********\n",
UE_id);
for (j = 0; j < N_RBG; j++) {
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].rballoc_sub[UE_id] = rballoc_sub_UE[CC_id][UE_id][UE_id];
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n", UE_id, j, ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
LOG_D(MAC, "RB Alloc for UE%d and Subband%d = %d\n",
UE_id, j,
ue_sched_ctl->rballoc_sub_UE[CC_id][j]);
}
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = pre_nb_available_rbs[CC_id][UE_id];
LOG_D(MAC, "[eNB %d][SLICE %d]Total RBs allocated for UE%d = %d\n",
Mod_id, RC.mac[Mod_id]->slice_info.dl[slice_idx].id, UE_id,
Mod_id,
eNB->slice_info.dl[slice_idx].id,
UE_id,
ue_sched_ctl->pre_nb_available_rbs[CC_id]);
}
}
......
openair2/LAYER2/MAC/rar_tools.c
View file @ 669724c1
......@@ -110,98 +110,124 @@ fill_rar(const module_id_t module_idP,
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
//------------------------------------------------------------------------------
/*
* Fill the RAR buffer (header + PDU) for LTE-M devices
*/
unsigned short fill_rar_br(eNB_MAC_INST *eNB,
int CC_id,
RA_t *ra,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t* const dlsch_buffer,
const uint8_t ce_level
)
int CC_id,
RA_t *ra,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t* const dlsch_buffer,
const uint8_t ce_level)
//------------------------------------------------------------------------------
{
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
uint32_t rballoc,reps;
uint32_t TPC,ULdelay,cqireq,mpdcch_nb_index;
int input_buffer_length;
uint8_t *rar = (uint8_t *)(dlsch_buffer + 1);
uint32_t rballoc = 0;
uint32_t reps = 0;
uint32_t ULdelay = 0;
uint32_t cqireq = 0;
uint32_t mpdcch_nb_index = 0;
uint32_t TPC = 0;
int input_buffer_length = 0;
int N_NB_index = 0;
AssertFatal(ra != NULL, "RA is null \n");
// subheader fixed
/* Subheader fixed */
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = ra->preamble_index; // Respond to Preamble 0 only for the moment
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
int N_NB_index;
rarh->RAPID = ra->preamble_index; // Respond to Preamble
/* RAR PDU */
/* TA Command */
ra->timing_offset /= 16; // T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> 4) & 0x7f; // 7 MSBs of timing advance
rar[1] = (uint8_t) (ra->timing_offset & 0x0f) << 4; // 4 LSBs of timing advance
// Copy the Msg2 narrowband
/* Copy the Msg2 narrowband */
ra->msg34_narrowband = ra->msg2_narrowband;
ra->msg3_first_rb = 0;
ra->msg3_nb_rb = 2;
if (ce_level < 2) { //CE Level 0,1, CEmodeA
if (ce_level < 2) { // CE Level 0, 1 (CEmodeA)
input_buffer_length = 6;
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
rar[4] = (uint8_t)(ra->rnti>>8);
rar[5] = (uint8_t)(ra->rnti&0xff);
//cc->ra[ra_idx].timing_offset = 0;
/* UL Grant */
reps = 0;
ra->msg3_mcs = 7;
TPC = 3; // no power increase
ULdelay = 0;
cqireq = 0;
mpdcch_nb_index = 0;
rballoc = mac_computeRIV(6,ra->msg3_first_rb,ra->msg3_nb_rb);
rballoc = mac_computeRIV(6, ra->msg3_first_rb, ra->msg3_nb_rb);
uint32_t buffer = 0;
buffer |= ra->msg34_narrowband << (16 + (4 - N_NB_index));
buffer |= ((rballoc & 0xFF) << (12 + (4 - N_NB_index)));
buffer |= ((rballoc & 0x0F) << (12 + (4 - N_NB_index)));
buffer |= ((reps & 0x03) << (10 + (4 - N_NB_index)));
buffer |= ((ra->msg3_mcs & 0x07) << (7 + (4 - N_NB_index)));
buffer |= ((TPC & 0x07) << (4 + (4 - N_NB_index)));
buffer |= ((cqireq & 0x01) << (3 + (4 - N_NB_index)));
buffer |= ((ULdelay & 0x01) << (2 + (4 - N_NB_index)));
buffer |= (mpdcch_nb_index << (4 - N_NB_index));
rar[1] = (buffer>>16) & 0x0F;
rar[2] = (buffer>>8) & 0xFF;
rar[3] = buffer&0xFF;
}
else { // CE level 2,3 => CEModeB
AssertFatal(1==0,"Shouldn't get here ...\n");
input_buffer_length =5;
rar[1] |= (uint8_t) (buffer >> 16) & 0x0F;
rar[2] = (uint8_t) (buffer >> 8) & 0xFF;
rar[3] = (uint8_t) buffer & 0xFF;
/* RA CRNTI */
rar[4] = (uint8_t)(ra->rnti >> 8);
rar[5] = (uint8_t)(ra->rnti & 0xff);
} else { // CE level 2, 3 (CEModeB)
rar[3] = (uint8_t)(ra->rnti>>8);
rar[4] = (uint8_t)(ra->rnti&0xff);
AssertFatal(1 == 0, "Shouldn't get here ...\n");
input_buffer_length = 5;
rar[3] = (uint8_t)(ra->rnti >> 8);
rar[4] = (uint8_t)(ra->rnti & 0xff);
}
LOG_I(MAC,"[RAPROC] Frame %d Subframe %d : Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
frameP,subframeP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
LOG_I(MAC, "[RAPROC] Frame %d Subframe %d : Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x, preamble %d/%d, TIMING OFFSET %d\n",
frameP,
subframeP,
*(uint8_t*) rarh,
rar[0],
rar[1],
rar[2],
rar[3],
rar[4],
rar[5],
ce_level,
ra->rnti,
rarh->RAPID,ra->preamble_index,
rarh->RAPID,
ra->preamble_index,
ra->timing_offset);
if (opt_enabled) {
trace_pdu(DIRECTION_DOWNLINK , dlsch_buffer, input_buffer_length, eNB->Mod_id, WS_RA_RNTI , 1,
eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,
"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
frameP, ra->rnti, rarh->RAPID, input_buffer_length);
trace_pdu(DIRECTION_DOWNLINK,
dlsch_buffer,
input_buffer_length,
eNB->Mod_id,
WS_RA_RNTI,
1,
eNB->frame,
eNB->subframe,
0,
0);
LOG_D(OPT, "[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
frameP,
ra->rnti,
rarh->RAPID,
input_buffer_length);
}
return (ra->rnti);
......
openair3/S1AP/s1ap_eNB_trace.c
View file @ 669724c1
......@@ -107,7 +107,7 @@ int s1ap_eNB_handle_trace_start(uint32_t assoc_id,
{
S1AP_TraceStart_t *container;
S1AP_TraceStartIEs_t *ie;
struct s1ap_eNB_ue_context_s *ue_desc_p;
struct s1ap_eNB_ue_context_s *ue_desc_p = NULL;
struct s1ap_eNB_mme_data_s *mme_ref_p;
DevAssert(pdu != NULL);
......
openair3/TEST/EPC_TEST/generate_scenario.c
View file @ 669724c1
......@@ -270,7 +270,7 @@ static void enb_config_display(void)
printf( " ENB CONFIG FILE CONTENT LOADED:\n");
printf( "----------------------------------------------------------------------\n");
for (i = 0; i < g_enb_properties.number; i++) {
printf( "ENB CONFIG for instance %u:\n\n", i);
printf( "ENB CONFIG for instance %d:\n\n", i);
printf( "\teNB name: \t%s\n",g_enb_properties.properties[i]->eNB_name);
printf( "\teNB ID: \t%"PRIu32"\n",g_enb_properties.properties[i]->eNB_id);
printf( "\tCell type: \t%s\n",g_enb_properties.properties[i]->cell_type == CELL_MACRO_ENB ? "CELL_MACRO_ENB":"CELL_HOME_ENB");
......
openair3/TEST/EPC_TEST/play_scenario.c
View file @ 669724c1
......@@ -1103,7 +1103,7 @@ et_config_parse_opt_line (
fprintf(stderr, "Please provide a valid -D/--delay-on-exit argument, %s is not a valid value\n", delay_on_exit);
exit(1);
}
printf("Delay on exit is %u\n", delay_on_exit);
printf("Delay on exit is %d\n", (int) delay_on_exit);
}
break;
......
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @ 669724c1
......@@ -28,7 +28,12 @@
#include <pthread.h>
#include <unistd.h>
#include <stdio.h>
#include <uhd/version.hpp>
#if UHD_VERSION < 3110000
#include <uhd/utils/thread_priority.hpp>
#else
#include <uhd/utils/thread.hpp>
#endif
#include <uhd/usrp/multi_usrp.hpp>
#include <uhd/version.hpp>
#include <boost/lexical_cast.hpp>
......@@ -183,7 +188,7 @@ static int sync_to_gps(openair0_device *device) {
num_gps_locked++;
std::cout << boost::format("GPS Locked\n");
} else {
std::cerr << "WARNING: GPS not locked - time will not be accurate until locked" << std::endl;
LOG_W(HW,"WARNING: GPS not locked - time will not be accurate until locked\n");
}
//Set to GPS time
......@@ -724,6 +729,7 @@ void *freq_thread(void *arg) {
usrp_state_t *s = (usrp_state_t *)device->priv;
s->usrp->set_tx_freq(device->openair0_cfg[0].tx_freq[0]);
s->usrp->set_rx_freq(device->openair0_cfg[0].rx_freq[0]);
return NULL;
}
/*! \brief Set frequencies (TX/RX). Spawns a thread to handle the frequency change to not block the calling thread
* \param device the hardware to use
......@@ -1073,16 +1079,16 @@ extern "C" {
uhd::device_addrs_t device_adds = uhd::device::find(args);
if (device_adds.size() == 0) {
std::cerr<<"No USRP Device Found. " << std::endl;
LOG_E(HW,"No USRP Device Found.\n ");
free(s);
return -1;
} else if (device_adds.size() > 1) {
std::cerr<<"More than one USRP Device Found. Please specify device more precisely in config file." << std::endl;
LOG_E(HW,"More than one USRP Device Found. Please specify device more precisely in config file.\n");
free(s);
return -1;
}
std::cerr << "Found USRP " << device_adds[0].get("type") << "\n";
LOG_I(HW,"Found USRP %s\n", device_adds[0].get("type").c_str());
double usrp_master_clock;
if (device_adds[0].get("type") == "b200") {
......@@ -1090,7 +1096,7 @@ extern "C" {
device->type = USRP_B200_DEV;
usrp_master_clock = 30.72e6;
args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock);
args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=15360, recv_frame_size=15360" ;
args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=7680, recv_frame_size=7680" ;
}
if (device_adds[0].get("type") == "n3xx") {
......@@ -1287,8 +1293,9 @@ extern "C" {
samples/=10000;
LOG_I(PHY,"RF board max packet size %u, size for 100µs jitter %d \n", max, samples);
if ( samples < max )
if ( samples < max ) {
stream_args_rx.args["spp"] = str(boost::format("%d") % samples );
}
LOG_I(PHY,"rx_max_num_samps %zu\n",
s->usrp->get_rx_stream(stream_args_rx)->get_max_num_samps());
......
targets/RT/USER/lte-ru.c
View file @ 669724c1
/*******************************************************************************
OpenAirInterface
Copyright(c) 1999 - 2014 Eurecom
OpenAirInterface is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with OpenAirInterface.The full GNU General Public License is
included in this distribution in the file called "COPYING". If not,
see <http://www.gnu.org/licenses/>.
Contact Information
OpenAirInterface Admin: openair_admin@eurecom.fr
OpenAirInterface Tech : openair_tech@eurecom.fr
OpenAirInterface Dev : openair4g-devel@lists.eurecom.fr
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file lte-enb.c
* \brief Top-level threads for eNodeB
......
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