updated dlsim to test harq

openair1/SIMULATION/NR_PHY/dlsim.c

@@ -154,6 +154,8 @@ int main(int argc, char **argv)
   int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
   //int n_errors2, n_alamouti;
   uint8_t transmission_mode = 1,n_tx=1,n_rx=1;
+  uint8_t round;
+  uint8_t num_rounds = 4;
 
   channel_desc_t *gNB2UE;
   //uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
@@ -678,6 +680,8 @@ int main(int argc, char **argv)
   
 
   nr_ue_phy_config_request(&UE_mac->phy_config);
+  NR_UE_list_t *UE_list = &RC.nrmac[0]->UE_list;
+  NR_COMMON_channels_t *cc = RC.nrmac[0]->common_channels;
 
   for (SNR = snr0; SNR < snr1; SNR += .2) {
 
@@ -704,13 +708,37 @@ int main(int argc, char **argv)
       errors_bit = 0;
       //multipath channel
       //multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0);
+      UE->rx_offset=0;
+      UE_proc.frame_rx = frame;
+      UE_proc.nr_tti_rx= slot;
+      UE_proc.subframe_rx = slot;
+      
+      dcireq.frame     = frame;
+      dcireq.slot      = slot;
+
+      NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE->current_thread_id[UE_proc.nr_tti_rx]][0][0];
 
+      int harq_pid = dlsch0->current_harq_pid;
+      NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];
+
+      NR_gNB_DLSCH_t *gNB_dlsch = gNB->dlsch[0][0];
+      nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &gNB_dlsch->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15;
+      
+      UE_harq_process->harq_ack.ack = 0;
+      round = 0;
+        
+      while ((round<num_rounds) && (UE_harq_process->harq_ack.ack==0)) {
         memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int));
+        memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int));
         clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
-      if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&pucch_sched,&dlsch_config);
-      else               nr_schedule_css_dlsch_phytest(0,frame,slot);
 
+        UE_list->UE_sched_ctrl[0].harq_processes[0].ndi = (round==0) ? 1 : 0;
+
+        UE_list->UE_sched_ctrl[0].harq_processes[0].round = round;   
+        gNB->dlsch[0][0]->harq_processes[0]->round = round;
       
+        if (css_flag == 0) nr_schedule_uss_dlsch_phytest(0,frame,slot,&pucch_sched,&dlsch_config);
+        else               nr_schedule_css_dlsch_phytest(0,frame,slot);
         Sched_INFO.module_id = 0;
         Sched_INFO.CC_id     = 0;
         Sched_INFO.frame     = frame;
@@ -776,13 +804,10 @@ int main(int argc, char **argv)
     }
         }
         
-      NR_gNB_DLSCH_t *gNB_dlsch = gNB->dlsch[0][0];
-      nfapi_nr_dl_tti_pdsch_pdu_rel15_t rel15 = gNB_dlsch->harq_processes[0]->pdsch_pdu.pdsch_pdu_rel15;
-      
         //AWGN
-      sigma2_dB = 10 * log10((double)txlev * ((double)UE->frame_parms.ofdm_symbol_size/(12*rel15.rbSize))) - SNR;
+        sigma2_dB = 10 * log10((double)txlev * ((double)UE->frame_parms.ofdm_symbol_size/(12*rel15->rbSize))) - SNR;
         sigma2    = pow(10, sigma2_dB/10);
-      if (n_trials==1) printf("sigma2 %f (%f dB), txlev %f (factor %f)\n",sigma2,sigma2_dB,10*log10((double)txlev),(double)(double)UE->frame_parms.ofdm_symbol_size/(12*rel15.rbSize));
+        if (n_trials==1) printf("sigma2 %f (%f dB), txlev %f (factor %f)\n",sigma2,sigma2_dB,10*log10((double)txlev),(double)(double)UE->frame_parms.ofdm_symbol_size/(12*rel15->rbSize));
         
         for (i=frame_parms->get_samples_slot_timestamp(slot,frame_parms,0); 
        i<frame_parms->get_samples_slot_timestamp(slot+1,frame_parms,0);
@@ -793,14 +818,6 @@ int main(int argc, char **argv)
     }
         }
         
-      UE->rx_offset=0;
-      UE_proc.frame_rx = frame;
-      UE_proc.nr_tti_rx= slot;
-      UE_proc.subframe_rx = slot;
-      
-      dcireq.frame     = frame;
-      dcireq.slot      = slot;
-      
         nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
         nr_ue_scheduled_response(&scheduled_response);
         
@@ -814,29 +831,28 @@ int main(int argc, char **argv)
       UE->dlsch[UE->current_thread_id[slot]][0][0]->max_ldpc_iterations+1)
     n_errors++;
       
+        printf("dlsim round %d ends\n",round);
+        round++;
+      } // round
+      
       //----------------------------------------------------------
       //---------------------- count errors ----------------------
       //----------------------------------------------------------
       
         
         
-      NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE->current_thread_id[UE_proc.nr_tti_rx]][0][0];
-      
-      int harq_pid = dlsch0->current_harq_pid;
-      NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];
-      
       NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE->current_thread_id[UE_proc.nr_tti_rx]];
       int16_t *UE_llr = pdsch_vars[0]->llr[0];
       
       
-      uint32_t TBS         = rel15.TBSize[0];
+      uint32_t TBS         = rel15->TBSize[0];
       uint16_t length_dmrs = 1;
-      uint16_t nb_rb       = rel15.rbSize;
-      uint8_t  nb_re_dmrs  = rel15.dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
-      uint8_t  mod_order   = rel15.qamModOrder[0];
-      uint8_t  nb_symb_sch = rel15.NrOfSymbols;
+      uint16_t nb_rb       = rel15->rbSize;
+      uint8_t  nb_re_dmrs  = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
+      uint8_t  mod_order   = rel15->qamModOrder[0];
+      uint8_t  nb_symb_sch = rel15->NrOfSymbols;
       
-      available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15.nrOfLayers);
+      available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
       
       for (i = 0; i < available_bits; i++) {
 	

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -311,7 +311,7 @@ int configure_fapi_dl_pdu(int Mod_idP,
   pdsch_pdu_rel15->qamModOrder[0] = 2;
   pdsch_pdu_rel15->mcsIndex[0] = mcs;
   pdsch_pdu_rel15->mcsTable[0] = 0;
-  pdsch_pdu_rel15->rvIndex[0] = 0;
+  pdsch_pdu_rel15->rvIndex[0] = UE_list->UE_sched_ctrl[UE_id].harq_processes[0].round;
   pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
   pdsch_pdu_rel15->nrOfLayers = 1;    
   pdsch_pdu_rel15->transmissionScheme = 0;
@@ -361,10 +361,10 @@ int configure_fapi_dl_pdu(int Mod_idP,
   dci_pdu_rel15[0].time_domain_assignment.val = time_domain_assignment; // row index used here instead of SLIV;
   // mcs ndi and rv
   dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
-  dci_pdu_rel15[0].ndi = 1;
-  dci_pdu_rel15[0].rv = 0;
+  dci_pdu_rel15[0].rv = pdsch_pdu_rel15->rvIndex[0];
   // harq pid
   dci_pdu_rel15[0].harq_pid = 0;
+  dci_pdu_rel15[0].ndi = UE_list->UE_sched_ctrl[UE_id].harq_processes[0].ndi;
   // DAI
   dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3;
   // TPC for PUCCH

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -111,6 +111,11 @@ typedef struct NR_sched_pucch {
   struct NR_sched_pucch *next_sched_pucch;
 } NR_sched_pucch;
 
+typedef struct NR_UE_harq {
+  uint8_t ndi;
+  uint8_t round;
+} NR_UE_harq_t;
+
 /*! \brief scheduling control information set through an API */
 typedef struct {
   uint64_t dlsch_in_slot_bitmap;  // static bitmap signaling which slot in a tdd period contains dlsch
@@ -118,6 +123,7 @@ typedef struct {
   NR_sched_pucch *sched_pucch;
   uint16_t ta_timer;
   int16_t ta_update;
+  NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
 } NR_UE_sched_ctrl_t;
 
 /*! \brief UE list used by eNB to order UEs/CC for scheduling*/