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Commit a7e7899e authored by francescomani's avatar francescomani
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addressing review including clang formatting

parent 4b6ac06b
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Showing with 186 additions and 298 deletions
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ a7e7899e
......@@ -87,7 +87,7 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint8_t dci_format;
uint8_t CoreSetType;
uint8_t coreset_type;
int ss_type;
// n_CCE index of first CCE for PDCCH reception
int n_CCE;
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ a7e7899e
......@@ -935,7 +935,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->dci_list[dci_ind->number_of_dcis].N_CCE = L;
dci_ind->dci_list[dci_ind->number_of_dcis].dci_format = rel15->dci_format_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].ss_type = rel15->dci_type_options[k];
dci_ind->dci_list[dci_ind->number_of_dcis].CoreSetType = rel15->coreset.CoreSetType;
dci_ind->dci_list[dci_ind->number_of_dcis].coreset_type = rel15->coreset.CoreSetType;
int n_rb, rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &rb_offset);
dci_ind->dci_list[dci_ind->number_of_dcis].cset_start = rel15->BWPStart + rb_offset;
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @ a7e7899e
......@@ -608,10 +608,7 @@ typedef struct NR_UE_UL_BWP {
int max_fb_time;
} NR_UE_UL_BWP_t;
typedef enum {
typeA = 0,
typeB = 1
} mappingType_t;
typedef enum { typeA = 0, typeB = 1 } mappingType_t;
typedef struct NR_ul_tda_info {
mappingType_t mapping_type;
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @ a7e7899e
......@@ -419,73 +419,68 @@ const char table_38211_6_3_1_5_5[22][4][2] = {
{{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}} // tpmi 21
};
const uint8_t table_6_1_2_1_1_2[16][4]={
{0,0,0,14}, // row index 1
{0,0,0,12}, // row index 2
{0,0,0,10}, // row index 3
{1,0,2,10}, // row index 4
{1,0,4,10}, // row index 5
{1,0,4,8}, // row index 6
{1,0,4,6}, // row index 7
{0,1,0,14}, // row index 8
{0,1,0,12}, // row index 9
{0,1,0,10}, // row index 10
{0,2,0,14}, // row index 11
{0,2,0,12}, // row index 12
{0,2,0,10}, // row index 13
{1,0,8,6}, // row index 14
{0,3,0,14}, // row index 15
{0,3,0,10} // row index 16
// Default PUSCH time domain resource allocation tables from 38.214
const uint8_t table_6_1_2_1_1_2[16][4] = {
{0, 0, 0, 14}, // row index 1
{0, 0, 0, 12}, // row index 2
{0, 0, 0, 10}, // row index 3
{1, 0, 2, 10}, // row index 4
{1, 0, 4, 10}, // row index 5
{1, 0, 4, 8}, // row index 6
{1, 0, 4, 6}, // row index 7
{0, 1, 0, 14}, // row index 8
{0, 1, 0, 12}, // row index 9
{0, 1, 0, 10}, // row index 10
{0, 2, 0, 14}, // row index 11
{0, 2, 0, 12}, // row index 12
{0, 2, 0, 10}, // row index 13
{1, 0, 8, 6}, // row index 14
{0, 3, 0, 14}, // row index 15
{0, 3, 0, 10} // row index 16
};
const uint8_t table_6_1_2_1_1_3[16][4]={
{0,0,0,8}, // row index 1
{0,0,0,12}, // row index 2
{0,0,0,10}, // row index 3
{1,0,2,10}, // row index 4
{1,0,4,4}, // row index 5
{1,0,4,8}, // row index 6
{1,0,4,6}, // row index 7
{0,1,0,8}, // row index 8
{0,1,0,12}, // row index 9
{0,1,0,10}, // row index 10
{0,2,0,6}, // row index 11
{0,2,0,12}, // row index 12
{0,2,0,10}, // row index 13
{1,0,8,4}, // row index 14
{0,3,0,8}, // row index 15
{0,3,0,10} // row index 16
const uint8_t table_6_1_2_1_1_3[16][4] = {
{0, 0, 0, 8}, // row index 1
{0, 0, 0, 12}, // row index 2
{0, 0, 0, 10}, // row index 3
{1, 0, 2, 10}, // row index 4
{1, 0, 4, 4}, // row index 5
{1, 0, 4, 8}, // row index 6
{1, 0, 4, 6}, // row index 7
{0, 1, 0, 8}, // row index 8
{0, 1, 0, 12}, // row index 9
{0, 1, 0, 10}, // row index 10
{0, 2, 0, 6}, // row index 11
{0, 2, 0, 12}, // row index 12
{0, 2, 0, 10}, // row index 13
{1, 0, 8, 4}, // row index 14
{0, 3, 0, 8}, // row index 15
{0, 3, 0, 10} // row index 16
};
NR_ul_tda_info_t get_ul_tda_info(NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist,
int tda_index,
int scs,
int normal_CP)
NR_ul_tda_info_t get_ul_tda_info(NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist, int tda_index, int scs, bool normal_CP)
{
NR_ul_tda_info_t tda_info = {0};
// Definition of value j in Table 6.1.2.1.1-4 of 38.214
int j = scs == 0 ? 1 : scs;
if(tdalist) {
if(tda_index >= tdalist->list.count) {
LOG_E(MAC, "TDA index from DCI %d exceeds TDA list array size %d\n", tda_index, tdalist->list.count);
return tda_info;
}
if (tdalist) {
AssertFatal(tda_index < tdalist->list.count, "TDA index from DCI %d exceeds TDA list array size %d\n", tda_index, tdalist->list.count);
NR_PUSCH_TimeDomainResourceAllocation_t *tda = tdalist->list.array[tda_index];
tda_info.mapping_type = tda->mappingType;
// As described in 38.331, when the field is absent the UE applies the value 1 when PUSCH SCS is 15/30KHz
// 2 when PUSCH SCS is 60KHz and 3 when PUSCH SCS is 120KHz. This equates to the parameter j.
tda_info.k2 = tda->k2 ? *tda->k2 : j;
int S, L;
SLIV2SL(tda->startSymbolAndLength, &S, &L);
tda_info.startSymbolIndex = S;
tda_info.nrOfSymbols = L;
}
else {
if(normal_CP) {
} else {
if (normal_CP) {
tda_info.mapping_type = table_6_1_2_1_1_2[tda_index][0];
tda_info.k2 = table_6_1_2_1_1_2[tda_index][1] + j;
tda_info.startSymbolIndex = table_6_1_2_1_1_2[tda_index][2];
tda_info.nrOfSymbols = table_6_1_2_1_1_2[tda_index][3];
}
else {
} else {
tda_info.mapping_type = table_6_1_2_1_1_3[tda_index][0];
tda_info.k2 = table_6_1_2_1_1_3[tda_index][1] + j;
tda_info.startSymbolIndex = table_6_1_2_1_1_3[tda_index][2];
......@@ -2777,20 +2772,12 @@ uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset) {
// Set the transform precoding status according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16:
// - "UE procedure for applying transform precoding on PUSCH"
uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP,
nr_dci_format_t dci_format,
uint8_t configuredGrant)
uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP, nr_dci_format_t dci_format, uint8_t configuredGrant)
{
if (configuredGrant &&
current_UL_BWP->configuredGrantConfig &&
current_UL_BWP->configuredGrantConfig->transformPrecoder)
if (configuredGrant && current_UL_BWP->configuredGrantConfig && current_UL_BWP->configuredGrantConfig->transformPrecoder)
return *current_UL_BWP->configuredGrantConfig->transformPrecoder;
if (dci_format == NR_UL_DCI_FORMAT_0_1 &&
current_UL_BWP &&
current_UL_BWP->pusch_Config &&
current_UL_BWP->pusch_Config->transformPrecoder)
if (dci_format == NR_UL_DCI_FORMAT_0_1 && current_UL_BWP && current_UL_BWP->pusch_Config && current_UL_BWP->pusch_Config->transformPrecoder)
return *current_UL_BWP->pusch_Config->transformPrecoder;
else
return current_UL_BWP->rach_ConfigCommon->msg3_transformPrecoder ? 0 : 1;
......@@ -3191,39 +3178,27 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
return nbits;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type)
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type)
{
if(!DL_BWP) return NULL;
if (!DL_BWP)
return NULL;
// see table 5.1.2.1.1-1 in 38.214
if((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) &&
!(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) &&
(DL_BWP->pdsch_Config && DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList))
if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
&& (DL_BWP->pdsch_Config && DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList))
return DL_BWP->pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else
return DL_BWP->tdaList;
}
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type)
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type)
{
if((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) &&
!(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0) &&
(UL_BWP->pusch_Config && UL_BWP->pusch_Config->pusch_TimeDomainAllocationList))
if ((rnti_type == NR_RNTI_CS || rnti_type == NR_RNTI_C || rnti_type == NR_RNTI_MCS_C) && !(ss_type == NR_SearchSpace__searchSpaceType_PR_common && controlResourceSetId == 0)
&& (UL_BWP->pusch_Config && UL_BWP->pusch_Config->pusch_TimeDomainAllocationList))
return UL_BWP->pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
else
return UL_BWP->tdaList;
}
uint16_t get_rb_bwp_dci(nr_dci_format_t format,
int ss_type,
uint16_t cset0_bwp_size,
......@@ -3315,7 +3290,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
dci_pdu->bwp_indicator.nbits = UL_BWP->n_ul_bwp;
else
dci_pdu->bwp_indicator.nbits = 2;
LOG_D(NR_MAC,"BWP indicator nbits %d, num UL BWPs %d\n", dci_pdu->bwp_indicator.nbits, UL_BWP->n_ul_bwp);
LOG_D(NR_MAC, "BWP indicator nbits %d, num UL BWPs %d\n", dci_pdu->bwp_indicator.nbits, UL_BWP->n_ul_bwp);
size += dci_pdu->bwp_indicator.nbits;
// Freq domain assignment
if (pusch_Config) {
......@@ -3333,7 +3308,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
}
else
dci_pdu->frequency_domain_assignment.nbits = (int)ceil(log2((N_RB * (N_RB + 1)) >> 1));
LOG_D(NR_MAC,"PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n", dci_pdu->frequency_domain_assignment.nbits, N_RB);
LOG_D(NR_MAC, "PUSCH Frequency Domain Assignment nbits %d, N_RB %d\n", dci_pdu->frequency_domain_assignment.nbits, N_RB);
size += dci_pdu->frequency_domain_assignment.nbits;
// Time domain assignment
NR_PUSCH_TimeDomainResourceAllocationList_t *tdalistul = get_ul_tdalist(UL_BWP, coreset->controlResourceSetId, ss_type, rnti_type);
......@@ -3342,7 +3317,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
else
num_entries = 16; // num of entries in default table
dci_pdu->time_domain_assignment.nbits = (int)ceil(log2(num_entries));
LOG_D(NR_MAC,"PUSCH Time Domain Allocation nbits %d, pusch_Config %p\n", dci_pdu->time_domain_assignment.nbits, pusch_Config);
LOG_D(NR_MAC, "PUSCH Time Domain Allocation nbits %d, pusch_Config %p\n", dci_pdu->time_domain_assignment.nbits, pusch_Config);
size += dci_pdu->time_domain_assignment.nbits;
// Frequency Hopping flag
if (pusch_Config &&
......@@ -3359,7 +3334,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
size += dci_pdu->dai[0].nbits;
LOG_D(NR_MAC, "DAI1 nbits %d\n", dci_pdu->dai[0].nbits);
// 2nd DAI
if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) { // TODO not sure about that
if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
dci_pdu->dai[1].nbits = 2;
size += dci_pdu->dai[1].nbits;
}
......@@ -3405,8 +3380,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
}
}
// CBGTI
if (UL_BWP->pusch_servingcellconfig &&
UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission != NULL) {
if (UL_BWP->pusch_servingcellconfig && UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission != NULL) {
int num = UL_BWP->pusch_servingcellconfig->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock;
dci_pdu->cbgti.nbits = 2 + (num<<1);
size += dci_pdu->cbgti.nbits;
......@@ -3453,7 +3427,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
break;
case NR_DL_DCI_FORMAT_1_1:
LOG_D(NR_MAC,"DCI_FORMAT 1_1 : pdsch_Config %p, pucch_Config %p\n", pdsch_Config, pucch_Config);
LOG_D(NR_MAC, "DCI_FORMAT 1_1 : pdsch_Config %p, pucch_Config %p\n", pdsch_Config, pucch_Config);
// General note: 0 bits condition is ignored as default nbits is 0.
// Format identifier
size = 1;
......@@ -3561,8 +3535,7 @@ uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
dci_pdu->srs_request.nbits = 3;
size += dci_pdu->srs_request.nbits;
// CBGTI
if (DL_BWP->pdsch_servingcellconfig &&
DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
if (DL_BWP->pdsch_servingcellconfig && DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
uint8_t maxCBGperTB = (DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission->choice.setup->maxCodeBlockGroupsPerTransportBlock + 1) * 2;
long *maxCWperDCI_rrc = pdsch_Config->maxNrofCodeWordsScheduledByDCI;
uint8_t maxCW = (maxCWperDCI_rrc == NULL) ? 1 : *maxCWperDCI_rrc;
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @ a7e7899e
......@@ -84,20 +84,11 @@ uint8_t compute_precoding_information(NR_PUSCH_Config_t *pusch_Config,
const uint8_t *nrOfLayers,
uint32_t *val);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type);
NR_PDSCH_TimeDomainResourceAllocationList_t *get_dl_tdalist(const NR_UE_DL_BWP_t *DL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP,
int controlResourceSetId,
int ss_type,
nr_rnti_type_t rnti_type);
NR_PUSCH_TimeDomainResourceAllocationList_t *get_ul_tdalist(const NR_UE_UL_BWP_t *UL_BWP, int controlResourceSetId, int ss_type, nr_rnti_type_t rnti_type);
NR_ul_tda_info_t get_ul_tda_info(NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist,
int tda_index,
int scs,
int normal_CP);
NR_ul_tda_info_t get_ul_tda_info(NR_PUSCH_TimeDomainResourceAllocationList_t *tdalist, int tda_index, int scs, bool normal_CP);
uint16_t nr_dci_size(const NR_UE_DL_BWP_t *DL_BWP,
const NR_UE_UL_BWP_t *UL_BWP,
......@@ -281,9 +272,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
@param rnti_type rnti type
@param configuredGrant indicates whether a configured grant was received or not
@returns transformPrecoding value */
uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP,
nr_dci_format_t dci_format,
uint8_t configuredGrant);
uint8_t get_transformPrecoding(const NR_UE_UL_BWP_t *current_UL_BWP, nr_dci_format_t dci_format, uint8_t configuredGrant);
void nr_mac_gNB_rrc_ul_failure(const module_id_t Mod_instP,
const int CC_idP,
......
openair2/LAYER2/NR_MAC_UE/config_ue.c
View file @ a7e7899e
......@@ -564,15 +564,15 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
ul_genericParameters = bwp_dlcommon->genericParameters;
DL_BWP->pdsch_Config = NULL;
if(bwp_dlcommon->pdsch_ConfigCommon)
if (bwp_dlcommon->pdsch_ConfigCommon)
DL_BWP->tdaList = bwp_dlcommon->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(bwp_ulcommon->pusch_ConfigCommon) {
if (bwp_ulcommon->pusch_ConfigCommon) {
UL_BWP->tdaList = bwp_ulcommon->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
UL_BWP->msg3_DeltaPreamble = bwp_ulcommon->pusch_ConfigCommon->choice.setup->msg3_DeltaPreamble;
}
if(bwp_ulcommon->pucch_ConfigCommon)
if (bwp_ulcommon->pucch_ConfigCommon)
UL_BWP->pucch_ConfigCommon = bwp_ulcommon->pucch_ConfigCommon->choice.setup;
if(bwp_ulcommon->rach_ConfigCommon)
if (bwp_ulcommon->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_ulcommon->rach_ConfigCommon->choice.setup;
}
......@@ -583,11 +583,10 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
}
if (cell_group_config->spCellConfig &&
cell_group_config->spCellConfig->spCellConfigDedicated) {
struct NR_ServingCellConfig *spCellConfigDedicated = cell_group_config->spCellConfig->spCellConfigDedicated;
UL_BWP->csi_MeasConfig = spCellConfigDedicated->csi_MeasConfig ? spCellConfigDedicated->csi_MeasConfig->choice.setup : NULL;
UL_BWP->pusch_servingcellconfig = spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ?
spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
UL_BWP->pusch_servingcellconfig =
spCellConfigDedicated->uplinkConfig && spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig ? spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup : NULL;
DL_BWP->pdsch_servingcellconfig = spCellConfigDedicated->pdsch_ServingCellConfig ? spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup : NULL;
if (spCellConfigDedicated->firstActiveDownlinkBWP_Id)
......@@ -595,17 +594,17 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
if (spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id)
UL_BWP->bwp_id = *spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id;
if(mac->scc) {
if (mac->scc) {
bwp_dlcommon = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
bwp_ulcommon = mac->scc->uplinkConfigCommon->initialUplinkBWP;
}
if(mac->scc_SIB) {
if (mac->scc_SIB) {
bwp_dlcommon = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
bwp_ulcommon = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
NR_BWP_Downlink_t *bwp_downlink = NULL;
const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = spCellConfigDedicated->downlinkBWP_ToAddModList;
if(bwpList)
if (bwpList)
DL_BWP->n_dl_bwp = bwpList->list.count;
if (bwpList && DL_BWP->bwp_id > 0) {
for (int i = 0; i < bwpList->list.count; i++) {
......@@ -643,9 +642,9 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
UL_BWP->pucch_Config = bwp_uplink->bwp_Dedicated->pucch_Config->choice.setup;
UL_BWP->srs_Config = bwp_uplink->bwp_Dedicated->srs_Config->choice.setup;
UL_BWP->configuredGrantConfig = bwp_uplink->bwp_Dedicated->configuredGrantConfig ? bwp_uplink->bwp_Dedicated->configuredGrantConfig->choice.setup : NULL;
if(bwp_uplink->bwp_Common->pucch_ConfigCommon)
if (bwp_uplink->bwp_Common->pucch_ConfigCommon)
UL_BWP->pucch_ConfigCommon = bwp_uplink->bwp_Common->pucch_ConfigCommon->choice.setup;
if(bwp_uplink->bwp_Common->rach_ConfigCommon)
if (bwp_uplink->bwp_Common->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_uplink->bwp_Common->rach_ConfigCommon->choice.setup;
}
else {
......@@ -653,10 +652,10 @@ void configure_current_BWP(NR_UE_MAC_INST_t *mac,
UL_BWP->pusch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pusch_Config->choice.setup;
UL_BWP->pucch_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
UL_BWP->srs_Config = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
UL_BWP->configuredGrantConfig = spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig ?
spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig->choice.setup : NULL;
UL_BWP->configuredGrantConfig =
spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig ? spCellConfigDedicated->uplinkConfig->initialUplinkBWP->configuredGrantConfig->choice.setup : NULL;
ul_genericParameters = bwp_ulcommon->genericParameters;
if(bwp_ulcommon->rach_ConfigCommon)
if (bwp_ulcommon->rach_ConfigCommon)
UL_BWP->rach_ConfigCommon = bwp_ulcommon->rach_ConfigCommon->choice.setup;
}
}
......
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @ a7e7899e
......@@ -255,9 +255,9 @@ NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_I
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mapping_type,
uint8_t time_domain_ind,
uint8_t time_domain_ind,
int default_abc,
bool use_default);
......@@ -474,12 +474,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti);
// - 6.1.4.2 of TS 38.214
// - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_ul_tda_info_t *tda_info,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
uint16_t rnti,
uint8_t *dci_format);
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, NR_ul_tda_info_t *tda_info, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, uint8_t *dci_format);
#endif
/** @}*/
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
View file @ a7e7899e
......@@ -140,7 +140,6 @@ void init_RA(module_id_t mod_id,
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric,
NR_RACH_ConfigDedicated_t *rach_ConfigDedicated)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
RA_config_t *ra = &mac->ra;
......@@ -279,11 +278,9 @@ void init_RA(module_id_t mod_id,
}
}
/* TS 38.321 subclause 7.3 - return DELTA_PREAMBLE values in dB */
int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_format)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP.rach_ConfigCommon;
NR_SubcarrierSpacing_t scs = *nr_rach_ConfigCommon->msg1_SubcarrierSpacing;
......@@ -387,7 +384,6 @@ int8_t nr_get_DELTA_PREAMBLE(module_id_t mod_id, int CC_id, uint16_t prach_forma
// returns receivedTargerPower in dBm
int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t mod_id, uint8_t CC_id)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(mod_id);
int8_t receivedTargerPower;
int8_t delta_preamble;
......@@ -405,7 +401,6 @@ int nr_get_Po_NOMINAL_PUSCH(NR_PRACH_RESOURCES_t *prach_resources, module_id_t m
void ssb_rach_config(RA_config_t *ra, NR_PRACH_RESOURCES_t *prach_resources, NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon)
{
// Determine the SSB to RACH mapping ratio
// =======================================
......@@ -494,7 +489,7 @@ void ra_preambles_config(NR_PRACH_RESOURCES_t *prach_resources, NR_UE_MAC_INST_t
NR_RACH_ConfigCommon_t *setup = mac->current_UL_BWP.rach_ConfigCommon;
NR_RACH_ConfigGeneric_t *rach_ConfigGeneric = &setup->rach_ConfigGeneric;
if (mac->current_UL_BWP.msg3_DeltaPreamble){
if (mac->current_UL_BWP.msg3_DeltaPreamble) {
deltaPreamble_Msg3 = (*mac->current_UL_BWP.msg3_DeltaPreamble) * 2; // dB
LOG_D(MAC, "In %s: deltaPreamble_Msg3 set to %ld\n", __FUNCTION__, deltaPreamble_Msg3);
}
......
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @ a7e7899e
......@@ -162,21 +162,24 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
// computing alternative size for padding
dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0)
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP,
mac->cg, &temp_pdu,
NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
alt_size =
nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
if(dci_format == NR_UL_DCI_FORMAT_0_0)
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP,
mac->cg, &temp_pdu,
NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
alt_size =
nr_dci_size(current_DL_BWP, current_UL_BWP, mac->cg, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, dl_bwp_id, ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, 0);
}
rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP, current_UL_BWP,
mac->cg, &mac->def_dci_pdu_rel15[dci_format],
dci_format, NR_RNTI_TC, coreset, dl_bwp_id,
ss->searchSpaceType->present, mac->type0_PDCCH_CSS_config.num_rbs, alt_size);
rel15->dci_length_options[i] = nr_dci_size(current_DL_BWP,
current_UL_BWP,
mac->cg,
&mac->def_dci_pdu_rel15[dci_format],
dci_format,
NR_RNTI_TC,
coreset,
dl_bwp_id,
ss->searchSpaceType->present,
mac->type0_PDCCH_CSS_config.num_rbs,
alt_size);
rel15->BWPStart = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.cset_start_rb : current_DL_BWP->BWPStart;
rel15->BWPSize = coreset_id == 0 ? mac->type0_PDCCH_CSS_config.num_rbs : current_DL_BWP->BWPSize;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ a7e7899e
......@@ -412,13 +412,12 @@ int8_t nr_ue_process_dci_freq_dom_resource_assignment(nfapi_nr_ue_pusch_pdu_t *p
int8_t nr_ue_process_dci_time_dom_resource_assignment(NR_UE_MAC_INST_t *mac,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
int *mapping_type,
uint8_t time_domain_ind,
uint8_t time_domain_ind,
int default_abc,
bool use_default)
{
int dmrs_typeA_pos = (mac->scc != NULL) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position;
// uint8_t k_offset=0;
......@@ -489,7 +488,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
uint16_t rnti = dci_ind->rnti;
uint8_t dci_format = dci_ind->dci_format;
int coreset_type = dci_ind->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; // 0 for coreset0, 1 otherwise
int coreset_type = dci_ind->coreset_type == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG; // 0 for coreset0, 1 otherwise
int ret = 0;
int pucch_res_set_cnt = 0, valid = 0;
frame_t frame_tx = 0;
......@@ -506,7 +505,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_D(MAC, "In %s: Processing received DCI format %s\n", __FUNCTION__, dci_formats[dci_format]);
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
int normal_CP = current_UL_BWP->cyclicprefix ? 0 : 1;
bool normal_CP = current_UL_BWP->cyclicprefix ? false : true;
NR_ul_tda_info_t tda_info = {0};
NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
......@@ -535,7 +534,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Schedule PUSCH
pusch_TimeDomainAllocationList = get_ul_tdalist(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
tda_info = get_ul_tda_info(pusch_TimeDomainAllocationList, dci->time_domain_assignment.val, current_UL_BWP->scs, normal_CP);
if(tda_info.nrOfSymbols == 0)
if (tda_info.nrOfSymbols == 0)
ret = -1;
else
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
......@@ -558,9 +557,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Config PUSCH PDU
ret = nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, dci, NULL, rnti, &dci_format);
}
else
LOG_E(MAC,"Cannot schedule PUSCH\n");
} else
LOG_E(MAC, "Cannot schedule PUSCH\n");
break;
}
......@@ -601,7 +599,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Schedule PUSCH
pusch_TimeDomainAllocationList = get_ul_tdalist(current_UL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
tda_info = get_ul_tda_info(pusch_TimeDomainAllocationList, dci->time_domain_assignment.val, current_UL_BWP->scs, normal_CP);
if(tda_info.nrOfSymbols == 0)
if (tda_info.nrOfSymbols == 0)
ret = -1;
else
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
......@@ -626,9 +624,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
// Config PUSCH PDU
ret = nr_config_pusch_pdu(mac, &tda_info, pusch_config_pdu, dci, NULL, rnti, &dci_format);
}
else
LOG_E(MAC,"Cannot schedule PUSCH\n");
} else
LOG_E(MAC, "Cannot schedule PUSCH\n");
break;
}
......@@ -710,7 +707,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
} else {
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
}
if((ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti)) {
if ((ra->RA_window_cnt >= 0 && rnti == ra->ra_rnti) || (rnti == ra->t_crnti)) {
if (mac->scc == NULL) // use coreset0
is_common = 1;
}
......@@ -726,21 +723,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int mappingtype;
/* TIME_DOM_RESOURCE_ASSIGNMENT */
pdsch_TimeDomainAllocationList = get_dl_tdalist(current_DL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
if (nr_ue_process_dci_time_dom_resource_assignment(mac,pdsch_TimeDomainAllocationList,
dlsch_config_pdu_1_0,&mappingtype,
dci->time_domain_assignment.val,
default_abc,rnti==SI_RNTI) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pdsch_TimeDomainAllocationList, dlsch_config_pdu_1_0, &mappingtype, dci->time_domain_assignment.val, default_abc, rnti == SI_RNTI) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
if(pdsch_TimeDomainAllocationList)
if (pdsch_TimeDomainAllocationList)
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = NULL;
if(pdsch_config)
dl_dmrs_config = (mappingtype == typeA) ?
pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
if (pdsch_config)
dl_dmrs_config = (mappingtype == typeA) ? pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup : pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
dlsch_config_pdu_1_0->nscid = 0;
if(dl_dmrs_config && dl_dmrs_config->scramblingID0)
......@@ -824,16 +816,16 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3;
// Sanity check for pucch_resource_indicator value received to check for false DCI.
valid = 0;
if(pucch_Config &&
pucch_Config->resourceSetToAddModList) {
if (pucch_Config && pucch_Config->resourceSetToAddModList) {
pucch_res_set_cnt = pucch_Config->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dci->pucch_resource_indicator < pucch_Config->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1;
break;
}
if (dci->pucch_resource_indicator < pucch_Config->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1;
break;
}
}
} else valid=1;
} else
valid = 1;
if (!valid) {
LOG_W(MAC, "[%d.%d] pucch_resource_indicator value %d is out of bounds. Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dci->pucch_resource_indicator);
return -1;
......@@ -941,9 +933,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int mappingtype;
pdsch_TimeDomainAllocationList = get_dl_tdalist(current_DL_BWP, coreset_type, dci_ind->ss_type, get_rnti_type(mac, rnti));
if (nr_ue_process_dci_time_dom_resource_assignment(mac,pdsch_TimeDomainAllocationList,
dlsch_config_pdu_1_1,&mappingtype,
dci->time_domain_assignment.val,0,false) < 0) {
if (nr_ue_process_dci_time_dom_resource_assignment(mac, pdsch_TimeDomainAllocationList, dlsch_config_pdu_1_1, &mappingtype, dci->time_domain_assignment.val, 0, false) < 0) {
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
......@@ -1340,11 +1330,10 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
pucch_pdu->prb_start = RB_BWP_offset + (pucch->initial_pucch_id / N_CS);
pucch_pdu->second_hop_prb = pucch_pdu->bwp_size - 1 - RB_BWP_offset - (pucch->initial_pucch_id / N_CS);
pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch_resourcecommon].initial_CS_indexes[pucch->initial_pucch_id % N_CS];
}
else {
} else {
pucch_pdu->prb_start = pucch_pdu->bwp_size - 1 - RB_BWP_offset - ((pucch->initial_pucch_id - 8) / N_CS);
pucch_pdu->second_hop_prb = RB_BWP_offset + ((pucch->initial_pucch_id - 8) / N_CS);
pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch_resourcecommon].initial_CS_indexes[(pucch->initial_pucch_id - 8) % N_CS];
pucch_pdu->initial_cyclic_shift = initial_pucch_resource[pucch_resourcecommon].initial_CS_indexes[(pucch->initial_pucch_id - 8) % N_CS];
}
pucch_pdu->freq_hop_flag = 1;
pucch_pdu->time_domain_occ_idx = 0;
......@@ -1360,14 +1349,10 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
NR_PUCCH_Resource_t *pucchres = pucch->pucch_resource;
if (current_UL_BWP->harq_ACK_SpatialBundlingPUCCH != NULL ||
*current_DL_BWP->pdsch_HARQ_ACK_Codebook != 1) {
if (current_UL_BWP->harq_ACK_SpatialBundlingPUCCH != NULL || *current_DL_BWP->pdsch_HARQ_ACK_Codebook != 1) {
LOG_E(MAC,"PUCCH Unsupported cell group configuration\n");
return;
}
else if (current_DL_BWP &&
current_DL_BWP->pdsch_servingcellconfig &&
current_DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
} else if (current_DL_BWP && current_DL_BWP->pdsch_servingcellconfig && current_DL_BWP->pdsch_servingcellconfig->codeBlockGroupTransmission != NULL) {
LOG_E(MAC,"PUCCH Unsupported code block group for serving cell config\n");
return;
}
......@@ -1382,7 +1367,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
}
NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
AssertFatal(pucch_Config,"no pucch_Config\n");
AssertFatal(pucch_Config, "no pucch_Config\n");
pucch_pdu->bwp_size = current_UL_BWP->BWPSize;
pucch_pdu->bwp_start = current_UL_BWP->BWPStart;
......@@ -1543,7 +1528,6 @@ int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac,
int subframe_number,
int O_ACK, int O_SR,
int O_CSI, int O_CRC) {
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
int PUCCH_POWER_DEFAULT = 0;
int16_t P_O_NOMINAL_PUCCH = *current_UL_BWP->pucch_ConfigCommon->p0_nominal;
......@@ -1703,9 +1687,7 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) {
*/
/* look for the first resource set which supports uci_size number of bits for payload */
while (pucch_resource_set_id < MAX_NB_OF_PUCCH_RESOURCE_SETS) {
if (pucch_Config &&
pucch_Config->resourceSetToAddModList &&
pucch_Config->resourceSetToAddModList->list.array[pucch_resource_set_id] != NULL) {
if (pucch_Config && pucch_Config->resourceSetToAddModList && pucch_Config->resourceSetToAddModList->list.array[pucch_resource_set_id] != NULL) {
// PUCCH with format0 can be up to 3 bits (2 ack/nacks + 1 sr is 3 max bits)
if (uci_size <= 3) {
pucch_resource_set_id = 0;
......@@ -1744,18 +1726,12 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, int uci_size) {
*
*********************************************************************/
void select_pucch_resource(NR_UE_MAC_INST_t *mac,
PUCCH_sched_t *pucch)
void select_pucch_resource(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch)
{
NR_PUCCH_ResourceId_t *current_resource_id = NULL;
NR_PUCCH_Config_t *pucch_Config = mac->current_UL_BWP.pucch_Config;
int n_list;
if (pucch->is_common == 1 ||
!pucch_Config ||
!pucch_Config->resourceSetToAddModList ||
pucch_Config->resourceSetToAddModList->list.array[0] == NULL) {
if (pucch->is_common == 1 || !pucch_Config || !pucch_Config->resourceSetToAddModList || pucch_Config->resourceSetToAddModList->list.array[0] == NULL) {
/* see TS 38.213 9.2.1 PUCCH Resource Sets */
int delta_PRI = pucch->resource_indicator;
int n_CCE_0 = pucch->n_CCE;
......@@ -1766,8 +1742,7 @@ void select_pucch_resource(NR_UE_MAC_INST_t *mac,
int r_PUCCH = ((2 * n_CCE_0)/N_CCE_0) + (2 * delta_PRI);
pucch->initial_pucch_id = r_PUCCH;
pucch->pucch_resource = NULL;
}
else {
} else {
struct NR_PUCCH_Config__resourceSetToAddModList *resourceSetToAddModList = pucch_Config->resourceSetToAddModList;
struct NR_PUCCH_Config__resourceToAddModList *resourceToAddModList = pucch_Config->resourceToAddModList;
n_list = resourceSetToAddModList->list.count;
......@@ -1850,10 +1825,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
NR_UE_DL_BWP_t *current_DL_BWP = &mac->current_DL_BWP;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
if (current_DL_BWP &&
current_DL_BWP->pdsch_Config &&
current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI &&
current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI[0] == 2) {
if (current_DL_BWP && current_DL_BWP->pdsch_Config && current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI && current_DL_BWP->pdsch_Config->maxNrofCodeWordsScheduledByDCI[0] == 2) {
two_transport_blocks = true;
number_of_code_word = 2;
}
......@@ -1878,8 +1850,7 @@ uint8_t get_downlink_ack(NR_UE_MAC_INST_t *mac,
sched_frame = (sched_frame + 1) % 1024;
}
AssertFatal(sched_slot < slots_per_frame, "sched_slot was calculated incorrect %d\n", sched_slot);
LOG_D(PHY,"HARQ pid %d is active for %d.%d (dl_slot %d, feedback_to_ul %d\n",
dl_harq_pid, sched_frame,sched_slot,current_harq->dl_slot,current_harq->feedback_to_ul);
LOG_D(PHY, "HARQ pid %d is active for %d.%d (dl_slot %d, feedback_to_ul %d\n", dl_harq_pid, sched_frame, sched_slot, current_harq->dl_slot, current_harq->feedback_to_ul);
/* check if current tx slot should transmit downlink acknowlegment */
if (sched_frame == frame && sched_slot == slot) {
if (get_softmodem_params()->emulate_l1) {
......@@ -2136,8 +2107,7 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac,
NR_PUCCH_Config_t *pucch_Config = current_UL_BWP->pucch_Config;
int csi_bits = 0;
if(current_UL_BWP->csi_MeasConfig) {
if (current_UL_BWP->csi_MeasConfig) {
NR_CSI_MeasConfig_t *csi_measconfig = current_UL_BWP->csi_MeasConfig;
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
......@@ -3771,10 +3741,10 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
// Schedule Msg3
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
int normal_CP = current_UL_BWP->cyclicprefix ? 0 : 1;
bool normal_CP = current_UL_BWP->cyclicprefix ? false : true;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = get_ul_tdalist(current_UL_BWP, *ra->ss->controlResourceSetId, ra->ss->searchSpaceType->present, NR_RNTI_RA);
NR_ul_tda_info_t tda_info = get_ul_tda_info(pusch_TimeDomainAllocationList, rar_grant.Msg3_t_alloc, current_UL_BWP->scs, normal_CP);
if(tda_info.nrOfSymbols == 0) {
if (tda_info.nrOfSymbols == 0) {
LOG_E(MAC, "Cannot schedule Msg3. Something wrong in TDA information\n");
return -1;
}
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ a7e7899e
......@@ -136,9 +136,8 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
return &mac->ul_config_request[index];
}
void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
{
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
NR_SRS_Config_t *srs_config = current_UL_BWP->srs_Config;
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP->pusch_Config;
......@@ -272,13 +271,12 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
// todo: this function shall be reviewed completely because of the many comments left by the author
void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
{
uint8_t rank = pusch_config_pdu->nrOfLayers;
NR_PUSCH_Config_t *pusch_Config = mac->current_UL_BWP.pusch_Config;
AssertFatal(pusch_Config!=NULL,"pusch_Config shouldn't be null\n");
long transformPrecoder = get_transformPrecoding(&mac->current_UL_BWP, dci_format, 0);
long transformPrecoder = get_transformPrecoding(&mac->current_UL_BWP, dci_format, 0);
long *max_length = NULL;
long *dmrs_type = NULL;
LOG_D(NR_MAC,"transformPrecoder %s\n",transformPrecoder==NR_PUSCH_Config__transformPrecoder_disabled?"disabled":"enabled");
......@@ -451,13 +449,7 @@ void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_
// - 6.1.4.2 of TS 38.214
// - 6.4.1.1.1 of TS 38.211
// - 6.3.1.7 of 38.211
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_ul_tda_info_t *tda_info,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
RAR_grant_t *rar_grant,
uint16_t rnti,
uint8_t *dci_format)
int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, NR_ul_tda_info_t *tda_info, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, RAR_grant_t *rar_grant, uint16_t rnti, uint8_t *dci_format)
{
int f_alloc;
......@@ -518,10 +510,11 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->start_symbol_index = tda_info->startSymbolIndex;
pusch_config_pdu->nr_of_symbols = tda_info->nrOfSymbols;
l_prime_mask = get_l_prime(tda_info->nrOfSymbols, tda_info->mapping_type, add_pos, dmrslength, tda_info->startSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
l_prime_mask =
get_l_prime(tda_info->nrOfSymbols, tda_info->mapping_type, add_pos, dmrslength, tda_info->startSymbolIndex, mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
LOG_D(NR_MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d, DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, tda_info->mapping_type, l_prime_mask);
#ifdef DEBUG_MSG3
#ifdef DEBUG_MSG3
LOG_D(NR_MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
#endif
......@@ -714,15 +707,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
}
// Num PRB Overhead from PUSCH-ServingCellConfig
if (current_UL_BWP->pusch_servingcellconfig &&
current_UL_BWP->pusch_servingcellconfig->xOverhead)
if (current_UL_BWP->pusch_servingcellconfig && current_UL_BWP->pusch_servingcellconfig->xOverhead)
N_PRB_oh = *current_UL_BWP->pusch_servingcellconfig->xOverhead;
else
N_PRB_oh = 0;
if (current_UL_BWP->pusch_servingcellconfig &&
current_UL_BWP->pusch_servingcellconfig->rateMatching) {
long *maxMIMO_Layers = current_UL_BWP->pusch_servingcellconfig->ext1->maxMIMO_Layers;
if (current_UL_BWP->pusch_servingcellconfig && current_UL_BWP->pusch_servingcellconfig->rateMatching) {
long *maxMIMO_Layers = current_UL_BWP->pusch_servingcellconfig->ext1->maxMIMO_Layers;
if (!maxMIMO_Layers)
maxMIMO_Layers = pusch_Config ? pusch_Config->maxRank : NULL;
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
......@@ -730,29 +721,30 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->tbslbrm = nr_compute_tbslbrm(pusch_config_pdu->mcs_table,
bw_tbslbrm,
*maxMIMO_Layers);
}
else
} else
pusch_config_pdu->tbslbrm = 0;
/* PTRS */
if (pusch_Config &&
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB &&
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (pusch_Config && pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB && pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) {
nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;
pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list;
valid_ptrs_setup = set_ul_ptrs_values(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup,
pusch_config_pdu->rb_size, pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table,
&pusch_config_pdu->pusch_ptrs.ptrs_freq_density,&pusch_config_pdu->pusch_ptrs.ptrs_time_density,
&pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_config_pdu->pusch_ptrs.num_ptrs_ports,
&pusch_config_pdu->pusch_ptrs.ul_ptrs_power, pusch_config_pdu->nr_of_symbols);
pusch_config_pdu->rb_size,
pusch_config_pdu->mcs_index,
pusch_config_pdu->mcs_table,
&pusch_config_pdu->pusch_ptrs.ptrs_freq_density,
&pusch_config_pdu->pusch_ptrs.ptrs_time_density,
&pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,
&pusch_config_pdu->pusch_ptrs.num_ptrs_ports,
&pusch_config_pdu->pusch_ptrs.ul_ptrs_power,
pusch_config_pdu->nr_of_symbols);
if(valid_ptrs_setup==true) {
pusch_config_pdu->pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS;
}
LOG_D(NR_MAC, "UL PTRS values: PTRS time den: %d, PTRS freq den: %d\n", pusch_config_pdu->pusch_ptrs.ptrs_time_density, pusch_config_pdu->pusch_ptrs.ptrs_freq_density);
}
}
}
LOG_D(NR_MAC, "In %s: received UL grant (rb_start %d, rb_size %d, start_symbol_index %d, nr_of_symbols %d) for RNTI type %s \n",
......@@ -1411,17 +1403,14 @@ int nr_get_sf_retxBSRTimer(uint8_t sf_offset) {
// PUSCH Msg3 scheduler:
// - scheduled by RAR UL grant according to 8.3 of TS 38.213
// Note: Msg3 tx in the uplink symbols of mixed slot
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
uint8_t is_Msg3,
frame_t current_frame,
int current_slot,
frame_t *frame_tx,
int *slot_tx,
long k2){
int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac, uint8_t is_Msg3, frame_t current_frame, int current_slot, frame_t *frame_tx, int *slot_tx, long k2)
{
AssertFatal(k2 >= DURATION_RX_TO_TX,
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). K2 set according to min_rxtxtime in config file.\n",
k2,DURATION_RX_TO_TX);
"Slot offset K2 (%ld) cannot be less than DURATION_RX_TO_TX (%d). Please set min_rxtxtime at least to %d in gNB config file or gNBs.[0].min_rxtxtime=%d via command line.\n",
k2,
DURATION_RX_TO_TX,
DURATION_RX_TO_TX,
DURATION_RX_TO_TX);
int delta = 0;
NR_UE_UL_BWP_t *current_UL_BWP = &mac->current_UL_BWP;
......@@ -1450,8 +1439,11 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
}
AssertFatal((k2 + delta) >= DURATION_RX_TO_TX,
"Slot offset (%ld) for Msg3 cannot be less than DURATION_RX_TO_TX (%d)\n",
k2 + delta, DURATION_RX_TO_TX);
"Slot offset (%ld) for Msg3 cannot be less than DURATION_RX_TO_TX (%d). Please set min_rxtxtime at least to %d in gNB config file or gNBs.[0].min_rxtxtime=%d via command line.\n",
k2,
DURATION_RX_TO_TX,
DURATION_RX_TO_TX,
DURATION_RX_TO_TX);
*slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
if (current_slot + k2 + delta > nr_slots_per_frame[mu]){
......@@ -1463,7 +1455,7 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
} else {
if (k2 < 0) { // This can happen when a false DCI is received
LOG_W(PHY,"%d.%d. Received k2 %ld\n", current_frame, current_slot, k2);
LOG_W(PHY, "%d.%d. Received k2 %ld\n", current_frame, current_slot, k2);
return -1;
}
......@@ -1473,10 +1465,9 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
}
LOG_D(NR_MAC, "In %s: currently at [%d.%d] UL transmission in [%d.%d] (k2 %ld delta %d)\n", __FUNCTION__, current_frame, current_slot, *frame_tx, *slot_tx, k2, delta);
LOG_D(NR_MAC, "[%04d.%02d] UL transmission in [%04d.%02d] (k2 %ld delta %d)\n", current_frame, current_slot, *frame_tx, *slot_tx, k2, delta);
return 0;
}
// Build the list of all the valid RACH occasions in the maximum association pattern period according to the PRACH config
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ a7e7899e
......@@ -563,9 +563,8 @@ bool nr_find_nb_rb(uint16_t Qm,
return *tbs >= bytes && *nb_rb <= nb_rb_max;
}
NR_tda_info_t nr_get_pdsch_tda_info(const NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList,
const int tda) {
NR_tda_info_t nr_get_pdsch_tda_info(const NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList, const int tda)
{
NR_tda_info_t tda_info = {0};
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
tda_info.mapping_type = tdaList->list.array[tda]->mappingType;
......@@ -1077,13 +1076,8 @@ void set_r_pucch_parms(int rsetindex,
*start_symbol_index = default_pucch_firstsymb[rsetindex];
}
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
const NR_UE_DL_BWP_t *current_BWP,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format)
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, const NR_UE_DL_BWP_t *current_BWP, const NR_ControlResourceSet_t *coreset, dci_pdu_rel15_t *dci_pdu_rel15, nr_dci_format_t format)
{
AssertFatal(CellGroup!=NULL,"CellGroup shouldn't be null here\n");
const NR_PDSCH_Config_t *pdsch_Config = current_BWP ? current_BWP->pdsch_Config : NULL;
......@@ -1157,7 +1151,6 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
}
}
void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *CellGroup,
const NR_UE_DL_BWP_t *current_DL_BWP,
......@@ -1189,22 +1182,16 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// computing alternative size for padding
dci_pdu_rel15_t temp_pdu;
if(dci_format == NR_DL_DCI_FORMAT_1_0)
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP,
CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type,
coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, &temp_pdu, NR_UL_DCI_FORMAT_0_0, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
if(dci_format == NR_UL_DCI_FORMAT_0_0)
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP,
CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type,
coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
alt_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, &temp_pdu, NR_DL_DCI_FORMAT_1_0, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, 0);
}
else
N_RB = cset0_bwp_size;
int dci_size = nr_dci_size(current_DL_BWP, current_UL_BWP,
CellGroup, dci_pdu_rel15, dci_format, rnti_type, coreset,
bwp_id, ss->searchSpaceType->present, cset0_bwp_size, alt_size);
int dci_size = nr_dci_size(current_DL_BWP, current_UL_BWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, coreset, bwp_id, ss->searchSpaceType->present, cset0_bwp_size, alt_size);
pdcch_dci_pdu->PayloadSizeBits = dci_size;
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
......@@ -2088,8 +2075,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
int target_ss;
if(CellGroup &&
CellGroup->physicalCellGroupConfig)
if (CellGroup && CellGroup->physicalCellGroupConfig)
DL_BWP->pdsch_HARQ_ACK_Codebook = &CellGroup->physicalCellGroupConfig->pdsch_HARQ_ACK_Codebook;
if (CellGroup &&
......@@ -2227,11 +2213,10 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
else
UL_BWP->transform_precoding = *UL_BWP->pusch_Config->transformPrecoder;
if(UL_BWP->bwp_id > 0) {
if (UL_BWP->bwp_id > 0) {
UL_BWP->pucch_ConfigCommon = ul_bwp->bwp_Common->pucch_ConfigCommon->choice.setup;
UL_BWP->rach_ConfigCommon = ul_bwp->bwp_Common->rach_ConfigCommon->choice.setup;
}
else {
} else {
UL_BWP->pucch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup;
UL_BWP->rach_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
View file @ a7e7899e
......@@ -1015,10 +1015,7 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
}
}
void set_pucch_allocation(const NR_UE_UL_BWP_t *ul_bwp,
const int r_pucch,
const int bwp_size,
NR_sched_pucch_t *pucch)
void set_pucch_allocation(const NR_UE_UL_BWP_t *ul_bwp, const int r_pucch, const int bwp_size, NR_sched_pucch_t *pucch)
{
if(r_pucch<0){
const NR_PUCCH_Resource_t *resource = ul_bwp->pucch_Config->resourceToAddModList->list.array[0];
......
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ a7e7899e
......@@ -277,11 +277,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
NR_ControlResourceSet_t *coreset,
uint16_t cset0_bwp_size);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
const NR_UE_DL_BWP_t *current_BWP,
const NR_ControlResourceSet_t *coreset,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup, const NR_UE_DL_BWP_t *current_BWP, const NR_ControlResourceSet_t *coreset, dci_pdu_rel15_t *dci_pdu_rel15, nr_dci_format_t format);
void set_r_pucch_parms(int rsetindex,
int r_pucch,
......@@ -307,8 +303,7 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
int time_domain_assignment,
int mu);
NR_tda_info_t nr_get_pdsch_tda_info(const NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList,
const int tda);
NR_tda_info_t nr_get_pdsch_tda_info(const NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList, const int tda);
NR_tda_info_t nr_get_pusch_tda_info(const NR_UE_UL_BWP_t *ul_bwp,
const int tda);
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ a7e7899e
......@@ -667,7 +667,7 @@ static void fill_dci_from_dl_config(nr_downlink_indication_t*dl_ind, fapi_nr_dl_
if (rel15_dci->dci_length_options[j] == dl_ind->dci_ind->dci_list[k].payloadSize) {
dl_ind->dci_ind->dci_list[k].dci_format = rel15_dci->dci_format_options[j];
dl_ind->dci_ind->dci_list[k].ss_type = rel15_dci->dci_type_options[j];
dl_ind->dci_ind->dci_list[k].CoreSetType = rel15_dci->coreset.CoreSetType;
dl_ind->dci_ind->dci_list[k].coreset_type = rel15_dci->coreset.CoreSetType;
LOG_D(NR_PHY, "format assigned dl_ind->dci_ind->dci_list[k].dci_format %d\n",
dl_ind->dci_ind->dci_list[k].dci_format);
}
......
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