Commit c5bc4424 authored by Jaroslava Fiedlerova's avatar Jaroslava Fiedlerova

Merge remote-tracking branch 'origin/better-log-ue-sync' into integration_2024_w13

parents c9265000 f4ac4fee
...@@ -1127,15 +1127,15 @@ class OaiCiTest(): ...@@ -1127,15 +1127,15 @@ class OaiCiTest():
mib_found = True mib_found = True
except Exception as e: except Exception as e:
logging.error(f'\033[91m MIB marker was not found \033[0m') logging.error(f'\033[91m MIB marker was not found \033[0m')
result = re.search("Measured Carrier Frequency (?P<measured_carrier_frequency>\d{1,15}) Hz", str(line)) result = re.search("Initial sync: pbch decoded sucessfully", str(line))
if result is not None and (not frequency_found): if result is not None and (not frequency_found):
try: try:
mibMsg = f"Measured Carrier Frequency = {result.group('measured_carrier_frequency')} Hz" mibMsg = f"UE decoded PBCH successfully"
HTML.htmlUEFailureMsg=HTML.htmlUEFailureMsg + mibMsg + '\n' HTML.htmlUEFailureMsg=HTML.htmlUEFailureMsg + mibMsg + '\n'
logging.debug(f'\033[94m{mibMsg}\033[0m') logging.debug(f'\033[94m{mibMsg}\033[0m')
frequency_found = True frequency_found = True
except Exception as e: except Exception as e:
logging.error(f'\033[91m Measured Carrier Frequency not found \033[0m') logging.error(f'\033[91m UE did not find PBCH\033[0m')
result = re.search("PLMN MCC (?P<mcc>\d{1,3}), MNC (?P<mnc>\d{1,3}), TAC", str(line)) result = re.search("PLMN MCC (?P<mcc>\d{1,3}), MNC (?P<mnc>\d{1,3}), TAC", str(line))
if result is not None and (not plmn_found): if result is not None and (not plmn_found):
try: try:
......
...@@ -254,9 +254,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB) ...@@ -254,9 +254,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
gNB->nr_srs_info = (nr_srs_info_t **)malloc16_clear(gNB->max_nb_srs * sizeof(nr_srs_info_t*)); gNB->nr_srs_info = (nr_srs_info_t **)malloc16_clear(gNB->max_nb_srs * sizeof(nr_srs_info_t*));
for (int id = 0; id < gNB->max_nb_srs; id++) { for (int id = 0; id < gNB->max_nb_srs; id++) {
gNB->nr_srs_info[id] = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t)); gNB->nr_srs_info[id] = (nr_srs_info_t *)malloc16_clear(sizeof(nr_srs_info_t));
gNB->nr_srs_info[id]->srs_generated_signal = (int32_t**)malloc16_clear(MAX_NUM_NR_SRS_AP*sizeof(int32_t*)); gNB->nr_srs_info[id]->srs_generated_signal = malloc16_clear(MAX_NUM_NR_SRS_AP * sizeof(c16_t *));
for(int ap=0; ap<MAX_NUM_NR_SRS_AP; ap++) { for(int ap=0; ap<MAX_NUM_NR_SRS_AP; ap++) {
gNB->nr_srs_info[id]->srs_generated_signal[ap] = (int32_t*)malloc16_clear(fp->ofdm_symbol_size*MAX_NUM_NR_SRS_SYMBOLS*sizeof(int32_t)); gNB->nr_srs_info[id]->srs_generated_signal[ap] =
malloc16_clear(fp->ofdm_symbol_size * MAX_NUM_NR_SRS_SYMBOLS * sizeof(c16_t));
} }
} }
......
...@@ -318,24 +318,19 @@ void nr_layer_mapping(int nbCodes, ...@@ -318,24 +318,19 @@ void nr_layer_mapping(int nbCodes,
} }
} }
void nr_ue_layer_mapping(int16_t *mod_symbs, void nr_ue_layer_mapping(const c16_t *mod_symbs, const int n_layers, const int n_symbs, int sz, c16_t tx_layers[][sz])
uint8_t n_layers, {
uint32_t n_symbs,
int16_t **tx_layers) {
for (int i=0; i<n_symbs/n_layers; i++) { for (int i=0; i<n_symbs/n_layers; i++) {
for (int l=0; l<n_layers; l++) { for (int l=0; l<n_layers; l++) {
tx_layers[l][i<<1] = (mod_symbs[(n_layers*i+l)<<1]*AMP)>>15; tx_layers[l][i] = c16mulRealShift(mod_symbs[n_layers * i + l], AMP, 15);
tx_layers[l][(i<<1)+1] = (mod_symbs[((n_layers*i+l)<<1)+1]*AMP)>>15;
} }
} }
} }
void nr_dft(c16_t *z, c16_t *d, uint32_t Msc_PUSCH)
void nr_dft(int32_t *z, int32_t *d, uint32_t Msc_PUSCH)
{ {
simde__m128i dft_in128[1][3240], dft_out128[1][3240]; simde__m128i dft_in128[3240], dft_out128[3240];
uint32_t *dft_in0 = (uint32_t*)dft_in128[0], *dft_out0 = (uint32_t*)dft_out128[0]; c16_t *dft_in0 = (c16_t *)dft_in128, *dft_out0 = (c16_t *)dft_out128;
uint32_t i, ip; uint32_t i, ip;
...@@ -659,36 +654,32 @@ void init_timeshift_rotation(NR_DL_FRAME_PARMS *fp) ...@@ -659,36 +654,32 @@ void init_timeshift_rotation(NR_DL_FRAME_PARMS *fp)
} }
} }
int nr_layer_precoder(int16_t **datatx_F_precoding, const char *prec_matrix, uint8_t n_layers, int32_t re_offset) c16_t nr_layer_precoder(int sz, c16_t datatx_F_precoding[][sz], const char *prec_matrix, uint8_t n_layers, int32_t re_offset)
{ {
int32_t precodatatx_F = 0; c16_t precodatatx_F = {0};
for (int al = 0; al<n_layers; al++) { for (int al = 0; al<n_layers; al++) {
int16_t antenna_re = datatx_F_precoding[al][re_offset<<1]; c16_t antenna = datatx_F_precoding[al][re_offset];
int16_t antenna_im = datatx_F_precoding[al][(re_offset<<1) +1];
switch (prec_matrix[al]) { switch (prec_matrix[al]) {
case '0': //multiply by zero case '0': //multiply by zero
break; break;
case '1': //multiply by 1 case '1': //multiply by 1
((int16_t *) &precodatatx_F)[0] += antenna_re; precodatatx_F = c16add(precodatatx_F, antenna);
((int16_t *) &precodatatx_F)[1] += antenna_im;
break; break;
case 'n': // multiply by -1 case 'n': // multiply by -1
((int16_t *) &precodatatx_F)[0] -= antenna_re; precodatatx_F = c16sub(precodatatx_F, antenna);
((int16_t *) &precodatatx_F)[1] -= antenna_im;
break; break;
case 'j': // case 'j': //
((int16_t *) &precodatatx_F)[0] -= antenna_im; precodatatx_F.r -= antenna.i;
((int16_t *) &precodatatx_F)[1] += antenna_re; precodatatx_F.i += antenna.r;
break; break;
case 'o': // -j case 'o': // -j
((int16_t *) &precodatatx_F)[0] += antenna_im; precodatatx_F.r += antenna.i;
((int16_t *) &precodatatx_F)[1] -= antenna_re; precodatatx_F.i -= antenna.r;
break; break;
} }
} }
......
...@@ -68,13 +68,7 @@ void nr_layer_mapping(int nbCodes, ...@@ -68,13 +68,7 @@ void nr_layer_mapping(int nbCodes,
@param[in] n_symbs, number of modulated symbols @param[in] n_symbs, number of modulated symbols
@param[out] tx_layers, modulated symbols for each layer @param[out] tx_layers, modulated symbols for each layer
*/ */
void nr_ue_layer_mapping(const c16_t *mod_symbs, const int n_layers, const int n_symbs, int sz, c16_t tx_layers[][sz]);
void nr_ue_layer_mapping(int16_t *mod_symbs,
uint8_t n_layers,
uint32_t n_symbs,
int16_t **tx_layers);
/*! /*!
\brief This function implements the OFDM front end processor on reception (FEP) \brief This function implements the OFDM front end processor on reception (FEP)
\param frame_parms Pointer to frame parameters \param frame_parms Pointer to frame parameters
...@@ -98,7 +92,7 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms, ...@@ -98,7 +92,7 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
\param d Pointer to input in time domain \param d Pointer to input in time domain
\param Msc_PUSCH number of allocated data subcarriers \param Msc_PUSCH number of allocated data subcarriers
*/ */
void nr_dft(int32_t *z,int32_t *d, uint32_t Msc_PUSCH); void nr_dft(c16_t *z, c16_t *d, uint32_t Msc_PUSCH);
int nr_beam_precoding(c16_t **txdataF, int nr_beam_precoding(c16_t **txdataF,
c16_t **txdataF_BF, c16_t **txdataF_BF,
...@@ -137,7 +131,7 @@ void apply_nr_rotation_RX(NR_DL_FRAME_PARMS *frame_parms, ...@@ -137,7 +131,7 @@ void apply_nr_rotation_RX(NR_DL_FRAME_PARMS *frame_parms,
@param[in] prec_matrix, Pointer to precoding matrix @param[in] prec_matrix, Pointer to precoding matrix
@param[in] n_layers, number of DLSCH layers @param[in] n_layers, number of DLSCH layers
*/ */
int nr_layer_precoder(int16_t **datatx_F_precoding, const char *prec_matrix, uint8_t n_layers, int32_t re_offset); c16_t nr_layer_precoder(int sz, c16_t datatx_F_precoding[][sz], const char *prec_matrix, uint8_t n_layers, int32_t re_offset);
c16_t nr_layer_precoder_cm(int n_layers, c16_t nr_layer_precoder_cm(int n_layers,
int n_symbols, int n_symbols,
......
...@@ -114,7 +114,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB, ...@@ -114,7 +114,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
nr_pusch_dmrs_rx(gNB, nr_pusch_dmrs_rx(gNB,
Ns, Ns,
gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol],
(int32_t *)pilot, pilot,
(1000 + p), (1000 + p),
0, 0,
nb_rb_pusch, nb_rb_pusch,
...@@ -122,14 +122,14 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB, ...@@ -122,14 +122,14 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
pusch_pdu->dmrs_config_type); pusch_pdu->dmrs_config_type);
} else { // if transform precoding or SC-FDMA is enabled in Uplink } else { // if transform precoding or SC-FDMA is enabled in Uplink
// NR_SC_FDMA supports type1 DMRS so only 6 DMRS REs per RB possible // NR_SC_FDMA supports type1 DMRS so only 6 DMRS REs per RB possible
const uint16_t index = get_index_for_dmrs_lowpapr_seq(nb_rb_pusch * (NR_NB_SC_PER_RB/2)); const int index = get_index_for_dmrs_lowpapr_seq(nb_rb_pusch * (NR_NB_SC_PER_RB / 2));
const uint8_t u = pusch_pdu->dfts_ofdm.low_papr_group_number; const uint8_t u = pusch_pdu->dfts_ofdm.low_papr_group_number;
const uint8_t v = pusch_pdu->dfts_ofdm.low_papr_sequence_number; const uint8_t v = pusch_pdu->dfts_ofdm.low_papr_sequence_number;
int16_t *dmrs_seq = gNB_dmrs_lowpaprtype1_sequence[u][v][index]; c16_t *dmrs_seq = gNB_dmrs_lowpaprtype1_sequence[u][v][index];
LOG_D(PHY,"Transform Precoding params. u: %d, v: %d, index for dmrsseq: %d\n", u, v, index); LOG_D(PHY,"Transform Precoding params. u: %d, v: %d, index for dmrsseq: %d\n", u, v, index);
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n"); AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
AssertFatal(dmrs_seq != NULL, "DMRS low PAPR seq not found, check if DMRS sequences are generated"); AssertFatal(dmrs_seq != NULL, "DMRS low PAPR seq not found, check if DMRS sequences are generated");
nr_pusch_lowpaprtype1_dmrs_rx(gNB, Ns, dmrs_seq, (int32_t *)pilot, 1000, 0, nb_rb_pusch, 0, pusch_pdu->dmrs_config_type); nr_pusch_lowpaprtype1_dmrs_rx(gNB, Ns, dmrs_seq, pilot, 1000, 0, nb_rb_pusch, 0, pusch_pdu->dmrs_config_type);
#ifdef DEBUG_PUSCH #ifdef DEBUG_PUSCH
printf ("NR_UL_CHANNEL_EST: index %d, u %d,v %d\n", index, u, v); printf ("NR_UL_CHANNEL_EST: index %d, u %d,v %d\n", index, u, v);
LOG_M("gNb_DMRS_SEQ.m","gNb_DMRS_SEQ", dmrs_seq,6*nb_rb_pusch,1,1); LOG_M("gNb_DMRS_SEQ.m","gNb_DMRS_SEQ", dmrs_seq,6*nb_rb_pusch,1,1);
...@@ -611,19 +611,21 @@ uint32_t calc_power(const int16_t *x, const uint32_t size) { ...@@ -611,19 +611,21 @@ uint32_t calc_power(const int16_t *x, const uint32_t size) {
return sum_x2/size - (sum_x/size)*(sum_x/size); return sum_x2/size - (sum_x/size)*(sum_x/size);
} }
int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB, int nr_srs_channel_estimation(
const PHY_VARS_gNB *gNB,
const int frame, const int frame,
const int slot, const int slot,
const nfapi_nr_srs_pdu_t *srs_pdu, const nfapi_nr_srs_pdu_t *srs_pdu,
const nr_srs_info_t *nr_srs_info, const nr_srs_info_t *nr_srs_info,
const int32_t **srs_generated_signal, const c16_t **srs_generated_signal,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)], int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_freq[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)], int32_t srs_estimated_channel_freq[][1 << srs_pdu->num_ant_ports]
int32_t srs_estimated_channel_time[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size], [gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_time_shifted[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size], int32_t srs_estimated_channel_time[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int32_t srs_estimated_channel_time_shifted[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int8_t *snr_per_rb, int8_t *snr_per_rb,
int8_t *snr) { int8_t *snr)
{
#ifdef SRS_DEBUG #ifdef SRS_DEBUG
LOG_I(NR_PHY,"Calling %s function\n", __FUNCTION__); LOG_I(NR_PHY,"Calling %s function\n", __FUNCTION__);
#endif #endif
...@@ -694,9 +696,8 @@ int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB, ...@@ -694,9 +696,8 @@ int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB,
uint16_t subcarrier_cdm = subcarrier; uint16_t subcarrier_cdm = subcarrier;
for (int cdm_idx = 0; cdm_idx < fd_cdm; cdm_idx++) { for (int cdm_idx = 0; cdm_idx < fd_cdm; cdm_idx++) {
int16_t generated_real = srs_generated_signal[p_index][subcarrier_cdm].r;
int16_t generated_real = ((c16_t*)srs_generated_signal[p_index])[subcarrier_cdm].r; int16_t generated_imag = srs_generated_signal[p_index][subcarrier_cdm].i;
int16_t generated_imag = ((c16_t*)srs_generated_signal[p_index])[subcarrier_cdm].i;
int16_t received_real = ((c16_t*)srs_received_signal[ant])[subcarrier_cdm].r; int16_t received_real = ((c16_t*)srs_received_signal[ant])[subcarrier_cdm].r;
int16_t received_imag = ((c16_t*)srs_received_signal[ant])[subcarrier_cdm].i; int16_t received_imag = ((c16_t*)srs_received_signal[ant])[subcarrier_cdm].i;
......
...@@ -72,16 +72,18 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB, ...@@ -72,16 +72,18 @@ void nr_pusch_ptrs_processing(PHY_VARS_gNB *gNB,
unsigned char symbol, unsigned char symbol,
uint32_t nb_re_pusch); uint32_t nb_re_pusch);
int nr_srs_channel_estimation(const PHY_VARS_gNB *gNB, int nr_srs_channel_estimation(
const PHY_VARS_gNB *gNB,
const int frame, const int frame,
const int slot, const int slot,
const nfapi_nr_srs_pdu_t *srs_pdu, const nfapi_nr_srs_pdu_t *srs_pdu,
const nr_srs_info_t *nr_srs_info, const nr_srs_info_t *nr_srs_info,
const int32_t **srs_generated_signal, const c16_t **srs_generated_signal,
int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)], int32_t srs_received_signal[][gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_freq[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size*(1<<srs_pdu->num_symbols)], int32_t srs_estimated_channel_freq[][1 << srs_pdu->num_ant_ports]
int32_t srs_estimated_channel_time[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size], [gNB->frame_parms.ofdm_symbol_size * (1 << srs_pdu->num_symbols)],
int32_t srs_estimated_channel_time_shifted[][1<<srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size], int32_t srs_estimated_channel_time[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int32_t srs_estimated_channel_time_shifted[][1 << srs_pdu->num_ant_ports][gNB->frame_parms.ofdm_symbol_size],
int8_t *snr_per_rb, int8_t *snr_per_rb,
int8_t *snr); int8_t *snr);
......
This diff is collapsed.
...@@ -54,7 +54,7 @@ int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p); ...@@ -54,7 +54,7 @@ int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB, int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns, unsigned int Ns,
unsigned int *nr_gold_pusch, unsigned int *nr_gold_pusch,
int32_t *output, c16_t *output,
unsigned short p, unsigned short p,
unsigned char lp, unsigned char lp,
unsigned short nb_pusch_rb, unsigned short nb_pusch_rb,
...@@ -68,18 +68,14 @@ extern simde__m64 byte2m64_re[256]; ...@@ -68,18 +68,14 @@ extern simde__m64 byte2m64_re[256];
extern simde__m64 byte2m64_im[256]; extern simde__m64 byte2m64_im[256];
extern simde__m128i byte2m128i[256]; extern simde__m128i byte2m128i[256];
int nr_pusch_lowpaprtype1_dmrs_rx(PHY_VARS_gNB *gNB, int nr_pusch_lowpaprtype1_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns, unsigned int Ns,
int16_t *dmrs_seq, c16_t *dmrs_seq,
int32_t *output, c16_t *output,
unsigned short p, unsigned short p,
unsigned char lp, unsigned char lp,
unsigned short nb_pusch_rb, unsigned short nb_pusch_rb,
uint32_t re_offset, uint32_t re_offset,
uint8_t dmrs_type); uint8_t dmrs_type);
#endif #endif
...@@ -27,13 +27,10 @@ ...@@ -27,13 +27,10 @@
#include "PHY/defs_nr_UE.h" #include "PHY/defs_nr_UE.h"
#include "PHY/LTE_REFSIG/lte_refsig.h" #include "PHY/LTE_REFSIG/lte_refsig.h"
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PBCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
*/ */
int nr_pbch_dmrs_rx(int dmrss, void nr_pbch_dmrs_rx(const int dmrss, const unsigned int *nr_gold_pbch, c16_t *output);
unsigned int *nr_gold_pbch,
int32_t *output);
/*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS. /*!\brief This function generates the NR Gold sequence (38-211, Sec 5.2.1) for the PDCCH DMRS.
@param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables @param PHY_VARS_NR_UE* ue structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
...@@ -41,14 +38,14 @@ int nr_pbch_dmrs_rx(int dmrss, ...@@ -41,14 +38,14 @@ int nr_pbch_dmrs_rx(int dmrss,
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue, int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int Ns, unsigned int Ns,
unsigned int *nr_gold_pdcch, unsigned int *nr_gold_pdcch,
int32_t *output, c16_t *output,
unsigned short p, unsigned short p,
unsigned short nb_rb_corset); unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue, int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned int Ns, unsigned int Ns,
unsigned int *nr_gold_pdsch, unsigned int *nr_gold_pdsch,
int32_t *output, c16_t *output,
unsigned short p, unsigned short p,
unsigned char lp, unsigned char lp,
unsigned short nb_pdsch_rb, unsigned short nb_pdsch_rb,
......
...@@ -52,53 +52,44 @@ ...@@ -52,53 +52,44 @@
* *
*********************************************************************/ *********************************************************************/
static int16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, unsigned int scaling) static c16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, unsigned int scaling)
{ {
char *phi_table; const char *phi_table;
int16_t *rv_overbar;
double x;
unsigned int n;
switch(M_ZC) { switch(M_ZC) {
case 6: case 6:
phi_table = (char *)phi_M_ZC_6; phi_table = phi_M_ZC_6;
break; break;
case 12: case 12:
phi_table = (char *)phi_M_ZC_12; phi_table = phi_M_ZC_12;
break; break;
case 18: case 18:
phi_table = (char *)phi_M_ZC_18; phi_table = phi_M_ZC_18;
break; break;
case 24: case 24:
phi_table = (char *)phi_M_ZC_24; phi_table = phi_M_ZC_24;
break; break;
case 30: case 30:
break; break;
default: default:
printf("function base_sequence_less_than 36_: unsupported base sequence size : %u \n", M_ZC); AssertFatal(false, "function base_sequence_less_than 36_: unsupported base sequence size : %u \n", M_ZC);
assert(0);
break; break;
} }
rv_overbar = malloc16(IQ_SIZE*M_ZC); c16_t *rv_overbar = malloc16(IQ_SIZE * M_ZC);
AssertFatal(rv_overbar, "Fatal memory allocation problem \n");
if (rv_overbar == NULL) {
msg("Fatal memory allocation problem \n");
assert(0);
}
if (M_ZC == 30) { if (M_ZC == 30) {
for (n=0; n<M_ZC; n++) { for (unsigned int n = 0; n < M_ZC; n++) {
x = -(M_PI * (u + 1) * (n + 1) * (n + 2))/(double)31; const double x = -(M_PI * (u + 1) * (n + 1) * (n + 2)) / (double)31;
rv_overbar[2*n] =(int16_t)(floor(scaling*cos(x))); rv_overbar[n].r = (int16_t)(floor(scaling * cos(x)));
rv_overbar[2*n+1] =(int16_t)(floor(scaling*sin(x))); rv_overbar[n].i = (int16_t)(floor(scaling * sin(x)));
} }
} }
else { else {
for (n=0; n<M_ZC; n++) { for (unsigned int n = 0; n < M_ZC; n++) {
x = (double)phi_table[n + u*M_ZC] * (M_PI/4); const double x = (double)phi_table[n + u * M_ZC] * (M_PI / 4);
rv_overbar[2*n] = (int16_t)(floor(scaling*cos(x))); rv_overbar[n].r = (int16_t)(floor(scaling * cos(x)));
rv_overbar[2*n+1] = (int16_t)(floor(scaling*sin(x))); rv_overbar[n].i = (int16_t)(floor(scaling * sin(x)));
} }
} }
return rv_overbar; return rv_overbar;
...@@ -117,9 +108,9 @@ static int16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, un ...@@ -117,9 +108,9 @@ static int16_t *base_sequence_less_than_36(unsigned int M_ZC, unsigned int u, un
* *
*********************************************************************/ *********************************************************************/
int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res) { int get_index_for_dmrs_lowpapr_seq(int num_dmrs_res)
{
int16_t index = num_dmrs_res/6 - 1; int index = num_dmrs_res / 6 - 1;
if (index >= MAX_INDEX_DMRS_UL_ALLOCATED_REs) if (index >= MAX_INDEX_DMRS_UL_ALLOCATED_REs)
index = MAX_INDEX_DMRS_UL_ALLOCATED_REs-1; index = MAX_INDEX_DMRS_UL_ALLOCATED_REs-1;
...@@ -149,79 +140,63 @@ int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res) { ...@@ -149,79 +140,63 @@ int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res) {
* *
*********************************************************************/ *********************************************************************/
static int16_t *base_sequence_36_or_larger(unsigned int Msc_RS, static c16_t *base_sequence_36_or_larger(unsigned int Msc_RS,
unsigned int u, unsigned int u,
unsigned int v, unsigned int v,
unsigned int scaling, unsigned int scaling,
unsigned int if_dmrs_seq) unsigned int if_dmrs_seq)
{ {
int16_t *rv_overbar; const unsigned int M_ZC = if_dmrs_seq ? dmrs_ul_allocated_res[Msc_RS] : ul_allocated_re[Msc_RS];
unsigned int N_ZC, M_ZC;
double q_overbar, x;
unsigned int q,m,n;
if (if_dmrs_seq)
M_ZC = dmrs_ul_allocated_res[Msc_RS];
else
M_ZC = ul_allocated_re[Msc_RS];
rv_overbar = malloc16(IQ_SIZE*M_ZC); c16_t *rv_overbar = malloc16(IQ_SIZE * M_ZC);
if (rv_overbar == NULL) { AssertFatal(rv_overbar, "Fatal memory allocation problem \n");
msg("Fatal memory allocation problem \n");
assert(0);
}
if (if_dmrs_seq)
N_ZC = dmrs_ref_ul_primes[Msc_RS];
else
N_ZC = ref_ul_primes[Msc_RS]; /* The length N_ZC is given by the largest prime number such that N_ZC < M_ZC */
/* The length N_ZC is given by the largest prime number such that N_ZC < M_ZC */
const unsigned int N_ZC = if_dmrs_seq ? dmrs_ref_ul_primes[Msc_RS] : ref_ul_primes[Msc_RS];
q_overbar = N_ZC * (u+1)/(double)31; const double q_overbar = N_ZC * (u + 1) / (double)31;
/* q = (q_overbar + 1/2) + v.(-1)^(2q_overbar) */ /* q = (q_overbar + 1/2) + v.(-1)^(2q_overbar) */
double q;
if ((((int)floor(2*q_overbar))&1) == 0) if ((((int)floor(2*q_overbar))&1) == 0)
q = (int)(floor(q_overbar+.5)) - v; q = floor(q_overbar + .5) - v;
else else
q = (int)(floor(q_overbar+.5)) + v; q = floor(q_overbar + .5) + v;
for (n = 0; n < M_ZC; n++) { for (int n = 0; n < M_ZC; n++) {
m=n%N_ZC; const int m = n % N_ZC;
x = (double)q * m * (m+1)/N_ZC; const double x = q * m * (m + 1) / N_ZC;
rv_overbar[2*n] = (int16_t)(floor(scaling*cos(M_PI*x))); /* cos(-x) = cos(x) */ rv_overbar[n].r = (int16_t)(floor(scaling * cos(M_PI * x))); /* cos(-x) = cos(x) */
rv_overbar[2*n+1] = -(int16_t)(floor(scaling*sin(M_PI*x))); /* sin(-x) = -sin(x) */ rv_overbar[n].i = -(int16_t)(floor(scaling * sin(M_PI * x))); /* sin(-x) = -sin(x) */
} }
return rv_overbar; return rv_overbar;
} }
int16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF]; c16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF];
int16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs]; c16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling) void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling)
{ {
/* prevent multiple calls, relevant when both UE & gNB initialize this */ /* prevent multiple calls, relevant when both UE & gNB initialize this */
static bool already_called = false; static bool already_called = false;
if (already_called) return; if (already_called)
return;
already_called = true; already_called = true;
unsigned int u,Msc_RS;
unsigned int v = 0; // sequence hopping and group hopping are not supported yet unsigned int v = 0; // sequence hopping and group hopping are not supported yet
for (Msc_RS=0; Msc_RS <= INDEX_SB_LESS_32; Msc_RS++) { for (unsigned int Msc_RS = 0; Msc_RS <= INDEX_SB_LESS_32; Msc_RS++) {
for (u=0; u < U_GROUP_NUMBER; u++) { for (unsigned int u = 0; u < U_GROUP_NUMBER; u++) {
gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_less_than_36(ul_allocated_re[Msc_RS], u, scaling); gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_less_than_36(ul_allocated_re[Msc_RS], u, scaling);
} }
} }
for (Msc_RS=INDEX_SB_LESS_32+1; Msc_RS < MAX_INDEX_DMRS_UL_ALLOCATED_REs; Msc_RS++) { for (unsigned int Msc_RS = INDEX_SB_LESS_32 + 1; Msc_RS < MAX_INDEX_DMRS_UL_ALLOCATED_REs; Msc_RS++) {
for (u=0; u < U_GROUP_NUMBER; u++) { for (unsigned int u = 0; u < U_GROUP_NUMBER; u++) {
gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_36_or_larger(Msc_RS, u, v, scaling, 1); gNB_dmrs_lowpaprtype1_sequence[u][v][Msc_RS] = base_sequence_36_or_larger(Msc_RS, u, v, scaling, 1);
} }
} }
} }
int16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs]; c16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
void generate_ul_reference_signal_sequences(unsigned int scaling) void generate_ul_reference_signal_sequences(unsigned int scaling)
{ {
/* prevent multiple calls, relevant when both UE & gNB initialize this */ /* prevent multiple calls, relevant when both UE & gNB initialize this */
......
...@@ -228,7 +228,7 @@ static const uint16_t ref_ul_primes[SRS_SB_CONF] = { ...@@ -228,7 +228,7 @@ static const uint16_t ref_ul_primes[SRS_SB_CONF] = {
}; };
/* Low-PAPR base sequence; see TS 38.211 clause 5.2.2 */ /* Low-PAPR base sequence; see TS 38.211 clause 5.2.2 */
extern int16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF]; extern c16_t *rv_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][SRS_SB_CONF];
/* 38.211 table Table 5.2.2.2-1: Definition of phi(n) for M_ZC = 6 */ /* 38.211 table Table 5.2.2.2-1: Definition of phi(n) for M_ZC = 6 */
static const char phi_M_ZC_6[6 * U_GROUP_NUMBER] = { static const char phi_M_ZC_6[6 * U_GROUP_NUMBER] = {
...@@ -524,9 +524,9 @@ static const uint16_t dmrs_ref_ul_primes[MAX_INDEX_DMRS_UL_ALLOCATED_REs] = { ...@@ -524,9 +524,9 @@ static const uint16_t dmrs_ref_ul_primes[MAX_INDEX_DMRS_UL_ALLOCATED_REs] = {
}; };
/// PUSCH DMRS for transform precoding /// PUSCH DMRS for transform precoding
extern int16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs]; extern c16_t *gNB_dmrs_lowpaprtype1_sequence[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
extern int16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs]; extern c16_t *dmrs_lowpaprtype1_ul_ref_sig[U_GROUP_NUMBER][V_BASE_SEQUENCE_NUMBER][MAX_INDEX_DMRS_UL_ALLOCATED_REs];
int16_t get_index_for_dmrs_lowpapr_seq(int16_t num_dmrs_res); int get_index_for_dmrs_lowpapr_seq(int num_dmrs_res);
void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling); void generate_lowpapr_typ1_refsig_sequences(unsigned int scaling);
void free_gnb_lowpapr_sequences(void); void free_gnb_lowpapr_sequences(void);
......
...@@ -20,15 +20,16 @@ ...@@ -20,15 +20,16 @@
*/ */
#ifndef __FILT16A_H__ #ifndef __FILT16A_H__
#define __FILT16A_H__ #define __FILT16A_H__
static const short filt16a_l0[16] = {16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const c16_t filt16a_l0[8] = {{16384, 12288}, {8192, 4096}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}};
static const short filt16a_mm0[16] = {0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0}; static const short filt16a_mm0[16] = {0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0};
static const short filt16a_r0[16] = {0, 0, 0, 0, 0, 4096, 8192, 12288, 16384, 20480, 24576, 28672, 0, 0, 0, 0}; static const c16_t filt16a_r0[8] = {{0, 0}, {0, 0}, {0, 4096}, {8192, 12288}, {16384, 20480}, {24576, 28672}, {0, 0}, {0, 0}};
static const short filt16a_m0[16] = {0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, -8192, -12288, 0, 0, 0, 0}; static const c16_t filt16a_m0[8] =
{{0, 4096}, {8192, 12288}, {16384, 12288}, {8192, 4096}, {0, -4096}, {-8192, -12288}, {0, 0}, {0, 0}};
static const short filt16a_l1[16] = {20480, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const c16_t filt16a_l1[8] = {{20480, 16384}, {12288, 8192}, {4096, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}};
static const short filt16a_mm1[16] = {0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0}; static const short filt16a_mm1[16] = {0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0};
...@@ -36,11 +37,12 @@ static const short filt16a_ml1[16] = {-4096, 0, 4096, 8192, 12288, 16384, 12288, ...@@ -36,11 +37,12 @@ static const short filt16a_ml1[16] = {-4096, 0, 4096, 8192, 12288, 16384, 12288,
static const short filt16a_mr1[16] = {0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, -8192, 0, 0, 0, 0}; static const short filt16a_mr1[16] = {0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, -8192, 0, 0, 0, 0};
static const short filt16a_r1[16] = {0, 0, 0, 0, 0, 0, 4096, 8192, 12288, 16384, 20480, 24576, 0, 0, 0, 0}; static const c16_t filt16a_r1[8] = {{0, 0}, {0, 0}, {0, 0}, {4096, 8192}, {12288, 16384}, {20480, 24576}, {0, 0}, {0, 0}};
static const short filt16a_m1[16] = {-4096, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, -8192, 0, 0, 0, 0}; static const c16_t filt16a_m1[8] =
{{-4096, 0}, {4096, 8192}, {12288, 16384}, {12288, 8192}, {4096, 0}, {-4096, -8192}, {0, 0}, {0, 0}};
static const short filt16a_l2[16] = {24576, 20480, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const c16_t filt16a_l2[8] = {{24576, 20480}, {16384, 12288}, {8192, 4096}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}};
static const short filt16a_mm2[16] = {0, 0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0}; static const short filt16a_mm2[16] = {0, 0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0};
...@@ -48,19 +50,21 @@ static const short filt16a_ml2[16] = {-8192, -4096, 0, 4096, 8192, 12288, 16384, ...@@ -48,19 +50,21 @@ static const short filt16a_ml2[16] = {-8192, -4096, 0, 4096, 8192, 12288, 16384,
static const short filt16a_mr2[16] = {0, 0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, 0, 0, 0, 0}; static const short filt16a_mr2[16] = {0, 0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, 0, 0, 0, 0};
static const short filt16a_r2[16] = {0, 0, 0, 0, 0, 0, 0, 4096, 8192, 12288, 16384, 20480, 0, 0, 0, 0}; static const c16_t filt16a_r2[8] = {{0, 0}, {0, 0}, {0, 0}, {0, 4096}, {8192, 12288}, {16384, 20480}, {0, 0}, {0, 0}};
static const short filt16a_m2[16] = {-8192, -4096, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, -4096, 0, 0, 0, 0}; static const c16_t filt16a_m2[8] =
{{-8192, -4096}, {0, 4096}, {8192, 12288}, {16384, 12288}, {8192, 4096}, {0, -4096}, {0, 0}, {0, 0}};
static const short filt16a_l3[16] = {28672, 24576, 20480, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const c16_t filt16a_l3[8] = {{28672, 24576}, {20480, 16384}, {12288, 8192}, {4096, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}};
static const short filt16a_mm3[16] = {0, 0, 0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0}; static const short filt16a_mm3[16] = {0, 0, 0, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0};
static const short filt16a_ml3[16] = {-12288, -8192, -4096, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0}; static const short filt16a_ml3[16] = {-12288, -8192, -4096, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0};
static const short filt16a_r3[16] = {0, 0, 0, 0, 0, 0, 0, 0, 4096, 8192, 12288, 16384, 0, 0, 0, 0}; static const c16_t filt16a_r3[8] = {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {4096, 8192}, {12288, 16384}, {0, 0}, {0, 0}};
static const short filt16a_m3[16] = {-12288, -8192, -4096, 0, 4096, 8192, 12288, 16384, 12288, 8192, 4096, 0, 0, 0, 0, 0}; static const c16_t filt16a_m3[8] =
{{-12288, -8192}, {-4096, 0}, {4096, 8192}, {12288, 16384}, {12288, 8192}, {4096, 0}, {0, 0}, {0, 0}};
static const short filt16a_l0_dc[16] = {16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const short filt16a_l0_dc[16] = {16384, 12288, 8192, 4096, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
......
...@@ -57,12 +57,12 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue, ...@@ -57,12 +57,12 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
c16_t pdcch_dl_ch_estimates[][pdcch_est_size], c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]); c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue, c32_t nr_pbch_dmrs_correlation(const PHY_VARS_NR_UE *ue,
const UE_nr_rxtx_proc_t *proc, const UE_nr_rxtx_proc_t *proc,
unsigned char symbol, const int symbol,
int dmrss, const int dmrss,
NR_UE_SSB *current_ssb, const uint32_t nr_gold_pbch[NR_PBCH_DMRS_LENGTH_DWORD],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]); const c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP]);
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue, int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int estimateSz, int estimateSz,
......
...@@ -92,15 +92,15 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue, ...@@ -92,15 +92,15 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
int, int,
ue->measurements.rx_spatial_power, ue->measurements.rx_spatial_power,
NUMBER_OF_CONNECTED_gNB_MAX, NUMBER_OF_CONNECTED_gNB_MAX,
frame_parms->nb_antenna_ports_gNB, cmax(frame_parms->nb_antenna_ports_gNB, 1),
frame_parms->nb_antennas_rx, cmax(frame_parms->nb_antennas_rx, 1),
false); false);
allocCast3D(rx_spatial_power_dB, allocCast3D(rx_spatial_power_dB,
unsigned short, unsigned short,
ue->measurements.rx_spatial_power_dB, ue->measurements.rx_spatial_power_dB,
NUMBER_OF_CONNECTED_gNB_MAX, NUMBER_OF_CONNECTED_gNB_MAX,
frame_parms->nb_antenna_ports_gNB, cmax(frame_parms->nb_antenna_ports_gNB, 1),
frame_parms->nb_antennas_rx, cmax(frame_parms->nb_antennas_rx, 1),
false); false);
// signal measurements // signal measurements
......
...@@ -44,8 +44,8 @@ ...@@ -44,8 +44,8 @@
#include "PHY/NR_REFSIG/pss_nr.h" #include "PHY/NR_REFSIG/pss_nr.h"
#include "PHY/NR_REFSIG/sss_nr.h" #include "PHY/NR_REFSIG/sss_nr.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h" #include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/TOOLS/tools_defs.h"
extern openair0_config_t openair0_cfg[];
//static nfapi_nr_config_request_t config_t; //static nfapi_nr_config_request_t config_t;
//static nfapi_nr_config_request_t* config =&config_t; //static nfapi_nr_config_request_t* config =&config_t;
int cnt=0; int cnt=0;
...@@ -53,51 +53,16 @@ int cnt=0; ...@@ -53,51 +53,16 @@ int cnt=0;
// #define DEBUG_INITIAL_SYNCH // #define DEBUG_INITIAL_SYNCH
#define DUMP_PBCH_CH_ESTIMATES 0 #define DUMP_PBCH_CH_ESTIMATES 0
// create a new node of SSB structure // structure used for multiple SSB detection
NR_UE_SSB* create_ssb_node(uint8_t i, uint8_t h) { typedef struct NR_UE_SSB {
uint i_ssb; // i_ssb between 0 and 7 (it corresponds to ssb_index only for Lmax=4,8)
uint n_hf; // n_hf = 0,1 for Lmax =4 or n_hf = 0 for Lmax =8,64
double metric; // metric to order SSB hypothesis
} NR_UE_SSB;
NR_UE_SSB *new_node = (NR_UE_SSB*)malloc(sizeof(NR_UE_SSB)); static int ssb_sort(const void *a, const void *b)
new_node->i_ssb = i; {
new_node->n_hf = h; return ((NR_UE_SSB *)b)->metric - ((NR_UE_SSB *)a)->metric;
new_node->c_re = 0;
new_node->c_im = 0;
new_node->metric = 0;
new_node->next_ssb = NULL;
return new_node;
}
// insertion of the structure in the ordered list (highest metric first)
NR_UE_SSB* insert_into_list(NR_UE_SSB *head, NR_UE_SSB *node) {
if (node->metric > head->metric) {
node->next_ssb = head;
head = node;
return head;
}
NR_UE_SSB *current = head;
while (current->next_ssb !=NULL) {
NR_UE_SSB *temp=current->next_ssb;
if(node->metric > temp->metric) {
node->next_ssb = temp;
current->next_ssb = node;
return head;
}
else
current = temp;
}
current->next_ssb = node;
return head;
}
void free_list(NR_UE_SSB *node) {
if (node->next_ssb != NULL)
free_list(node->next_ssb);
free(node);
} }
static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc, static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
...@@ -107,76 +72,66 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc, ...@@ -107,76 +72,66 @@ static bool nr_pbch_detection(const UE_nr_rxtx_proc_t *proc,
{ {
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms; NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_SSB *best_ssb = NULL; const int N_L = (frame_parms->Lmax == 4) ? 4 : 8;
NR_UE_SSB *current_ssb; const int N_hf = (frame_parms->Lmax == 4) ? 2 : 1;
NR_UE_SSB best_ssb[N_L * N_hf];
uint8_t N_L = (frame_parms->Lmax == 4)? 4:8; NR_UE_SSB *current_ssb = best_ssb;
uint8_t N_hf = (frame_parms->Lmax == 4)? 2:1; // loops over possible pbch dmrs cases to retrieve best estimated i_ssb (and n_hf for Lmax=4) for multiple ssb detection
// loops over possible pbch dmrs cases to retrive best estimated i_ssb (and n_hf for Lmax=4) for multiple ssb detection
for (int hf = 0; hf < N_hf; hf++) {
for (int l = 0; l < N_L ; l++) {
// initialization of structure
current_ssb = create_ssb_node(l,hf);
start_meas(&ue->dlsch_channel_estimation_stats); start_meas(&ue->dlsch_channel_estimation_stats);
for (int hf = 0; hf < N_hf; hf++) {
for (int l = 0; l < N_L; l++) {
// computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf // computing correlation between received DMRS symbols and transmitted sequence for current i_ssb and n_hf
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++) cd_t cumul = {0};
nr_pbch_dmrs_correlation(ue, proc, i, i - pbch_initial_symbol, current_ssb, rxdataF); for (int i = pbch_initial_symbol; i < pbch_initial_symbol + 3; i++) {
stop_meas(&ue->dlsch_channel_estimation_stats); c32_t meas = nr_pbch_dmrs_correlation(ue, proc, i, i - pbch_initial_symbol, ue->nr_gold_pbch[hf][l], rxdataF);
csum(cumul, cumul, meas);
current_ssb->metric = current_ssb->c_re*current_ssb->c_re + current_ssb->c_im*current_ssb->c_im;
// generate a list of SSB structures
if (best_ssb == NULL)
best_ssb = current_ssb;
else
best_ssb = insert_into_list(best_ssb,current_ssb);
} }
*current_ssb = (NR_UE_SSB){.i_ssb = l, .n_hf = hf, .metric = squaredMod(cumul)};
current_ssb++;
} }
}
qsort(best_ssb, N_L * N_hf, sizeof(NR_UE_SSB), ssb_sort);
stop_meas(&ue->dlsch_channel_estimation_stats);
NR_UE_SSB *temp_ptr = best_ssb; const int nb_ant = frame_parms->nb_antennas_rx;
bool ret = false; for (NR_UE_SSB *ssb = best_ssb; ssb < best_ssb + N_L * N_hf; ssb++) {
while (!ret && temp_ptr != NULL) {
start_meas(&ue->dlsch_channel_estimation_stats); start_meas(&ue->dlsch_channel_estimation_stats);
// computing channel estimation for selected best ssb // computing channel estimation for selected best ssb
const int estimateSz = frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size; const int estimateSz = frame_parms->symbols_per_slot * frame_parms->ofdm_symbol_size;
__attribute__ ((aligned(32))) struct complex16 dl_ch_estimates[frame_parms->nb_antennas_rx][estimateSz]; __attribute__((aligned(32))) c16_t dl_ch_estimates[nb_ant][estimateSz];
__attribute__ ((aligned(32))) struct complex16 dl_ch_estimates_time[frame_parms->nb_antennas_rx][frame_parms->ofdm_symbol_size]; __attribute__((aligned(32))) c16_t dl_ch_estimates_time[nb_ant][frame_parms->ofdm_symbol_size];
for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++) for(int i=pbch_initial_symbol; i<pbch_initial_symbol+3;i++)
nr_pbch_channel_estimation(ue,estimateSz, dl_ch_estimates, dl_ch_estimates_time, nr_pbch_channel_estimation(ue,
proc,i,i-pbch_initial_symbol,temp_ptr->i_ssb,temp_ptr->n_hf,rxdataF); estimateSz,
dl_ch_estimates,
dl_ch_estimates_time,
proc,
i,
i - pbch_initial_symbol,
ssb->i_ssb,
ssb->n_hf,
rxdataF);
stop_meas(&ue->dlsch_channel_estimation_stats); stop_meas(&ue->dlsch_channel_estimation_stats);
fapiPbch_t result = {0}; fapiPbch_t result = {0};
if (0 == nr_rx_pbch(ue, proc, estimateSz, dl_ch_estimates, frame_parms, ssb->i_ssb, &result, rxdataF)) {
int pbch_res = nr_rx_pbch(ue, proc, estimateSz, dl_ch_estimates, frame_parms, temp_ptr->i_ssb, &result, rxdataF); if (DUMP_PBCH_CH_ESTIMATES) {
ret = pbch_res == 0; write_output("pbch_ch_estimates.m", "pbch_ch_estimates", dl_ch_estimates, nb_ant * estimateSz, 1, 1);
if (DUMP_PBCH_CH_ESTIMATES && ret) {
write_output("pbch_ch_estimates.m", "pbch_ch_estimates", dl_ch_estimates, frame_parms->nb_antennas_rx*estimateSz, 1, 1);
write_output("pbch_ch_estimates_time.m", write_output("pbch_ch_estimates_time.m",
"pbch_ch_estimates_time", "pbch_ch_estimates_time",
dl_ch_estimates_time, dl_ch_estimates_time,
frame_parms->nb_antennas_rx * frame_parms->ofdm_symbol_size, nb_ant * frame_parms->ofdm_symbol_size,
1, 1,
1); 1);
} }
temp_ptr=temp_ptr->next_ssb;
}
free_list(best_ssb);
if (ret) {
frame_parms->nb_antenna_ports_gNB = 1; // pbch_tx_ant;
LOG_I(PHY, "[UE%d] Initial sync: pbch decoded sucessfully, ssb index %d\n", ue->Mod_id, frame_parms->ssb_index); LOG_I(PHY, "[UE%d] Initial sync: pbch decoded sucessfully, ssb index %d\n", ue->Mod_id, frame_parms->ssb_index);
return true;
} }
return ret; }
LOG_W(PHY, "[UE%d] Initial sync: pbch not decoded, ssb index %d\n", ue->Mod_id, frame_parms->ssb_index);
return false;
} }
nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames, int sa) nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, int n_frames, int sa)
...@@ -394,11 +349,7 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, i ...@@ -394,11 +349,7 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, i
// send sync status to higher layers later when timing offset converge to target timing // send sync status to higher layers later when timing offset converge to target timing
} }
LOG_I(PHY, LOG_I(PHY, "[UE %d] Measured Carrier Frequency offset %d Hz\n", ue->Mod_id, ue->common_vars.freq_offset);
"[UE %d] Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id,
openair0_cfg[0].rx_freq[0] + ue->common_vars.freq_offset,
ue->common_vars.freq_offset);
} else { } else {
#ifdef DEBUG_INITIAL_SYNC #ifdef DEBUG_INITIAL_SYNC
LOG_I(PHY,"[UE%d] Initial sync : PBCH not ok\n",ue->Mod_id); LOG_I(PHY,"[UE%d] Initial sync : PBCH not ok\n",ue->Mod_id);
......
This diff is collapsed.
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/**********************************************************************
*
* FILENAME : pbch_nr.c
*
* MODULE : broacast channel
*
* DESCRIPTION : generation of pbch
* 3GPP TS 38.211 7.3.3 Physical broadcast channel
*
************************************************************************/
#include <stdio.h>
#include <assert.h>
#include <errno.h>
#include "PHY/defs.h"
#define DEFINE_VARIABLES_PBCH_NR_H
#include "PHY/NR_REFSIG/pbch_nr.h"
#undef DEFINE_VARIABLES_PBCH_NR_H
/*******************************************************************
*
* NAME : pseudo_random_gold_sequence
*
* PARAMETERS :
*
* RETURN : generate pseudo-random sequence which is a length-31 Gold sequence
*
* DESCRIPTION : 3GPP TS 38.211 5.2.1 Pseudo-random sequence generation
* Sequence generation
*
*********************************************************************/
#define NC (1600)
#define GOLD_LENGTH (31)
uint32_t *pseudo_random_gold_sequence(length M_PN, uint32_t cinit)
{
int size = M_PN * sizeof(uint32_t);
int size_x = sizeof(int)*M_PN + size;
int *x1 = malloc(size_x);
int *x2 = malloc(size_x);
if ((x1 == NULL) || (x2 == NULL)) {
msg("Fatal memory allocation problem \n");
assert(0);
}
else {
bzero(x1, size_x);
bzero(x2, size_x);
}
x1[0] = 1;
for (n = 0; n < 31; n++) {
x2[n] = (cinit >> n) & 0x1;
}
for (int n = 0; n < (NC+M_PN); n++) {
x1(n+31) = (x1(n+3) + x1(n))%2;
x2(n+31) = (x2(n+3) + x2(n+2) + x2(n+1) + x2(n))%2;
}
int *c = calloc(size);
if (c != NULL) {
bzero(c, size);
}
else {
msg("Fatal memory allocation problem \n");
assert(0);
}
for (int n = 0; n < M_PN; n++) {
c(i) = (x1(n+NC) + x2(n+NC))%2;
}
return c;
}
...@@ -672,7 +672,15 @@ static int pss_search_time_nr(c16_t **rxdata, PHY_VARS_NR_UE *ue, int fo_flag, i ...@@ -672,7 +672,15 @@ static int pss_search_time_nr(c16_t **rxdata, PHY_VARS_NR_UE *ue, int fo_flag, i
*nid2 = pss_source; *nid2 = pss_source;
LOG_I(PHY,"[UE] nr_synchro_time: Sync source = %d, Peak found at pos %d, val = %llu (%d dB) avg %d dB, ffo %lf\n", pss_source, peak_position, (unsigned long long)peak_value, dB_fixed64(peak_value),dB_fixed64(avg[pss_source]),ffo_est); LOG_I(PHY,
"[UE] nr_synchro_time: Sync source (nid2) = %d, Peak found at pos %d, val = %ld (%d dB power over signal avg %d dB), ffo "
"%lf\n",
pss_source,
peak_position,
peak_value,
dB_fixed64(peak_value),
dB_fixed64(avg[pss_source]),
ffo_est);
if (peak_value < 5*avg[pss_source]) if (peak_value < 5*avg[pss_source])
return(-1); return(-1);
......
...@@ -179,13 +179,13 @@ uint16_t compute_n_b(frame_t frame_number, ...@@ -179,13 +179,13 @@ uint16_t compute_n_b(frame_t frame_number,
***************************************************************************/ ***************************************************************************/
int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu, int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
int32_t **txdataF, c16_t **txdataF,
uint16_t symbol_offset, uint16_t symbol_offset,
nr_srs_info_t *nr_srs_info, nr_srs_info_t *nr_srs_info,
int16_t amp, int16_t amp,
frame_t frame_number, frame_t frame_number,
slot_t slot_number) { slot_t slot_number)
{
#ifdef SRS_DEBUG #ifdef SRS_DEBUG
LOG_I(NR_PHY,"Calling %s function\n", __FUNCTION__); LOG_I(NR_PHY,"Calling %s function\n", __FUNCTION__);
#endif #endif
...@@ -371,20 +371,15 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu, ...@@ -371,20 +371,15 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
// For each port, and for each OFDM symbol, here it is computed and mapped an SRS sequence with M_sc_b_SRS symbols // For each port, and for each OFDM symbol, here it is computed and mapped an SRS sequence with M_sc_b_SRS symbols
for (int k = 0; k < M_sc_b_SRS; k++) { for (int k = 0; k < M_sc_b_SRS; k++) {
cd_t shift = {cos(alpha_i * k), sin(alpha_i * k)};
double shift_real = cos(alpha_i * k); const c16_t tmp = rv_ul_ref_sig[u][v][M_sc_b_SRS_index][k];
double shift_imag = sin(alpha_i * k); cd_t r_overbar = {tmp.r, tmp.i};
int16_t r_overbar_real = rv_ul_ref_sig[u][v][M_sc_b_SRS_index][k<<1];
int16_t r_overbar_imag = rv_ul_ref_sig[u][v][M_sc_b_SRS_index][(k<<1)+1];
// cos(x+y) = cos(x)cos(y) - sin(x)sin(y) // cos(x+y) = cos(x)cos(y) - sin(x)sin(y)
double r_real = (shift_real*r_overbar_real - shift_imag*r_overbar_imag) / sqrt_N_ap; cd_t r = cdMul(shift, r_overbar);
// sin(x+y) = sin(x)cos(y) + cos(x)sin(y)
double r_imag = (shift_imag*r_overbar_real + shift_real*r_overbar_imag) / sqrt_N_ap;
int32_t r_real_amp = ((int32_t) round((double) amp * r_real)) >> 15; c16_t r_amp = {(((int32_t)round((double)amp * r.r / sqrt_N_ap)) >> 15),
int32_t r_imag_amp = ((int32_t) round((double) amp * r_imag)) >> 15; (((int32_t)round((double)amp * r.i / sqrt_N_ap)) >> 15)};
#ifdef SRS_DEBUG #ifdef SRS_DEBUG
int subcarrier_log = subcarrier-subcarrier_offset; int subcarrier_log = subcarrier-subcarrier_offset;
...@@ -394,10 +389,10 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu, ...@@ -394,10 +389,10 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
if(subcarrier_log%12 == 0) { if(subcarrier_log%12 == 0) {
LOG_I(NR_PHY,"------------ %d ------------\n", subcarrier_log/12); LOG_I(NR_PHY,"------------ %d ------------\n", subcarrier_log/12);
} }
LOG_I(NR_PHY,"(%d) \t%i\t%i\n", subcarrier_log, (int16_t)(r_real_amp&0xFFFF), (int16_t)(r_imag_amp&0xFFFF)); LOG_I(NR_PHY, "(%d) \t%i\t%i\n", subcarrier_log, r_amp.r, r_amp.i);
#endif #endif
*(c16_t *)&txdataF[p_index][symbol_offset + l_line_offset + subcarrier] = (c16_t){r_real_amp, r_imag_amp}; txdataF[p_index][symbol_offset + l_line_offset + subcarrier] = r_amp;
// Subcarrier increment // Subcarrier increment
subcarrier += K_TC; subcarrier += K_TC;
...@@ -465,14 +460,7 @@ int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, c16_ ...@@ -465,14 +460,7 @@ int ue_srs_procedures_nr(PHY_VARS_NR_UE *ue, const UE_nr_rxtx_proc_t *proc, c16_
NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms); NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms);
uint16_t symbol_offset = (frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position)*frame_parms->ofdm_symbol_size; uint16_t symbol_offset = (frame_parms->symbols_per_slot - 1 - srs_config_pdu->time_start_position)*frame_parms->ofdm_symbol_size;
if (generate_srs_nr(srs_config_pdu, if (generate_srs_nr(srs_config_pdu, frame_parms, txdataF, symbol_offset, ue->nr_srs_info, AMP, proc->frame_tx, proc->nr_slot_tx)
frame_parms,
(int32_t **)txdataF,
symbol_offset,
ue->nr_srs_info,
AMP,
proc->frame_tx,
proc->nr_slot_tx)
== 0) { == 0) {
return 0; return 0;
} else { } else {
......
...@@ -133,7 +133,7 @@ static const uint16_t srs_max_number_cs[3] = {8, 12, 6}; ...@@ -133,7 +133,7 @@ static const uint16_t srs_max_number_cs[3] = {8, 12, 6};
int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu, int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
NR_DL_FRAME_PARMS *frame_parms, NR_DL_FRAME_PARMS *frame_parms,
int32_t **txdataF, c16_t **txdataF,
uint16_t symbol_offset, uint16_t symbol_offset,
nr_srs_info_t *nr_srs_info, nr_srs_info_t *nr_srs_info,
int16_t amp, int16_t amp,
......
...@@ -503,15 +503,15 @@ bool rx_sss_nr(PHY_VARS_NR_UE *ue, ...@@ -503,15 +503,15 @@ bool rx_sss_nr(PHY_VARS_NR_UE *ue,
Nid1 = GET_NID1(frame_parms->Nid_cell); Nid1 = GET_NID1(frame_parms->Nid_cell);
LOG_D(PHY,"Nid2 %d Nid1 %d tot_metric %d, phase_max %d \n", Nid2, Nid1, *tot_metric, *phase_max); LOG_D(PHY,"Nid2 %d Nid1 %d tot_metric %d, phase_max %d \n", Nid2, Nid1, *tot_metric, *phase_max);
} }
//#endif // #endif
if (Nid1==N_ID_1_NUMBER)
return false;
int re = 0; int re = 0;
int im = 0; int im = 0;
if (Nid1 == N_ID_1_NUMBER) { if (Nid1 == N_ID_1_NUMBER) {
LOG_I(PHY,"Failed to detect SSS after PSS\n"); LOG_W(PHY,
"Failed to detect SSS after PSS, metric of SSS %d, threshold to consider SSS valid %d, detected PCI: %d\n",
*tot_metric,
SSS_METRIC_FLOOR_NR,
frame_parms->Nid_cell);
return false; return false;
} }
d = (int16_t *)&d_sss[Nid2][Nid1]; d = (int16_t *)&d_sss[Nid2][Nid1];
...@@ -524,7 +524,8 @@ bool rx_sss_nr(PHY_VARS_NR_UE *ue, ...@@ -524,7 +524,8 @@ bool rx_sss_nr(PHY_VARS_NR_UE *ue,
double ffo_pss = ((double)ue->common_vars.freq_offset)/frame_parms->subcarrier_spacing; double ffo_pss = ((double)ue->common_vars.freq_offset)/frame_parms->subcarrier_spacing;
LOG_W(NR_PHY, LOG_W(NR_PHY,
"ffo_pss %f (%i Hz), ffo_sss %f (%i Hz), ffo_pss+ffo_sss %f (%i Hz), nid1: %d, nid2: %d\n", "SSS detected, PCI: %d, ffo_pss %f (%i Hz), ffo_sss %f (%i Hz), ffo_pss+ffo_sss %f (%i Hz), nid1: %d, nid2: %d\n",
frame_parms->Nid_cell,
ffo_pss, ffo_pss,
(int)(ffo_pss * frame_parms->subcarrier_spacing), (int)(ffo_pss * frame_parms->subcarrier_spacing),
ffo_sss, ffo_sss,
......
...@@ -183,6 +183,11 @@ extern "C" { ...@@ -183,6 +183,11 @@ extern "C" {
return a.r * a.r + a.i * a.i; return a.r * a.r + a.i * a.i;
} }
__attribute__((always_inline)) inline c16_t c16add(const c16_t a, const c16_t b)
{
return (c16_t){.r = (int16_t)(a.r + b.r), .i = (int16_t)(a.i + b.i)};
}
__attribute__((always_inline)) inline c16_t c16sub(const c16_t a, const c16_t b) { __attribute__((always_inline)) inline c16_t c16sub(const c16_t a, const c16_t b) {
return (c16_t) { return (c16_t) {
.r = (int16_t) (a.r - b.r), .r = (int16_t) (a.r - b.r),
...@@ -309,6 +314,25 @@ The function implemented is : \f$\mathbf{y} = y + \alpha\mathbf{x}\f$ ...@@ -309,6 +314,25 @@ The function implemented is : \f$\mathbf{y} = y + \alpha\mathbf{x}\f$
*/ */
void multadd_real_vector_complex_scalar(const int16_t *x, const int16_t *alpha, int16_t *y, uint32_t N); void multadd_real_vector_complex_scalar(const int16_t *x, const int16_t *alpha, int16_t *y, uint32_t N);
// Same with correct types
static inline void multaddRealVectorComplexScalar(const c16_t *in, const c16_t alpha, c16_t *out, uint32_t N)
{
// do 8 multiplications at a time
simd_q15_t *x_128 = (simd_q15_t *)in, *y_128 = (simd_q15_t *)out;
// printf("alpha = %d,%d\n",alpha[0],alpha[1]);
const simd_q15_t alpha_r_128 = set1_int16(alpha.r);
const simd_q15_t alpha_i_128 = set1_int16(alpha.i);
for (unsigned int i = 0; i < N >> 3; i++) {
const simd_q15_t yr = mulhi_s1_int16(alpha_r_128, x_128[i]);
const simd_q15_t yi = mulhi_s1_int16(alpha_i_128, x_128[i]);
const simd_q15_t tmp = simde_mm_loadu_si128(y_128);
simde_mm_storeu_si128(y_128++, simde_mm_adds_epi16(tmp, simde_mm_unpacklo_epi16(yr, yi)));
const simd_q15_t tmp2 = simde_mm_loadu_si128(y_128);
simde_mm_storeu_si128(y_128++, simde_mm_adds_epi16(tmp2, simde_mm_unpackhi_epi16(yr, yi)));
}
}
static __attribute__((always_inline)) inline void multadd_real_four_symbols_vector_complex_scalar(const int16_t *x, static __attribute__((always_inline)) inline void multadd_real_four_symbols_vector_complex_scalar(const int16_t *x,
c16_t *alpha, c16_t *alpha,
c16_t *y) c16_t *y)
......
...@@ -307,16 +307,6 @@ typedef struct { ...@@ -307,16 +307,6 @@ typedef struct {
fapi_nr_ul_config_srs_pdu srs_config_pdu; fapi_nr_ul_config_srs_pdu srs_config_pdu;
} NR_UE_SRS; } NR_UE_SRS;
// structure used for multiple SSB detection
typedef struct NR_UE_SSB {
uint8_t i_ssb; // i_ssb between 0 and 7 (it corresponds to ssb_index only for Lmax=4,8)
uint8_t n_hf; // n_hf = 0,1 for Lmax =4 or n_hf = 0 for Lmax =8,64
uint32_t metric; // metric to order SSB hypothesis
uint32_t c_re;
uint32_t c_im;
struct NR_UE_SSB *next_ssb;
} NR_UE_SSB;
typedef struct UE_NR_SCAN_INFO_s { typedef struct UE_NR_SCAN_INFO_s {
/// 10 best amplitudes (linear) for each pss signals /// 10 best amplitudes (linear) for each pss signals
int32_t amp[3][10]; int32_t amp[3][10];
......
...@@ -115,7 +115,7 @@ typedef enum{ ...@@ -115,7 +115,7 @@ typedef enum{
typedef struct { typedef struct {
uint8_t k_0_p[MAX_NUM_NR_SRS_AP][MAX_NUM_NR_SRS_SYMBOLS]; uint8_t k_0_p[MAX_NUM_NR_SRS_AP][MAX_NUM_NR_SRS_SYMBOLS];
uint8_t srs_generated_signal_bits; uint8_t srs_generated_signal_bits;
int32_t **srs_generated_signal; c16_t **srs_generated_signal;
nfapi_nr_srs_pdu_t srs_pdu; nfapi_nr_srs_pdu_t srs_pdu;
} nr_srs_info_t; } nr_srs_info_t;
......
...@@ -951,7 +951,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) ...@@ -951,7 +951,7 @@ int phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
slot_rx, slot_rx,
srs_pdu, srs_pdu,
gNB->nr_srs_info[i], gNB->nr_srs_info[i],
(const int32_t **)gNB->nr_srs_info[i]->srs_generated_signal, (const c16_t**)gNB->nr_srs_info[i]->srs_generated_signal,
srs_received_signal, srs_received_signal,
srs_estimated_channel_freq, srs_estimated_channel_freq,
srs_estimated_channel_time, srs_estimated_channel_time,
......
...@@ -776,7 +776,7 @@ int main(int argc, char *argv[]) ...@@ -776,7 +776,7 @@ int main(int argc, char *argv[])
AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n"); AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
int8_t index = get_index_for_dmrs_lowpapr_seq((NR_NB_SC_PER_RB/2) * nb_rb); int index = get_index_for_dmrs_lowpapr_seq((NR_NB_SC_PER_RB / 2) * nb_rb);
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n"); AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
dmrs_config_type = pusch_dmrs_type1; dmrs_config_type = pusch_dmrs_type1;
......
...@@ -78,8 +78,8 @@ void generate_reference_signals(void) ...@@ -78,8 +78,8 @@ void generate_reference_signals(void)
assert(0); assert(0);
} }
for (int n=0; n<ul_allocated_re[Msc_RS]; n++) { for (int n=0; n<ul_allocated_re[Msc_RS]; n++) {
if ((ul_ref_sigs[u][v][Msc_RS][2*n] != rv_ul_ref_sig[u][v][Msc_RS_index_nr][2*n]) if ((ul_ref_sigs[u][v][Msc_RS][n].r != rv_ul_ref_sig[u][v][Msc_RS_index_nr][n].r)
|| (ul_ref_sigs[u][v][Msc_RS][2*n+1] != rv_ul_ref_sig[u][v][Msc_RS_index_nr][2*n+1])) { || (ul_ref_sigs[u][v][Msc_RS][n].i != rv_ul_ref_sig[u][v][Msc_RS_index_nr][n].i)) {
number_differencies++; number_differencies++;
} }
} }
...@@ -157,9 +157,7 @@ void default_srs_configuration(NR_DL_FRAME_PARMS *frame_parms) ...@@ -157,9 +157,7 @@ void default_srs_configuration(NR_DL_FRAME_PARMS *frame_parms)
* for various combinations of parameters * for various combinations of parameters
* *
*********************************************************************/ *********************************************************************/
int test_srs_single(NR_DL_FRAME_PARMS *frame_parms, int test_srs_single(NR_DL_FRAME_PARMS *frame_parms, c16_t *txptr, UE_nr_rxtx_proc_t *proc)
int32_t *txptr,
UE_nr_rxtx_proc_t *proc)
{ {
SRS_Resource_t *p_SRS_Resource = frame_parms->srs_nr.p_SRS_ResourceSetList[0]->p_srs_ResourceList[0]; SRS_Resource_t *p_SRS_Resource = frame_parms->srs_nr.p_SRS_ResourceSetList[0]->p_srs_ResourceList[0];
......
This diff is collapsed.
...@@ -459,6 +459,8 @@ static void nr_rrc_ue_decode_NR_BCCH_BCH_Message(NR_UE_RRC_INST_t *rrc, ...@@ -459,6 +459,8 @@ static void nr_rrc_ue_decode_NR_BCCH_BCH_Message(NR_UE_RRC_INST_t *rrc,
LOG_E(NR_RRC, "NR_BCCH_BCH decode error\n"); LOG_E(NR_RRC, "NR_BCCH_BCH decode error\n");
return; return;
} }
if (LOG_DEBUGFLAG(DEBUG_ASN1))
xer_fprint(stdout, &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message);
// Actions following cell selection while T311 is running // Actions following cell selection while T311 is running
NR_UE_Timers_Constants_t *timers = &rrc->timers_and_constants; NR_UE_Timers_Constants_t *timers = &rrc->timers_and_constants;
...@@ -717,10 +719,6 @@ static int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(NR_UE_RRC_INST_t *rrc, ...@@ -717,10 +719,6 @@ static int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(NR_UE_RRC_INST_t *rrc,
(const void *)Sdu, (const void *)Sdu,
Sdu_len); Sdu_len);
if (LOG_DEBUGFLAG(DEBUG_ASN1)) {
xer_fprint(stdout, &asn_DEF_NR_BCCH_DL_SCH_Message,(void *)bcch_message);
}
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) { if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
LOG_E(NR_RRC, "[UE %ld] Failed to decode BCCH_DLSCH_MESSAGE (%zu bits)\n", rrc->ue_id, dec_rval.consumed); LOG_E(NR_RRC, "[UE %ld] Failed to decode BCCH_DLSCH_MESSAGE (%zu bits)\n", rrc->ue_id, dec_rval.consumed);
log_dump(NR_RRC, Sdu, Sdu_len, LOG_DUMP_CHAR," Received bytes:\n"); log_dump(NR_RRC, Sdu, Sdu_len, LOG_DUMP_CHAR," Received bytes:\n");
...@@ -730,6 +728,10 @@ static int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(NR_UE_RRC_INST_t *rrc, ...@@ -730,6 +728,10 @@ static int8_t nr_rrc_ue_decode_NR_BCCH_DL_SCH_Message(NR_UE_RRC_INST_t *rrc,
return -1; return -1;
} }
if (LOG_DEBUGFLAG(DEBUG_ASN1)) {
xer_fprint(stdout, &asn_DEF_NR_BCCH_DL_SCH_Message,(void *)bcch_message);
}
if (bcch_message->message.present == NR_BCCH_DL_SCH_MessageType_PR_c1) { if (bcch_message->message.present == NR_BCCH_DL_SCH_MessageType_PR_c1) {
switch (bcch_message->message.choice.c1->present) { switch (bcch_message->message.choice.c1->present) {
case NR_BCCH_DL_SCH_MessageType__c1_PR_systemInformationBlockType1: case NR_BCCH_DL_SCH_MessageType__c1_PR_systemInformationBlockType1:
......
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