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OpenXG-RAN
Commits
c6498ccf
Commit
c6498ccf
authored
Apr 14, 2022
by
francescomani
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Plain Diff
addressing review
parent
d3f90a90
Changes
5
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Showing
5 changed files
with
20 additions
and
23 deletions
+20
-23
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+6
-7
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+2
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+2
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+8
-10
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+2
-2
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
c6498ccf
...
...
@@ -53,15 +53,14 @@
#define WORD 32
//#define SIZE_OF_POINTER sizeof (void *)
const
int
set_dl_tda
(
gNB_MAC_INST
*
nrmac
,
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
)
{
const
int
get_dl_tda
(
const
gNB_MAC_INST
*
nrmac
,
const
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
)
{
const
int
n
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
const
NR_TDD_UL_DL_Pattern_t
*
tdd
=
scc
->
tdd_UL_DL_ConfigurationCommon
?
&
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern1
:
NULL
;
if
(
tdd
)
{
if
(
tdd
->
nrofDownlinkSymbols
>
1
)
{
// if there is a mixed slot where we can transmit DL
int
nr_slots_period
=
n
/
get_nb_periods_per_frame
(
tdd
->
dl_UL_TransmissionPeriodicity
)
;
const
int
nr_slots_period
=
tdd
->
nrofDownlinkSlots
+
tdd
->
nrofUplinkSlots
+
1
;
if
((
slot
%
nr_slots_period
)
==
tdd
->
nrofDownlinkSlots
)
return
1
;
}
...
...
@@ -455,7 +454,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
int
current_harq_pid
)
{
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
module_id
];
NR_ServingCellConfigCommon_t
*
scc
=
nr_mac
->
common_channels
->
ServingCellConfigCommon
;
const
NR_ServingCellConfigCommon_t
*
scc
=
nr_mac
->
common_channels
->
ServingCellConfigCommon
;
NR_UE_info_t
*
UE_info
=
&
nr_mac
->
UE_info
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
NR_sched_pdsch_t
*
retInfo
=
&
sched_ctrl
->
harq_processes
[
current_harq_pid
].
sched_pdsch
;
...
...
@@ -485,7 +484,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
int
rbStart
=
0
;
// start wrt BWPstart
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
int
rbSize
=
0
;
const
int
tda
=
s
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
const
int
tda
=
g
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
AssertFatal
(
tda
>=
0
,
"Unable to find PDSCH time domain allocation in list
\n
"
);
if
(
tda
==
retInfo
->
time_domain_allocation
)
{
...
...
@@ -829,7 +828,7 @@ void pf_dl(module_id_t module_id,
if
(
max_num_ue
<
0
)
return
;
/* MCS has been set above */
const
int
tda
=
s
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
const
int
tda
=
g
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
AssertFatal
(
tda
>=
0
,
"Unable to find PDSCH time domain allocation in list
\n
"
);
NR_sched_pdsch_t
*
sched_pdsch
=
&
sched_ctrl
->
sched_pdsch
;
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
...
...
@@ -901,7 +900,7 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
/* This is temporary and it assumes all UEs have the same BWP and TDA*/
int
UE_id
=
UE_info
->
list
.
head
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
s
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
const
int
tda
=
g
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
int
startSymbolIndex
,
nrOfSymbols
;
const
struct
NR_PDSCH_TimeDomainResourceAllocationList
*
tdaList
=
sched_ctrl
->
active_bwp
?
sched_ctrl
->
active_bwp
->
bwp_Common
->
pdsch_ConfigCommon
->
choice
.
setup
->
pdsch_TimeDomainAllocationList
:
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
c6498ccf
...
...
@@ -276,7 +276,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
UE_id
);
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
s
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
const
int
tda
=
g
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
ps
->
nrOfLayers
=
target_dl_Nl
;
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
nrOfLayers
!=
target_dl_Nl
)
...
...
@@ -436,7 +436,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
s
et_ul_tda
(
nr_mac
,
scc
,
slot
);
const
int
tda
=
g
et_ul_tda
(
nr_mac
,
scc
,
slot
);
if
(
tda
<
0
)
return
false
;
const
struct
NR_PUSCH_TimeDomainResourceAllocationList
*
tdaList
=
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
c6498ccf
...
...
@@ -2899,7 +2899,7 @@ void nr_mac_update_timers(module_id_t module_id,
NR_pdsch_semi_static_t
*
ps
=
&
sched_ctrl
->
pdsch_semi_static
;
const
uint8_t
layers
=
set_dl_nrOfLayers
(
sched_ctrl
);
const
int
tda
=
s
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
const
int
tda
=
g
et_dl_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
nr_set_pdsch_semi_static
(
sib1
,
scc
,
...
...
@@ -2923,7 +2923,7 @@ void nr_mac_update_timers(module_id_t module_id,
int
dci_format
=
get_dci_format
(
sched_ctrl
);
const
uint8_t
num_dmrs_cdm_grps_no_data
=
(
ubwp
||
ubwpd
)
?
1
:
2
;
const
uint8_t
nrOfLayers
=
1
;
const
int
utda
=
s
et_ul_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
const
int
utda
=
g
et_ul_tda
(
RC
.
nrmac
[
module_id
],
scc
,
slot
);
nr_set_pusch_semi_static
(
sib1
,
scc
,
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
View file @
c6498ccf
...
...
@@ -46,16 +46,14 @@ int get_dci_format(NR_UE_sched_ctrl_t *sched_ctrl) {
return
(
dci_format
);
}
const
int
set_ul_tda
(
gNB_MAC_INST
*
nrmac
,
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
)
{
const
int
get_ul_tda
(
const
gNB_MAC_INST
*
nrmac
,
const
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
)
{
/* there is a mixed slot only when in TDD */
const
int
n
=
nr_slots_per_frame
[
*
scc
->
ssbSubcarrierSpacing
];
const
NR_TDD_UL_DL_Pattern_t
*
tdd
=
scc
->
tdd_UL_DL_ConfigurationCommon
?
&
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern1
:
NULL
;
const
NR_TDD_UL_DL_Pattern_t
*
tdd
=
scc
->
tdd_UL_DL_ConfigurationCommon
?
&
scc
->
tdd_UL_DL_ConfigurationCommon
->
pattern1
:
NULL
;
if
(
tdd
)
{
if
(
tdd
->
nrofUplinkSymbols
>
1
)
{
// if there is uplink symbols in mixed slot
int
nr_slots_period
=
n
/
get_nb_periods_per_frame
(
tdd
->
dl_UL_TransmissionPeriodicity
)
;
const
int
nr_slots_period
=
tdd
->
nrofDownlinkSlots
+
tdd
->
nrofUplinkSlots
+
1
;
if
((
slot
%
nr_slots_period
)
==
tdd
->
nrofUplinkSlots
)
return
1
;
}
...
...
@@ -848,7 +846,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
{
const
int
CC_id
=
0
;
gNB_MAC_INST
*
nr_mac
=
RC
.
nrmac
[
module_id
];
NR_ServingCellConfigCommon_t
*
scc
=
nr_mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
;
const
NR_ServingCellConfigCommon_t
*
scc
=
nr_mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
;
NR_UE_info_t
*
UE_info
=
&
nr_mac
->
UE_info
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
NR_sched_pusch_t
*
retInfo
=
&
sched_ctrl
->
ul_harq_processes
[
harq_pid
].
sched_pusch
;
...
...
@@ -867,7 +865,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
const
uint16_t
bwpSize
=
NRRIV2BW
(
genericParameters
->
locationAndBandwidth
,
MAX_BWP_SIZE
);
const
uint8_t
nrOfLayers
=
1
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
(
sched_ctrl
->
active_bwp
||
ubwpd
)
?
1
:
2
;
const
int
tda
=
s
et_ul_tda
(
nr_mac
,
scc
,
slot
);
const
int
tda
=
g
et_ul_tda
(
nr_mac
,
scc
,
slot
);
LOG_D
(
NR_MAC
,
"retInfo->time_domain_allocation = %d, tda = %d
\n
"
,
retInfo
->
time_domain_allocation
,
tda
);
LOG_D
(
NR_MAC
,
"num_dmrs_cdm_grps_no_data %d, tbs %d
\n
"
,
num_dmrs_cdm_grps_no_data
,
retInfo
->
tb_size
);
if
(
tda
==
retInfo
->
time_domain_allocation
)
{
...
...
@@ -1136,7 +1134,7 @@ void pf_ul(module_id_t module_id,
const
uint8_t
nrOfLayers
=
1
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
(
sched_ctrl
->
active_ubwp
||
ubwpd
)
?
1
:
2
;
int
dci_format
=
get_dci_format
(
sched_ctrl
);
const
int
tda
=
s
et_ul_tda
(
nrmac
,
scc
,
slot
);
const
int
tda
=
g
et_ul_tda
(
nrmac
,
scc
,
slot
);
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
dci_format
!=
dci_format
||
ps
->
nrOfLayers
!=
nrOfLayers
...
...
@@ -1276,7 +1274,7 @@ void pf_ul(module_id_t module_id,
const
uint8_t
nrOfLayers
=
1
;
const
uint8_t
num_dmrs_cdm_grps_no_data
=
(
sched_ctrl
->
active_ubwp
||
ubwpd
)
?
1
:
2
;
int
dci_format
=
get_dci_format
(
sched_ctrl
);
const
int
tda
=
s
et_ul_tda
(
nrmac
,
scc
,
slot
);
const
int
tda
=
g
et_ul_tda
(
nrmac
,
scc
,
slot
);
if
(
ps
->
time_domain_allocation
!=
tda
||
ps
->
dci_format
!=
dci_format
||
ps
->
nrOfLayers
!=
nrOfLayers
...
...
@@ -1369,7 +1367,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
* schedule now (slot + k2 is not UL slot) */
int
UE_id
=
UE_info
->
list
.
head
;
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
const
int
tda
=
s
et_ul_tda
(
nr_mac
,
scc
,
slot
);
const
int
tda
=
g
et_ul_tda
(
nr_mac
,
scc
,
slot
);
if
(
tda
<
0
)
return
false
;
int
K2
=
get_K2
(
scc
,
scc_sib1
,
sched_ctrl
->
active_ubwp
,
tda
,
mu
);
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
c6498ccf
...
...
@@ -522,8 +522,8 @@ void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
uint8_t
set_dl_nrOfLayers
(
NR_UE_sched_ctrl_t
*
sched_ctrl
);
int
get_dci_format
(
NR_UE_sched_ctrl_t
*
sched_ctrl
);
const
int
set_dl_tda
(
gNB_MAC_INST
*
nrmac
,
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
);
const
int
set_ul_tda
(
gNB_MAC_INST
*
nrmac
,
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
);
const
int
get_dl_tda
(
const
gNB_MAC_INST
*
nrmac
,
const
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
);
const
int
get_ul_tda
(
const
gNB_MAC_INST
*
nrmac
,
const
NR_ServingCellConfigCommon_t
*
scc
,
int
slot
);
bool
find_free_CCE
(
module_id_t
module_id
,
sub_frame_t
slot
,
int
UE_id
);
...
...
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