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OpenXG-RAN
Commits
ec40b34b
Commit
ec40b34b
authored
Aug 16, 2024
by
francescomani
Browse files
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Plain Diff
initial cleanup
parent
9126e3dd
Changes
3
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Showing
3 changed files
with
64 additions
and
312 deletions
+64
-312
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
+60
-88
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
+4
-188
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+0
-36
No files found.
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
View file @
ec40b34b
...
...
@@ -31,9 +31,7 @@
*/
#include "PHY/defs_gNB.h"
#include "PHY/defs_nr_common.h"
#include "PHY/sse_intrin.h"
#include "PHY/impl_defs_top.h"
#ifdef __aarch64__
#define USE_128BIT
...
...
@@ -55,13 +53,10 @@ int16_t saturating_sub(int16_t a, int16_t b)
//----------------------------------------------------------------------------------------------
// QPSK
//----------------------------------------------------------------------------------------------
void
nr_ulsch_qpsk_llr
(
int32_t
*
rxdataF_comp
,
int16_t
*
ulsch_llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
void
nr_qpsk_llr
(
int32_t
*
rxdataF_comp
,
int16_t
*
llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
{
c16_t
*
rxF
=
(
c16_t
*
)
rxdataF_comp
;
c16_t
*
llr32
=
(
c16_t
*
)
ulsch_
llr
;
c16_t
*
llr32
=
(
c16_t
*
)
llr
;
for
(
int
i
=
0
;
i
<
nb_re
;
i
++
)
{
llr32
[
i
].
r
=
rxF
[
i
].
r
>>
3
;
llr32
[
i
].
i
=
rxF
[
i
].
i
>>
3
;
...
...
@@ -72,11 +67,11 @@ void nr_ulsch_qpsk_llr(int32_t *rxdataF_comp,
// 16-QAM
//----------------------------------------------------------------------------------------------
void
nr_
ulsch_16qam_llr
(
int32_t
*
rxdataF_comp
,
int32_t
*
ul_ch_mag
,
int16_t
*
ulsch_
llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
void
nr_
16qam_llr
(
int32_t
*
rxdataF_comp
,
int32_t
*
ch_mag_in
,
int16_t
*
llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
{
simde__m256i
*
rxF_256
=
(
simde__m256i
*
)
rxdataF_comp
;
simde__m256i
*
ch_mag
=
(
simde__m256i
*
)
ul_ch_mag
;
int64_t
*
llr_64
=
(
int64_t
*
)
ulsch_
llr
;
simde__m256i
*
ch_mag
=
(
simde__m256i
*
)
ch_mag_in
;
int64_t
*
llr_64
=
(
int64_t
*
)
llr
;
#ifndef USE_128BIT
simde__m256i
xmm0
,
xmm1
,
xmm2
;
...
...
@@ -110,7 +105,7 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp, int32_t *ul_ch_mag, int16_t *ulsc
simde__m128i
*
rxF_128
=
(
simde__m128i
*
)
rxF_256
;
simde__m128i
*
ch_mag_128
=
(
simde__m128i
*
)
ch_mag
;
simde__m128i
*
ulsch_
llr_128
=
(
simde__m128i
*
)
llr_64
;
simde__m128i
*
llr_128
=
(
simde__m128i
*
)
llr_64
;
// Each iteration does 4 RE (gives 16 16bit-llrs)
for
(
int
i
=
0
;
i
<
(
nb_re
>>
2
);
i
++
)
{
...
...
@@ -119,9 +114,9 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp, int32_t *ul_ch_mag, int16_t *ulsc
// registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
xmm0
=
simde_mm_subs_epi16
(
*
ch_mag_128
,
xmm0
);
ulsch_
llr_128
[
0
]
=
simde_mm_unpacklo_epi32
(
*
rxF_128
,
xmm0
);
// llr128[0] contains the llrs of the 1st,2nd,5th and 6th REs
ulsch_
llr_128
[
1
]
=
simde_mm_unpackhi_epi32
(
*
rxF_128
,
xmm0
);
// llr128[1] contains the llrs of the 3rd, 4th, 7th and 8th REs
ulsch_
llr_128
+=
2
;
llr_128
[
0
]
=
simde_mm_unpacklo_epi32
(
*
rxF_128
,
xmm0
);
// llr128[0] contains the llrs of the 1st,2nd,5th and 6th REs
llr_128
[
1
]
=
simde_mm_unpackhi_epi32
(
*
rxF_128
,
xmm0
);
// llr128[1] contains the llrs of the 3rd, 4th, 7th and 8th REs
llr_128
+=
2
;
rxF_128
++
;
ch_mag_128
++
;
}
...
...
@@ -130,17 +125,17 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp, int32_t *ul_ch_mag, int16_t *ulsc
nb_re
&=
0x3
;
int16_t
*
rxDataF_i16
=
(
int16_t
*
)
rxF_128
;
int16_t
*
ul_
ch_mag_i16
=
(
int16_t
*
)
ch_mag_128
;
int16_t
*
ulsch_llr_i16
=
(
int16_t
*
)
ulsch_
llr_128
;
int16_t
*
ch_mag_i16
=
(
int16_t
*
)
ch_mag_128
;
int16_t
*
llr_i16
=
(
int16_t
*
)
llr_128
;
for
(
uint
i
=
0U
;
i
<
nb_re
;
i
++
)
{
int16_t
real
=
rxDataF_i16
[
2
*
i
];
int16_t
imag
=
rxDataF_i16
[
2
*
i
+
1
];
int16_t
mag_real
=
ul_
ch_mag_i16
[
2
*
i
];
int16_t
mag_imag
=
ul_
ch_mag_i16
[
2
*
i
+
1
];
ulsch_
llr_i16
[
4
*
i
]
=
real
;
ulsch_
llr_i16
[
4
*
i
+
1
]
=
imag
;
ulsch_
llr_i16
[
4
*
i
+
2
]
=
saturating_sub
(
mag_real
,
abs
(
real
));
ulsch_
llr_i16
[
4
*
i
+
3
]
=
saturating_sub
(
mag_imag
,
abs
(
imag
));
int16_t
mag_real
=
ch_mag_i16
[
2
*
i
];
int16_t
mag_imag
=
ch_mag_i16
[
2
*
i
+
1
];
llr_i16
[
4
*
i
]
=
real
;
llr_i16
[
4
*
i
+
1
]
=
imag
;
llr_i16
[
4
*
i
+
2
]
=
saturating_sub
(
mag_real
,
abs
(
real
));
llr_i16
[
4
*
i
+
3
]
=
saturating_sub
(
mag_imag
,
abs
(
imag
));
}
}
...
...
@@ -148,19 +143,14 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp, int32_t *ul_ch_mag, int16_t *ulsc
// 64-QAM
//----------------------------------------------------------------------------------------------
void
nr_ulsch_64qam_llr
(
int32_t
*
rxdataF_comp
,
int32_t
*
ul_ch_mag
,
int32_t
*
ul_ch_magb
,
int16_t
*
ulsch_llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
void
nr_64qam_llr
(
int32_t
*
rxdataF_comp
,
int32_t
*
ch_mag
,
int32_t
*
ch_mag2
,
int16_t
*
llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
{
simde__m256i
*
rxF
=
(
simde__m256i
*
)
rxdataF_comp
;
simde__m256i
*
ch_maga
=
(
simde__m256i
*
)
ul_
ch_mag
;
simde__m256i
*
ch_magb
=
(
simde__m256i
*
)
ul_ch_magb
;
simde__m256i
*
ch_maga
=
(
simde__m256i
*
)
ch_mag
;
simde__m256i
*
ch_magb
=
(
simde__m256i
*
)
ch_mag2
;
int32_t
*
llr_32
=
(
int32_t
*
)
ulsch_
llr
;
int32_t
*
llr_32
=
(
int32_t
*
)
llr
;
#ifndef USE_128BIT
simde__m256i
xmm0
,
xmm1
,
xmm2
;
...
...
@@ -244,40 +234,40 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
nb_re
&=
0x3
;
int16_t
*
rxDataF_i16
=
(
int16_t
*
)
rxF_128
;
int16_t
*
ul_
ch_mag_i16
=
(
int16_t
*
)
ch_mag_128
;
int16_t
*
ul_
ch_magb_i16
=
(
int16_t
*
)
ch_magb_128
;
int16_t
*
ch_mag_i16
=
(
int16_t
*
)
ch_mag_128
;
int16_t
*
ch_magb_i16
=
(
int16_t
*
)
ch_magb_128
;
int16_t
*
llr_i16
=
(
int16_t
*
)
llr64
;
for
(
int
i
=
0
;
i
<
nb_re
;
i
++
)
{
int16_t
real
=
rxDataF_i16
[
2
*
i
];
int16_t
imag
=
rxDataF_i16
[
2
*
i
+
1
];
int16_t
mag_real
=
ul_
ch_mag_i16
[
2
*
i
];
int16_t
mag_imag
=
ul_
ch_mag_i16
[
2
*
i
+
1
];
int16_t
mag_real
=
ch_mag_i16
[
2
*
i
];
int16_t
mag_imag
=
ch_mag_i16
[
2
*
i
+
1
];
llr_i16
[
6
*
i
]
=
real
;
llr_i16
[
6
*
i
+
1
]
=
imag
;
llr_i16
[
6
*
i
+
2
]
=
saturating_sub
(
mag_real
,
abs
(
real
));
llr_i16
[
6
*
i
+
3
]
=
saturating_sub
(
mag_imag
,
abs
(
imag
));
int16_t
mag_realb
=
ul_
ch_magb_i16
[
2
*
i
];
int16_t
mag_imagb
=
ul_
ch_magb_i16
[
2
*
i
+
1
];
int16_t
mag_realb
=
ch_magb_i16
[
2
*
i
];
int16_t
mag_imagb
=
ch_magb_i16
[
2
*
i
+
1
];
llr_i16
[
6
*
i
+
4
]
=
saturating_sub
(
mag_realb
,
abs
(
llr_i16
[
6
*
i
+
2
]));
llr_i16
[
6
*
i
+
5
]
=
saturating_sub
(
mag_imagb
,
abs
(
llr_i16
[
6
*
i
+
3
]));
}
simde_mm_empty
();
}
void
nr_
ulsch_
256qam_llr
(
int32_t
*
rxdataF_comp
,
int32_t
*
ul_
ch_mag
,
int32_t
*
ul_ch_magb
,
int32_t
*
ul_ch_magc
,
int16_t
*
ulsch_
llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
void
nr_256qam_llr
(
int32_t
*
rxdataF_comp
,
int32_t
*
ch_mag
,
int32_t
*
ch_mag2
,
int32_t
*
ch_mag3
,
int16_t
*
llr
,
uint32_t
nb_re
,
uint8_t
symbol
)
{
simde__m256i
*
rxF_256
=
(
simde__m256i
*
)
rxdataF_comp
;
simde__m256i
*
llr256
=
(
simde__m256i
*
)
ulsch_
llr
;
simde__m256i
*
llr256
=
(
simde__m256i
*
)
llr
;
simde__m256i
*
ch_maga
=
(
simde__m256i
*
)
ul_
ch_mag
;
simde__m256i
*
ch_magb
=
(
simde__m256i
*
)
ul_ch_magb
;
simde__m256i
*
ch_magc
=
(
simde__m256i
*
)
ul_ch_magc
;
simde__m256i
*
ch_maga
=
(
simde__m256i
*
)
ch_mag
;
simde__m256i
*
ch_magb
=
(
simde__m256i
*
)
ch_mag2
;
simde__m256i
*
ch_magc
=
(
simde__m256i
*
)
ch_mag3
;
#ifndef USE_128BIT
simde__m256i
xmm0
,
xmm1
,
xmm2
,
xmm3
,
xmm4
,
xmm5
,
xmm6
;
...
...
@@ -357,26 +347,26 @@ void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
if
(
nb_re
&
3
)
{
for
(
int
i
=
0
;
i
<
(
nb_re
&
0x3
);
i
++
)
{
int16_t
*
rxDataF_i16
=
(
int16_t
*
)
rxF_128
;
int16_t
*
ul_
ch_mag_i16
=
(
int16_t
*
)
ch_maga_128
;
int16_t
*
ul_
ch_magb_i16
=
(
int16_t
*
)
ch_magb_128
;
int16_t
*
ul_
ch_magc_i16
=
(
int16_t
*
)
ch_magc_128
;
int16_t
*
ulsch_
llr_i16
=
(
int16_t
*
)
llr_128
;
int16_t
*
ch_mag_i16
=
(
int16_t
*
)
ch_maga_128
;
int16_t
*
ch_magb_i16
=
(
int16_t
*
)
ch_magb_128
;
int16_t
*
ch_magc_i16
=
(
int16_t
*
)
ch_magc_128
;
int16_t
*
llr_i16
=
(
int16_t
*
)
llr_128
;
int16_t
real
=
rxDataF_i16
[
2
*
i
+
0
];
int16_t
imag
=
rxDataF_i16
[
2
*
i
+
1
];
int16_t
mag_real
=
ul_
ch_mag_i16
[
2
*
i
];
int16_t
mag_imag
=
ul_
ch_mag_i16
[
2
*
i
+
1
];
ulsch_
llr_i16
[
8
*
i
]
=
real
;
ulsch_
llr_i16
[
8
*
i
+
1
]
=
imag
;
ulsch_
llr_i16
[
8
*
i
+
2
]
=
saturating_sub
(
mag_real
,
abs
(
real
));
ulsch_
llr_i16
[
8
*
i
+
3
]
=
saturating_sub
(
mag_imag
,
abs
(
imag
));
int16_t
magb_real
=
ul_
ch_magb_i16
[
2
*
i
];
int16_t
magb_imag
=
ul_
ch_magb_i16
[
2
*
i
+
1
];
ulsch_llr_i16
[
8
*
i
+
4
]
=
saturating_sub
(
magb_real
,
abs
(
ulsch_
llr_i16
[
8
*
i
+
2
]));
ulsch_llr_i16
[
8
*
i
+
5
]
=
saturating_sub
(
magb_imag
,
abs
(
ulsch_
llr_i16
[
8
*
i
+
3
]));
int16_t
magc_real
=
ul_
ch_magc_i16
[
2
*
i
];
int16_t
magc_imag
=
ul_
ch_magc_i16
[
2
*
i
+
1
];
ulsch_llr_i16
[
8
*
i
+
6
]
=
saturating_sub
(
magc_real
,
abs
(
ulsch_
llr_i16
[
8
*
i
+
4
]));
ulsch_llr_i16
[
8
*
i
+
7
]
=
saturating_sub
(
magc_imag
,
abs
(
ulsch_
llr_i16
[
8
*
i
+
5
]));
int16_t
mag_real
=
ch_mag_i16
[
2
*
i
];
int16_t
mag_imag
=
ch_mag_i16
[
2
*
i
+
1
];
llr_i16
[
8
*
i
]
=
real
;
llr_i16
[
8
*
i
+
1
]
=
imag
;
llr_i16
[
8
*
i
+
2
]
=
saturating_sub
(
mag_real
,
abs
(
real
));
llr_i16
[
8
*
i
+
3
]
=
saturating_sub
(
mag_imag
,
abs
(
imag
));
int16_t
magb_real
=
ch_magb_i16
[
2
*
i
];
int16_t
magb_imag
=
ch_magb_i16
[
2
*
i
+
1
];
llr_i16
[
8
*
i
+
4
]
=
saturating_sub
(
magb_real
,
abs
(
llr_i16
[
8
*
i
+
2
]));
llr_i16
[
8
*
i
+
5
]
=
saturating_sub
(
magb_imag
,
abs
(
llr_i16
[
8
*
i
+
3
]));
int16_t
magc_real
=
ch_magc_i16
[
2
*
i
];
int16_t
magc_imag
=
ch_magc_i16
[
2
*
i
+
1
];
llr_i16
[
8
*
i
+
6
]
=
saturating_sub
(
magc_real
,
abs
(
llr_i16
[
8
*
i
+
4
]));
llr_i16
[
8
*
i
+
7
]
=
saturating_sub
(
magc_imag
,
abs
(
llr_i16
[
8
*
i
+
5
]));
}
}
simde_mm_empty
();
...
...
@@ -393,34 +383,16 @@ void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
{
switch
(
mod_order
){
case
2
:
nr_ulsch_qpsk_llr
(
rxdataF_comp
,
ulsch_llr
,
nb_re
,
symbol
);
nr_qpsk_llr
(
rxdataF_comp
,
ulsch_llr
,
nb_re
,
symbol
);
break
;
case
4
:
nr_ulsch_16qam_llr
(
rxdataF_comp
,
ul_ch_mag
,
ulsch_llr
,
nb_re
,
symbol
);
nr_16qam_llr
(
rxdataF_comp
,
ul_ch_mag
,
ulsch_llr
,
nb_re
,
symbol
);
break
;
case
6
:
nr_ulsch_64qam_llr
(
rxdataF_comp
,
ul_ch_mag
,
ul_ch_magb
,
ulsch_llr
,
nb_re
,
symbol
);
nr_64qam_llr
(
rxdataF_comp
,
ul_ch_mag
,
ul_ch_magb
,
ulsch_llr
,
nb_re
,
symbol
);
break
;
case
8
:
nr_ulsch_256qam_llr
(
rxdataF_comp
,
ul_ch_mag
,
ul_ch_magb
,
ul_ch_magc
,
ulsch_llr
,
nb_re
,
symbol
);
nr_256qam_llr
(
rxdataF_comp
,
ul_ch_mag
,
ul_ch_magb
,
ul_ch_magc
,
ulsch_llr
,
nb_re
,
symbol
);
break
;
default:
AssertFatal
(
1
==
0
,
"nr_ulsch_compute_llr: invalid Qm value, symbol = %d, Qm = %d
\n
"
,
symbol
,
mod_order
);
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
View file @
ec40b34b
...
...
@@ -36,6 +36,10 @@
#include "PHY/TOOLS/tools_defs.h"
#include "PHY/sse_intrin.h"
#ifdef __aarch64__
#define USE_128BIT
#endif
//#define DEBUG_LLR_SIC
//==============================================================================================
...
...
@@ -323,191 +327,3 @@ void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
simde_m_empty
();
}
//==============================================================================================
// DUAL-STREAM
//==============================================================================================
//----------------------------------------------------------------------------------------------
// QPSK
//----------------------------------------------------------------------------------------------
simde__m128i
y0r_over2
__attribute__
((
aligned
(
16
)));
simde__m128i
y0i_over2
__attribute__
((
aligned
(
16
)));
simde__m128i
y1r_over2
__attribute__
((
aligned
(
16
)));
simde__m128i
y1i_over2
__attribute__
((
aligned
(
16
)));
simde__m128i
A
__attribute__
((
aligned
(
16
)));
simde__m128i
B
__attribute__
((
aligned
(
16
)));
simde__m128i
C
__attribute__
((
aligned
(
16
)));
simde__m128i
D
__attribute__
((
aligned
(
16
)));
simde__m128i
E
__attribute__
((
aligned
(
16
)));
simde__m128i
F
__attribute__
((
aligned
(
16
)));
simde__m128i
G
__attribute__
((
aligned
(
16
)));
simde__m128i
H
__attribute__
((
aligned
(
16
)));
void
nr_qpsk_qpsk
(
short
*
stream0_in
,
short
*
stream1_in
,
short
*
stream0_out
,
short
*
rho01
,
int
length
)
{
/*
This function computes the LLRs of stream 0 (s_0) in presence of the interfering stream 1 (s_1) assuming that both symbols are QPSK. It can be used for both MU-MIMO interference-aware receiver or for SU-MIMO receivers.
Parameters:
stream0_in = Matched filter output y0' = (h0*g0)*y0
stream1_in = Matched filter output y1' = (h0*g1)*y0
stream0_out = LLRs
rho01 = Correlation between the two effective channels \rho_{10} = (h1*g1)*(h0*g0)
length = number of resource elements
*/
simde__m128i
*
rho01_128i
=
(
simde__m128i
*
)
rho01
;
simde__m128i
*
stream0_128i_in
=
(
simde__m128i
*
)
stream0_in
;
simde__m128i
*
stream1_128i_in
=
(
simde__m128i
*
)
stream1_in
;
simde__m128i
*
stream0_128i_out
=
(
simde__m128i
*
)
stream0_out
;
simde__m128i
ONE_OVER_SQRT_8
=
simde_mm_set1_epi16
(
23170
);
//round(2^16/sqrt(8))
int
i
;
for
(
i
=
0
;
i
<
length
>>
2
;
i
+=
2
)
{
// in each iteration, we take 8 complex samples
simde__m128i
xmm0
=
rho01_128i
[
i
];
// 4 symbols
simde__m128i
xmm1
=
rho01_128i
[
i
+
1
];
// put (rho_r + rho_i)/2sqrt2 in rho_rpi
// put (rho_r - rho_i)/2sqrt2 in rho_rmi
xmm0
=
simde_mm_shufflelo_epi16
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm0
=
simde_mm_shufflehi_epi16
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm0
=
simde_mm_shuffle_epi32
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shufflelo_epi16
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shufflehi_epi16
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shuffle_epi32
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
//xmm0 = [Re(0,1) Re(2,3) Im(0,1) Im(2,3)]
//xmm1 = [Re(4,5) Re(6,7) Im(4,5) Im(6,7)]
simde__m128i
xmm2
=
simde_mm_unpacklo_epi64
(
xmm0
,
xmm1
);
// Re(rho)
simde__m128i
xmm3
=
simde_mm_unpackhi_epi64
(
xmm0
,
xmm1
);
// Im(rho)
simde__m128i
rho_rpi
=
simde_mm_adds_epi16
(
xmm2
,
xmm3
);
// rho = Re(rho) + Im(rho)
simde__m128i
rho_rmi
=
simde_mm_subs_epi16
(
xmm2
,
xmm3
);
// rho* = Re(rho) - Im(rho)
// divide by sqrt(8), no shift needed ONE_OVER_SQRT_8 = Q1.16
rho_rpi
=
simde_mm_mulhi_epi16
(
rho_rpi
,
ONE_OVER_SQRT_8
);
rho_rmi
=
simde_mm_mulhi_epi16
(
rho_rmi
,
ONE_OVER_SQRT_8
);
// Compute LLR for first bit of stream 0
// Compute real and imaginary parts of MF output for stream 0
xmm0
=
stream0_128i_in
[
i
];
xmm1
=
stream0_128i_in
[
i
+
1
];
xmm0
=
simde_mm_shufflelo_epi16
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm0
=
simde_mm_shufflehi_epi16
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm0
=
simde_mm_shuffle_epi32
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shufflelo_epi16
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shufflehi_epi16
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shuffle_epi32
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
//xmm0 = [Re(0,1) Re(2,3) Im(0,1) Im(2,3)]
//xmm1 = [Re(4,5) Re(6,7) Im(4,5) Im(6,7)]
simde__m128i
y0r
=
simde_mm_unpacklo_epi64
(
xmm0
,
xmm1
);
// = [y0r(1),y0r(2),y0r(3),y0r(4)]
simde__m128i
y0i
=
simde_mm_unpackhi_epi64
(
xmm0
,
xmm1
);
simde__m128i
y0r_over2
=
simde_mm_srai_epi16
(
y0r
,
1
);
// divide by 2
simde__m128i
y0i_over2
=
simde_mm_srai_epi16
(
y0i
,
1
);
// divide by 2
// Compute real and imaginary parts of MF output for stream 1
xmm0
=
stream1_128i_in
[
i
];
xmm1
=
stream1_128i_in
[
i
+
1
];
xmm0
=
simde_mm_shufflelo_epi16
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm0
=
simde_mm_shufflehi_epi16
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm0
=
simde_mm_shuffle_epi32
(
xmm0
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shufflelo_epi16
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shufflehi_epi16
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
xmm1
=
simde_mm_shuffle_epi32
(
xmm1
,
0xd8
);
// SIMDE_MM_SHUFFLE(0,2,1,3));
//xmm0 = [Re(0,1) Re(2,3) Im(0,1) Im(2,3)]
//xmm1 = [Re(4,5) Re(6,7) Im(4,5) Im(6,7)]
simde__m128i
y1r
=
simde_mm_unpacklo_epi64
(
xmm0
,
xmm1
);
//[y1r(1),y1r(2),y1r(3),y1r(4)]
simde__m128i
y1i
=
simde_mm_unpackhi_epi64
(
xmm0
,
xmm1
);
//[y1i(1),y1i(2),y1i(3),y1i(4)]
simde__m128i
y1r_over2
=
simde_mm_srai_epi16
(
y1r
,
1
);
// divide by 2
simde__m128i
y1i_over2
=
simde_mm_srai_epi16
(
y1i
,
1
);
// divide by 2
// Compute the terms for the LLR of first bit
xmm0
=
simde_mm_setzero_si128
();
// ZERO
// 1 term for numerator of LLR
xmm3
=
simde_mm_subs_epi16
(
y1r_over2
,
rho_rpi
);
A
=
simde_mm_abs_epi16
(
xmm3
);
// A = |y1r/2 - rho/sqrt(8)|
xmm2
=
simde_mm_adds_epi16
(
A
,
y0i_over2
);
// = |y1r/2 - rho/sqrt(8)| + y0i/2
xmm3
=
simde_mm_subs_epi16
(
y1i_over2
,
rho_rmi
);
B
=
simde_mm_abs_epi16
(
xmm3
);
// B = |y1i/2 - rho*/sqrt(8)|
simde__m128i
logmax_num_re0
=
simde_mm_adds_epi16
(
B
,
xmm2
);
// = |y1r/2 - rho/sqrt(8)|+|y1i/2 - rho*/sqrt(8)| + y0i/2
// 2 term for numerator of LLR
xmm3
=
simde_mm_subs_epi16
(
y1r_over2
,
rho_rmi
);
C
=
simde_mm_abs_epi16
(
xmm3
);
// C = |y1r/2 - rho*/4|
xmm2
=
simde_mm_subs_epi16
(
C
,
y0i_over2
);
// = |y1r/2 - rho*/4| - y0i/2
xmm3
=
simde_mm_adds_epi16
(
y1i_over2
,
rho_rpi
);
D
=
simde_mm_abs_epi16
(
xmm3
);
// D = |y1i/2 + rho/4|
xmm2
=
simde_mm_adds_epi16
(
xmm2
,
D
);
// |y1r/2 - rho*/4| + |y1i/2 + rho/4| - y0i/2
logmax_num_re0
=
simde_mm_max_epi16
(
logmax_num_re0
,
xmm2
);
// max, numerator done
// 1 term for denominator of LLR
xmm3
=
simde_mm_adds_epi16
(
y1r_over2
,
rho_rmi
);
E
=
simde_mm_abs_epi16
(
xmm3
);
// E = |y1r/2 + rho*/4|
xmm2
=
simde_mm_adds_epi16
(
E
,
y0i_over2
);
// = |y1r/2 + rho*/4| + y0i/2
xmm3
=
simde_mm_subs_epi16
(
y1i_over2
,
rho_rpi
);
F
=
simde_mm_abs_epi16
(
xmm3
);
// F = |y1i/2 - rho/4|
simde__m128i
logmax_den_re0
=
simde_mm_adds_epi16
(
F
,
xmm2
);
// = |y1r/2 + rho*/4| + |y1i/2 - rho/4| + y0i/2
// 2 term for denominator of LLR
xmm3
=
simde_mm_adds_epi16
(
y1r_over2
,
rho_rpi
);
G
=
simde_mm_abs_epi16
(
xmm3
);
// G = |y1r/2 + rho/4|
xmm2
=
simde_mm_subs_epi16
(
G
,
y0i_over2
);
// = |y1r/2 + rho/4| - y0i/2
xmm3
=
simde_mm_adds_epi16
(
y1i_over2
,
rho_rmi
);
H
=
simde_mm_abs_epi16
(
xmm3
);
// H = |y1i/2 + rho*/4|
xmm2
=
simde_mm_adds_epi16
(
xmm2
,
H
);
// = |y1r/2 + rho/4| + |y1i/2 + rho*/4| - y0i/2
logmax_den_re0
=
simde_mm_max_epi16
(
logmax_den_re0
,
xmm2
);
// max, denominator done
// Compute the terms for the LLR of first bit
// 1 term for nominator of LLR
xmm2
=
simde_mm_adds_epi16
(
A
,
y0r_over2
);
simde__m128i
logmax_num_im0
=
simde_mm_adds_epi16
(
B
,
xmm2
);
// = |y1r/2 - rho/4| + |y1i/2 - rho*/4| + y0r/2
// 2 term for nominator of LLR
xmm2
=
simde_mm_subs_epi16
(
E
,
y0r_over2
);
xmm2
=
simde_mm_adds_epi16
(
xmm2
,
F
);
// = |y1r/2 + rho*/4| + |y1i/2 - rho/4| - y0r/2
logmax_num_im0
=
simde_mm_max_epi16
(
logmax_num_im0
,
xmm2
);
// max, nominator done
// 1 term for denominator of LLR
xmm2
=
simde_mm_adds_epi16
(
C
,
y0r_over2
);
simde__m128i
logmax_den_im0
=
simde_mm_adds_epi16
(
D
,
xmm2
);
// = |y1r/2 - rho*/4| + |y1i/2 + rho/4| - y0r/2
xmm2
=
simde_mm_subs_epi16
(
G
,
y0r_over2
);
xmm2
=
simde_mm_adds_epi16
(
xmm2
,
H
);
// = |y1r/2 + rho/4| + |y1i/2 + rho*/4| - y0r/2
logmax_den_im0
=
simde_mm_max_epi16
(
logmax_den_im0
,
xmm2
);
// max, denominator done
// LLR of first bit [L1(1), L1(2), L1(3), L1(4)]
y0r
=
simde_mm_adds_epi16
(
y0r
,
logmax_num_re0
);
y0r
=
simde_mm_subs_epi16
(
y0r
,
logmax_den_re0
);
// LLR of second bit [L2(1), L2(2), L2(3), L2(4)]
y0i
=
simde_mm_adds_epi16
(
y0i
,
logmax_num_im0
);
y0i
=
simde_mm_subs_epi16
(
y0i
,
logmax_den_im0
);
simde_mm_storeu_si128
(
&
stream0_128i_out
[
i
],
simde_mm_unpacklo_epi16
(
y0r
,
y0i
));
// = [L1(1), L2(1), L1(2), L2(2)]
if
(
i
<
((
length
>>
1
)
-
1
))
// false if only 2 REs remain
simde_mm_storeu_si128
(
&
stream0_128i_out
[
i
+
1
],
simde_mm_unpackhi_epi16
(
y0r
,
y0i
));
}
}
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @
ec40b34b
...
...
@@ -52,42 +52,6 @@
*/
void
nr_ue_dlsch_init
(
NR_UE_DLSCH_t
*
dlsch_list
,
int
num_dlsch
,
uint8_t
max_ldpc_iterations
);
/** \brief This function computes the LLRs for ML (max-logsum approximation) dual-stream QPSK/QPSK reception.
@param stream0_in Input from channel compensated (MR combined) stream 0
@param stream1_in Input from channel compensated (MR combined) stream 1
@param stream0_out Output from LLR unit for stream0
@param rho01 Cross-correlation between channels (MR combined)
@param length in complex channel outputs*/
void
nr_qpsk_qpsk
(
int16_t
*
stream0_in
,
int16_t
*
stream1_in
,
int16_t
*
stream0_out
,
int16_t
*
rho01
,
int32_t
length
);
/** \brief This function perform LLR computation for dual-stream (QPSK/QPSK) transmission.
@param frame_parms Frame descriptor structure
@param rxdataF_comp Compensated channel output
@param rxdataF_comp_i Compensated channel output for interference
@param rho_i Correlation between channel of signal and inteference
@param dlsch_llr llr output
@param symbol OFDM symbol index in sub-frame
@param len
@param first_symbol_flag flag to indicate this is the first symbol of the dlsch
@param nb_rb number of RBs for this allocation
@param pbch_pss_sss_adj Number of channel bits taken by PBCH/PSS/SSS
@param llr128p pointer to pointer to symbol in dlsch_llr*/
int32_t
nr_dlsch_qpsk_qpsk_llr
(
NR_DL_FRAME_PARMS
*
frame_parms
,
int32_t
**
rxdataF_comp
,
int32_t
**
rxdataF_comp_i
,
int32_t
**
rho_i
,
int16_t
*
dlsch_llr
,
uint8_t
symbol
,
uint32_t
len
,
uint8_t
first_symbol_flag
,
uint16_t
nb_rb
,
uint16_t
pbch_pss_sss_adj
,
int16_t
**
llr128p
);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream QPSK received waveforms
@param frame_parms Frame descriptor structure
@param rxdataF_comp Compensated channel output
...
...
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