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Commit f691d880 authored by francescomani's avatar francescomani
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formatting in nr_ue_dlsch_procedures

parent 7577df94
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Showing with 226 additions and 231 deletions
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ f691d880
......@@ -859,7 +859,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id,
int gNB_id,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
......@@ -879,7 +879,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
fapi_nr_rx_indication_t rx_ind;
uint16_t number_pdus = 1;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[eNB_id];
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
uint8_t is_cw0_active = dlsch0->harq_processes[harq_pid]->status;
uint16_t nb_symb_sch = dlsch0->harq_processes[harq_pid]->nb_symbols;
......@@ -916,7 +916,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
case RA_PDSCH:
case P_PDSCH:
case PDSCH:
pdsch_vars = ue->pdsch_vars[proc->thread_id][eNB_id];
pdsch_vars = ue->pdsch_vars[proc->thread_id][gNB_id];
break;
case PMCH:
case PDSCH1:
......@@ -934,8 +934,8 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
*dlsch_errors=0;
if (pdsch == RA_PDSCH) {
if (ue->prach_resources[eNB_id]!=NULL)
dlsch0->rnti = ue->prach_resources[eNB_id]->ra_RNTI;
if (ue->prach_resources[gNB_id]!=NULL)
dlsch0->rnti = ue->prach_resources[gNB_id]->ra_RNTI;
else {
LOG_E(PHY,"[UE %d] Frame %d, nr_slot_rx %d: FATAL, prach_resources is NULL\n", ue->Mod_id, frame_rx, nr_slot_rx);
//mac_xface->macphy_exit("prach_resources is NULL");
......@@ -976,18 +976,17 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_I(PHY,"start ldpc decode for CW 0 for AbsSubframe %d.%d / %d --> Nl %d \n", frame_rx, nr_slot_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Nl);
LOG_I(PHY,"start ldpc decode for CW 0 for AbsSubframe %d.%d / %d --> G %d \n", frame_rx, nr_slot_rx, harq_pid, dlsch0->harq_processes[harq_pid]->G);
LOG_I(PHY,"start ldpc decode for CW 0 for AbsSubframe %d.%d / %d --> Kmimo %d \n", frame_rx, nr_slot_rx, harq_pid, dlsch0->Kmimo);
LOG_I(PHY,"start ldpc decode for CW 0 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, nr_slot_rx, harq_pid, ue->pdcch_vars[proc->thread_id][eNB_id]->num_pdcch_symbols);
LOG_I(PHY,"start ldpc decode for CW 0 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, nr_slot_rx, harq_pid, ue->pdcch_vars[proc->thread_id][gNB_id]->num_pdcch_symbols);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
#endif
if( dlsch_parallel)
{
if( dlsch_parallel) {
ret = nr_dlsch_decoding_mthread(ue,
proc,
eNB_id,
gNB_id,
pdsch_vars->llr[0],
&ue->frame_parms,
dlsch0,
......@@ -998,13 +997,13 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
harq_pid,
pdsch==PDSCH?1:0,
dlsch0->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"dlsch decoding is parallelized, ret = %d\n", ret);
}
else
{
else {
ret = nr_dlsch_decoding(ue,
proc,
eNB_id,
gNB_id,
pdsch_vars->llr[0],
&ue->frame_parms,
dlsch0,
......@@ -1034,8 +1033,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
#endif
#endif
if(is_cw1_active)
{
if(is_cw1_active) {
// start ldpc decode for CW 1
dlsch1->harq_processes[harq_pid]->G = nr_get_G(dlsch1->harq_processes[harq_pid]->nb_rb,
nb_symb_sch,
......@@ -1062,18 +1060,17 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_I(PHY,"start ldpc decode for CW 1 for AbsSubframe %d.%d / %d --> Nl %d \n", frame_rx, nr_slot_rx, harq_pid, dlsch1->harq_processes[harq_pid]->Nl);
LOG_I(PHY,"start ldpc decode for CW 1 for AbsSubframe %d.%d / %d --> G %d \n", frame_rx, nr_slot_rx, harq_pid, dlsch1->harq_processes[harq_pid]->G);
LOG_I(PHY,"start ldpc decode for CW 1 for AbsSubframe %d.%d / %d --> Kmimo %d \n", frame_rx, nr_slot_rx, harq_pid, dlsch1->Kmimo);
LOG_I(PHY,"start ldpc decode for CW 1 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, nr_slot_rx, harq_pid, ue->pdcch_vars[proc->thread_id][eNB_id]->num_pdcch_symbols);
LOG_I(PHY,"start ldpc decode for CW 1 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, nr_slot_rx, harq_pid, ue->pdcch_vars[proc->thread_id][gNB_id]->num_pdcch_symbols);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_decoding_stats[proc->thread_id]);
#endif
if(dlsch_parallel)
{
if(dlsch_parallel) {
ret1 = nr_dlsch_decoding_mthread(ue,
proc,
eNB_id,
gNB_id,
pdsch_vars->llr[1],
&ue->frame_parms,
dlsch1,
......@@ -1086,11 +1083,10 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
dlsch1->harq_processes[harq_pid]->TBS>256?1:0);
LOG_T(PHY,"CW dlsch decoding is parallelized, ret1 = %d\n", ret1);
}
else
{
else {
ret1 = nr_dlsch_decoding(ue,
proc,
eNB_id,
gNB_id,
pdsch_vars->llr[1],
&ue->frame_parms,
dlsch1,
......@@ -1132,18 +1128,17 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
switch (pdsch) {
case RA_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, eNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, eNB_id, ue, dlsch0, number_pdus);
ue->UE_mode[eNB_id] = RA_RESPONSE;
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_RAR, gNB_id, ue, dlsch0, number_pdus);
ue->UE_mode[gNB_id] = RA_RESPONSE;
break;
case PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, eNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, eNB_id, ue, dlsch0, number_pdus);
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_DLSCH, gNB_id, ue, dlsch0, number_pdus);
break;
case SI_PDSCH:
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, eNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, eNB_id, ue, dlsch0, number_pdus);
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, gNB_id);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SIB, gNB_id, ue, dlsch0, number_pdus);
break;
default:
break;
......@@ -1186,7 +1181,6 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
N_1 = pdsch_N_1_capability_1[numerology][2];
else
N_1 = pdsch_N_1_capability_1[numerology][3];
/* PUSCH preapration time N_2 for processing capability 1 */
const int N_2 = pusch_N_2_timing_capability_1[numerology][1];
......@@ -1238,7 +1232,8 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
// reset TA flag
ul_time_alignment->apply_ta = 0;
LOG_D(PHY,"Frame %d slot %d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n", frame_rx, nr_slot_rx, ul_time_alignment->ta_frame, ul_time_alignment->ta_slot);
LOG_D(PHY,"Frame %d slot %d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n",
frame_rx, nr_slot_rx, ul_time_alignment->ta_frame, ul_time_alignment->ta_slot);
}
}
}
......
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