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Commit 39fd4594 authored by Agustin's avatar Agustin
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NR PDCCH development warning clean up

parent 70e0bba3
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Showing with 206 additions and 96 deletions
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @ 39fd4594
......@@ -233,6 +233,7 @@ typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
pusch_freq_hopping_t pusch_freq_hopping;
......@@ -302,6 +303,7 @@ typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t prb_bundling_size_ind;
......
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
View file @ 39fd4594
......@@ -115,7 +115,8 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
unsigned short nb_rb_pdsch)
{
int32_t qpsk[4],nqpsk[4],*qpsk_p, n;
int w,mprime,ind,l,ind_dword,ind_qpsk_symb,kp,lp, config_type, k;
//int w,mprime,ind,l,ind_dword,ind_qpsk_symb,kp,lp, config_type, k;
int w,ind,ind_dword,ind_qpsk_symb,kp,lp, config_type, k=0;
short pamp;
typedef int array_of_w[2];
......@@ -196,7 +197,7 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
{
uint8_t idx=0;
uint8_t pdcch_rb_offset =0;
//uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ 39fd4594
......@@ -390,8 +390,8 @@ symbol 0 | ... bundle 3 bundle 6
*/
int c=0,r=0;
uint16_t bundle_j=0, f_bundle_j,f_reg;
uint32_t coreset_C;
uint16_t bundle_j=0, f_bundle_j=0,f_reg=0;
uint32_t coreset_C=0;
uint16_t index_z, index_llr;
int coreset_interleaved = 0;
......@@ -504,7 +504,7 @@ void nr_pdcch_demapping(uint16_t *llr, uint16_t *wbar,
#endif //0
#endif
#if 0
void pdcch_demapping(uint16_t *llr,uint16_t *wbar,NR_DL_FRAME_PARMS *frame_parms,uint8_t num_pdcch_symbols,uint8_t mi)
{
......@@ -610,8 +610,9 @@ void pdcch_demapping(uint16_t *llr,uint16_t *wbar,NR_DL_FRAME_PARMS *frame_parms
} // kprime loop
}
#endif //0
static uint16_t wtemp_rx[Msymb];
//static uint16_t wtemp_rx[Msymb];
#if 0
#ifdef NR_PDCCH_DCI_RUN
......@@ -691,7 +692,7 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
#if 0
void pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms,uint16_t *z, uint16_t *wbar,uint8_t number_pdcch_symbols,uint8_t mi)
{
......@@ -794,8 +795,9 @@ void pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms,uint16_t *z, uint16_t *
}
}
#endif //0
#if 0
int32_t pdcch_qpsk_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **rxdataF_comp_i,
......@@ -845,7 +847,7 @@ int32_t pdcch_qpsk_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
return(0);
}
#endif //0
#ifdef NR_PDCCH_DCI_RUN
int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
......@@ -861,7 +863,7 @@ int32_t nr_pdcch_llr(NR_DL_FRAME_PARMS *frame_parms, int32_t **rxdataF_comp,
printf("pdcch_qpsk_llr: llr is null, symbol %d\n", symbol);
return (-1);
}
#ifdef NR_PDCCH_DCI_DEBUG
#ifndef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_llr)-> llr logs: pdcch qpsk llr for symbol %d (pos %d), llr offset %d\n",symbol,(symbol*frame_parms->N_RB_DL*12),pdcch_llr8-pdcch_llr);
#endif
//for (i = 0; i < (frame_parms->N_RB_DL * ((symbol == 0) ? 16 : 24)); i++) {
......@@ -1219,10 +1221,11 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
// after removing the 3 DMRS RE, the RB contains 9 RE with PDCCH
#define NBR_RE_PER_RB_WITHOUT_DMRS 9
uint16_t c_rb, c_rb_tmp, rb, nb_rb = 0;
uint16_t c_rb, nb_rb = 0;
// this variable will be incremented by 1 each time a bit set to '0' is found in coreset_freq_dom bitmap
uint16_t offset_discontiguous=0;
uint8_t rb_count_bit,i, j, aarx, bitcnt_coreset_freq_dom=0;
//uint8_t rb_count_bit;
uint8_t i, j, aarx, bitcnt_coreset_freq_dom=0;
int32_t *dl_ch0, *dl_ch0_ext, *rxF, *rxF_ext;
int nushiftmod3 = frame_parms->nushift % 3;
uint8_t symbol_mod;
......@@ -1294,7 +1297,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
c_rb = c_rb + BIT_TO_NBR_RB_CORESET_FREQ_DOMAIN;
offset_discontiguous ++;
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> we entered here as coreset_freq_dom=%llx (bit %d) is 0, coreset_freq_domain is discontiguous\n",coreset_freq_dom,(46 - bitcnt_coreset_freq_dom));
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> we entered here as coreset_freq_dom=%lx (bit %d) is 0, coreset_freq_domain is discontiguous\n",coreset_freq_dom,(46 - bitcnt_coreset_freq_dom));
#endif
}
}
......@@ -2631,9 +2634,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
if (searchSpaceType == ue_specific) do_common=0;
uint8_t log2_maxh, aatx, aarx;
int32_t avgs;
uint8_t n_pdcch_symbols;
//uint8_t n_pdcch_symbols;
// the variable mi can be removed for NR
uint8_t mi = get_mi(frame_parms, nr_tti_rx);
//uint8_t mi = get_mi(frame_parms, nr_tti_rx);
/*
* The following variables have been extracted from higher layer parameters
......@@ -2683,9 +2686,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
NR_UE_CORESET_REG_bundlesize_t reg_bundle_size_L = pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.reg_bundlesize;
// higher-layer parameter CORESET-interleaver-size {2,3,6}
NR_UE_CORESET_interleaversize_t coreset_interleaver_size_R= pdcch_vars2->coreset[nb_coreset_active].cce_reg_mappingType.interleaversize;
NR_UE_CORESET_precoder_granularity_t precoder_granularity = pdcch_vars2->coreset[nb_coreset_active].precoderGranularity;
int tci_statesPDCCH = pdcch_vars2->coreset[nb_coreset_active].tciStatesPDCCH;
int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
//NR_UE_CORESET_precoder_granularity_t precoder_granularity = pdcch_vars2->coreset[nb_coreset_active].precoderGranularity;
//int tci_statesPDCCH = pdcch_vars2->coreset[nb_coreset_active].tciStatesPDCCH;
//int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
// The UE can be assigned 4 different BWP but only one active at a time.
......@@ -2700,7 +2703,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// at the moment we are considering that the PDCCH is always starting at symbol 0 of current slot
// the following code to initialize start_symbol must be activated once we implement PDCCH demapping on symbol not equal to 0 (considering symbol_mon)
for (int i=0; i < 14; i++) {
if ((symbol_mon >> (i+1))&0x1 != 0) {
if (((symbol_mon >> (i+1))&0x1) != 0) {
start_symbol = i;
i=14;
}
......@@ -2708,7 +2711,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=(%d)\n",symbol_mon,start_symbol);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%lld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R);
#endif
......@@ -2722,7 +2725,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// this may lead to a modification in ue scheduler
// indicates the number of active CORESETs for the current BWP to decode PDCCH: max is 3 (this variable is not useful here, to be removed)
uint8_t coreset_nbr_act;
//uint8_t coreset_nbr_act;
// indicates the number of REG contained in the PDCCH (number of RBs * number of symbols, in CORESET)
uint8_t coreset_nbr_reg;
uint32_t coreset_C;
......@@ -2732,7 +2735,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// for each active CORESET (max number of active CORESETs in a BWP is 3),
// we calculate the number of RB for each CORESET bitmap
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%lld)\n",coreset_freq_dom);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld)\n",coreset_freq_dom);
#endif
int i; //for each bit in the coreset_freq_dom bitmap
for (i = 0; i < 45; i++) {
......@@ -2741,7 +2744,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
}
coreset_nbr_rb = 6 * coreset_nbr_rb; // coreset_nbr_rb has to be multiplied by 6 to indicate the number of PRB or REG(=12 RE) within the CORESET
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%lld,%llx), coreset_nbr_rb=%d\n", coreset_freq_dom,coreset_freq_dom,coreset_nbr_rb);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld,%lx), coreset_nbr_rb=%d\n", coreset_freq_dom,coreset_freq_dom,coreset_nbr_rb);
#endif
coreset_nbr_reg = coreset_time_dur * coreset_nbr_rb;
coreset_C = (uint32_t)(coreset_nbr_reg / (reg_bundle_size_L * coreset_interleaver_size_R));
......@@ -3066,10 +3069,10 @@ nr_pdcch_demapping_deinterleaving(pdcch_vars[eNB_id]->llr,
nr_tti_rx,
pdcch_vars[eNB_id]->e_rx,
get_nCCE(n_pdcch_symbols,frame_parms,mi)*72);
*/
pdcch_vars[eNB_id]->num_pdcch_symbols = n_pdcch_symbols;
pdcch_vars[eNB_id]->num_pdcch_symbols = n_pdcch_symbols;
*/
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> Ending nr_rx_pdcch() function\n");
#endif
......@@ -3754,7 +3757,7 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
#endif
static uint8_t dci_decoded_output[RX_NB_TH][(MAX_DCI_SIZE_BITS+64)/8];
//static uint8_t dci_decoded_output[RX_NB_TH][(MAX_DCI_SIZE_BITS+64)/8];
/*uint16_t get_nCCE(uint8_t num_pdcch_symbols,NR_DL_FRAME_PARMS *frame_parms,uint8_t mi)
{
......@@ -3928,7 +3931,7 @@ void nr_dci_decoding_procedure0(int s,
uint8_t current_thread_id,
NR_DL_FRAME_PARMS *frame_parms,
t_nrPolar_paramsPtr *nrPolar_params,
uint8_t mi,
//uint8_t mi,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
uint8_t L,
NR_UE_SEARCHSPACE_CSS_DCI_FORMAT_t format_css,
......@@ -3972,7 +3975,7 @@ void nr_dci_decoding_procedure0(int s,
//}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> frequencyDomainResources=%llx, duration=%d\n",
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> frequencyDomainResources=%lx, duration=%d\n",
pdcch_vars[eNB_id]->coreset[p].frequencyDomainResources, pdcch_vars[eNB_id]->coreset[p].duration);
#endif
......@@ -4158,7 +4161,7 @@ void nr_dci_decoding_procedure0(int s,
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0: polar decoding)-> polar intput (with coreset_time_dur=%d, coreset_nbr_rb=%d, p=%d, CCEind=%d): \n",
coreset_time_dur,coreset_nbr_rb,p,CCEind);
#endif
int reg_p,reg_e;
int reg_p=0,reg_e=0;
for (int m=0; m < (L2*6); m++){
reg_p = (((int)floor(m/coreset_time_dur))+((m%coreset_time_dur)*(L2*6/coreset_time_dur)))*9*2;
reg_e = m*9*2;
......@@ -4243,7 +4246,6 @@ uint16_t rnti=3;
if (crc == crc_scrambled_values[_RA_RNTI_]) {
*crc_scrambled =_ra_rnti;
*format_found=_format_1_0_found;
printf("");
}
if (crc == crc_scrambled_values[_SP_CSI_RNTI_]) {
*crc_scrambled =_sp_csi_rnti;
......@@ -4292,49 +4294,53 @@ uint16_t rnti=3;
if ((*crc_scrambled == _p_rnti) || (*crc_scrambled == _si_rnti) || (*crc_scrambled == _ra_rnti)){
dci_alloc[*dci_cnt].format = format1_0;
*dci_cnt = *dci_cnt + 1;
format_found=_format_1_0_found;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> a format1_0=%d and dci_cnt=%d\n",format_found,*dci_cnt);
*format_found=_format_1_0_found;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> a format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
} else {
if (dci_estimation[0]&1 == 0){
if ((dci_estimation[0]&1) == 0){
dci_alloc[*dci_cnt].format = format0_0;
*dci_cnt = *dci_cnt + 1;
format_found=_format_0_0_found;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> b format0_0=%d and dci_cnt=%d\n",format_found,*dci_cnt);
*format_found=_format_0_0_found;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> b format0_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
}
if (dci_estimation[0]&1 == 1){
if ((dci_estimation[0]&1) == 1){
dci_alloc[*dci_cnt].format = format1_0;
*dci_cnt = *dci_cnt + 1;
format_found=_format_1_0_found;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> c format1_0=%d and dci_cnt=%d\n",format_found,*dci_cnt);
*format_found=_format_1_0_found;
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure0)-> c format1_0=%d and dci_cnt=%d\n",*format_found,*dci_cnt);
}
}
}
if (format_css == cformat2_0){
dci_alloc[*dci_cnt].format = format2_0;
*dci_cnt = *dci_cnt + 1;
*format_found=_format_2_0_found;
}
if (format_css == cformat2_1){
dci_alloc[*dci_cnt].format = format2_1;
*dci_cnt = *dci_cnt + 1;
*format_found=_format_2_1_found;
}
if (format_css == cformat2_2){
dci_alloc[*dci_cnt].format = format2_2;
*dci_cnt = *dci_cnt + 1;
*format_found=_format_2_2_found;
}
if (format_css == cformat2_3){
dci_alloc[*dci_cnt].format = format2_3;
*dci_cnt = *dci_cnt + 1;
*format_found=_format_2_3_found;
}
if (format_uss == uformat0_1_and_1_1){
if (dci_estimation[0]&1 == 0){
if ((dci_estimation[0]&1) == 0){
dci_alloc[*dci_cnt].format = format0_1;
*dci_cnt = *dci_cnt + 1;
format_found=_format_0_1_found;
*format_found=_format_0_1_found;
}
if (dci_estimation[0]&1 == 1){
if ((dci_estimation[0]&1) == 1){
dci_alloc[*dci_cnt].format = format1_1;
*dci_cnt = *dci_cnt + 1;
format_found=_format_1_1_found;
*format_found=_format_1_1_found;
}
}
// store first nCCE of group for PUCCH transmission of ACK/NAK
......@@ -4928,10 +4934,10 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
// 7 BANDWIDTH_PART_IND
// number of UL BWPs configured by higher layers
uint8_t n_UL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
(n_UL_BWP_RRC > 3)?n_UL_BWP_RRC:(n_UL_BWP_RRC+1);
n_UL_BWP_RRC = ((n_UL_BWP_RRC > 3)?n_UL_BWP_RRC:(n_UL_BWP_RRC+1));
// number of DL BWPs configured by higher layers
uint8_t n_DL_BWP_RRC=1; // initialized to 1 but it has to be initialized by higher layers FIXME!!!
(n_DL_BWP_RRC > 3)?n_DL_BWP_RRC:(n_DL_BWP_RRC+1);
n_DL_BWP_RRC = ((n_DL_BWP_RRC > 3)?n_DL_BWP_RRC:(n_DL_BWP_RRC+1));
// 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL
......@@ -4958,7 +4964,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
ul_res_alloc_type_0 = 1;
ul_res_alloc_type_1 = 1;
}
uint8_t n_bits_freq_dom_res_assign_ul,n_ul_RGB_tmp;
uint8_t n_bits_freq_dom_res_assign_ul=0,n_ul_RGB_tmp;
if (ul_res_alloc_type_0 == 1){ // implementation of Table 6.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
// config1: PUSCH-Config IE contains rbg-Size ENUMERATED {config1 config2}
ul_rgb_Size_t config = pusch_config.ul_rgbSize;
......@@ -4985,7 +4991,7 @@ uint16_t nr_dci_format_size (PHY_VARS_NR_UE *ue,
dl_res_alloc_type_0 = 1;
dl_res_alloc_type_1 = 1;
}
uint8_t n_bits_freq_dom_res_assign_dl,n_dl_RGB_tmp;
uint8_t n_bits_freq_dom_res_assign_dl=0,n_dl_RGB_tmp;
if (dl_res_alloc_type_0 == 1){ // implementation of Table 5.1.2.2.1-1 TC 38.214 subclause 6.1.2.2.1
// config1: PDSCH-Config IE contains rbg-Size ENUMERATED {config1, config2}
dl_rgb_Size_t config = pdsch_config.dl_rgbSize;
......@@ -5386,7 +5392,6 @@ uint8_t nr_dci_decoding_procedure(int s,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]) {
// uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
for (int n=0; n<13; n++) printf("################ 2 crc_scrambled_values[%d]=%d\n",n,crc_scrambled_values[n]);
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_dci_decoding_procedure) nr_tti_rx=%d n_RB_ULBWP=%d n_RB_DLBWP=%d format_found=%d\n",
......@@ -5405,7 +5410,7 @@ uint8_t nr_dci_decoding_procedure(int s,
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[p].pdcchDMRSScramblingID;
uint64_t coreset_freq_dom = pdcch_vars2->coreset[p].frequencyDomainResources;
int coreset_time_dur = pdcch_vars2->coreset[p].duration;
uint16_t coreset_nbr_rb;
uint16_t coreset_nbr_rb=0;
for (int i = 0; i < 45; i++) {
// this loop counts each bit of the bit map coreset_freq_dom, and increments nbr_RB_coreset for each bit set to '1'
if (((coreset_freq_dom & 0x1FFFFFFFFFFF) >> i) & 0x1) coreset_nbr_rb++;
......@@ -5414,10 +5419,10 @@ uint8_t nr_dci_decoding_procedure(int s,
// coreset_time_dur,coreset_nbr_rb,
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
t_nrPolar_paramsPtr *nrPolar_params = &ue->nrPolar_params;
uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
//uint8_t mi;// = get_mi(&ue->frame_parms, nr_tti_rx);
uint8_t tmode = ue->transmission_mode[eNB_id];
uint8_t frame_type = frame_parms->frame_type;
//uint8_t tmode = ue->transmission_mode[eNB_id];
//uint8_t frame_type = frame_parms->frame_type;
uint8_t format_0_0_1_0_size_bits = 0, format_0_0_1_0_size_bytes = 0; //FIXME
uint8_t format_0_1_1_1_size_bits = 0, format_0_1_1_1_size_bytes = 0; //FIXME
......@@ -5508,7 +5513,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
......@@ -5542,7 +5547,7 @@ uint8_t nr_dci_decoding_procedure(int s,
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
crc_scrambled_values, aggregationLevelSFI,
cformat2_0, uformat0_0_and_1_0,
format_2_0_size_bits, format_2_0_size_bytes, &dci_cnt,
......@@ -5572,7 +5577,7 @@ uint8_t nr_dci_decoding_procedure(int s,
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
crc_scrambled_values, aggregationLevel,
cformat2_1, uformat0_0_and_1_0,
format_2_1_size_bits, format_2_1_size_bytes, &dci_cnt,
......@@ -5602,7 +5607,7 @@ uint8_t nr_dci_decoding_procedure(int s,
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
crc_scrambled_values, aggregationLevel,
cformat2_2, uformat0_0_and_1_0,
format_2_2_size_bits, format_2_2_size_bytes, &dci_cnt,
......@@ -5632,7 +5637,7 @@ uint8_t nr_dci_decoding_procedure(int s,
#endif
// for aggregation level 'aggregationLevelSFI'. The number of candidates (nrofCandidates-SFI) will be calculated in function nr_dci_decoding_procedure0
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 1, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms, nrPolar_params,
crc_scrambled_values, aggregationLevel,
cformat2_3, uformat0_0_and_1_0,
format_2_3_size_bits, format_2_3_size_bytes, &dci_cnt,
......@@ -5667,7 +5672,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_0_and_1_0,
format_0_0_1_0_size_bits, format_0_0_1_0_size_bytes, &dci_cnt,
......@@ -5699,7 +5704,7 @@ uint8_t nr_dci_decoding_procedure(int s,
css_dci_format,(1<<aggregationLevel));
#endif
old_dci_cnt = dci_cnt;
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params, mi,
nr_dci_decoding_procedure0(s,p,coreset_time_dur,coreset_nbr_rb,pdcch_vars, 0, nr_tti_rx, dci_alloc, eNB_id, ue->current_thread_id[nr_tti_rx], frame_parms,nrPolar_params,
crc_scrambled_values, aggregationLevel,
cformat0_0_and_1_0, uformat0_1_and_1_1,
format_0_1_1_1_size_bits, format_0_1_1_1_size_bytes, &dci_cnt,
......
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
View file @ 39fd4594
......@@ -7027,12 +7027,12 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
* Note only format0_0 and format1_0 are implemented
*/
uint8_t harq_pid=0;
//uint8_t harq_pid=0;
uint8_t frame_type=frame_parms->frame_type;
uint8_t tpmi=0;
NR_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL,*ulsch1=NULL;
//uint8_t tpmi=0;
NR_UE_DLSCH_t *dlsch0=NULL;//*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL;//*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL;//*ulsch1=NULL;
NR_DCI_INFO_EXTRACTED_t *ptr_nr_dci_info_extracted = nr_dci_info_extracted;
......@@ -7046,8 +7046,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
// uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
// for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
/*
dlsch0 = dlsch[0];
dlsch0->active = 0;
......
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
View file @ 39fd4594
......@@ -144,7 +144,7 @@ char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos2, k_ssb, N_ssb_crb, sync_pos_slot;
int32_t sync_pos, sync_pos2, sync_pos_slot; // k_ssb, N_ssb_crb,
int32_t metric_fdd_ncp=0;
uint8_t phase_fdd_ncp;
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ 39fd4594
......@@ -648,7 +648,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
for (i=0; i<16; i++){
printf("unscrambling demod_pbch_e[%d] r = %2.3f i = %2.3f\n", i<<1 , demod_pbch_e[i<<1], demod_pbch_e[(i<<1)+1]);}
//#endif
uint32_t pbch_out;
// uint32_t pbch_out;
//polar decoding de-rate matching
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params,
......@@ -673,7 +673,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_PAYLOAD_BITS,1);
//payload deinterleaving
uint32_t in=0, out=0;
//uint32_t in=0;
uint32_t out=0;
for (int i=0; i<32; i++) {
out |= ((nr_ue_pbch_vars->pbch_a_interleaved>>i)&1)<<(pbch_deinterleaving_pattern[i]);
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ 39fd4594
......@@ -89,7 +89,51 @@ fifo_dump_emos_UE emos_dump_UE;
extern double cpuf;
int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint32_t frame,
uint8_t nr_tti_rx,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t is_secondary_ue,
int nb_coreset_active,
uint16_t symbol_mon,
NR_SEARCHSPACE_TYPE_t searchSpaceType);
uint8_t nr_dci_decoding_procedure(int s,
int p,
PHY_VARS_NR_UE *ue,
NR_DCI_ALLOC_t *dci_alloc,
NR_SEARCHSPACE_TYPE_t searchSpacetype,
int16_t eNB_id,
uint8_t nr_tti_rx,
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
crc_scrambled_t *crc_scrambled,
format_found_t *format_found,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
uint32_t dci_pdu[4],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint8_t beamforming_mode,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted);
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
......@@ -3155,7 +3199,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
nr_tti_rx,nb_searchspace_total);
#endif
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
//int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
uint8_t dci_cnt=0;
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
//uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
......@@ -3191,7 +3235,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
* To be implemented LATER !!!
*/
//int _offset,_index,_M;
int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
//int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
/*
* The following code has been removed as it is handled by higher layers (fapi)
if (searchSpace_id == 0){ // Implementing TS 38.213 subclause 13, UE procedure for monitoring Type0-PDCCH common search space
......@@ -3221,16 +3265,16 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
// the searchSpace indicates that we need to monitor PDCCH in current nr_tti_rx
// get the parameters describing the current SEARCHSPACE
// the CORESET id applicable to the current SearchSpace
int searchSpace_coreset_id = pdcch_vars2->searchSpace[nb_searchspace_active].controlResourceSetId;
//int searchSpace_coreset_id = pdcch_vars2->searchSpace[nb_searchspace_active].controlResourceSetId;
// FIXME this variable is a bit string (14 bits) identifying every OFDM symbol in a slot.
// at the moment we will not take into consideration this variable and we will consider that the OFDM symbol offset is always the first OFDM in a symbol
uint16_t symbol_within_slot_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSymbolWithinSlot;
// get the remaining parameters describing the current SEARCHSPACE: // FIXME! To be defined where we get this information from
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L1 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel1;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L2 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel2;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L4 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel4;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L8 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel8;
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L16 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel16;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L1 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel1;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L2 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel2;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L4 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel4;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L8 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel8;
//NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L16 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel16;
// FIXME! A table of five enum elements
// searchSpaceType indicates whether this is a common search space or a UE-specific search space
//int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
......@@ -3531,8 +3575,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
//printf(">>> example mcs=%d\n",nr_dci_info_extracted.mcs);
//printf(">>> calling MAC with dl_indication DCI_IND\n");
// TODO: check where should we send up this message.
ue->dl_indication.dci_ind=&ue->dci_ind;
ue->if_inst->dl_indication(&ue->dl_indication);
......@@ -3764,7 +3806,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d: Found cba rnti %x, format 0, dci_cnt %d\n",
ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].rnti,i);
/*
if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
......@@ -4022,6 +4064,7 @@ void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t
memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
}*/
#if 0
void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1, int abstraction_flag) {
int nr_tti_rx = proc->nr_tti_rx;
......@@ -4110,6 +4153,8 @@ void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id
} // CRNTI active
}
}
#endif
#if 0
void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmode_t mode, int abstraction_flag) {
......@@ -5441,16 +5486,16 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type) {
int l,l2;
int pilot1;
int pmch_flag=0;
//int l,l2;
//int pilot1;
//int pmch_flag=0;
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
proc->decoder_switch = 0;
//int counter_decoder = 0;
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
//uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
//uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
#if 0
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
......
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ 39fd4594
......@@ -48,6 +48,60 @@
#endif
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
/*
void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
int nr_tti_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB);
void nr_generate_pucch1(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
void nr_generate_pucch2(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit);
void nr_generate_pucch3_4(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4);
*/
/**************** variables **************************************/
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ 39fd4594
......@@ -977,9 +977,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
uint8_t time_domain_ind,
long dmrs_typeA_pos
){
uint8_t k_offset;
uint8_t sliv_S;
uint8_t sliv_L;
uint8_t k_offset=0;
uint8_t sliv_S=0;
uint8_t sliv_L=0;
uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
......@@ -1108,6 +1108,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
// k_offset = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_5_1_2_1_1_5_time_dom_res_alloc_C[nr_pdci_info_extracted->time_dom_resource_assignment][2];
dlsch_config_pdu->frame_offset = k_offset;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
} /*
......@@ -1120,6 +1121,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
// k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
// sliv_S = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
// sliv_L = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
ulsch_config_pdu->frame_offset = k_offset;
ulsch_config_pdu->number_symbols = sliv_L;
ulsch_config_pdu->start_symbol = sliv_S;
}
......
targets/RT/USER/nr-uesoftmodem.c
View file @ 39fd4594
......@@ -123,7 +123,7 @@ uint32_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
static char *conf_config_file_name = NULL;
//static char *conf_config_file_name = NULL;
#if defined(ENABLE_ITTI)
static char *itti_dump_file = NULL;
#endif
......@@ -171,7 +171,7 @@ int codingw = 0;
int fepw = 0;
int rx_input_level_dBm;
static int online_log_messages=0;
//static int online_log_messages=0;
#ifdef XFORMS
extern int otg_enabled;
static char do_forms=0;
......@@ -410,7 +410,7 @@ void exit_fun(const char* s) {
void reset_stats(FL_OBJECT *button, long arg) {
int i,j,k;
//int i,j,k;
/*PHY_VARS_eNB *phy_vars_eNB = PHY_vars_eNB_g[0][0];
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
......@@ -444,10 +444,10 @@ static void *scope_thread(void *arg) {
# ifdef ENABLE_XFORMS_WRITE_STATS
FILE *UE_stats, *eNB_stats;
# endif
int len = 0;
//int len = 0;
struct sched_param sched_param;
int UE_id, CC_id;
int ue_cnt=0;
//int UE_id, CC_id;
//int ue_cnt=0;
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO)+1;
sched_setscheduler(0, SCHED_FIFO,&sched_param);
......@@ -846,14 +846,14 @@ void init_openair0() {
}
int main( int argc, char **argv ) {
int i,j,k,aa,re;
int i;//j,k,aa,re;
#if defined (XFORMS)
void *status;
#endif
int CC_id;
uint8_t abstraction_flag=0;
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
//uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
#if defined (XFORMS)
int ret;
......
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