diff --git a/executables/nr-ue.c b/executables/nr-ue.c
index ec7b98332e261f01b9edd32b3f7ec7620179fe61..26e42f6f4000e5c6e99b9c9c094213b88f958fa6 100644
--- a/executables/nr-ue.c
+++ b/executables/nr-ue.c
@@ -359,7 +359,7 @@ static void UE_synch(void *arg) {
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
uint32_t rb_size, rb_start;
- uint16_t rnti, l_prime_mask, n_rb0, n_rb1;
+ uint16_t rnti, l_prime_mask, n_rb0, n_rb1, pdu_bit_map;
uint8_t nr_of_symbols, start_symbol_index, mcs_index, mcs_table, nrOfLayers, harq_process_id, rv_index, dmrs_config_type;
uint8_t ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, ptrs_time_density, ptrs_freq_density;
nr_dcireq_t dcireq;
@@ -399,6 +399,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
ptrs_mcs3 = 10;
n_rb0 = 25;
n_rb1 = 75;
+ pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
ptrs_time_density = get_L_ptrs(ptrs_mcs1, ptrs_mcs2, ptrs_mcs3, mcs_index, mcs_table);
ptrs_freq_density = get_K_ptrs(n_rb0, n_rb1, rb_size);
//------------------------------------------------------------------------------//
@@ -419,6 +420,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.nrOfLayers = nrOfLayers;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_process_id;
+ scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pdu_bit_map = pdu_bit_map;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
scheduled_response.ul_config->ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list = (nfapi_nr_ue_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ue_ptrs_ports_t));
diff --git a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
index 266f3981288468a1cc705013006692ffe9db46fd..cd18b7bea4bfa93879510ab40d9942a645124af5 100644
--- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
@@ -126,7 +126,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
Nid_cell = 0;
N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
number_dmrs_symbols = 0;
- uint8_t mapping_type = UE->pusch_config.pusch_TimeDomainResourceAllocation[0]->mappingType;
for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) {
@@ -140,7 +139,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
for (i = start_symbol; i < start_symbol + number_of_symbols; i++) {
- if((ul_dmrs_symb_pos >> (mapping_type ? (i - start_symbol) : i)) & 0x01)
+ if((ul_dmrs_symb_pos >> i) & 0x01)
number_dmrs_symbols += 1;
}
@@ -230,12 +229,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////ULSCH scrambling/////////////////////////
///////////
- available_bits = nr_get_G(nb_rb,
- number_of_symbols,
- nb_dmrs_re_per_rb,
- number_dmrs_symbols,
- mod_order,
- 1);
+ available_bits = G;
memset(scrambled_output[cwd_index], 0, ((available_bits>>5)+1)*sizeof(uint32_t));
@@ -326,7 +320,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
for (l = start_symbol; l < start_symbol + number_of_symbols; l++) {
- if((ul_dmrs_symb_pos >> ((mapping_type)?l-start_symbol:l)) & 0x01)
+ if((ul_dmrs_symb_pos >> l) & 0x01)
is_dmrs = 1;
else
is_dmrs = 0;
@@ -372,7 +366,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t k_prime=0;
uint8_t is_dmrs, is_ptrs;
- uint8_t l_ref;
uint16_t m=0, n=0, dmrs_idx=0, ptrs_idx = 0;
for (l=start_symbol; l<start_symbol+number_of_symbols; l++) {
@@ -380,7 +373,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
k = start_sc;
n = 0;
dmrs_idx = 0;
- l_ref = (mapping_type) ? l-start_symbol : l;
for (i=0; i< nb_rb*NR_NB_SC_PER_RB; i++) {
@@ -389,7 +381,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
is_dmrs = 0;
is_ptrs = 0;
- if((ul_dmrs_symb_pos >> l_ref) & 0x01) {
+ if((ul_dmrs_symb_pos >> l) & 0x01) {
if (k == ((start_sc+get_dmrs_freq_idx_ul(n, k_prime, delta, dmrs_type))%frame_parms->ofdm_symbol_size))
is_dmrs = 1;
}
diff --git a/openair1/SIMULATION/NR_PHY/ulsim.c b/openair1/SIMULATION/NR_PHY/ulsim.c
index abfd2c77c4b0e67f6fbc868e966b8c436c451665..895c2c055b1895b8a9ffb59c31822fb1356e94ae 100644
--- a/openair1/SIMULATION/NR_PHY/ulsim.c
+++ b/openair1/SIMULATION/NR_PHY/ulsim.c
@@ -129,7 +129,7 @@ int main(int argc, char **argv)
int loglvl = OAILOG_WARNING;
uint64_t SSB_positions=0x01;
uint16_t nb_symb_sch = 12;
- int start_symbol = 0;
+ int start_symbol = 2;
uint16_t nb_rb = 50;
uint8_t Imcs = 9;
uint8_t precod_nbr_layers = 1;
@@ -638,9 +638,9 @@ int main(int argc, char **argv)
//there are plenty of other parameters that we don't seem to be using for now. e.g.
ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0;
- nb_re_dmrs = ((ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type == pusch_dmrs_type1) ? 6 : 4) * number_dmrs_symbols;
- available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
- TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, precod_nbr_layers);
+ nb_re_dmrs = ((ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type == pusch_dmrs_type1) ? 6 : 4);
+ available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, number_dmrs_symbols, mod_order, 1);
+ TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs * number_dmrs_symbols, 0, precod_nbr_layers);
pusch_pdu->pusch_data.tb_size = TBS>>3;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS;
diff --git a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
index 6ca8fb9ed239695dbffa35040d7f10e75d344ff3..dd08143d4dce7e5474f61d7296750282f55b7dce 100644
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
@@ -810,7 +810,7 @@ void nr_schedule_uss_ulsch_phytest(int Mod_idP,
pusch_pdu->target_code_rate,
pusch_pdu->rb_size,
pusch_pdu->nr_of_symbols,
- 6, //nb_re_dmrs - not sure where this is coming from - its not in the FAPI
+ pusch_pdu->dmrs_config_type?4:6, //nb_re_dmrs - not sure where this is coming from - its not in the FAPI
0, //nb_rb_oh
pusch_pdu->nrOfLayers)>>3;
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported