update of pucch scheduler

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -318,7 +318,6 @@ void nr_schedule_pucch(int Mod_idP,
   uint16_t O_uci;
   uint16_t O_ack;
   uint8_t SR_flag = 0; // no SR in PUCCH implemented for now
-  uint8_t pucch_resource = 0; // in PHY test only one UE -> only one PUCCH resource used
   NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
   NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
   AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n",UE_id);
@@ -340,15 +339,14 @@ void nr_schedule_pucch(int Mod_idP,
       UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
       nfapi_nr_pucch_pdu_t  *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
       memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
-      UL_tti_req->n_pdus+=1;  
-
+      UL_tti_req->n_pdus+=1;
       O_ack = curr_pucch->dai_c;
       O_uci = O_ack; // for now we are just sending acknacks in pucch
 
       nr_configure_pucch(pucch_pdu,
 			 scc,
 			 ubwp,
-                         pucch_resource,
+                         curr_pucch->resource_indicator,
                          O_uci,
                          O_ack,
                          SR_flag);

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c

@@ -261,8 +261,6 @@ int configure_fapi_dl_Tx(int Mod_idP,
   NR_COMMON_channels_t                *cc      = nr_mac->common_channels;
   NR_ServingCellConfigCommon_t        *scc     = cc->ServingCellConfigCommon;
 
-  int pucch_fb_timing = pucch_sched->ul_slot - slotP;
-
   nfapi_nr_dl_tti_request_pdu_t  *dl_tti_pdcch_pdu;
   nfapi_nr_dl_tti_request_pdu_t  *dl_tti_pdsch_pdu;
   int TBS;
@@ -356,8 +354,8 @@ int configure_fapi_dl_Tx(int Mod_idP,
   dci_pdu_rel15[0].harq_pid = 0;
   dci_pdu_rel15[0].dai = (pucch_sched->dai_c-1)&3;
   dci_pdu_rel15[0].tpc = 2;
-  dci_pdu_rel15[0].pucch_resource_indicator = 0;  //FIXME this is fixed to 0 in phy test with only one user
-  dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_fb_timing-1; //FIXME valid only for format 1_0
+  dci_pdu_rel15[0].pucch_resource_indicator = pucch_sched->resource_indicator;
+  dci_pdu_rel15[0].pdsch_to_harq_feedback_timing_indicator = pucch_sched->timing_indicator;
   
   LOG_D(MAC, "[gNB scheduler phytest] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d\n",
 	dci_pdu_rel15[0].frequency_domain_assignment,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -1248,6 +1248,53 @@ int add_new_nr_ue(module_id_t mod_idP,
   return -1;
 }
 
+
+void get_pdsch_to_harq_feedback(int Mod_idP,
+                                int UE_id,
+                                NR_SearchSpace__searchSpaceType_PR ss_type,
+                                uint8_t *pdsch_to_harq_feedback) {
+
+  int bwp_id=1;
+  NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
+  NR_CellGroupConfig_t *secondaryCellGroup = UE_list->secondaryCellGroup[UE_id];
+  NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
+  NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1];
+
+  NR_SearchSpace_t *ss;
+
+  // common search type uses DCI format 1_0
+  if (ss_type == NR_SearchSpace__searchSpaceType_PR_common) {
+    for (int i=0; i<8; i++)
+      pdsch_to_harq_feedback[i] = i+1;
+  }
+  else {
+    // searching for a ue specific search space
+    int found=0;
+
+    for (int i=0;i<bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count;i++) {
+      ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i];
+      AssertFatal(ss->controlResourceSetId != NULL,"ss->controlResourceSetId is null\n");
+      AssertFatal(ss->searchSpaceType != NULL,"ss->searchSpaceType is null\n");
+      if (ss->searchSpaceType->present == ss_type) {
+	found=1;
+	break;
+      }
+    }
+    AssertFatal(found==1,"Couldn't find a ue specific searchspace\n");
+    if (ss->searchSpaceType->choice.ue_Specific->dci_Formats == NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0) {
+      for (int i=0; i<8; i++)
+        pdsch_to_harq_feedback[i] = i+1;
+    }
+    else {
+      if(ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK != NULL)
+        pdsch_to_harq_feedback = (uint8_t *)ubwp->bwp_Dedicated->pucch_Config->choice.setup->dl_DataToUL_ACK;
+      else
+        AssertFatal(found==1,"There is no allocated dl_DataToUL_ACK for pdsch to harq feedback\n");
+    }
+  }
+}
+
+
 // function to update pucch scheduling parameters in UE list when a USS DL is scheduled
 void nr_update_pucch_scheduling(int Mod_idP,
                                 int UE_id,
@@ -1258,50 +1305,111 @@ void nr_update_pucch_scheduling(int Mod_idP,
 
   NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
   NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
-  int first_ul_slot_tdd,next_slot;
+  int first_ul_slot_tdd,k;
   NR_sched_pucch *curr_pucch;
+  uint8_t pdsch_to_harq_feedback[8];
+  int found = 0;
+  int i = 0;
+  int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
+  if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
+    nr_ulmix_slots++;
+
+  // this is hardcoded for now as ue specific
+  NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
+  get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback);
 
   // if the list of pucch to be scheduled is empty
   if (UE_list->UE_sched_ctrl[UE_id].sched_pucch == NULL) {
     sched_pucch->frame = frameP;
     sched_pucch->next_sched_pucch = NULL;
     sched_pucch->dai_c = 1;
-    if ( (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots!=0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)) {
+    sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
+    if ( nr_ulmix_slots > 0 ) {
       // first pucch occasion in first UL or MIXED slot
       first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
-      // computing slot in which pucch is scheduled
-      sched_pucch->ul_slot = first_ul_slot_tdd + slotP - (slotP % slots_per_tdd);
+      for (k=0; k<nr_ulmix_slots; k++) { // for each possible UL or mixed slot
+        while (i<8 && found == 0)  {  // look if timing indicator is among allowed values
+          if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd))
+            found = 1;
+          if (found == 0) i++;
+        }
+        if (found == 1) break;
+      }
+      if (found == 1) {
+        // computing slot in which pucch is scheduled
+        sched_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd));
+        sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
+      }
+      else
+        AssertFatal(1==0,"No Uplink slot available in accordance to allowed timing indicator\n");
     }
     else
       AssertFatal(1==0,"No Uplink Slots in this Frame\n");
 
     UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch;
   }
-  else {
+  else {  // to be tested
     curr_pucch = UE_list->UE_sched_ctrl[UE_id].sched_pucch;
-    while (curr_pucch->next_sched_pucch != NULL)
-      curr_pucch = curr_pucch->next_sched_pucch;
-    // we are scheduling at most 11 ack nacks in the same pucch
-    if (curr_pucch->dai_c==11) {
-      next_slot = curr_pucch->ul_slot + 1;
-      if (next_slot == slots_per_tdd)
-        AssertFatal(1==0,"No more slots in this TDD period\n");
-      else {
-        // generating a new item in the list
-        sched_pucch->frame = frameP;
-        sched_pucch->next_sched_pucch = NULL;
-        sched_pucch->dai_c = 1;
-        sched_pucch->ul_slot = next_slot;
-        curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch));
-        curr_pucch->next_sched_pucch = sched_pucch;
+    if (curr_pucch->dai_c<11) {     // we are scheduling at most 11 harq-ack in the same pucch
+      while (i<8 && found == 0)  {  // look if timing indicator is among allowed values for current pucch
+        if (pdsch_to_harq_feedback[i]==(curr_pucch->ul_slot % slots_per_tdd)-(slotP % slots_per_tdd))
+          found = 1;
+        if (found == 0) i++;
+      }
+      if (found == 1) {  // scheduling this harq-ack in current pucch
+        sched_pucch = curr_pucch;
+        sched_pucch->dai_c = 1 + sched_pucch->dai_c;
+        sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
       }
     }
-    else {
-      sched_pucch = curr_pucch;
-      sched_pucch->dai_c = 1 + sched_pucch->dai_c;
+    if (curr_pucch->dai_c==11 || found == 0) { // if current pucch is full or no timing indicator allowed
+      // look for pucch occasions in other UL of mixed slots
+      for (k=scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots; k<slots_per_tdd; k++) { // for each possible UL or mixed slot
+        if (k!=(curr_pucch->ul_slot % slots_per_tdd)) { // skip current scheduled slot (already checked)
+          i = 0;
+          while (i<8 && found == 0)  {  // look if timing indicator is among allowed values
+            if (pdsch_to_harq_feedback[i]==k-(slotP % slots_per_tdd))
+              found = 1;
+            if (found == 0) i++;
+          }
+          if (found == 1) {
+            if (k<(curr_pucch->ul_slot % slots_per_tdd)) { // we need to add a pucch occasion before current pucch
+              sched_pucch->frame = frameP;
+              sched_pucch->ul_slot =  k + (slotP - (slotP % slots_per_tdd));
+              sched_pucch->next_sched_pucch = curr_pucch;
+              sched_pucch->dai_c = 1;
+              sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
+              sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
+              UE_list->UE_sched_ctrl[UE_id].sched_pucch = sched_pucch;
+            }
+            else {
+              while (curr_pucch->next_sched_pucch != NULL && k!=(curr_pucch->ul_slot % slots_per_tdd))
+                curr_pucch = curr_pucch->next_sched_pucch;
+              if (curr_pucch == NULL) {  // creating a new item in the list
+                sched_pucch->frame = frameP;
+                sched_pucch->next_sched_pucch = NULL;
+                sched_pucch->dai_c = 1;
+                sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
+                sched_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
+                sched_pucch->ul_slot = k + (slotP - (slotP % slots_per_tdd));
+                curr_pucch->next_sched_pucch = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch));
+                curr_pucch->next_sched_pucch = sched_pucch;
+              }
+              else {
+                if (curr_pucch->dai_c==11)
+                  found = 0; // if pucch at index k is already full we have to find a new one in a following occasion
+                else { // scheduling this harq-ack in current pucch
+                  sched_pucch = curr_pucch;
+                  sched_pucch->dai_c = 1 + sched_pucch->dai_c;
+                  sched_pucch->timing_indicator = pdsch_to_harq_feedback[i];
+                }
+              }
+            }
+          }
+        }
+      }
     }
   }
-
 }
 
 

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -94,6 +94,11 @@ void nr_update_pucch_scheduling(int Mod_idP,
                                 sub_frame_t slotP,
                                 int slots_per_tdd,
                                 NR_sched_pucch *sched_pucch);
+
+void get_pdsch_to_harq_feedback(int Mod_idP,
+                                int UE_id,
+                                NR_SearchSpace__searchSpaceType_PR ss_type,
+                                uint8_t *pdsch_to_harq_feedback);
   
 void nr_configure_css_dci_initial(nfapi_nr_dl_tti_pdcch_pdu_rel15_t* pdcch_pdu,
                                   nr_scs_e scs_common,

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -104,7 +104,8 @@ typedef struct NR_sched_pucch {
   int frame;
   int ul_slot;
   uint8_t dai_c;
-  uint8_t dai_t;
+  uint8_t timing_indicator;
+  uint8_t resource_indicator;
   struct NR_sched_pucch *next_sched_pucch;
 } NR_sched_pucch;