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Commit 7cbc0dc1 authored by WEI-TAI CHEN's avatar WEI-TAI CHEN
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fix some warning

parent b0bc5e65
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Showing with 32 additions and 226 deletions
openair1/SCHED_NR/fapi_nr_l1.c
View file @ 7cbc0dc1
...@@ -45,7 +45,7 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB, ...@@ -45,7 +45,7 @@ void handle_nr_nfapi_bch_pdu(PHY_VARS_gNB *gNB,
AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n", AssertFatal(dl_config_pdu->bch_pdu_rel15.length == 3, "BCH PDU has length %d != 3\n",
dl_config_pdu->bch_pdu_rel15.length); dl_config_pdu->bch_pdu_rel15.length);
//LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]); LOG_D(PHY,"bch_pdu: %x,%x,%x\n",sdu[0],sdu[1],sdu[2]);
gNB->pbch_pdu[0] = sdu[2]; gNB->pbch_pdu[0] = sdu[2];
gNB->pbch_pdu[1] = sdu[1]; gNB->pbch_pdu[1] = sdu[1];
gNB->pbch_pdu[2] = sdu[0]; gNB->pbch_pdu[2] = sdu[0];
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ 7cbc0dc1
...@@ -72,10 +72,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -72,10 +72,10 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP){ sub_frame_t subframeP){
nfapi_dl_config_request_t *DL_req = &gNB->DL_req[0]; nfapi_nr_dl_config_request_t *DL_req = &gNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0]; nfapi_ul_config_request_t *UL_req = &gNB->UL_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &gNB->HI_DCI0_req[0]; nfapi_hi_dci0_request_t * HI_DCI0_req = &gNB->HI_DCI0_req[0];
nfapi_tx_request_t *TX_req = &gNB->TX_req[0]; nfapi_tx_request_t *TX_req = &gNB->TX_req[0];
gNB->pdu_index[CC_idP] = 0; gNB->pdu_index[CC_idP] = 0;
...@@ -85,7 +85,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -85,7 +85,7 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
DL_req[CC_idP].dl_config_request_body.number_dci = 0; DL_req[CC_idP].dl_config_request_body.number_dci = 0;
DL_req[CC_idP].dl_config_request_body.number_pdu = 0; DL_req[CC_idP].dl_config_request_body.number_pdu = 0;
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0; DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000; //DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4); HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0; HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
...@@ -99,17 +99,17 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB, ...@@ -99,17 +99,17 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
} }
} }
/*
void check_nr_ul_failure(module_id_t module_idP, void check_nr_ul_failure(module_id_t module_idP,
int CC_id, int CC_id,
int UE_id, int UE_id,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP) { sub_frame_t subframeP) {
UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list; UE_list_t *UE_list = &RC.nrmac[module_idP]->UE_list;
nfapi_dl_config_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0]; nfapi_nr_dl_config_request_t *DL_req = &RC.nrmac[module_idP]->DL_req[0];
uint16_t rnti = UE_RNTI(module_idP, UE_id); uint16_t rnti = UE_RNTI(module_idP, UE_id);
COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels; NR_COMMON_channels_t *cc = RC.nrmac[module_idP]->common_channels;
// check uplink failure // check uplink failure
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 0) && if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 0) &&
...@@ -120,7 +120,7 @@ void check_nr_ul_failure(module_id_t module_idP, ...@@ -120,7 +120,7 @@ void check_nr_ul_failure(module_id_t module_idP,
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 1; UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 1;
// add a format 1A dci for this UE to request an RA procedure (only one UE per subframe) // add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu]; nfapi_nr_dl_config_request_pdu_t *dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu];
memset((void *) dl_config_pdu, 0,sizeof(nfapi_dl_config_request_pdu_t)); memset((void *) dl_config_pdu, 0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE; dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_dl_config_dci_dl_pdu)); dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_dl_config_dci_dl_pdu));
...@@ -175,7 +175,7 @@ void check_nr_ul_failure(module_id_t module_idP, ...@@ -175,7 +175,7 @@ void check_nr_ul_failure(module_id_t module_idP,
} // ul_failure_timer>0 } // ul_failure_timer>0
} }
*/
void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{ {
gNB_MAC_INST *gNB = RC.nrmac[module_idP]; gNB_MAC_INST *gNB = RC.nrmac[module_idP];
...@@ -258,200 +258,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram ...@@ -258,200 +258,6 @@ void schedule_nr_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subfram
} }
} }
void
schedule_nr_CSI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list;
COMMON_channels_t *cc;
nfapi_ul_config_request_body_t *ul_req;
int CC_id, UE_id;
struct CQI_ReportPeriodic *cqi_ReportPeriodic;
uint16_t Npd, N_OFFSET_CQI;
int H;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
cc = &gNB->common_channels[CC_id];
for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) {
if (!UE_list->active[UE_id]) continue;
ul_req = &RC.nrmac[module_idP]->UL_req[CC_id].ul_config_request_body;
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) continue;
AssertFatal(UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated
!= NULL,
"physicalConfigDedicated is null for UE %d\n",
UE_id);
if (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig) {
if ((cqi_ReportPeriodic = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic) != NULL
&& (cqi_ReportPeriodic->present != CQI_ReportPeriodic_PR_release)) {
//Rel8 Periodic CQI/PMI/RI reporting
get_csi_params(cc, cqi_ReportPeriodic, &Npd,
&N_OFFSET_CQI, &H);
if ((((frameP * 10) + subframeP) % Npd) == N_OFFSET_CQI) { // CQI opportunity
UE_list->UE_sched_ctrl[UE_id].feedback_cnt[CC_id] = (((frameP * 10) + subframeP) / Npd) % H;
// Program CQI
nfapi_ul_config_request_pdu_t *ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void *) ul_config_pdu, 0,
sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE;
ul_config_pdu->pdu_size = 2 + (uint8_t) (2 + sizeof(nfapi_ul_config_uci_cqi_pdu));
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_UE_INFORMATION_REL8_TAG;
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_CQI_INFORMATION_REL8_TAG;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.pucch_index = cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.dl_cqi_pmi_size = get_rel8_dl_cqi_pmi_size(&UE_list->UE_sched_ctrl[UE_id], CC_id, cc,
get_tmode(module_idP, CC_id, UE_id),
cqi_ReportPeriodic);
ul_req->number_of_pdus++;
ul_req->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
#if defined(Rel10) || defined(Rel14)
// PUT rel10-13 UCI options here
#endif
} else
if ((cqi_ReportPeriodic->choice.setup.ri_ConfigIndex)
&& ((((frameP * 10) + subframeP) % ((H * Npd) << (*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex / 161))) == N_OFFSET_CQI + (*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex % 161))) { // RI opportunity
// Program RI
nfapi_ul_config_request_pdu_t *ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus];
memset((void *) ul_config_pdu, 0,
sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE;
ul_config_pdu->pdu_size = 2 + (uint8_t) (2 + sizeof(nfapi_ul_config_uci_cqi_pdu));
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_UE_INFORMATION_REL8_TAG;
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_CQI_INFORMATION_REL8_TAG;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.pucch_index = cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex;
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.dl_cqi_pmi_size = (cc->p_eNB == 2) ? 1 : 2;
RC.nrmac[module_idP]->UL_req[CC_id].sfn_sf = (frameP << 4) + subframeP;
ul_req->number_of_pdus++;
ul_req->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
}
} // if ((cqi_ReportPeriodic = cqi_ReportConfig->cqi_ReportPeriodic)!=NULL) {
} // if (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig)
} // for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
} // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
}
void
schedule_nr_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
UE_list_t *UE_list = &gNB->UE_list;
nfapi_ul_config_request_t *ul_req;
nfapi_ul_config_request_body_t *ul_req_body;
int CC_id;
int UE_id;
SchedulingRequestConfig_t *SRconfig;
int skip_ue;
int is_harq;
nfapi_ul_config_sr_information sr;
int i;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
RC.nrmac[module_idP]->UL_req[CC_id].sfn_sf = (frameP << 4) + subframeP;
for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) {
if (!RC.nrmac[module_idP]->UE_list.active[UE_id]) continue;
ul_req = &RC.nrmac[module_idP]->UL_req[CC_id];
ul_req_body = &ul_req->ul_config_request_body;
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) continue;
AssertFatal(UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated!= NULL,
"physicalConfigDedicated is null for UE %d\n",
UE_id);
if ((SRconfig = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig) != NULL) {
if (SRconfig->present == SchedulingRequestConfig_PR_setup) {
if (SRconfig->choice.setup.sr_ConfigIndex <= 4) { // 5 ms SR period
if ((subframeP % 5) != SRconfig->choice.setup.sr_ConfigIndex) continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 14) { // 10 ms SR period
if (subframeP != (SRconfig->choice.setup.sr_ConfigIndex - 5)) continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 34) { // 20 ms SR period
if ((10 * (frameP & 1) + subframeP) != (SRconfig->choice.setup.sr_ConfigIndex - 15)) continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 74) { // 40 ms SR period
if ((10 * (frameP & 3) + subframeP) != (SRconfig->choice.setup.sr_ConfigIndex - 35)) continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 154) { // 80 ms SR period
if ((10 * (frameP & 7) + subframeP) != (SRconfig->choice.setup.sr_ConfigIndex - 75)) continue;
}
} // SRconfig->present == SchedulingRequestConfig_PR_setup)
} // SRconfig = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig)!=NULL)
// if we get here there is some PUCCH1 reception to schedule for SR
skip_ue = 0;
is_harq = 0;
// check that there is no existing UL grant for ULSCH which overrides the SR
for (i = 0; i < ul_req_body->number_of_pdus; i++) {
if (((ul_req_body->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) ||
(ul_req_body->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE) ||
(ul_req_body->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE) ||
(ul_req_body->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE)) &&
(ul_req_body->ul_config_pdu_list[i].ulsch_pdu.ulsch_pdu_rel8.rnti == UE_list->UE_template[CC_id][UE_id].rnti)) {
skip_ue = 1;
break;
}
/* if there is already an HARQ pdu, convert to SR_HARQ */
else if ((ul_req_body->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE) &&
(ul_req_body->ul_config_pdu_list[i].uci_harq_pdu.ue_information.ue_information_rel8.rnti == UE_list->UE_template[CC_id][UE_id].rnti)) {
is_harq = 1;
break;
}
}
// drop the allocation because ULSCH with handle it with BSR
if (skip_ue == 1) continue;
LOG_D(MAC,"Frame %d, Subframe %d : Scheduling SR for UE %d/%x is_harq:%d\n",frameP,subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].rnti, is_harq);
// check Rel10 or Rel8 SR
#if defined(Rel10) || defined(Rel14)
if ((UE_list-> UE_template[CC_id][UE_id].physicalConfigDedicated->ext2)
&& (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020)
&& (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020)) {
sr.sr_information_rel10.tl.tag = NFAPI_UL_CONFIG_REQUEST_SR_INFORMATION_REL10_TAG;
sr.sr_information_rel10.number_of_pucch_resources = 1;
sr.sr_information_rel10.pucch_index_p1 = *UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020->sr_PUCCH_ResourceIndexP1_r10;
LOG_D(MAC,"REL10 PUCCH INDEX P1:%d\n", sr.sr_information_rel10.pucch_index_p1);
} else
#endif
{
sr.sr_information_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_SR_INFORMATION_REL8_TAG;
sr.sr_information_rel8.pucch_index = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex;
LOG_D(MAC,"REL8 PUCCH INDEX:%d\n", sr.sr_information_rel8.pucch_index);
}
/* if there is already an HARQ pdu, convert to SR_HARQ */
if (is_harq) {
nfapi_ul_config_harq_information h = ul_req_body->ul_config_pdu_list[i].uci_harq_pdu.harq_information;
ul_req_body->ul_config_pdu_list[i].pdu_type = NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE;
ul_req_body->ul_config_pdu_list[i].uci_sr_harq_pdu.sr_information = sr;
ul_req_body->ul_config_pdu_list[i].uci_sr_harq_pdu.harq_information = h;
} else {
ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus].pdu_type = NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE;
ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus].uci_sr_pdu.ue_information.ue_information_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_UE_INFORMATION_REL8_TAG;
ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus].uci_sr_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti;
ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus].uci_sr_pdu.ue_information.ue_information_rel11.tl.tag = 0;
ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus].uci_sr_pdu.ue_information.ue_information_rel13.tl.tag = 0;
ul_req_body->ul_config_pdu_list[ul_req_body->number_of_pdus].uci_sr_pdu.sr_information = sr;
ul_req_body->number_of_pdus++;
} /* if (is_harq) */
ul_req_body->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
} // for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id])
} // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
}
void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{ {
int CC_id; int CC_id;
...@@ -484,8 +290,6 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP ...@@ -484,8 +290,6 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP){ sub_frame_t subframeP){
int mbsfn_status[MAX_NUM_CCs];
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
int CC_id, i = -1; int CC_id, i = -1;
...@@ -501,7 +305,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -501,7 +305,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
RC.nrmac[module_idP]->subframe = subframeP; RC.nrmac[module_idP]->subframe = subframeP;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
mbsfn_status[CC_id] = 0; //mbsfn_status[CC_id] = 0;
// clear vrb_maps // clear vrb_maps
memset(cc[CC_id].vrb_map, 0, 100); memset(cc[CC_id].vrb_map, 0, 100);
...@@ -545,7 +349,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -545,7 +349,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer, RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer,
RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer); RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer);
check_nr_ul_failure(module_idP, CC_id, i, frameP, subframeP); //check_nr_ul_failure(module_idP, CC_id, i, frameP, subframeP);
if (RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer > 0) { if (RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer > 0) {
RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer++; RC.nrmac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer++;
...@@ -606,7 +410,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -606,7 +410,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
pdcp_run(&ctxt); pdcp_run(&ctxt);
rrc_rx_tx(&ctxt, CC_id); //rrc_rx_tx(&ctxt, CC_id);
// This schedules MIB // This schedules MIB
if((subframeP == 0) && (frameP & 7) == 0){ if((subframeP == 0) && (frameP & 7) == 0){
...@@ -642,11 +446,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -642,11 +446,13 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
if (RC.flexran[module_idP]->enabled) if (RC.flexran[module_idP]->enabled)
flexran_agent_send_update_stats(module_idP); flexran_agent_send_update_stats(module_idP);
/*
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0); allocate_CCEs(module_idP, CC_id, subframeP, 0);
stop_meas(&RC.nrmac[module_idP]->eNB_scheduler); stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
} }
\ No newline at end of file
openair2/LAYER2/NR_MAC_gNB/main.c
View file @ 7cbc0dc1
...@@ -45,7 +45,7 @@ extern RAN_CONTEXT_t RC; ...@@ -45,7 +45,7 @@ extern RAN_CONTEXT_t RC;
void mac_top_init_gNB(void) void mac_top_init_gNB(void)
{ {
module_id_t i; module_id_t i,j;
int list_el; int list_el;
UE_list_t *UE_list; UE_list_t *UE_list;
gNB_MAC_INST *nrmac; gNB_MAC_INST *nrmac;
...@@ -73,7 +73,7 @@ void mac_top_init_gNB(void) ...@@ -73,7 +73,7 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->Mod_id = i; RC.nrmac[i]->Mod_id = i;
/*
for (j = 0; j < MAX_NUM_CCs; j++) { for (j = 0; j < MAX_NUM_CCs; j++) {
RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j]; RC.nrmac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.nrmac[i]->dl_config_pdu_list[j];
RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j]; RC.nrmac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.nrmac[i]->ul_config_pdu_list[j];
...@@ -85,7 +85,7 @@ void mac_top_init_gNB(void) ...@@ -85,7 +85,7 @@ void mac_top_init_gNB(void)
RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j]; RC.nrmac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.nrmac[i]->tx_request_pdu[j];
RC.nrmac[i]->ul_handle = 0; RC.nrmac[i]->ul_handle = 0;
} }
*/
}//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++) }//END for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
......
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
View file @ 7cbc0dc1
...@@ -263,7 +263,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) ...@@ -263,7 +263,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info)
// clear DL/UL info for new scheduling round // clear DL/UL info for new scheduling round
clear_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->subframe); clear_nr_nfapi_information(RC.nrmac[module_id],CC_id,UL_info->frame,UL_info->subframe);
handle_nr_rach(UL_info); handle_nr_rach(UL_info);
......
openair2/RRC/NR/L2_nr_interface.c
View file @ 7cbc0dc1
...@@ -20,9 +20,9 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP, ...@@ -20,9 +20,9 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
uint8_t *const buffer_pP ){ uint8_t *const buffer_pP ){
asn_enc_rval_t enc_rval; asn_enc_rval_t enc_rval;
SRB_INFO *Srb_info; //SRB_INFO *Srb_info;
uint8_t Sdu_size = 0; //uint8_t Sdu_size = 0;
uint8_t sfn = (uint8_t)((frameP>>2)&0xff); uint8_t sfn = (uint8_t)((frameP>>4)&0xff);
#ifdef DEBUG_RRC #ifdef DEBUG_RRC
int i; int i;
......
openair2/RRC/NR/MESSAGES/asn1_msg.c
View file @ 7cbc0dc1
...@@ -205,7 +205,7 @@ uint8_t do_MIB_NR(rrc_gNB_carrier_data_t *carrier, ...@@ -205,7 +205,7 @@ uint8_t do_MIB_NR(rrc_gNB_carrier_data_t *carrier,
mib->message.choice.mib = CALLOC(1,sizeof(struct NR_MIB)); mib->message.choice.mib = CALLOC(1,sizeof(struct NR_MIB));
memset(mib->message.choice.mib,0,sizeof(struct NR_MIB)); memset(mib->message.choice.mib,0,sizeof(struct NR_MIB));
//36.331 SFN BIT STRING (SIZE (8) , 38.331 SFN BIT STRING (SIZE (6)) //36.331 SFN BIT STRING (SIZE (8) , 38.331 SFN BIT STRING (SIZE (6))
uint8_t sfn = (uint8_t)((frame>>2)&0x3f); uint8_t sfn = (uint8_t)((frame>>4)&0xff);
mib->message.choice.mib->systemFrameNumber.buf = &sfn; mib->message.choice.mib->systemFrameNumber.buf = &sfn;
mib->message.choice.mib->systemFrameNumber.size = 1; mib->message.choice.mib->systemFrameNumber.size = 1;
mib->message.choice.mib->systemFrameNumber.bits_unused=0; mib->message.choice.mib->systemFrameNumber.bits_unused=0;
......
targets/RT/USER/nr-gnb.c
View file @ 7cbc0dc1
...@@ -197,12 +197,12 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam ...@@ -197,12 +197,12 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
return 0; return 0;
} }
/// NR disabling /// NR disabling
/*
// **************************************** // ****************************************
// Common RX procedures subframe n // Common RX procedures subframe n
T(T_gNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx)); T(T_gNB_PHY_DL_TICK, T_INT(gNB->Mod_id), T_INT(proc->frame_tx), T_INT(proc->subframe_tx));
/*
// if this is IF5 or 3GPP_gNB // if this is IF5 or 3GPP_gNB
if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) { if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->subframe_rx); wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->subframe_rx);
...@@ -212,7 +212,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam ...@@ -212,7 +212,7 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
if (nfapi_mode == 0 || nfapi_mode == 1) { if (nfapi_mode == 0 || nfapi_mode == 1) {
phy_procedures_gNB_uespec_RX(gNB, proc, no_relay ); phy_procedures_gNB_uespec_RX(gNB, proc, no_relay );
} }
*/
pthread_mutex_lock(&gNB->UL_INFO_mutex); pthread_mutex_lock(&gNB->UL_INFO_mutex);
gNB->UL_INFO.frame = proc->frame_rx; gNB->UL_INFO.frame = proc->frame_rx;
...@@ -220,10 +220,10 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam ...@@ -220,10 +220,10 @@ static inline int rxtx(PHY_VARS_gNB *gNB,gNB_rxtx_proc_t *proc, char *thread_nam
gNB->UL_INFO.module_id = gNB->Mod_id; gNB->UL_INFO.module_id = gNB->Mod_id;
gNB->UL_INFO.CC_id = gNB->CC_id; gNB->UL_INFO.CC_id = gNB->CC_id;
gNB->if_inst->UL_indication(&gNB->UL_INFO); gNB->if_inst->NR_UL_indication(&gNB->UL_INFO);
pthread_mutex_unlock(&gNB->UL_INFO_mutex); pthread_mutex_unlock(&gNB->UL_INFO_mutex);
*/
/// end /// end
// ***************************************** // *****************************************
// TX processing for subframe n+sf_ahead // TX processing for subframe n+sf_ahead
......
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