Get type0_PDCCH_CSS_config parameters at the gNB. SIB1 initialization has been...

Get type0_PDCCH_CSS_config parameters at the gNB. SIB1 initialization has been added at SI initialization. SIB1 was transmitted with static parameters.

ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf

@@ -2,11 +2,6 @@ Active_gNBs = ( "gNB-Eurecom-5GNRBox");
 # Asn1_verbosity, choice in: none, info, annoying
 Asn1_verbosity = "none";
 
-#pdcch-ConfigSIB1
-#controlResourceSetZero = 10;
-#searchSpaceZero = 0;
-
-
 gNBs =
 (
  {

openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c

@@ -2588,4 +2588,370 @@ int binomial(int n, int k) {
   return c;
 }
 
+uint32_t get_ssb_slot(uint32_t ssb_index){
+  //  this function now only support f <= 3GHz
+  return ssb_index & 0x3 ;
 
+  //  return first_symbol(case, freq, ssb_index) / 14
+}
+
+int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
+                                          NR_MIB_t *mib,
+                                          uint8_t extra_bits,
+                                          uint32_t ssb_length,
+                                          uint32_t ssb_index) {
+
+  //  deafult for testing
+  subcarrier_spacing_t scs_ssb = scs_30kHz;
+  channel_bandwidth_t min_channel_bw = bw_10MHz;
+  frequency_range_t frequency_range = FR1;
+  const uint32_t num_slot_per_frame = 20;
+
+  type0_PDCCH_CSS_config->ssb_length = ssb_length;
+  type0_PDCCH_CSS_config->ssb_index = ssb_index;
+  type0_PDCCH_CSS_config->frame = (mib->systemFrameNumber.buf[0] >> mib->systemFrameNumber.bits_unused);
+
+  uint16_t frame_number_4lsb = 0;
+  for (int i=0; i<4; i++) {
+    frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
+  }
+
+  uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1;    //	extra bits[5]
+  uint8_t ssb_subcarrier_offset = (uint8_t)mib->ssb_SubcarrierOffset;
+
+  type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame << 4;
+  type0_PDCCH_CSS_config->frame = type0_PDCCH_CSS_config->frame | frame_number_4lsb;
+
+  if(type0_PDCCH_CSS_config->ssb_length == 64){
+    type0_PDCCH_CSS_config->ssb_index = type0_PDCCH_CSS_config->ssb_index & (( extra_bits >> 2 ) & 0x1C );    //	{ extra_bits[5:7], ssb_index[2:0] }
+  }else{
+    if(ssb_subcarrier_offset_msb){
+      ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10;
+    }
+  }
+
+  //  assume carrier frequency < 6GHz
+  subcarrier_spacing_t scs_pdcch;
+  if(mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){
+    scs_pdcch = scs_15kHz;
+  }else{  //NR_MIB__subCarrierSpacingCommon_scs30or120
+    scs_pdcch = scs_30kHz;
+  }
+
+  uint32_t is_condition_A = (ssb_subcarrier_offset == 0);   //  38.213 ch.13
+  uint32_t index_4msb = (mib->pdcch_ConfigSIB1.controlResourceSetZero);
+  uint32_t index_4lsb = (mib->pdcch_ConfigSIB1.searchSpaceZero);
+
+  type0_PDCCH_CSS_config->num_rbs = -1;
+  type0_PDCCH_CSS_config->num_symbols = -1;
+  type0_PDCCH_CSS_config->rb_offset = -1;
+
+  //  type0-pdcch coreset
+  switch( (scs_ssb << 5) | scs_pdcch ){
+    case (scs_15kHz << 5) | scs_15kHz :
+      AssertFatal(index_4msb < 15, "38.213 Table 13-1 4 MSB out of range\n");
+      type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+      type0_PDCCH_CSS_config->num_rbs     = table_38213_13_1_c2[index_4msb];
+      type0_PDCCH_CSS_config->num_symbols = table_38213_13_1_c3[index_4msb];
+      type0_PDCCH_CSS_config->rb_offset   = table_38213_13_1_c4[index_4msb];
+      break;
+
+    case (scs_15kHz << 5) | scs_30kHz:
+      AssertFatal(index_4msb < 14, "38.213 Table 13-2 4 MSB out of range\n");
+      type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+      type0_PDCCH_CSS_config->num_rbs     = table_38213_13_2_c2[index_4msb];
+      type0_PDCCH_CSS_config->num_symbols = table_38213_13_2_c3[index_4msb];
+      type0_PDCCH_CSS_config->rb_offset   = table_38213_13_2_c4[index_4msb];
+      break;
+
+    case (scs_30kHz << 5) | scs_15kHz:
+      if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
+        AssertFatal(index_4msb < 9, "38.213 Table 13-3 4 MSB out of range\n");
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+        type0_PDCCH_CSS_config->num_rbs     = table_38213_13_3_c2[index_4msb];
+        type0_PDCCH_CSS_config->num_symbols = table_38213_13_3_c3[index_4msb];
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_3_c4[index_4msb];
+      }else if(min_channel_bw & bw_40MHz){
+        AssertFatal(index_4msb < 9, "38.213 Table 13-5 4 MSB out of range\n");
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+        type0_PDCCH_CSS_config->num_rbs     = table_38213_13_5_c2[index_4msb];
+        type0_PDCCH_CSS_config->num_symbols = table_38213_13_5_c3[index_4msb];
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_5_c4[index_4msb];
+      }else{ ; }
+
+      break;
+
+    case (scs_30kHz << 5) | scs_30kHz:
+      if((min_channel_bw & bw_5MHz) | (min_channel_bw & bw_10MHz)){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+        type0_PDCCH_CSS_config->num_rbs     = table_38213_13_4_c2[index_4msb];
+        type0_PDCCH_CSS_config->num_symbols = table_38213_13_4_c3[index_4msb];
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_4_c4[index_4msb];
+
+        LOG_I(MAC,"<<<<<<<<<index_4msb %d num_rbs %d num_symb %d rb_offset %d\n",
+              index_4msb,type0_PDCCH_CSS_config->num_rbs,type0_PDCCH_CSS_config->num_symbols,type0_PDCCH_CSS_config->rb_offset );
+
+      }else if(min_channel_bw & bw_40MHz){
+        AssertFatal(index_4msb < 10, "38.213 Table 13-6 4 MSB out of range\n");
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+        type0_PDCCH_CSS_config->num_rbs     = table_38213_13_6_c2[index_4msb];
+        type0_PDCCH_CSS_config->num_symbols = table_38213_13_6_c3[index_4msb];
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_6_c4[index_4msb];
+      }else{ ; }
+      break;
+
+    case (scs_120kHz << 5) | scs_60kHz:
+      AssertFatal(index_4msb < 12, "38.213 Table 13-7 4 MSB out of range\n");
+      if(index_4msb & 0x7){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+      }else if(index_4msb & 0x18){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 2;
+      }else{ ; }
+
+      type0_PDCCH_CSS_config->num_rbs     = table_38213_13_7_c2[index_4msb];
+      type0_PDCCH_CSS_config->num_symbols = table_38213_13_7_c3[index_4msb];
+      if(!is_condition_A && (index_4msb == 8 || index_4msb == 10)){
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_7_c4[index_4msb] - 1;
+      }else{
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_7_c4[index_4msb];
+      }
+      break;
+
+    case (scs_120kHz << 5) | scs_120kHz:
+      AssertFatal(index_4msb < 8, "38.213 Table 13-8 4 MSB out of range\n");
+      if(index_4msb & 0x3){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+      }else if(index_4msb & 0x0c){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 3;
+      }
+
+      type0_PDCCH_CSS_config->num_rbs     = table_38213_13_8_c2[index_4msb];
+      type0_PDCCH_CSS_config->num_symbols = table_38213_13_8_c3[index_4msb];
+      if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_8_c4[index_4msb] - 1;
+      }else{
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_8_c4[index_4msb];
+      }
+      break;
+
+    case (scs_240kHz << 5) | scs_60kHz:
+      AssertFatal(index_4msb < 4, "38.213 Table 13-9 4 MSB out of range\n");
+      type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+      type0_PDCCH_CSS_config->num_rbs     = table_38213_13_9_c2[index_4msb];
+      type0_PDCCH_CSS_config->num_symbols = table_38213_13_9_c3[index_4msb];
+      type0_PDCCH_CSS_config->rb_offset   = table_38213_13_9_c4[index_4msb];
+      break;
+
+    case (scs_240kHz << 5) | scs_120kHz:
+      AssertFatal(index_4msb < 8, "38.213 Table 13-10 4 MSB out of range\n");
+      if(index_4msb & 0x3){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 1;
+      }else if(index_4msb & 0x0c){
+        type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern = 2;
+      }
+      type0_PDCCH_CSS_config->num_rbs     = table_38213_13_10_c2[index_4msb];
+      type0_PDCCH_CSS_config->num_symbols = table_38213_13_10_c3[index_4msb];
+      if(!is_condition_A && (index_4msb == 4 || index_4msb == 6)){
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_10_c4[index_4msb]-1;
+      }else{
+        type0_PDCCH_CSS_config->rb_offset   = table_38213_13_10_c4[index_4msb];
+      }
+
+      break;
+
+    default:
+      break;
+  }
+
+  AssertFatal(type0_PDCCH_CSS_config->num_rbs != -1, "Type0 PDCCH coreset num_rbs undefined");
+  AssertFatal(type0_PDCCH_CSS_config->num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined");
+  AssertFatal(type0_PDCCH_CSS_config->rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
+
+
+  //uint32_t cell_id = 0;   //  obtain from L1 later
+
+  //mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
+  //mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
+
+//  uint64_t mask = 0x0;
+//  uint8_t i;
+//  for(i=0; i<(type0_PDCCH_CSS_config->num_rbs/6); ++i){   //  38.331 Each bit corresponds a group of 6 RBs
+//    mask = mask >> 1;
+//    mask = mask | 0x100000000000;
+//  }
+
+  //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
+
+//    mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
+//    mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset
+//
+//    //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6;   //  L 38.211 7.3.2.2
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2;  //  R 38.211 7.3.2.2
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
+//    mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
+//    mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
+
+
+  // type0-pdcch search space
+  float big_o;
+  float big_m;
+  uint32_t temp;
+  type0_PDCCH_CSS_config->sfn_c=SFN_C_IMPOSSIBLE;   //  only valid for mux=1
+  type0_PDCCH_CSS_config->n_c=UINT_MAX;
+  type0_PDCCH_CSS_config->number_of_search_space_per_slot=UINT_MAX;
+  type0_PDCCH_CSS_config->first_symbol_index=UINT_MAX;
+  type0_PDCCH_CSS_config->search_space_duration;  //  element of search space
+  //  38.213 table 10.1-1
+
+  /// MUX PATTERN 1
+  if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){
+    big_o = table_38213_13_11_c1[index_4lsb];
+    type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
+    big_m = table_38213_13_11_c3[index_4lsb];
+
+    temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(type0_PDCCH_CSS_config->ssb_index*big_m);
+    type0_PDCCH_CSS_config->n_c = temp / num_slot_per_frame;
+    if((temp/num_slot_per_frame) & 0x1){
+      type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_1;
+    }else{
+      type0_PDCCH_CSS_config->sfn_c = SFN_C_MOD_2_EQ_0;
+    }
+
+    if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (type0_PDCCH_CSS_config->ssb_index&1)){
+      type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols;
+    }else{
+      type0_PDCCH_CSS_config->first_symbol_index = table_38213_13_11_c4[index_4lsb];
+    }
+    //  38.213 chapter 13: over two consecutive slots
+    type0_PDCCH_CSS_config->search_space_duration = 2;
+  }
+
+  if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){
+    big_o = table_38213_13_12_c1[index_4lsb];
+    type0_PDCCH_CSS_config->number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
+    big_m = table_38213_13_12_c3[index_4lsb];
+
+    if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 10) && (type0_PDCCH_CSS_config->ssb_index&1)){
+      type0_PDCCH_CSS_config->first_symbol_index = 7;
+    }else if((index_4lsb == 6 || index_4lsb == 7 || index_4lsb == 8 || index_4lsb == 11) && (type0_PDCCH_CSS_config->ssb_index&1)){
+      type0_PDCCH_CSS_config->first_symbol_index = type0_PDCCH_CSS_config->num_symbols;
+    }else{
+      type0_PDCCH_CSS_config->first_symbol_index = 0;
+    }
+    //  38.213 chapter 13: over two consecutive slots
+    type0_PDCCH_CSS_config->search_space_duration = 2;
+  }
+
+  /// MUX PATTERN 2
+  if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 2){
+
+    if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){
+      //  38.213 Table 13-13
+      AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n");
+      //  PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
+      //                sfn_c = SFN_C_EQ_SFN_SSB;
+      type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index);
+      switch(type0_PDCCH_CSS_config->ssb_index & 0x3){    //  ssb_index(i) mod 4
+        case 0:
+          type0_PDCCH_CSS_config->first_symbol_index = 0;
+          break;
+        case 1:
+          type0_PDCCH_CSS_config->first_symbol_index = 1;
+          break;
+        case 2:
+          type0_PDCCH_CSS_config->first_symbol_index = 6;
+          break;
+        case 3:
+          type0_PDCCH_CSS_config->first_symbol_index = 7;
+          break;
+        default: break;
+      }
+
+    }else if((scs_ssb == scs_240kHz) && (scs_pdcch == scs_120kHz)){
+      //  38.213 Table 13-14
+      AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n");
+      //  PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
+      //                sfn_c = SFN_C_EQ_SFN_SSB;
+      type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index);
+      switch(type0_PDCCH_CSS_config->ssb_index & 0x7){    //  ssb_index(i) mod 8
+        case 0:
+          type0_PDCCH_CSS_config->first_symbol_index = 0;
+          break;
+        case 1:
+          type0_PDCCH_CSS_config->first_symbol_index = 1;
+          break;
+        case 2:
+          type0_PDCCH_CSS_config->first_symbol_index = 2;
+          break;
+        case 3:
+          type0_PDCCH_CSS_config->first_symbol_index = 3;
+          break;
+        case 4:
+          type0_PDCCH_CSS_config->first_symbol_index = 12;
+          type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index) - 1;
+          break;
+        case 5:
+          type0_PDCCH_CSS_config->first_symbol_index = 13;
+          type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index) - 1;
+          break;
+        case 6:
+          type0_PDCCH_CSS_config->first_symbol_index = 0;
+          break;
+        case 7:
+          type0_PDCCH_CSS_config->first_symbol_index = 1;
+          break;
+        default: break;
+      }
+    }else{ ; }
+    //  38.213 chapter 13: over one slot
+    type0_PDCCH_CSS_config->search_space_duration = 1;
+  }
+
+  /// MUX PATTERN 3
+  if(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern == 3){
+    if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_120kHz)){
+      //  38.213 Table 13-15
+      AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n");
+      //  PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
+      //                sfn_c = SFN_C_EQ_SFN_SSB;
+      type0_PDCCH_CSS_config->n_c = get_ssb_slot(type0_PDCCH_CSS_config->ssb_index);
+      switch(type0_PDCCH_CSS_config->ssb_index & 0x3){    //  ssb_index(i) mod 4
+        case 0:
+          type0_PDCCH_CSS_config->first_symbol_index = 4;
+          break;
+        case 1:
+          type0_PDCCH_CSS_config->first_symbol_index = 8;
+          break;
+        case 2:
+          type0_PDCCH_CSS_config->first_symbol_index = 2;
+          break;
+        case 3:
+          type0_PDCCH_CSS_config->first_symbol_index = 6;
+          break;
+        default: break;
+      }
+    }else{ ; }
+    //  38.213 chapter 13: over one slot
+    type0_PDCCH_CSS_config->search_space_duration = 1;
+  }
+
+  AssertFatal(type0_PDCCH_CSS_config->number_of_search_space_per_slot!=UINT_MAX,"");
+
+//  uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot;
+//    mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
+//    mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
+//    mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2];   //  CCE aggregation level = 4
+//    mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3];   //  CCE aggregation level = 8
+//    mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4];   //  CCE aggregation level = 16
+//    mac->type0_pdcch_dci_config.duration = search_space_duration;
+//    mac->type0_pdcch_dci_config.coreset.duration = coreset_duration;   //  coreset
+//    AssertFatal(first_symbol_index!=UINT_MAX,"");
+//    mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
+
+  AssertFatal(type0_PDCCH_CSS_config->sfn_c!=SFN_C_IMPOSSIBLE,"");
+  AssertFatal(type0_PDCCH_CSS_config->n_c!=UINT_MAX,"");
+
+  return 0;
+}

openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h

@@ -32,6 +32,7 @@
 #ifndef __LAYER2_NR_MAC_COMMON_H__
 #define __LAYER2_NR_MAC_COMMON_H__
 
+#include <NR_MIB.h>
 #include "NR_PDSCH-Config.h"
 #include "NR_CellGroupConfig.h"
 #include "nr_mac.h"
@@ -78,6 +79,14 @@ typedef enum {
   NR_RNTI_MCS_C,
 } nr_rnti_type_t;
 
+typedef enum subcarrier_spacing_e {
+  scs_15kHz  = 0x1,
+  scs_30kHz  = 0x2,
+  scs_60kHz  = 0x4,
+  scs_120kHz = 0x8,
+  scs_240kHz = 0x16
+} subcarrier_spacing_t;
+
 typedef enum channel_bandwidth_e {
     bw_5MHz   = 0x1,
     bw_10MHz  = 0x2,
@@ -98,6 +107,27 @@ typedef enum nr_ssb_and_cset_mux_pattern_type_e {
     NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
 } nr_ssb_and_cset_mux_pattern_type_t;
 
+typedef enum {
+    SFN_C_MOD_2_EQ_0,
+    SFN_C_MOD_2_EQ_1,
+    SFN_C_IMPOSSIBLE
+} SFN_C_TYPE;
+
+typedef struct Type0_PDCCH_CSS_config_s {
+  int32_t num_rbs;
+  int32_t num_symbols;
+  int32_t rb_offset;
+  uint32_t type0_pdcch_ss_mux_pattern;
+  uint16_t frame;
+  SFN_C_TYPE sfn_c;
+  uint32_t n_c;
+  uint32_t number_of_search_space_per_slot;
+  uint32_t first_symbol_index;
+  uint32_t search_space_duration;
+  uint32_t ssb_length;
+  uint32_t ssb_index;
+} NR_Type0_PDCCH_CSS_config_t;
+
 uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
 
 void get_band(uint64_t downlink_frequency, uint16_t *current_band, int32_t *current_offset, lte_frame_type_t *current_type);
@@ -159,4 +189,10 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
 uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
 uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
 
+int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
+                                          NR_MIB_t *mib,
+                                          uint8_t extra_bits,
+                                          uint32_t ssb_length,
+                                          uint32_t ssb_index);
+
 #endif

openair2/LAYER2/NR_MAC_UE/mac_defs.h

@@ -72,13 +72,6 @@
 /*!\brief value for indicating BSR Timer is not running */
 #define NR_MAC_UE_BSR_TIMER_NOT_RUNNING   (0xFFFF)
 
-
-typedef enum {
-    SFN_C_MOD_2_EQ_0, 
-    SFN_C_MOD_2_EQ_1,
-    SFN_C_IMPOSSIBLE
-} SFN_C_TYPE;
-
 // LTE structure, might need to be adapted for NR
 typedef struct {
   /// buffer status for each lcgid
@@ -260,6 +253,9 @@ typedef struct {
 
   /// PHR
   uint8_t PHR_reporting_active;
+
+  NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config;
+
 } NR_UE_MAC_INST_t;
 
 typedef enum seach_space_mask_e {
@@ -270,14 +266,6 @@ typedef enum seach_space_mask_e {
     type3_pdcch  = 0x10
 } search_space_mask_t;
 
-typedef enum subcarrier_spacing_e {
-    scs_15kHz  = 0x1,
-    scs_30kHz  = 0x2,
-    scs_60kHz  = 0x4,
-    scs_120kHz = 0x8,
-    scs_240kHz = 0x16
-} subcarrier_spacing_t;
-
 typedef struct {
   uint8_t identifier_dci_formats          ; // 0  IDENTIFIER_DCI_FORMATS:
   uint8_t carrier_ind                     ; // 1  CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]

openair2/LAYER2/NR_MAC_UE/mac_proto.h

@@ -123,8 +123,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, dc
 int nr_ue_process_dci_indication_pdu(module_id_t module_id,int cc_id, int gNB_index,fapi_nr_dci_indication_pdu_t *dci);
 
 uint32_t get_ssb_frame(uint32_t test);
-uint32_t get_ssb_slot(uint32_t ssb_index);
-
 
 uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
 

openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c

@@ -112,12 +112,6 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
 
 }
 
-uint32_t get_ssb_slot(uint32_t ssb_index){
-  //  this function now only support f <= 3GHz
-  return ssb_index & 0x3 ;
-
-  //  return first_symbol(case, freq, ssb_index) / 14
-}
 
 uint8_t table_9_2_2_1[16][8]={
   {0,12,2, 0, 0,3,0,0},
@@ -287,10 +281,59 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
 
   NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
 
+  // fill in the elements in config request inside P5 message
+  mac->phy_config.Mod_id = module_id;
+  mac->phy_config.CC_id = cc_id;
+
   nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 );    //  fixed 3 bytes MIB PDU
     
   AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n");
-  //if(mac->mib != NULL){
+
+//#ifdef DEBUG_MIB
+  LOG_I(MAC,"system frame number(6 MSB bits): %d\n",  mac->mib->systemFrameNumber.buf[0]);
+  //LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame);
+  LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
+  //LOG_I(MAC,"ssb carrier offset(with MSB):  %d\n", (int)ssb_subcarrier_offset);
+  LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
+  LOG_I(MAC,"pdcch config sib1.controlResourceSetZero:             %d\n", (int)mac->mib->pdcch_ConfigSIB1.controlResourceSetZero);
+  LOG_I(MAC,"pdcch config sib1.searchSpaceZero:             %d\n", (int)mac->mib->pdcch_ConfigSIB1.searchSpaceZero);
+  LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
+  LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
+  //LOG_I(MAC,"half frame bit(extra bits):    %d\n", (int)half_frame_bit);
+  //LOG_I(MAC,"ssb index(extra bits):         %d\n", (int)ssb_index);
+//#endif
+
+  get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, mac->mib, extra_bits, ssb_length, ssb_index);
+
+  ssb_index = mac->type0_PDCCH_CSS_config.ssb_index; //  TODO: ssb_index should obtain from L1 in case Lssb != 64
+  mac->type0_pdcch_ss_mux_pattern = mac->type0_PDCCH_CSS_config.type0_pdcch_ss_mux_pattern;
+  mac->type0_pdcch_ss_sfn_c = mac->type0_PDCCH_CSS_config.sfn_c;
+  mac->type0_pdcch_ss_n_c = mac->type0_PDCCH_CSS_config.n_c;
+  mac->dl_config_request.sfn = mac->type0_PDCCH_CSS_config.frame;
+  mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
+
+
+  printf("extra_bits = %i\n", extra_bits);
+
+  printf("mac->type0_PDCCH_CSS_config.num_rbs = %i\n", mac->type0_PDCCH_CSS_config.num_rbs);
+  printf("mac->type0_PDCCH_CSS_config.num_symbols = %i\n", mac->type0_PDCCH_CSS_config.num_symbols);
+  printf("mac->type0_PDCCH_CSS_config.rb_offset = %i\n", mac->type0_PDCCH_CSS_config.rb_offset);
+  printf("mac->type0_pdcch_ss_mux_pattern = %i\n", mac->type0_pdcch_ss_mux_pattern);
+  printf("mac->type0_PDCCH_CSS_config.frame = %i\n", mac->type0_PDCCH_CSS_config.frame);
+  printf("mac->type0_pdcch_ss_sfn_c = %i\n", mac->type0_pdcch_ss_sfn_c);
+  printf("mac->type0_pdcch_ss_n_c = %i\n", mac->type0_pdcch_ss_n_c);
+  printf("mac->type0_PDCCH_CSS_config.number_of_search_space_per_slot = %i\n", mac->type0_PDCCH_CSS_config.number_of_search_space_per_slot);
+  printf("mac->type0_PDCCH_CSS_config.first_symbol_index = %i\n", mac->type0_PDCCH_CSS_config.first_symbol_index);
+  printf("mac->type0_PDCCH_CSS_config.search_space_duration = %i\n", mac->type0_PDCCH_CSS_config.search_space_duration);
+  printf("mac->type0_PDCCH_CSS_config.ssb_length = %i\n", mac->type0_PDCCH_CSS_config.ssb_length);
+  printf("ssb_index = %i\n", ssb_index);
+
+  printf("mac->dl_config_request.sfn = %i\n", mac->dl_config_request.sfn);
+  printf("mac->dl_config_request.slot = %i\n", mac->dl_config_request.slot);
+
+  printf("\n\n\n");
+
+  /*//if(mac->mib != NULL){
   uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused);
   uint16_t frame_number_4lsb = 0;
   for (int i=0; i<4; i++)
@@ -312,19 +355,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
     }
   }
 
-//#ifdef DEBUG_MIB
-  LOG_I(MAC,"system frame number(6 MSB bits): %d\n",  mac->mib->systemFrameNumber.buf[0]);
-  LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame);
-  LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
-  LOG_I(MAC,"ssb carrier offset(with MSB):  %d\n", (int)ssb_subcarrier_offset);
-  LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
-  LOG_I(MAC,"pdcch config sib1.controlResourceSetZero:             %d\n", (int)mac->mib->pdcch_ConfigSIB1.controlResourceSetZero);
-  LOG_I(MAC,"pdcch config sib1.searchSpaceZero:             %d\n", (int)mac->mib->pdcch_ConfigSIB1.searchSpaceZero);
-  LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
-  LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
-  //LOG_I(MAC,"half frame bit(extra bits):    %d\n", (int)half_frame_bit);
-  LOG_I(MAC,"ssb index(extra bits):         %d\n", (int)ssb_index);
-//#endif
+
 
   subcarrier_spacing_t scs_ssb = scs_30kHz;      //  default for 
   //const uint32_t scs_index = 0;
@@ -479,18 +510,18 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
     mask = mask | 0x100000000000;
   }
   //LOG_I(MAC,">>>>>>>>mask %x num_rbs %d rb_offset %d\n", mask, num_rbs, rb_offset);
-  /*
-    mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
-    mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset
-
-    //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
-    mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
-    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6;   //  L 38.211 7.3.2.2
-    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2;  //  R 38.211 7.3.2.2
-    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
-    mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
-    mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
-  */
+
+//    mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
+//    mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset
+//
+//    //mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6;   //  L 38.211 7.3.2.2
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2;  //  R 38.211 7.3.2.2
+//    mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
+//    mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
+//    mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
+
 
 
   // type0-pdcch search space
@@ -637,18 +668,18 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
   }
 
   AssertFatal(number_of_search_space_per_slot!=UINT_MAX,"");
-  /*
-  uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot;
-    mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
-    mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
-    mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2];   //  CCE aggregation level = 4
-    mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3];   //  CCE aggregation level = 8
-    mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4];   //  CCE aggregation level = 16
-    mac->type0_pdcch_dci_config.duration = search_space_duration;
-    mac->type0_pdcch_dci_config.coreset.duration = coreset_duration;   //  coreset
-    AssertFatal(first_symbol_index!=UINT_MAX,"");
-    mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
-  */
+
+//  uint32_t coreset_duration = num_symbols * number_of_search_space_per_slot;
+//    mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
+//    mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
+//    mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2];   //  CCE aggregation level = 4
+//    mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3];   //  CCE aggregation level = 8
+//    mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4];   //  CCE aggregation level = 16
+//    mac->type0_pdcch_dci_config.duration = search_space_duration;
+//    mac->type0_pdcch_dci_config.coreset.duration = coreset_duration;   //  coreset
+//    AssertFatal(first_symbol_index!=UINT_MAX,"");
+//    mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
+
   AssertFatal(sfn_c!=SFN_C_IMPOSSIBLE,"");
   AssertFatal(n_c!=UINT_MAX,"");
   mac->type0_pdcch_ss_sfn_c = sfn_c;
@@ -659,8 +690,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
   mac->phy_config.CC_id = cc_id;
 
   mac->dl_config_request.sfn = frame;
-  mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS 
-
+  mac->dl_config_request.slot = (ssb_index>>1) + ((ssb_index>>4)<<1); // not valid for 240kHz SCS
+*/
   //}
   return 0;
 

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -457,6 +457,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
     schedule_nr_mib(module_idP, frame, slot);
   }
 
+  // This schedules SIB1
+  if(slot  == 15){
+    schedule_nr_sib1(module_idP, frame, slot);
+  }
+
+
   // This schedule PRACH if we are not in phy_test mode
   if (get_softmodem_params()->phy_test == 0)
     schedule_nr_prach(module_idP, frame, slot);

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c

@@ -39,8 +39,8 @@
 #include "UTIL/OPT/opt.h"
 #include "OCG.h"
 #include "OCG_extern.h"
-
 #include "RRC/NR/nr_rrc_extern.h"
+#include "common/utils/nr/nr_common.h"
 
 
 //#include "LAYER2/MAC/pre_processor.c"
@@ -146,8 +146,199 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
   }
 }
 
-void schedule_nr_sib1(){
+void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) {
+
+  printf("\n\n--- Schedule_nr_sib1: Start\n");
+
+  // Get type0_PDCCH_CSS_config parameters
+  PHY_VARS_gNB *gNB = RC.gNB[module_idP];
+  gNB_MAC_INST *mac = RC.nrmac[module_idP];
+  NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
+  NR_MIB_t *mib = RC.nrrrc[module_idP]->carrier.mib.message.choice.mib;
+  uint8_t gNB_xtra_byte = 0;
+  for (int i = 0; i < 8; i++) {
+    gNB_xtra_byte |= ((gNB->pbch.pbch_a >> (31 - i)) & 1) << (7 - i);
+  }
+  get_type0_PDCCH_CSS_config_parameters(&mac->type0_PDCCH_CSS_config, mib, gNB_xtra_byte, frame_parms->Lmax,
+                                        frame_parms->ssb_index);
+
+
+  // Get SIB1
+  int CC_id = 0;
+  uint8_t sib1_payload[100];
+  uint8_t sib1_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, BCCH, 1, sib1_payload);
+  printf("sib1_sdu_length = %i\n", sib1_sdu_length);
+  for(int i = 0; i<sib1_sdu_length; i++) {
+    printf("%i ", sib1_payload[i]);
+
+  }
+  printf("\n");
+
+
+
+  // Schedule SIB1
+
+  int UE_id = 0;
+  int mcsIndex = 0;
+  int startSymbolAndLength = 0;
+  int NrOfSymbols = 14;
+  int StartSymbolIndex_tmp;
+  int NrOfSymbols_tmp;
+  int StartSymbolIndex = -1;
+  int time_domain_assignment = 0;
+  int dci10_bw;
+  long locationAndBandwidth;
+  int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
+
+  NR_COMMON_channels_t *cc          = &mac->common_channels[CC_id];
+  NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
+
+  NR_UE_info_t *UE_info                     = &RC.nrmac[module_idP]->UE_info;
+  NR_CellGroupConfig_t *secondaryCellGroup  = UE_info->secondaryCellGroup[UE_id];
+  NR_UE_sched_ctrl_t   *sched_ctrl          = &UE_info->UE_sched_ctrl[UE_id];
+  long bwp_Id                               = sched_ctrl->active_bwp->bwp_Id;
+
+  nfapi_nr_dl_tti_request_body_t  *dl_req   = &mac->DL_req[CC_id].dl_tti_request_body;
+  nfapi_nr_pdu_t                  *tx_req   = &mac->TX_req[CC_id].pdu_list[mac->TX_req[CC_id].Number_of_PDUs];
+
+  NR_SearchSpace_t *ss;
+
+  nfapi_nr_dl_tti_request_pdu_t   *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
+  memset((void*)dl_tti_pdcch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+  dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
+  dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
+
+  nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs+1];
+  memset((void *)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
+  dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
+  dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
+
+  nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
+  nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
+
+  NR_BWP_Downlink_t *bwp    = secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_Id - 1];
+  NR_BWP_Uplink_t   *ubwp   = secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_Id-1];
+
+  pdsch_pdu_rel15->pduBitmap = 0;
+  pdsch_pdu_rel15->rnti = 0; //UE_info->rnti[UE_id];
+  pdsch_pdu_rel15->pduIndex = 0; //mac->pdu_index[0]++;
+
+  pdsch_pdu_rel15->BWPSize  = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+  pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
+  pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
+  pdsch_pdu_rel15->CyclicPrefix = 0;
+  pdsch_pdu_rel15->NrOfCodewords = 1;
+  pdsch_pdu_rel15->targetCodeRate[0] = nr_get_code_rate_dl(mcsIndex,0);
+  pdsch_pdu_rel15->qamModOrder[0] = 2;
+  pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
+  if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table == NULL)
+    pdsch_pdu_rel15->mcsTable[0] = 0;
+  else{
+    if (*bwp->bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table == 0)
+      pdsch_pdu_rel15->mcsTable[0] = 1;
+    else
+      pdsch_pdu_rel15->mcsTable[0] = 2;
+  }
+  pdsch_pdu_rel15->rvIndex[0] = 0;
+  pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
+  pdsch_pdu_rel15->nrOfLayers = 1;
+  pdsch_pdu_rel15->transmissionScheme = 0;
+  pdsch_pdu_rel15->refPoint = 0;
+  pdsch_pdu_rel15->dmrsConfigType = 0;
+  pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
+  pdsch_pdu_rel15->SCID = 0;
+  pdsch_pdu_rel15->numDmrsCdmGrpsNoData = 2;
+  pdsch_pdu_rel15->dmrsPorts = 1;
+  pdsch_pdu_rel15->resourceAlloc = 1;
+  pdsch_pdu_rel15->rbStart = 0;
+  pdsch_pdu_rel15->rbSize = 6;
+  pdsch_pdu_rel15->VRBtoPRBMapping = 0; // non interleaved
+
+
+  for (int i=0; i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count; i++) {
+    startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
+    SLIV2SL(startSymbolAndLength, &StartSymbolIndex_tmp, &NrOfSymbols_tmp);
+    if (NrOfSymbols_tmp < NrOfSymbols) {
+      NrOfSymbols = NrOfSymbols_tmp;
+      StartSymbolIndex = StartSymbolIndex_tmp;
+      time_domain_assignment = i; // this is short PDSCH added to the config to fit mixed slot
+    }
+  }
+
+  pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
+  pdsch_pdu_rel15->NrOfSymbols      = NrOfSymbols;
+  pdsch_pdu_rel15->dlDmrsSymbPos    = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, NrOfSymbols);
+
+  locationAndBandwidth = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth;
+  dci10_bw = NRRIV2BW(locationAndBandwidth,275);
+
+  dci_pdu_rel15_t dci_pdu_rel15[MAX_DCI_CORESET];
+  dci_pdu_rel15[0].frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
+                                                                                       pdsch_pdu_rel15->rbStart,dci10_bw);
+  dci_pdu_rel15[0].time_domain_assignment.val = time_domain_assignment;
+  dci_pdu_rel15[0].vrb_to_prb_mapping.val = 0;
+  dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
+  dci_pdu_rel15[0].tb_scaling = 0;
+
+  int found = 0;
+  for ( int i=0; i<bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.count; i++) {
+    ss=bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list.array[i];
+    if (ss->searchSpaceType->present == target_ss) {
+      found=1;
+      break;
+    }
+  }
+
+  uint8_t nr_of_candidates, aggregation_level;
+  find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
+  NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 0);
+  int CCEIndex = allocate_nr_CCEs(mac,bwp,coreset,aggregation_level,0,0);
+
+  if (CCEIndex < 0) {
+    LOG_E(MAC, "%s(): cannot find free CCE for RNTI %04x!\n", __func__, pdsch_pdu_rel15->rnti);
+    return;
+  }
+
+  nr_configure_pdcch(mac,
+                     pdcch_pdu_rel15,
+                     pdsch_pdu_rel15->rnti,
+                     ss,
+                     coreset,
+                     scc,
+                     bwp,
+                     aggregation_level,
+                     CCEIndex);
+
+  LOG_I(MAC, "Frame %d: Subframe %d : Adding common DL DCI for RNTI %x\n", frameP, slotP, pdsch_pdu_rel15->rnti);
+
+  int dci_formats[2], rnti_types[2];
+  dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
+  rnti_types[0] = NR_RNTI_SI;
+  fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw,bwp_Id);
+
+  dl_req->nPDUs+=2;
+
+  int x_Overhead = 0;
+  nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, dci_pdu_rel15[0].tb_scaling);
+
+  // DL TX request
+  tx_req->PDU_length = pdsch_pdu_rel15->TBSize[0];
+  tx_req->PDU_index = mac->pdu_index[CC_id]++;
+  tx_req->num_TLV = 1;
+  tx_req->TLVs[0].length = sib1_sdu_length;
+  mac->TX_req[CC_id].SFN = frameP;
+  mac->TX_req[CC_id].Number_of_PDUs++;
+  mac->TX_req[CC_id].Slot = slotP;
+  memcpy((void*)&tx_req->TLVs[0].value.direct[0], (void*)sib1_payload, sib1_sdu_length);
+
+  // Mark the corresponding RBs as used
+  uint8_t *vrb_map = cc[CC_id].vrb_map;
+  for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) {
+    vrb_map[rb + pdsch_pdu_rel15->rbStart] = 1;
+  }
+
 
+  printf("--- Schedule_nr_sib1: End\n\n\n");
 }
 
 

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -83,6 +83,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
                          int num_slots_per_tdd);
 
 void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
+void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
 
 /////// Random Access MAC-PHY interface functions and primitives ///////
 

openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h

@@ -442,6 +442,9 @@ typedef struct gNB_MAC_INST_s {
   time_stats_t schedule_pch;
   /// CCE lists
   int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE];
+
+  NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config;
+
 } gNB_MAC_INST;
 
 #endif /*__LAYER2_NR_MAC_GNB_H__ */

openair2/RRC/NR/L2_nr_interface.c

@@ -158,14 +158,12 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
     LOG_D(RRC, "[eNB %d] mac_rrc_data_req to SRB ID=%ld\n", Mod_idP, Srb_id);
 #endif
 
-    gNB_RRC_INST *rrc;
     rrc_gNB_carrier_data_t *carrier;
     NR_BCCH_BCH_Message_t *mib;
     NR_SRB_INFO *srb_info;
     char payload_size, *payload_pP;
 
-    rrc = RC.nrrrc[Mod_idP];
-    carrier = &rrc->carrier;
+    carrier = &RC.nrrrc[Mod_idP]->carrier;
     mib = &carrier->mib;
     srb_info = &carrier->Srb0;
 
@@ -178,11 +176,14 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
         // Uncomment this function for a dynamic pdcch_ConfigSIB1.
         // TODO: Update this static value
         //channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1
-        //generate_pdcch_ConfigSIB1( &mib->message.choice.mib->pdcch_ConfigSIB1,
+        //generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1,
         //                          *carrier->servingcellconfigcommon->ssbSubcarrierSpacing,
-        //                          mib->message.choice.mib->subCarrierSpacingCommon,
+        //                          carrier->mib.message.choice.mib->subCarrierSpacingCommon,
         //                          min_channel_bw);
 
+        mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero;
+        mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero;
+
         mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
         enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
                                          NULL,
@@ -202,6 +203,19 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
     }
 
   /* TODO BCCH SIB1 SIBs */
+  if ((Srb_id & RAB_OFFSET ) == BCCH) {
+//      memcpy(&buffer_pP[0],
+//             RC.rrc[Mod_idP]->carrier[CC_id].SIB1_MBMS,
+//             RC.rrc[Mod_idP]->carrier[CC_id].sizeof_SIB1_MBMS);
+//
+//    return RC.rrc[Mod_idP]->carrier[CC_id].sizeof_SIB1_MBMS;
+
+    memcpy(&buffer_pP[0],
+           RC.nrrrc[Mod_idP]->carrier.SIB1,
+           RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
+
+    return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1;
+  }
 
   /* CCCH */
   if( (Srb_id & RAB_OFFSET ) == CCCH) {

openair2/RRC/NR/MESSAGES/asn1_msg.c

@@ -341,6 +341,9 @@ uint8_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier,
   nr_uac_BarringInfoSet.uac_BarringForAccessIdentity.bits_unused = 1;
   ASN_SEQUENCE_ADD(&sib1->uac_BarringInfo->uac_BarringInfoSetList, &nr_uac_BarringInfoSet);
 #endif
+
+  xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1_message->message.choice.c1->choice.systemInformationBlockType1);
+
   //encode SIB1 to data
   enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_DL_SCH_Message,
                                    NULL,

openair2/RRC/NR/rrc_gNB.c

@@ -179,9 +179,47 @@ void rrc_gNB_generate_SgNBAdditionRequestAcknowledge(
 ///---------------------------------------------------------------------------------------------------------------///
 
 static void init_NR_SI(gNB_RRC_INST *rrc) {
+
   LOG_D(RRC,"%s()\n\n\n\n",__FUNCTION__);
+
   rrc->carrier.MIB             = (uint8_t *) malloc16(4);
   rrc->carrier.sizeof_MIB      = do_MIB_NR(rrc,0);
+  printf("rrc->carrier.sizeof_MIB = %i\n", rrc->carrier.sizeof_MIB);
+
+
+
+
+
+  gNB_RrcConfigurationReq  *configuration;
+  configuration = CALLOC(1,sizeof(gNB_RrcConfigurationReq));
+
+  configuration->cell_identity = 3;
+
+  configuration->ssb_SubcarrierOffset = rrc->carrier.ssb_SubcarrierOffset;
+  configuration->pdsch_AntennaPorts = rrc->carrier.pdsch_AntennaPorts;
+  configuration->pusch_TargetSNRx10 = rrc->carrier.pusch_TargetSNRx10;
+  configuration->pucch_TargetSNRx10 = rrc->carrier.pucch_TargetSNRx10;
+  configuration->scc = rrc->carrier.servingcellconfigcommon;
+
+  rrc->carrier.SIB1             = (uint8_t *) malloc16(100);
+  rrc->carrier.sizeof_SIB1      = do_SIB1_NR(&rrc->carrier, configuration);
+
+
+  printf("\n");
+  printf("rrc->carrier.sizeof_SIB1 = %i\n", rrc->carrier.sizeof_SIB1);
+  for(int i = 0; i<20; i++) {
+    printf("%i ", rrc->carrier.SIB1[i]);
+  }
+  printf("\n\n");
+
+
+
+
+
+
+
+
+
   LOG_I(NR_RRC,"Done init_NR_SI\n");
   rrc_mac_config_req_gNB(rrc->module_id,
                          rrc->carrier.ssb_SubcarrierOffset,