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OpenXG-RAN
Commit 173e57d6 authored by Sofia Pison's avatar Sofia Pison Committed by rajeshwari.p
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Modiefied CMakeLists, Compilation Warning solved, No more modification of... 

Modiefied CMakeLists, Compilation Warning solved, No more modification of CMakeCache required. New Instructions to build
parent 870dbe29
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Showing with 193 additions and 139 deletions
CMakeLists.txt
View file @ 173e57d6
......@@ -159,9 +159,11 @@ set (OPENAIR_TARGETS ${OPENAIR_DIR}/targets)
set (OPENAIR3_DIR ${OPENAIR_DIR}/openair3)
set (OPENAIR_CMAKE ${OPENAIR_DIR}/cmake_targets)
set (OPENAIR_BIN_DIR ${CMAKE_CURRENT_BINARY_DIR}${CMAKE_FILES_DIRECTORY})
set (XRAN_DIR ${OPENAIR_DIR}/targets/ARCH/ORAN_FHI/lib)
set (XRAN_LIB /usr/local/xran)
set (ICC_LIB /usr/local/intel64)
set (XRAN_DIR ${OPENAIR_DIR}/targets/ARCH/ORAN_FHI/lib)
set (XRAN_LIB_DIR /usr/local/xran)
set (INTEL_LIB_DIR /usr/local/intel64)
set (INTEL_LIB /usr/local/intel64)
set (DPDK_DIR /usr/local/dpdk_19_11/include/dpdk)
project (OpenAirInterface)
......@@ -629,8 +631,8 @@ target_link_libraries(benetel_4g PRIVATE asn1_nr_rrc asn1_lte_rrc)
######################################################################
include_directories("${XRAN_DIR}")
include_directories ("/usr/local/dpdk_19_11")
include_directories("${ICC_LIB}")
include_directories("${DPDK_DIR}")
include_directories("${INTEL_LIB}")
set(ORAN_FHLIB_4G_SOURCE
${OPENAIR_TARGETS}/ARCH/ETHERNET/oran/4g/oran.cpp
......@@ -645,8 +647,8 @@ set_target_properties(oran_fhlib_4g PROPERTIES COMPILE_FLAGS "-fvisibility=hidde
SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive")
TARGET_LINK_LIBRARIES(oran_fhlib_4g ${DPDK_LIBS})
TARGET_LINK_LIBRARIES(oran_fhlib_4g -L${XRAN_LIB} -lxran)
TARGET_LINK_LIBRARIES(oran_fhlib_4g -L${ICC_LIB} -lirc)
TARGET_LINK_LIBRARIES(oran_fhlib_4g -L${XRAN_LIB_DIR} -lxran)
TARGET_LINK_LIBRARIES(oran_fhlib_4g -L${INTEL_LIB} -lirc)
TARGET_LINK_LIBRARIES(oran_fhlib_4g pthread dl rt m numa)
# Benetel 5G library
......@@ -672,8 +674,9 @@ target_link_libraries(benetel_5g PRIVATE asn1_nr_rrc asn1_lte_rrc)
######################################################################
include_directories("${XRAN_DIR}")
include_directories ("/usr/local/dpdk_19_11/include/dpdk")
include_directories("${ICC_LIB}")
include_directories("${DPDK_DIR}")
include_directories("${INTEL_LIB_DIR}")
include_directories("${XRAN_LIB_DIR}")
set(ORAN_FHLIB_5G_SOURCE
${OPENAIR_TARGETS}/ARCH/ETHERNET/oran/5g/oran.cpp
......@@ -682,12 +685,17 @@ set(ORAN_FHLIB_5G_SOURCE
)
add_library(oran_fhlib_5g MODULE ${ORAN_FHLIB_5G_SOURCE})
find_library(XRANFHI xran HINTS ${XRAN_LIB_DIR})
find_library(INTELIRC irc HINTS ${INTEL_LIB_DIR})
set_target_properties(oran_fhlib_5g PROPERTIES COMPILE_FLAGS "-fvisibility=hidden -march=native -I$ENV{RTE_SDK}/$ENV{RTE_TARGET}/include")
SET(DPDK_LIBS "-Wl,-rpath,$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -Wl,--whole-archive -L$ENV{RTE_SDK}/$ENV{RTE_TARGET}/lib -ldpdk -Wl,--no-whole-archive")
TARGET_LINK_LIBRARIES(oran_fhlib_5g ${DPDK_LIBS})
TARGET_LINK_LIBRARIES(oran_fhlib_5g -L${XRAN_LIB} -lxran)
TARGET_LINK_LIBRARIES(oran_fhlib_5g -L${ICC_LIB} -lirc)
#TARGET_LINK_LIBRARIES(oran_fhlib_5g -L${XRAN_LIB_DIR} -lxran)
TARGET_LINK_LIBRARIES(oran_fhlib_5g ${XRANFHI})
#TARGET_LINK_LIBRARIES(oran_fhlib_5g -L${INTEL_LIB} -lirc)
TARGET_LINK_LIBRARIES(oran_fhlib_5g ${INTELIRC})
TARGET_LINK_LIBRARIES(oran_fhlib_5g pthread dl rt m numa)
##########################################################
......
targets/ARCH/ETHERNET/oran/5g/oran.cpp
View file @ 173e57d6
......@@ -353,7 +353,7 @@ int load_iq_from_file(void *xranlib_){
printf("numCCPorts_ =%d, num_eAxc_=%d, MAX_ANT_CARRIER_SUPPORTED =%d\n",numCCPorts_,num_eAxc_,MAX_ANT_CARRIER_SUPPORTED);
int i;
char *IQ_filename[MAX_ANT_CARRIER_SUPPORTED];
const char *IQ_filename[MAX_ANT_CARRIER_SUPPORTED];
for(i=0; i<MAX_ANT_CARRIER_SUPPORTED; i++){
if( (i==0) || (i==1) || (i==2) || (i==3) ){
IQ_filename[0] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_0.bin";
......@@ -361,7 +361,7 @@ int load_iq_from_file(void *xranlib_){
IQ_filename[2] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_2.bin";
IQ_filename[3] = "/home/oba/PISONS/phy/fhi_lib/app/usecase/mu0_5mhz/ant_3.bin";
}else{
IQ_filename[i] = "";
IQ_filename[i] = "/0";
}
}
......@@ -370,8 +370,11 @@ int load_iq_from_file(void *xranlib_){
uint32_t bandwidth = 5; // According to the wrapper.hpp since we are reading the 5MHz files
uint32_t sub6 = xranlib->get_sub6();
iq_playback_buffer_size_dl = (number_slots * N_SYM_PER_SLOT * N_SC_PER_PRB * xranlib->get_num_rbs(numerology,bandwidth,sub6)*4L);
const char *string_msg = "DL IFFT IN IQ Samples in binary format";
for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(numCCPorts_ * num_eAxc_); i++) {
for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (int32_t)(numCCPorts_ * num_eAxc_); i++) {
char *name = const_cast<char*>(IQ_filename[i]);
char *string = const_cast<char*>(string_msg);
if(((uint8_t *)IQ_filename[i])[0]!=0){
p_tx_play_buffer[i] = (int16_t*)malloc(iq_playback_buffer_size_dl);
......@@ -379,11 +382,11 @@ int load_iq_from_file(void *xranlib_){
tx_play_buffer_size[i] = (int32_t)iq_playback_buffer_size_dl;
printf("Loading file [%d] %s \n",i,IQ_filename[i]);
tx_play_buffer_size[i] = sys_load_file_to_buff( IQ_filename[i],
"DL IFFT IN IQ Samples in binary format",
(uint8_t*) p_tx_play_buffer[i],
tx_play_buffer_size[i],
1);
tx_play_buffer_size[i] = sys_load_file_to_buff( name,
string,
(uint8_t*) p_tx_play_buffer[i],
tx_play_buffer_size[i],
1);
tx_play_buffer_position[i] = 0;
} else {
......@@ -415,22 +418,24 @@ int xran_fh_tx_send_buffer(void *xranlib_){
p_xran_dev_ctx_2 = xran_dev_get_ctx();
if (p_xran_dev_ctx_2 != NULL){
printf("p_xran_dev_ctx_2=%d\n",p_xran_dev_ctx_2);
printf("p_xran_dev_ctx_2=%p\n",p_xran_dev_ctx_2);
}
int num_eaxc = xranlib->get_num_eaxc();
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
uint32_t xran_max_antenna_nr = RTE_MAX(num_eaxc, num_eaxc_ul);
int ant_el_trx = xranlib->get_num_antelmtrx();
uint32_t xran_max_ant_array_elm_nr = RTE_MAX(ant_el_trx, xran_max_antenna_nr);
//uint32_t ant_el_trx = xranlib->get_num_antelmtrx();
//uint32_t xran_max_ant_array_elm_nr = RTE_MAX(ant_el_trx, xran_max_antenna_nr);
int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
//int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
int32_t nSectorNum;
/*
for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
{
nSectorIndex[nSectorNum] = nSectorNum;
}
*/
nSectorNum = xranlib->get_num_cc();
int maxflowid = num_eaxc * (nSectorNum-1) + (xran_max_antenna_nr-1);
......@@ -452,7 +457,7 @@ int xran_fh_tx_send_buffer(void *xranlib_){
struct xran_prb_map *pRbMap = pPrbMap;
int32_t sym_id = sym_idx%XRAN_NUM_OF_SYMBOL_PER_SLOT;
if(ptr && pos){
int idxElm = 0;
uint32_t idxElm = 0;
u8dptr = (uint8_t*)ptr;
int16_t payload_len = 0;
......@@ -530,7 +535,7 @@ int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int frame, int slot){
int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/10*frame+slot; //commented out temporarily to check that compilation of oran 5g is working.
int32_t flowId;
//int32_t flowId;
void *ptr = NULL;
int32_t *pos = NULL;
......@@ -544,19 +549,21 @@ int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int frame, int slot){
int num_eaxc = xranlib->get_num_eaxc();
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
uint32_t xran_max_antenna_nr = RTE_MAX(num_eaxc, num_eaxc_ul);
int ant_el_trx = xranlib->get_num_antelmtrx();
uint32_t xran_max_ant_array_elm_nr = RTE_MAX(ant_el_trx, xran_max_antenna_nr);
//uint32_t ant_el_trx = xranlib->get_num_antelmtrx();
//uint32_t xran_max_ant_array_elm_nr = RTE_MAX(ant_el_trx, xran_max_antenna_nr);
int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
int32_t nSectorNum;
//int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
//int32_t nSectorNum;
/*
for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
{
nSectorIndex[nSectorNum] = nSectorNum;
}
nSectorNum = xranlib->get_num_cc();
*/
//nSectorNum = xranlib->get_num_cc();
int maxflowid = num_eaxc * (nSectorNum-1) + (xran_max_antenna_nr-1);
//int maxflowid = num_eaxc * (nSectorNum-1) + (xran_max_antenna_nr-1);
for(uint16_t cc_id=0; cc_id<1/*nSectorNum*/; cc_id++){ // OAI does not support multiple CC yet.
......@@ -564,7 +571,7 @@ int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int frame, int slot){
// This loop would better be more inner to avoid confusion and maybe also errors.
for(int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
flowId = num_eaxc * cc_id + ant_id;
//flowId = num_eaxc * cc_id + ant_id;
uint8_t *pData = p_xran_dev_ctx_2->sFrontHaulRxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_idx%XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
uint8_t *pPrbMapData = p_xran_dev_ctx_2->sFrontHaulRxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
......@@ -575,12 +582,12 @@ int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int frame, int slot){
struct xran_prb_map *pRbMap = pPrbMap;
int32_t sym_id = sym_idx%XRAN_NUM_OF_SYMBOL_PER_SLOT;
if(ptr && pos){
int idxElm = 0;
uint32_t idxElm = 0;
u8dptr = (uint8_t*)ptr;
int16_t payload_len = 0;
uint8_t *src = (uint8_t *)u8dptr;
uint8_t *dst = (uint8_t *)pos;
//uint8_t *dst = (uint8_t *)pos;
// first half
uint8_t *src1 = (uint8_t *)u8dptr;
uint8_t *dst1 = (uint8_t *)pos;
......@@ -615,7 +622,7 @@ int xran_fh_rx_read_slot(void *xranlib_, ru_info_t *ru, int frame, int slot){
dst1 = (uint8_t *)(pos + p_prbMapElm->nRBStart*N_SC_PER_PRB);
// second half
dst2 = (uint8_t *)(pos + (p_prbMapElm->nRBStart*N_SC_PER_PRB + 1272/2) + 2048 - 1272);
printf("RRR: idxElm=%d\tcompMethod=%d\tiqWidth=%d\n",idxElm,p_prbMapElm->compMethod,p_prbMapElm->iqWidth);
//printf("RRR: idxElm=%d\tcompMethod=%d\tiqWidth=%d\n",idxElm,p_prbMapElm->compMethod,p_prbMapElm->iqWidth);
if(p_prbMapElm->compMethod == XRAN_COMPMETHOD_NONE) {
payload_len = p_prbMapElm->nRBSize*N_SC_PER_PRB*4L;
src1 = src2 + payload_len/2;
......@@ -691,7 +698,7 @@ int xran_fh_tx_send_slot(void *xranlib_, ru_info_t *ru, int frame, int slot, uin
int tti = /*frame*SUBFRAMES_PER_SYSTEMFRAME*SLOTNUM_PER_SUBFRAME+*/10*frame+slot; //commented out temporarily to check that compilation of oran 5g is working.
int32_t flowId;
//int32_t flowId;
void *ptr = NULL;
int32_t *pos = NULL;
......@@ -705,26 +712,28 @@ int xran_fh_tx_send_slot(void *xranlib_, ru_info_t *ru, int frame, int slot, uin
int num_eaxc = xranlib->get_num_eaxc();
int num_eaxc_ul = xranlib->get_num_eaxc_ul();
uint32_t xran_max_antenna_nr = RTE_MAX(num_eaxc, num_eaxc_ul);
int ant_el_trx = xranlib->get_num_antelmtrx();
uint32_t xran_max_ant_array_elm_nr = RTE_MAX(ant_el_trx, xran_max_antenna_nr);
//uint32_t ant_el_trx = xranlib->get_num_antelmtrx();
//uint32_t xran_max_ant_array_elm_nr = RTE_MAX(ant_el_trx, xran_max_antenna_nr);
int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
int32_t nSectorNum;
//int32_t nSectorIndex[XRAN_MAX_SECTOR_NR];
//int32_t nSectorNum;
/*
for (nSectorNum = 0; nSectorNum < XRAN_MAX_SECTOR_NR; nSectorNum++)
{
nSectorIndex[nSectorNum] = nSectorNum;
}
nSectorNum = xranlib->get_num_cc();
*/
//nSectorNum = xranlib->get_num_cc();
int maxflowid = num_eaxc * (nSectorNum-1) + (xran_max_antenna_nr-1);
//int maxflowid = num_eaxc * (nSectorNum-1) + (xran_max_antenna_nr-1);
for(uint16_t cc_id=0; cc_id<1/*nSectorNum*/; cc_id++){ // OAI does not support multiple CC yet.
for(uint8_t ant_id = 0; ant_id < xran_max_antenna_nr && ant_id<ru->nb_tx; ant_id++){
// This loop would better be more inner to avoid confusion and maybe also errors.
for(int32_t sym_idx = 0; sym_idx < XRAN_NUM_OF_SYMBOL_PER_SLOT; sym_idx++) {
flowId = num_eaxc * cc_id + ant_id;
//flowId = num_eaxc * cc_id + ant_id;
uint8_t *pData = p_xran_dev_ctx_2->sFrontHaulTxBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers[sym_idx%XRAN_NUM_OF_SYMBOL_PER_SLOT].pData;
uint8_t *pPrbMapData = p_xran_dev_ctx_2->sFrontHaulTxPrbMapBbuIoBufCtrl[tti % XRAN_N_FE_BUF_LEN][cc_id][ant_id].sBufferList.pBuffers->pData;
struct xran_prb_map *pPrbMap = (struct xran_prb_map *)pPrbMapData;
......@@ -735,12 +744,12 @@ int xran_fh_tx_send_slot(void *xranlib_, ru_info_t *ru, int frame, int slot, uin
struct xran_prb_map *pRbMap = pPrbMap;
int32_t sym_id = sym_idx%XRAN_NUM_OF_SYMBOL_PER_SLOT;
if(ptr && pos){
int idxElm = 0;
uint32_t idxElm = 0;
u8dptr = (uint8_t*)ptr;
int16_t payload_len = 0;
uint8_t *dst = (uint8_t *)u8dptr;
uint8_t *src = (uint8_t *)pos;
//uint8_t *src = (uint8_t *)pos;
// first half
uint8_t *dst1 = (uint8_t *)u8dptr;
uint8_t *src1 = (uint8_t *)pos;
......@@ -846,8 +855,8 @@ uint64_t nTotalTime;
uint64_t nUsedTime;
uint32_t nCoreUsed;
float nUsedPercent;
long old_rx_counter = 0;
long old_tx_counter = 0;
uint64_t old_rx_counter = 0;
uint64_t old_tx_counter = 0;
#ifdef __cplusplus
extern "C"
......
targets/ARCH/ETHERNET/oran/5g/oran_isolate.c
View file @ 173e57d6
......@@ -291,6 +291,9 @@ void oran_fh_if4p5_south_in(RU_t *ru,
int ret = xran_fh_rx_read_slot(s->oran_priv, &ru_info, *frame, *slot);
if (ret != 0){
printf("ORAN: ORAN_fh_if4p5_south_in ERROR in RX function \n");
}
#if 0
for (antenna = 0; antenna < ru->nb_rx; antenna++) {
for (symbol = 0; symbol < 14; symbol++) {
......@@ -394,6 +397,9 @@ for(int hhh=0; hhh<(14); hhh++ ){
#endif
int ret = xran_fh_tx_send_slot(s->oran_priv, &ru_info, frame, slot, timestamp);
if (ret != 0){
printf("ORAN: ORAN_fh_if4p5_south_out ERROR in TX function \n");
}
#if 0
if(frame==0 && slot<100){
......
targets/ARCH/ETHERNET/oran/5g/oran_isolate.h
View file @ 173e57d6
......@@ -57,6 +57,16 @@ void* define_oran_pointer();
#endif
#ifdef __cplusplus
extern "C"
{
#endif
void dump_oran_config( void *xranlib_ );
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
extern "C"
{
......
targets/ARCH/ETHERNET/oran/5g/xran_lib_wrap.cpp
View file @ 173e57d6
......@@ -40,13 +40,13 @@ uint16_t xranLibWraper::get_eaxcid_mask(int numbit, int shift)
int xranLibWraper::init_memory()
{
xran_status_t status;
int32_t i, j, k, z;
int32_t i, j, k;
uint32_t z;
SWXRANInterfaceTypeEnum eInterfaceType;
void *ptr;
void *mb;
uint32_t *u32dptr;
uint16_t *u16dptr;
uint8_t *u8dptr;
uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul());
uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
......@@ -115,7 +115,6 @@ int xranLibWraper::init_memory()
if(ptr) {
u32dptr = (uint32_t*)(ptr);
uint8_t *ptr_temp = (uint8_t *)ptr;
memset(u32dptr, 0x0, m_nSW_ToFpga_FTH_TxBufferLen);
}
}
......@@ -214,7 +213,6 @@ int xranLibWraper::init_memory()
m_sFrontHaulRxBbuIoBufCtrl[j][i][z].sBufferList.pBuffers[k].pCtrl = (void *) mb;
if(ptr) {
u32dptr = (uint32_t*)(ptr);
uint8_t *ptr_temp = (uint8_t *)ptr;
memset(u32dptr, 0x0, m_nFpgaToSW_FTH_RxBufferLen);
}
}
......@@ -376,6 +374,43 @@ int xranLibWraper::init_memory()
// Class Constructor
xranLibWraper::xranLibWraper()
{
//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
// Sofia: put here all the variables that are hard coded and assign them to a variable.
// This should then be changed to a dynamic config
// At least for now we group all the hard coded value we want to get rid of them
//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
// From xran_io_cfg of xran_fh_o_du.h
uint8_t id_ = 0;
uint8_t num_vfs_ = 2;
const char* VF_UPlane = "0000:b3:02.0"; // why not m_dpdk_dev_up ?
const char* VF_CPlane = "0000:b3:02.1"; // why not m_dpdk_dev_cp ?
// From xran_eaxcid_config of xran_fh_o_du.h
uint8_t bit_cuPortId_ = 12; //(??) bitnum_bandsec + bitnum_ccid + bitnum_ruport;
uint8_t bit_bandSectorId_ = 8; //(??) bitnum_ccid + bitnum_ruport;
uint8_t bit_ccId_ = 4; //(??) bitnum_ruport;
uint8_t bit_ruPortId_ = 0;
uint16_t mask_cuPortId_ = 0xf000; //get_eaxcid_mask(bitnum_cuport, m_xranInit.eAxCId_conf.bit_cuPortId);
uint16_t mask_bandSectorId_ = 0x0f00; //get_eaxcid_mask(bitnum_bandsec, m_xranInit.eAxCId_conf.bit_bandSectorId);
uint16_t mask_ccId_ = 0x00f0; //get_eaxcid_mask(bitnum_ccid, m_xranInit.eAxCId_conf.bit_ccId);
uint16_t mask_ruPortId_ = 0x000f; //get_eaxcid_mask(bitnum_ruport, m_xranInit.eAxCId_conf.bit_ruPortId);
// From xran_fh_init of xran_fh_o_du.h
uint8_t enableCP_ = 1;
uint8_t prachEnable_ = 1;
int32_t debugStop_ = 0;
int32_t debugStopCount_ = 0;
int32_t DynamicSectionEna_ = 0;
const char* filePrefix_ = "wls";
// Independent
m_nSlots = 20; // If mu=0 is 10, if mu=1 is 20
m_du_mac[0]=0x00; m_du_mac[1]=0x11; m_du_mac[2]=0x22; m_du_mac[3]=0x33; m_du_mac[4]=0x44; m_du_mac[5]=0x55;
m_ru_mac[0]=0x00; m_ru_mac[1]=0x11; m_ru_mac[2]=0x22; m_ru_mac[3]=0x33; m_ru_mac[4]=0x44; m_ru_mac[5]=0x66;
//-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
int i, temp;
std::string tmpstr;
unsigned int tmp_mac[6];
......@@ -384,14 +419,14 @@ xranLibWraper::xranLibWraper()
memset(&m_xranInit, 0, sizeof(xran_fh_init));
m_xranInit.io_cfg.id = 0;
m_xranInit.io_cfg.id = id_;
/* DPDK configuration */
m_dpdk_dev_up = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_up");
m_dpdk_dev_cp = get_globalcfg<std::string>(XRAN_UT_KEY_GLOBALCFG_IO, "dpdk_dev_cp");
m_xranInit.io_cfg.num_vfs = 2;
m_xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = "0000:b3:02.0";
m_xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = "0000:b3:02.1";
m_xranInit.io_cfg.num_vfs = num_vfs_;
m_xranInit.io_cfg.dpdk_dev[XRAN_UP_VF] = const_cast<char*>(VF_UPlane);
m_xranInit.io_cfg.dpdk_dev[XRAN_CP_VF] = const_cast<char*>(VF_CPlane);
printf("wrapper.hpp: m_xranInit.io_cfg.dpdk_dev[%d] =%s, m_xranInit.io_cfg.dpdk_dev[%d]=%s\n",XRAN_UP_VF,m_xranInit.io_cfg.dpdk_dev[XRAN_UP_VF],XRAN_CP_VF,m_xranInit.io_cfg.dpdk_dev[XRAN_CP_VF]);
......@@ -440,19 +475,19 @@ xranLibWraper::xranLibWraper()
m_xranInit.up_vlan_tag = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_IO, "up_vlan_tag");
/* eAxCID configurations */
int bitnum_cuport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_cuPortId");
int bitnum_bandsec = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_bandSectorId");
int bitnum_ccid = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ccId");
int bitnum_ruport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ruPortId");
m_xranInit.eAxCId_conf.bit_cuPortId = 12;//bitnum_bandsec + bitnum_ccid + bitnum_ruport;
m_xranInit.eAxCId_conf.bit_bandSectorId = 8; //bitnum_ccid + bitnum_ruport;
m_xranInit.eAxCId_conf.bit_ccId = 4; //bitnum_ruport;
m_xranInit.eAxCId_conf.bit_ruPortId = 0;
m_xranInit.eAxCId_conf.mask_cuPortId = 0xf000; //get_eaxcid_mask(bitnum_cuport, m_xranInit.eAxCId_conf.bit_cuPortId);
m_xranInit.eAxCId_conf.mask_bandSectorId = 0x0f00; //get_eaxcid_mask(bitnum_bandsec, m_xranInit.eAxCId_conf.bit_bandSectorId);
m_xranInit.eAxCId_conf.mask_ccId = 0x00f0; //get_eaxcid_mask(bitnum_ccid, m_xranInit.eAxCId_conf.bit_ccId);
m_xranInit.eAxCId_conf.mask_ruPortId = 0x000f; //get_eaxcid_mask(bitnum_ruport, m_xranInit.eAxCId_conf.bit_ruPortId);
//int bitnum_cuport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_cuPortId"); // Hard C
//int bitnum_bandsec = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_bandSectorId"); //Hard C
//int bitnum_ccid = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ccId"); //Hard C
//int bitnum_ruport = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_EAXCID, "bit_ruPortId"); //Hard C
m_xranInit.eAxCId_conf.bit_cuPortId = bit_cuPortId_;
m_xranInit.eAxCId_conf.bit_bandSectorId = bit_bandSectorId_;
m_xranInit.eAxCId_conf.bit_ccId = bit_ccId_;
m_xranInit.eAxCId_conf.bit_ruPortId = bit_ruPortId_;
m_xranInit.eAxCId_conf.mask_cuPortId = mask_cuPortId_;
m_xranInit.eAxCId_conf.mask_bandSectorId = mask_bandSectorId_;
m_xranInit.eAxCId_conf.mask_ccId = mask_ccId_;
m_xranInit.eAxCId_conf.mask_ruPortId = mask_ruPortId_;
m_xranInit.totalBfWeights = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "totalBfWeights");
......@@ -474,17 +509,13 @@ xranLibWraper::xranLibWraper()
m_xranInit.Ta4_min = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_min");
m_xranInit.Ta4_max = get_globalcfg<int>(XRAN_UT_KEY_GLOBALCFG_RU, "Ta4_max");
m_xranInit.enableCP = 1;
//m_xranInit.enableCP = 0; // Sofia try to modify
//m_xranInit.prachEnable = 1;
m_xranInit.prachEnable = 1; // Sofia modify according to sample app log
m_xranInit.debugStop = 0; // Sofia Modify according to sample app log
//m_xranInit.debugStop = 1; // Sofia Modify according to sample app log
m_xranInit.debugStopCount = 0;
m_xranInit.DynamicSectionEna= 0;
m_xranInit.enableCP = enableCP_;
m_xranInit.prachEnable = prachEnable_;
m_xranInit.debugStop = debugStop_;
m_xranInit.debugStopCount = debugStopCount_;
m_xranInit.DynamicSectionEna = DynamicSectionEna_;
m_xranInit.filePrefix = "wls"; //Sofia modifies
// m_xranInit.filePrefix = "wls_0"; // Sofia Modifies
m_xranInit.filePrefix = const_cast<char*>(filePrefix_);
m_bSub6 = get_globalcfg<bool>(XRAN_UT_KEY_GLOBALCFG_RU, "sub6");
......@@ -505,7 +536,7 @@ xranLibWraper::xranLibWraper()
std::stringstream slotcfgname;
slotcfgname << "slot" << i;
std::vector<int> slotcfg = get_globalcfg_array<int>(slotcfg_key, slotcfgname.str());
for(int j=0; j < slotcfg.size(); j++) {
for(uint16_t j=0; j < slotcfg.size(); j++) {
m_xranConf.frame_conf.sSlotConfig[i].nSymbolType[j] = slotcfg[j];
}
m_xranConf.frame_conf.sSlotConfig[i].reserved[0] = 0;
......@@ -588,6 +619,7 @@ xranLibWraper::xranLibWraper()
m_xranConf.ttiCb = nullptr;
m_xranConf.ttiCbParam = nullptr;
*/
}
......@@ -677,23 +709,26 @@ void xranLibWraper::TearDown()
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::Init(struct xran_fh_config *pCfg)
{
xran_status_t status;
//xran_status_t status;
int32_t nSectorNum;
int32_t i, j, k, z;
void *ptr;
void *mb;
uint32_t *u32dptr;
uint16_t *u16dptr;
uint8_t *u8dptr;
SWXRANInterfaceTypeEnum eInterfaceType;
int32_t cc_id, ant_id, sym_id, tti;
int32_t flowId;
char *pos = NULL;
//int32_t j, k, z;
uint32_t i;
//void *ptr;
//void *mb;
//uint32_t *u32dptr;
//uint16_t *u16dptr;
//uint8_t *u8dptr;
//SWXRANInterfaceTypeEnum eInterfaceType;
int32_t cc_id, tti;
//int32_t sym_id;
uint32_t ant_id;
//int32_t flowId;
//char *pos = NULL;
struct xran_prb_map *pRbMap = NULL;
uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul());
uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
//uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
/* Update member variables */
......@@ -738,7 +773,7 @@ int xranLibWraper::Init(struct xran_fh_config *pCfg)
for(cc_id = 0; cc_id <nSectorNum; cc_id++) {
for(tti = 0; tti < XRAN_N_FE_BUF_LEN; tti ++) {
for(ant_id = 0; ant_id < xran_max_antenna_nr; ant_id++) {
flowId = xran_max_antenna_nr*cc_id + ant_id;
// flowId = xran_max_antenna_nr*cc_id + ant_id;
/* C-plane DL */
pRbMap = (struct xran_prb_map *)m_sFrontHaulTxPrbMapBbuIoBufCtrl[tti][cc_id][ant_id].sBufferList.pBuffers->pData;
......@@ -767,27 +802,10 @@ int xranLibWraper::Init(struct xran_fh_config *pCfg)
//pRbMap->prbMap[0].bf_precoding.weight[];
}
else if(get_rucategory() == XRAN_CATEGORY_B) {
int idxElm;
int iPrb;
char *dl_bfw_pos = ((char*)p_tx_dl_bfw_buffer[flowId]) + tx_dl_bfw_buffer_position[flowId];
struct xran_prb_elm* p_prbMap = NULL;
int num_antelm;
pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT;
pRbMap->prbMap[0].bf_weight_update = 1;
num_antelm = get_num_antelmtrx();
#if 0
/* populate beam weights to C-plane for each elm */
pRbMap->bf_weight.nAntElmTRx = num_antelm;
for(idxElm = 0; idxElm < pRbMap->nPrbElm; idxElm++){
p_prbMap = &pRbMap->prbMap[idxElm];
for (iPrb = p_prbMap->nRBStart; iPrb < (p_prbMap->nRBStart + p_prbMap->nRBSize); iPrb++) {
/* copy BF W IQs for 1 PRB of */
rte_memcpy(&pRbMap->bf_weight.weight[iPrb][0], (dl_bfw_pos + (iPrb * num_antelm)*4), num_antelm*4);
}
}
#endif
} /* else if(get_rucategory() == XRAN_CATEGORY_B) */
} /* if(pRbMap) */
else {
......@@ -821,16 +839,16 @@ int xranLibWraper::Init(struct xran_fh_config *pCfg)
//pRbMap->prbMap[0].bf_precoding.weight[];
}
else if(get_rucategory() == XRAN_CATEGORY_B) {
int idxElm;
int iPrb;
char *ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
struct xran_prb_elm* p_prbMap = NULL;
int num_antelm;
//int idxElm;
//int iPrb;
//char *ul_bfw_pos = ((char*)p_tx_ul_bfw_buffer[flowId]) + tx_ul_bfw_buffer_position[flowId];
//struct xran_prb_elm* p_prbMap = NULL;
//int num_antelm;
pRbMap->prbMap[0].BeamFormingType = XRAN_BEAM_WEIGHT;
pRbMap->prbMap[0].bf_weight_update = 1;
num_antelm = get_num_antelmtrx();
//num_antelm = get_num_antelmtrx();
#if 0
/* populate beam weights to C-plane for each elm */
pRbMap->bf_weight.nAntElmTRx = num_antelm;
......@@ -860,18 +878,18 @@ int xranLibWraper::Init(struct xran_fh_config *pCfg)
//------------------------------------------------------------------------------------------------------------------------------------------------
void xranLibWraper::Cleanup()
{
int i;
uint32_t i;
if(get_rucategory() == XRAN_CATEGORY_B) {
for(i = 0; i < MAX_ANT_CARRIER_SUPPORTED && i < (uint32_t)(get_num_cc() * get_num_eaxc()); i++) {
if(p_tx_dl_bfw_buffer[i]) {
free(p_tx_dl_bfw_buffer[i]);
p_tx_dl_bfw_buffer[i] == NULL;
p_tx_dl_bfw_buffer[i] = NULL;
}
if(p_tx_ul_bfw_buffer[i]) {
free(p_tx_ul_bfw_buffer[i]);
p_tx_ul_bfw_buffer[i] == NULL;
p_tx_ul_bfw_buffer[i] = NULL;
}
}
}
......@@ -886,9 +904,10 @@ void xranLibWraper::Cleanup()
void xranLibWraper::Open(xran_ethdi_mbuf_send_fn send_cp, xran_ethdi_mbuf_send_fn send_up,
void *fh_rx_callback, void *fh_rx_prach_callback, void *fh_srs_callback)
{
struct xran_fh_config *pXranConf;
//struct xran_fh_config *pXranConf;
int32_t nSectorNum;
int i, j, k, z;
int i, j ;
uint32_t z;
uint32_t xran_max_antenna_nr = RTE_MAX(get_num_eaxc(), get_num_eaxc_ul());
uint32_t xran_max_ant_array_elm_nr = RTE_MAX(get_num_antelmtrx(), xran_max_antenna_nr);
......@@ -1048,7 +1067,8 @@ int xranLibWraper::apply_cpenable(bool flag)
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_slot_config(const std::string &cfgname, struct xran_frame_config *pCfg)
{
int numcfg, i, j;
int numcfg, i;
uint32_t j;
std::vector<int> slotcfg;
numcfg = get_globalcfg<int>(cfgname, "period");
......@@ -1133,22 +1153,22 @@ int xranLibWraper::get_numerology() { return(m_xranConf.frame_conf.nNumerolog
int xranLibWraper::get_duplextype() { return(m_xranConf.frame_conf.nFrameDuplexType); }
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_num_cc() { return(m_xranConf.nCC); }
uint32_t xranLibWraper::get_num_cc() { return(m_xranConf.nCC); }
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_num_eaxc() { return(m_xranConf.neAxc); }
uint32_t xranLibWraper::get_num_eaxc() { return(m_xranConf.neAxc); }
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_num_eaxc_ul() { return(m_xranConf.neAxcUl); }
uint32_t xranLibWraper::get_num_eaxc_ul() { return(m_xranConf.neAxcUl); }
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_num_dlrbs() { return(m_xranConf.nDLRBs); }
uint32_t xranLibWraper::get_num_dlrbs() { return(m_xranConf.nDLRBs); }
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_num_ulrbs() { return(m_xranConf.nULRBs); }
uint32_t xranLibWraper::get_num_ulrbs() { return(m_xranConf.nULRBs); }
//------------------------------------------------------------------------------------------------------------------------------------------------
int xranLibWraper::get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); }
uint32_t xranLibWraper::get_num_antelmtrx() { return(m_xranConf.nAntElmTRx); }
//------------------------------------------------------------------------------------------------------------------------------------------------
bool xranLibWraper::is_cpenable() { return(m_xranInit.enableCP); };
......
targets/ARCH/ETHERNET/oran/5g/xran_lib_wrap.hpp
View file @ 173e57d6
......@@ -96,16 +96,17 @@ public:
protected:
char argv[25] = "unittest";
char argv[25] = {'u','n','i','t','t','e','s','t','\0'};
//char argv[25] = "unittest";
std::string m_dpdk_dev_up, m_dpdk_dev_cp, m_dpdk_bbdev;
void *m_xranhandle;
uint8_t m_du_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x55 }; // Sofia: this is hard coded here and then it is read from the conf file
uint8_t m_ru_mac[6] = { 0x00,0x11, 0x22, 0x33, 0x44, 0x66 }; // Sofia: this is hard coded here and then it is read from the conf file
uint8_t m_du_mac[6]; // = { 0x00,0x11, 0x22, 0x33, 0x44, 0x55 }; // Sofia: this is hard coded here and then it is read from the conf file
uint8_t m_ru_mac[6]; //= { 0x00,0x11, 0x22, 0x33, 0x44, 0x66 }; // Sofia: this is hard coded here and then it is read from the conf file
bool m_bSub6;
uint32_t m_nSlots = 20;
uint32_t m_nSlots; // = 20;
struct xran_fh_config m_xranConf;
struct xran_fh_init m_xranInit;
......@@ -232,17 +233,17 @@ public:
int get_duplextype();
int get_num_cc();
uint32_t get_num_cc();
int get_num_eaxc();
uint32_t get_num_eaxc();
int get_num_eaxc_ul();
uint32_t get_num_eaxc_ul();
int get_num_dlrbs();
uint32_t get_num_dlrbs();
int get_num_ulrbs();
uint32_t get_num_ulrbs();
int get_num_antelmtrx();
uint32_t get_num_antelmtrx();
bool is_cpenable();
......
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