Commit 2ff8bb20 authored by Francesco Mani's avatar Francesco Mani

merged with branch fix-frame-rx-and-memory and conflicts solved

parents a08e120c 48a103ea
......@@ -2397,7 +2397,7 @@ add_executable(nr-uesoftmodem
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_DIR}/common/utils/threadPool/thread-pool.c
${OPENAIR_DIR}/executables//nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-ue.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
......@@ -2431,8 +2431,8 @@ add_executable(nr-uesoftmodem-nos1
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/nr-ue.c
${OPENAIR_TARGETS}/RT/USER/nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-ue.c
${OPENAIR_DIR}/executables/nr-uesoftmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
#${OPENAIR_TARGETS}/COMMON/create_tasks_ue.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
......
......@@ -1117,6 +1117,26 @@
<nruns>3</nruns>
</testCase>
<testCase id="015107">
<class>execution</class>
<desc>nr_ulschsim Test cases. (Test1: 106 PRB),
(Test2: 217 PRB),
(Test3: 273 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_ulschsim.Rel15</main_exec>
<main_exec_args>-R 106 -m9 -s13 -n100
-R 217 -m15 -s15 -n100
-R 273 -m19 -s20 -n100</main_exec_args>
<tags>nr_ulschsim.test1 nr_ulschsim.test2 nr_ulschsim.test3</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110">
<class>execution</class>
<desc>dlsim_tm4 test cases (Test 1: 10 MHz, R2.FDD (MCS 5), EVA5, -1dB),
......
......@@ -40,7 +40,7 @@
#include "assertions.h"
#if defined(ENABLE_ITTI)
# include "intertask_interface.h"
#include "intertask_interface.h"
#endif
# include <pthread.h>
......@@ -75,16 +75,14 @@ char *log_level_highlight_start[] = {LOG_RED, LOG_ORANGE, "", LOG_BLUE, LOG_CYBL
char *log_level_highlight_end[] = {LOG_RESET,LOG_RESET,LOG_RESET, LOG_RESET,LOG_RESET}; /*!< \brief Optional end-format strings for highlighting */
int write_file_matlab(const char *fname,const char *vname,void *data,int length,int dec,char format)
{
int write_file_matlab(const char *fname,const char *vname,void *data,int length,int dec,char format) {
FILE *fp=NULL;
int i;
if (data == NULL)
return -1;
//printf("Writing %d elements of type %d to %s\n",length,format,fname);
//printf("Writing %d elements of type %d to %s\n",length,format,fname);
if (format == 10 || format ==11 || format == 12 || format == 13 || format == 14) {
fp = fopen(fname,"a+");
......@@ -92,8 +90,6 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
fp = fopen(fname,"w+");
}
if (fp== NULL) {
printf("[OPENAIR][FILE OUTPUT] Cannot open file %s\n",fname);
return(-1);
......@@ -102,10 +98,8 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
if (format != 10 && format !=11 && format != 12 && format != 13 && format != 14)
fprintf(fp,"%s = [",vname);
switch (format) {
case 0: // real 16-bit
for (i=0; i<length; i+=dec) {
fprintf(fp,"%d\n",((short *)data)[i]);
}
......@@ -116,13 +110,10 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
case 13:
case 14:
case 15:
for (i=0; i<length<<1; i+=(2*dec)) {
fprintf(fp,"%d + j*(%d)\n",((short *)data)[i],((short *)data)[i+1]);
}
break;
case 2: // real 32-bit
......@@ -155,7 +146,7 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
case 6: // real 64-bit
for (i=0; i<length; i+=dec) {
fprintf(fp,"%lld\n",((long long*)data)[i]);
fprintf(fp,"%lld\n",((long long *)data)[i]);
}
break;
......@@ -181,27 +172,20 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
break;
case 10 : // case eren 16 bit complex :
for (i=0; i<length<<1; i+=(2*dec)) {
if((i < 2*(length-1)) && (i > 0))
fprintf(fp,"%d + j*(%d),",((short *)data)[i],((short *)data)[i+1]);
else if (i == 2*(length-1))
fprintf(fp,"%d + j*(%d);",((short *)data)[i],((short *)data)[i+1]);
else if (i == 0)
fprintf(fp,"\n%d + j*(%d),",((short *)data)[i],((short *)data)[i+1]);
}
break;
case 11 : //case eren 16 bit real for channel magnitudes:
for (i=0; i<length; i+=dec) {
if((i <(length-1))&& (i > 0))
fprintf(fp,"%d,",((short *)data)[i]);
else if (i == (length-1))
......@@ -216,7 +200,6 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
case 12 : // case eren for log2_maxh real unsigned 8 bit
fprintf(fp,"%d \n",((unsigned char *)&data)[0]);
break;
}
if (format != 10 && format !=11 && format !=12 && format != 13 && format != 15) {
......@@ -235,36 +218,35 @@ int write_file_matlab(const char *fname,const char *vname,void *data,int length,
void log_getconfig(log_t *g_log) {
char *gloglevel = NULL;
int consolelog ;
paramdef_t logparams_defaults[] = LOG_GLOBALPARAMS_DESC;
paramdef_t logparams_level[MAX_LOG_PREDEF_COMPONENTS];
paramdef_t logparams_logfile[MAX_LOG_PREDEF_COMPONENTS];
paramdef_t logparams_debug[sizeof(log_maskmap)/sizeof(mapping)];
paramdef_t logparams_dump[sizeof(log_maskmap)/sizeof(mapping)];
int ret = config_get( logparams_defaults,sizeof(logparams_defaults)/sizeof(paramdef_t),CONFIG_STRING_LOG_PREFIX);
if (ret <0) {
fprintf(stderr,"[LOG] init aborted, configuration couldn't be performed");
return;
}
/* set LOG display options (enable/disable color, thread name, level ) */
/* set LOG display options (enable/disable color, thread name, level ) */
for(int i=0; i<logparams_defaults[LOG_OPTIONS_IDX].numelt ; i++) {
for(int j=0; log_options[j].name != NULL ; j++) {
if (strcmp(logparams_defaults[LOG_OPTIONS_IDX].strlistptr[i],log_options[j].name) == 0) {
g_log->flag = g_log->flag | log_options[j].value;
break;
} else if (log_options[j+1].name == NULL){
} else if (log_options[j+1].name == NULL) {
fprintf(stderr,"Unknown log option: %s\n",logparams_defaults[LOG_OPTIONS_IDX].strlistptr[i]);
exit(-1);
}
}
}
/* build the parameter array for setting per component log level and infile options */
/* build the parameter array for setting per component log level and infile options */
memset(logparams_level, 0, sizeof(paramdef_t)*MAX_LOG_PREDEF_COMPONENTS);
memset(logparams_logfile, 0, sizeof(paramdef_t)*MAX_LOG_PREDEF_COMPONENTS);
for (int i=MIN_LOG_COMPONENTS; i < MAX_LOG_PREDEF_COMPONENTS; i++) {
if(g_log->log_component[i].name == NULL) {
g_log->log_component[i].name = malloc(16);
......@@ -272,37 +254,43 @@ void log_getconfig(log_t *g_log) {
logparams_logfile[i].paramflags = PARAMFLAG_DONOTREAD;
logparams_level[i].paramflags = PARAMFLAG_DONOTREAD;
}
sprintf(logparams_level[i].optname, LOG_CONFIG_LEVEL_FORMAT, g_log->log_component[i].name);
sprintf(logparams_logfile[i].optname, LOG_CONFIG_LOGFILE_FORMAT, g_log->log_component[i].name);
/* workaround: all log options in existing configuration files use lower case component names
/* workaround: all log options in existing configuration files use lower case component names
where component names include uppercase char in log.h.... */
for (int j=0 ; j<strlen(logparams_level[i].optname); j++)
logparams_level[i].optname[j] = tolower(logparams_level[i].optname[j]);
for (int j=0 ; j<strlen(logparams_level[i].optname); j++)
logparams_logfile[i].optname[j] = tolower(logparams_logfile[i].optname[j]);
/* */
/* */
logparams_level[i].defstrval = gloglevel;
logparams_logfile[i].defuintval = 0;
logparams_logfile[i].numelt = 0;
logparams_level[i].numelt = 0;
logparams_level[i].type = TYPE_STRING;
logparams_logfile[i].type = TYPE_UINT;
logparams_logfile[i].paramflags = logparams_logfile[i].paramflags|PARAMFLAG_BOOL;
}
/* read the per component parameters */
/* read the per component parameters */
config_get( logparams_level, MAX_LOG_PREDEF_COMPONENTS,CONFIG_STRING_LOG_PREFIX);
config_get( logparams_logfile, MAX_LOG_PREDEF_COMPONENTS,CONFIG_STRING_LOG_PREFIX);
/* now set the log levels and infile option, according to what we read */
/* now set the log levels and infile option, according to what we read */
for (int i=MIN_LOG_COMPONENTS; i < MAX_LOG_PREDEF_COMPONENTS; i++) {
g_log->log_component[i].level = map_str_to_int(log_level_names, *(logparams_level[i].strptr));
set_log(i, g_log->log_component[i].level);
if (*(logparams_logfile[i].uptr) == 1)
set_component_filelog(i);
}
/* build then read the debug and dump parameter array */
for (int i=0;log_maskmap[i].name != NULL ; i++) {
/* build then read the debug and dump parameter array */
for (int i=0; log_maskmap[i].name != NULL ; i++) {
sprintf(logparams_debug[i].optname, LOG_CONFIG_DEBUG_FORMAT, log_maskmap[i].name);
sprintf(logparams_dump[i].optname, LOG_CONFIG_DUMP_FORMAT, log_maskmap[i].name);
logparams_debug[i].defuintval = 0;
......@@ -318,26 +306,30 @@ void log_getconfig(log_t *g_log) {
logparams_dump[i].chkPptr = NULL;
logparams_dump[i].numelt = 0;
}
config_get( logparams_debug,(sizeof(log_maskmap)/sizeof(mapping)) - 1 ,CONFIG_STRING_LOG_PREFIX);
config_get( logparams_dump,(sizeof(log_maskmap)/sizeof(mapping)) - 1 ,CONFIG_STRING_LOG_PREFIX);
/* set the debug mask according to the debug parameters values */
config_get( logparams_debug,(sizeof(log_maskmap)/sizeof(mapping)) - 1,CONFIG_STRING_LOG_PREFIX);
config_get( logparams_dump,(sizeof(log_maskmap)/sizeof(mapping)) - 1,CONFIG_STRING_LOG_PREFIX);
/* set the debug mask according to the debug parameters values */
for (int i=0; log_maskmap[i].name != NULL ; i++) {
if (*(logparams_debug[i].uptr) )
g_log->debug_mask = g_log->debug_mask | log_maskmap[i].value;
if (*(logparams_dump[i].uptr) )
g_log->dump_mask = g_log->dump_mask | log_maskmap[i].value;
}
/* log globally enabled/disabled */
/* log globally enabled/disabled */
set_glog_onlinelog(consolelog);
}
int register_log_component(char *name, char *fext, int compidx)
{
int computed_compidx=compidx;
int register_log_component(char *name, char *fext, int compidx) {
int computed_compidx=compidx;
if (strlen(fext) > 3) {
fext[3]=0; /* limit log file extension to 3 chars */
}
if (compidx < 0) { /* this is not a pre-defined component */
for (int i = MAX_LOG_PREDEF_COMPONENTS; i< MAX_LOG_COMPONENTS; i++) {
if (g_log->log_component[i].name == NULL) {
......@@ -346,6 +338,7 @@ int computed_compidx=compidx;
}
}
}
if (computed_compidx >= 0 && computed_compidx <MAX_LOG_COMPONENTS) {
g_log->log_component[computed_compidx].name = strdup(name);
g_log->log_component[computed_compidx].stream = stdout;
......@@ -355,11 +348,11 @@ int computed_compidx=compidx;
} else {
fprintf(stderr,"{LOG} %s %d Couldn't register componemt %s\n",__FILE__,__LINE__,name);
}
return computed_compidx;
return computed_compidx;
}
int logInit (void)
{
int logInit (void) {
int i;
g_log = calloc(1, sizeof(log_t));
......@@ -367,10 +360,8 @@ int logInit (void)
perror ("cannot allocated memory for log generation module \n");
exit(EXIT_FAILURE);
}
memset(g_log,0,sizeof(log_t));
memset(g_log,0,sizeof(log_t));
register_log_component("PHY","log",PHY);
register_log_component("MAC","log",MAC);
register_log_component("OPT","log",OPT);
......@@ -399,55 +390,38 @@ int logInit (void)
register_log_component("TMR","",TMR);
register_log_component("USIM","txt",USIM);
register_log_component("SIM","txt",SIM);
/* following log component are used for the localization*/
register_log_component("LOCALIZE","log",LOCALIZE);
register_log_component("NAS","log",NAS);
register_log_component("UDP","",UDP_);
register_log_component("GTPV1U","",GTPU);
register_log_component("S1AP","",S1AP);
register_log_component("X2AP","",X2AP);
register_log_component("SCTP","",SCTP);
register_log_component("X2AP","",X2AP);
register_log_component("LOADER","log",LOADER);
register_log_component("ASN","log",ASN);
for (int i=0 ; log_level_names[i].name != NULL ; i++)
g_log->level2string[i] = toupper(log_level_names[i].name[0]); // uppercased first letter of level name
g_log->filelog_name = "/tmp/openair.log";
log_getconfig(g_log);
// set all unused component items to 0, they are for non predefined components
for (i=MAX_LOG_PREDEF_COMPONENTS; i < MAX_LOG_COMPONENTS; i++) {
memset(&(g_log->log_component[i]),0,sizeof(log_component_t));
}
printf("log init done\n");
printf("log init done\n");
return 0;
}
char *log_getthreadname(char *threadname, int bufsize) {
int rt = pthread_getname_np(pthread_self(), threadname,bufsize) ;
int rt = pthread_getname_np(pthread_self(), threadname,bufsize) ;
if (rt == 0)
{
if (rt == 0) {
return threadname;
} else {
return "thread?";
......@@ -456,7 +430,7 @@ int rt = pthread_getname_np(pthread_self(), threadname,bufsize) ;
static int log_header(char *log_buffer, int buffsize, int comp, int level,const char *format) {
char threadname[PR_SET_NAME];
return snprintf(log_buffer, buffsize , "%s%s[%s]%c %s %s%s",
return snprintf(log_buffer, buffsize, "%s%s[%s]%c %s %s%s",
log_level_highlight_end[level],
( (g_log->flag & FLAG_NOCOLOR)?"":log_level_highlight_start[level]),
g_log->log_component[comp].name,
......@@ -466,40 +440,34 @@ return snprintf(log_buffer, buffsize , "%s%s[%s]%c %s %s%s",
log_level_highlight_end[level]);
}
void logRecord_mt(const char *file, const char *func, int line, int comp, int level, const char* format, ... )
{
char log_buffer[MAX_LOG_TOTAL]={0};
void logRecord_mt(const char *file, const char *func, int line, int comp, int level, const char *format, ... ) {
char log_buffer[MAX_LOG_TOTAL]= {0};
va_list args;
va_start(args, format);
log_header(log_buffer,MAX_LOG_TOTAL ,comp, level,format);
log_header(log_buffer,MAX_LOG_TOTAL,comp, level,format);
g_log->log_component[comp].vprint(g_log->log_component[comp].stream,log_buffer, args);
fflush(g_log->log_component[comp].stream);
va_end(args);
}
void log_dump(int component, void *buffer, int buffsize,int datatype, const char* format, ... ) {
va_list args;
char *wbuf;
void log_dump(int component, void *buffer, int buffsize,int datatype, const char *format, ... ) {
va_list args;
char *wbuf;
switch(datatype) {
case LOG_DUMP_DOUBLE:
wbuf=malloc((buffsize * 10) + 64 + MAX_LOG_TOTAL);
break;
case LOG_DUMP_CHAR:
default:
wbuf=malloc((buffsize * 3 ) + 64 + MAX_LOG_TOTAL);
break;
}
if (wbuf != NULL) {
va_start(args, format);
int pos=log_header(wbuf,MAX_LOG_TOTAL ,component, OAILOG_INFO,"");
int pos=log_header(wbuf,MAX_LOG_TOTAL,component, OAILOG_INFO,"");
int pos2=vsprintf(wbuf+pos,format, args);
pos=pos+pos2;
va_end(args);
......@@ -509,20 +477,21 @@ char *wbuf;
case LOG_DUMP_DOUBLE:
pos = pos + sprintf(wbuf+pos,"%04.4lf ", (double)((double *)buffer)[i]);
break;
case LOG_DUMP_CHAR:
default:
pos = pos + sprintf(wbuf+pos,"%02x ", (unsigned char)((unsigned char *)buffer)[i]);
break;
}
}
sprintf(wbuf+pos,"\n");
g_log->log_component[component].print(g_log->log_component[component].stream,wbuf);
free(wbuf);
}
}
int set_log(int component, int level)
{
int set_log(int component, int level) {
/* Checking parameters */
DevCheck((component >= MIN_LOG_COMPONENTS) && (component < MAX_LOG_COMPONENTS),
component, MIN_LOG_COMPONENTS, MAX_LOG_COMPONENTS);
......@@ -531,23 +500,20 @@ int set_log(int component, int level)
if ( g_log->log_component[component].level != OAILOG_DISABLE )
g_log->log_component[component].savedlevel = g_log->log_component[component].level;
g_log->log_component[component].level = level;
g_log->log_component[component].level = level;
return 0;
}
void set_glog(int level)
{
void set_glog(int level) {
for (int c=0; c< MAX_LOG_COMPONENTS; c++ ) {
set_log(c, level);
}
}
void set_glog_onlinelog(int enable)
{
void set_glog_onlinelog(int enable) {
for (int c=0; c< MAX_LOG_COMPONENTS; c++ ) {
if ( enable ) {
g_log->log_component[c].level = g_log->log_component[c].savedlevel;
......@@ -559,9 +525,8 @@ void set_glog_onlinelog(int enable)
}
}
}
void set_glog_filelog(int enable)
{
static FILE *fptr;
void set_glog_filelog(int enable) {
static FILE *fptr;
if ( enable ) {
fptr = fopen(g_log->filelog_name,"w");
......@@ -574,33 +539,35 @@ static FILE *fptr;
} else {
for (int c=0; c< MAX_LOG_COMPONENTS; c++ ) {
g_log->log_component[c].filelog = 0;
if (fptr != NULL) {
fclose(fptr);
}
g_log->log_component[c].stream = stdout;
}
}
}
void set_component_filelog(int comp)
{
void set_component_filelog(int comp) {
if (g_log->log_component[comp].stream == NULL || g_log->log_component[comp].stream == stdout) {
g_log->log_component[comp].stream = fopen(g_log->log_component[comp].filelog_name,"w");
}
g_log->log_component[comp].vprint = vfprintf;
g_log->log_component[comp].print = fprintf;
g_log->log_component[comp].filelog = 1;
}
void close_component_filelog(int comp)
{
void close_component_filelog(int comp) {
g_log->log_component[comp].filelog = 0;
if (g_log->log_component[comp].stream != NULL && g_log->log_component[comp].stream != stdout ) {
fclose(g_log->log_component[comp].stream);
g_log->log_component[comp].stream = stdout;
}
g_log->log_component[comp].vprint = vfprintf;
g_log->log_component[comp].print = fprintf;
}
/*
......@@ -608,8 +575,7 @@ void close_component_filelog(int comp)
* with string value NULL
*/
/* map a string to an int. Takes a mapping array and a string as arg */
int map_str_to_int(mapping *map, const char *str)
{
int map_str_to_int(mapping *map, const char *str) {
while (1) {
if (map->name == NULL) {
return(-1);
......@@ -624,8 +590,7 @@ int map_str_to_int(mapping *map, const char *str)
}
/* map an int to a string. Takes a mapping array and a value */
char *map_int_to_str(mapping *map, int val)
{
char *map_int_to_str(mapping *map, int val) {
while (1) {
if (map->name == NULL) {
return NULL;
......@@ -639,8 +604,7 @@ char *map_int_to_str(mapping *map, int val)
}
}
int is_newline( char *str, int size)
{
int is_newline( char *str, int size) {
int i;
for ( i = 0; i < size; i++ ) {
......@@ -653,14 +617,10 @@ int is_newline( char *str, int size)
return 0;
}
void logClean (void)
{
void logClean (void) {
int i;
LOG_UI(PHY,"\n");
for (i=MIN_LOG_COMPONENTS; i < MAX_LOG_COMPONENTS; i++) {
close_component_filelog(i);
}
......@@ -669,69 +629,50 @@ void logClean (void)
#ifdef LOG_TEST
int main(int argc, char *argv[])
{
int main(int argc, char *argv[]) {
logInit();
test_log();
return 1;
}
int test_log(void)
{
int test_log(void) {
LOG_ENTER(MAC); // because the default level is DEBUG
LOG_I(EMU, "1 Starting OAI logs version %s Build date: %s on %s\n",
BUILD_VERSION, BUILD_DATE, BUILD_HOST);
LOG_D(MAC, "1 debug MAC \n");
LOG_W(MAC, "1 warning MAC \n");
set_log(EMU, OAILOG_INFO);
set_log(MAC, OAILOG_WARNING);
LOG_I(EMU, "2 Starting OAI logs version %s Build date: %s on %s\n",
BUILD_VERSION, BUILD_DATE, BUILD_HOST);
LOG_E(MAC, "2 error MAC\n");
LOG_D(MAC, "2 debug MAC \n");
LOG_W(MAC, "2 warning MAC \n");
LOG_I(MAC, "2 info MAC \n");
set_log(MAC, OAILOG_NOTICE);
LOG_ENTER(MAC);
LOG_I(EMU, "3 Starting OAI logs version %s Build date: %s on %s\n",
BUILD_VERSION, BUILD_DATE, BUILD_HOST);
LOG_D(MAC, "3 debug MAC \n");
LOG_W(MAC, "3 warning MAC \n");
LOG_I(MAC, "3 info MAC \n");
set_log(MAC, LOG_DEBUG);
set_log(EMU, LOG_DEBUG);
LOG_ENTER(MAC);
LOG_I(EMU, "4 Starting OAI logs version %s Build date: %s on %s\n",
BUILD_VERSION, BUILD_DATE, BUILD_HOST);
LOG_D(MAC, "4 debug MAC \n");
LOG_W(MAC, "4 warning MAC \n");
LOG_I(MAC, "4 info MAC \n");
set_log(MAC, LOG_DEBUG);
set_log(EMU, LOG_DEBUG);
LOG_I(LOG, "5 Starting OAI logs version %s Build date: %s on %s\n",
BUILD_VERSION, BUILD_DATE, BUILD_HOST);
LOG_D(MAC, "5 debug MAC \n");
LOG_W(MAC, "5 warning MAC \n");
LOG_I(MAC, "5 info MAC \n");
set_log(MAC, LOG_TRACE);
set_log(EMU, LOG_TRACE);
LOG_ENTER(MAC);
LOG_I(LOG, "6 Starting OAI logs version %s Build date: %s on %s\n",
BUILD_VERSION, BUILD_DATE, BUILD_HOST);
......@@ -739,7 +680,6 @@ int test_log(void)
LOG_W(MAC, "6 warning MAC \n");
LOG_I(MAC, "6 info MAC \n");
LOG_EXIT(MAC);
return 0;
}
#endif
......@@ -45,14 +45,15 @@
#include <time.h>
#include <stdint.h>
#ifndef __STDC_FORMAT_MACROS
#define __STDC_FORMAT_MACROS
#define __STDC_FORMAT_MACROS
#endif
#include <inttypes.h>
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include <pthread.h>
#include "T.h"
#include <common/utils/utils.h>
/*----------------------------------------------------------------------------*/
#ifdef __cplusplus
......@@ -165,7 +166,7 @@ extern "C" {
{"NAS", DEBUG_NAS},\
{"UE_TIMING", UE_TIMING},\
{NULL,-1}\
}
}
......@@ -256,7 +257,7 @@ typedef struct {
log_component_t log_component[MAX_LOG_COMPONENTS];
char level2string[NUM_LOG_LEVEL];
int flag;
char* filelog_name;
char *filelog_name;
uint64_t debug_mask;
uint64_t dump_mask;
} log_t;
......@@ -277,9 +278,9 @@ void log_set_instance_type (log_instance_type_t instance);
log_t *g_log;
#else
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
extern log_t *g_log;
extern log_t *g_log;
#ifdef __cplusplus
}
#endif
......@@ -289,7 +290,7 @@ extern log_t *g_log;
/*----------------------------------------------------------------------------*/
int logInit (void);
void logRecord_mt(const char *file, const char *func, int line,int comp, int level, const char *format, ...) __attribute__ ((format (printf, 6, 7)));
void log_dump(int component, void *buffer, int buffsize,int datatype, const char* format, ... );
void log_dump(int component, void *buffer, int buffsize,int datatype, const char *format, ... );
int set_log(int component, int level);
void set_glog(int level);
......@@ -344,10 +345,10 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int
/* optname help paramflags XXXptr defXXXval type numelt */
/*------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define LOG_GLOBALPARAMS_DESC { \
{LOG_CONFIG_STRING_GLOBAL_LOG_LEVEL, "Default log level for all componemts\n", 0, strptr:(char **)&gloglevel, defstrval:log_level_names[2].name, TYPE_STRING, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_ONLINE, "Default console output option, for all components\n", 0, iptr:&(consolelog), defintval:1, TYPE_INT, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_OPTIONS, LOG_CONFIG_HELP_OPTIONS, 0, strlistptr:NULL, defstrlistval:NULL, TYPE_STRINGLIST,0} \
}
{LOG_CONFIG_STRING_GLOBAL_LOG_LEVEL, "Default log level for all componemts\n", 0, strptr:(char **)&gloglevel, defstrval:log_level_names[2].name, TYPE_STRING, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_ONLINE, "Default console output option, for all components\n", 0, iptr:&(consolelog), defintval:1, TYPE_INT, 0}, \
{LOG_CONFIG_STRING_GLOBAL_LOG_OPTIONS, LOG_CONFIG_HELP_OPTIONS, 0, strlistptr:NULL, defstrlistval:NULL, TYPE_STRINGLIST,0} \
}
#define LOG_OPTIONS_IDX 2
/*----------------------------------------------------------------------------------*/
......@@ -360,22 +361,22 @@ int32_t write_file_matlab(const char *fname, const char *vname, void *data, int
// debugging macros
#define LOG_F LOG_I /* because LOG_F was originaly to dump a message or buffer but is also used as a regular level...., to dump use LOG_DUMPMSG */
# if T_TRACER
/* per component, level dependant macros */
/* per component, level dependant macros */
# define LOG_E(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_ERR ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_ERR, x) ;} else { T(T_LEGACY_ ## c ## _ERROR, T_PRINTF(x)) ;}} while (0)
# define LOG_W(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_WARNING) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_WARNING, x) ;} else { T(T_LEGACY_ ## c ## _WARNING, T_PRINTF(x)) ;}} while (0)
# define LOG_I(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_INFO ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ;} else { T(T_LEGACY_ ## c ## _INFO, T_PRINTF(x)) ;}} while (0)
# define LOG_D(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_DEBUG ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_DEBUG, x) ;} else { T(T_LEGACY_ ## c ## _DEBUG, T_PRINTF(x)) ;}} while (0)
# define LOG_T(c, x...) do { if (T_stdout) { if( g_log->log_component[c].level >= OAILOG_TRACE ) logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_TRACE, x) ;} else { T(T_LEGACY_ ## c ## _TRACE, T_PRINTF(x)) ;}} while (0)
/* macro used to dump a buffer or a message as in openair2/RRC/LTE/RRC_eNB.c, replaces LOG_F macro */
/* macro used to dump a buffer or a message as in openair2/RRC/LTE/RRC_eNB.c, replaces LOG_F macro */
# define LOG_DUMPMSG(c, f, b, s, x...) do { if(g_log->dump_mask & f) log_dump(c, b, s, LOG_DUMP_CHAR, x) ;} while (0) /* */
# define nfapi_log(FILE, FNC, LN, COMP, LVL, F...) do { if (T_stdout) { logRecord_mt(__FILE__, __FUNCTION__, __LINE__,COMP, LVL, F) ;}} while (0) /* */
/* bitmask dependant macros, to isolate debugging code */
/* bitmask dependant macros, to isolate debugging code */
# define LOG_DEBUGFLAG(D) (g_log->debug_mask & D)
/* bitmask dependant macros, to generate debug file such as matlab file or message dump */
/* bitmask dependant macros, to generate debug file such as matlab file or message dump */
# define LOG_DUMPFLAG(D) (g_log->dump_mask & D)
# define LOG_M(file, vector, data, len, dec, format) do { write_file_matlab(file, vector, data, len, dec, format);} while(0)/* */
/* define variable only used in LOG macro's */
/* define variable only used in LOG macro's */
# define LOG_VAR(A,B) A B
# else /* T_TRACER: remove all debugging and tracing messages, except errors */
# define LOG_I(c, x...) do {logRecord_mt(__FILE__, __FUNCTION__, __LINE__,c, OAILOG_INFO, x) ; } while(0)/* */
......@@ -425,7 +426,7 @@ static __inline__ uint64_t rdtsc(void) {
extern double cpuf;
static inline uint64_t checkTCPU(int timeout, char * file, int line) {
static inline uint64_t checkTCPU(int timeout, char *file, int line) {
static __thread uint64_t lastCPUTime=0;
static __thread uint64_t last=0;
uint64_t cur=rdtsc();
......@@ -434,25 +435,29 @@ static inline uint64_t checkTCPU(int timeout, char * file, int line) {
uint64_t CPUTime=CPUt.tv_sec*1000*1000+CPUt.tv_nsec/1000;
double microCycles=(double)(cpuf*1000);
int duration=(int)((cur-last)/microCycles);
if ( last!=0 && duration > timeout ) {
//struct timespec ts;
//clock_gettime(CLOCK_MONOTONIC, &ts);
printf("%s:%d lte-ue delay %d (exceed %d), CPU for this period: %lld\n", file, line,
duration, timeout, (long long)CPUTime-lastCPUTime );
}
last=cur;
lastCPUTime=CPUTime;
return cur;
}
static inline unsigned long long checkT(int timeout, char * file, int line) {
static inline unsigned long long checkT(int timeout, char *file, int line) {
static __thread unsigned long long last=0;
unsigned long long cur=rdtsc();
int microCycles=(int)(cpuf*1000);
int duration=(int)((cur-last)/microCycles);
if ( last!=0 && duration > timeout )
printf("%s:%d lte-ue delay %d (exceed %d)\n", file, line,
duration, timeout);
last=cur;
return cur;
}
......@@ -463,7 +468,7 @@ typedef struct m {
uint64_t maxArray[11];
} Meas;
static inline void printMeas(char * txt, Meas *M, int period) {
static inline void printMeas(char *txt, Meas *M, int period) {
if (M->iterations%period == 0 ) {
char txt2[512];
sprintf(txt2,"%s avg=%" PRIu64 " iterations=%" PRIu64 " max=%"
......@@ -481,13 +486,13 @@ static inline void printMeas(char * txt, Meas *M, int period) {
}
}
static inline int cmpint(const void* a, const void* b) {
uint64_t* aa=(uint64_t*)a;
uint64_t* bb=(uint64_t*)b;
static inline int cmpint(const void *a, const void *b) {
uint64_t *aa=(uint64_t *)a;
uint64_t *bb=(uint64_t *)b;
return (int)(*aa-*bb);
}
static inline void updateTimes(uint64_t start, Meas *M, int period, char * txt) {
static inline void updateTimes(uint64_t start, Meas *M, int period, char *txt) {
if (start!=0) {
uint64_t end=rdtsc();
long long diff=(end-start)/(cpuf*1000);
......
......@@ -92,7 +92,7 @@ static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg)
if (nf->outF == NULL)
nf->outF = msg;
if (nf->inF)
if (nf->inF != NULL)
nf->inF->next = msg;
nf->inF = msg;
......@@ -103,7 +103,7 @@ static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg)
static inline notifiedFIFO_elt_t *pullNotifiedFIFO(notifiedFIFO_t *nf) {
mutexlock(nf->lockF);
while(!nf->outF)
while(nf->outF == NULL)
condwait(nf->notifF, nf->lockF);
notifiedFIFO_elt_t *ret=nf->outF;
......@@ -124,8 +124,12 @@ static inline notifiedFIFO_elt_t *pollNotifiedFIFO(notifiedFIFO_t *nf) {
notifiedFIFO_elt_t *ret=nf->outF;
if (ret!=NULL)
if (ret!=NULL) {
if (nf->outF==nf->outF->next)
LOG_E(TMR,"Circular list in thread pool: push several times the same buffer is forbidden\n");
nf->outF=nf->outF->next;
}
if (nf->outF==NULL)
nf->inF=NULL;
......
......@@ -3,6 +3,9 @@
#include <stdint.h>
#include <sys/types.h>
#ifdef __cplusplus
extern "C" {
#endif
void *calloc_or_fail(size_t size);
void *malloc_or_fail(size_t size);
......@@ -14,4 +17,17 @@ int hex_string_to_hex_value (uint8_t *hex_value, const char *hex_string, int siz
char *itoa(int i);
#define findInList(keY, result, list, element_type) {\
int i;\
for (i=0; i<sizeof(list)/sizeof(element_type) ; i++)\
if (list[i].key==keY) {\
result=list[i].val;\
break;\
}\
AssertFatal(i < sizeof(list)/sizeof(element_type), "List %s doesn't contain %s\n",#list, #keY); \
}
#ifdef __cplusplus
}
#endif
#endif
......@@ -138,13 +138,9 @@ PHY_VARS_NR_UE *init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms,
{
PHY_VARS_NR_UE *ue;
if (frame_parms!=(NR_DL_FRAME_PARMS *)NULL) { // if we want to give initial frame parms, allocate the PHY_VARS_UE structure and put them in
ue = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE));
memset(ue,0,sizeof(PHY_VARS_NR_UE));
memcpy(&(ue->frame_parms), frame_parms, sizeof(NR_DL_FRAME_PARMS));
} else ue = PHY_vars_UE_g[UE_id][0];
ue->Mod_id = UE_id;
ue->mac_enabled = 1;
// initialize all signal buffers
......@@ -160,6 +156,7 @@ PHY_VARS_NR_UE *init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms,
*/
typedef struct syncData_s {
UE_nr_rxtx_proc_t *proc;
PHY_VARS_NR_UE *UE;
} syncData_t;
......@@ -167,18 +164,13 @@ static void UE_synch(void *arg) {
syncData_t *syncD=(syncData_t *) arg;
int i, hw_slot_offset;
PHY_VARS_NR_UE *UE = syncD->UE;
int current_band = 0;
int current_offset = 0;
sync_mode_t sync_mode = pbch;
int CC_id = UE->CC_id;
int freq_offset=0;
UE->is_synchronized = 0;
if (UE->UE_scan == 0) {
int ind;
get_band(downlink_frequency[CC_id][0], &UE->frame_parms.eutra_band, &uplink_frequency_offset[CC_id][0], &UE->frame_parms.frame_type);
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu32", UL %"PRIu32" (oai_exit %d, rx_num_channels %d)\n",
downlink_frequency[0][0], downlink_frequency[0][0]+uplink_frequency_offset[0][0],
oai_exit, openair0_cfg[0].rx_num_channels);
......@@ -197,7 +189,6 @@ static void UE_synch(void *arg) {
sync_mode = pbch;
} else {
current_band=0;
LOG_E(PHY,"Fixme!\n");
/*
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
......@@ -245,11 +236,10 @@ static void UE_synch(void *arg) {
break;
*/
case pbch:
LOG_I(PHY, "[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode);
if (nr_initial_sync( UE, UE->mode ) == 0) {
if (nr_initial_sync( syncD->proc, UE, UE->mode ) == 0) {
freq_offset = UE->common_vars.freq_offset; // frequency offset computed with pss in initial sync
hw_slot_offset = (UE->rx_offset<<1) / UE->frame_parms.samples_per_slot;
LOG_I(PHY,"Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %d (DL %u, UL %u), UE_scan_carrier %d\n",
......@@ -377,7 +367,6 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
printf("Processing slot %d\n",proc->nr_tti_rx);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
......@@ -548,10 +537,6 @@ void *UE_thread(void *arg) {
AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
notifiedFIFO_t nf;
initNotifiedFIFO(&nf);
bool syncRunning=false;
notifiedFIFO_elt_t *syncMsg=newNotifiedFIFO_elt(sizeof(syncData_t),0,&nf,UE_synch);
syncData_t *syncD=(syncData_t *)NotifiedFifoData(syncMsg);
syncD->UE=UE;
int nbSlotProcessing=0;
int thread_idx=0;
notifiedFIFO_elt_t *processingMsg[RX_NB_TH];
......@@ -562,8 +547,13 @@ void *UE_thread(void *arg) {
tmp->UE=UE;
}
bool syncRunning=false;
notifiedFIFO_elt_t *syncMsg=newNotifiedFIFO_elt(sizeof(syncData_t),0,&nf,UE_synch);
syncData_t *syncD=(syncData_t *)NotifiedFifoData(syncMsg);
syncD->UE=UE;
syncD->proc=&((processingData_t *)NotifiedFifoData(processingMsg[0]))->proc;
const int nb_slot_frame = 10*UE->frame_parms.slots_per_subframe;
int absolute_slot=-1;
int absolute_slot, decoded_frame_rx=INT_MAX, trashed_frames=0;
while (!oai_exit) {
if (!syncD->UE->is_synchronized) {
......@@ -572,11 +562,14 @@ void *UE_thread(void *arg) {
if (res) {
syncRunning=false;
} else
} else {
trashFrame(UE, &timestamp);
trashed_frames++;
}
} else {
readFrames(UE, &timestamp);
pushTpool(Tpool, syncMsg);
trashed_frames=0;
syncRunning=true;
}
......@@ -588,7 +581,6 @@ void *UE_thread(void *arg) {
syncInFrame(UE, &timestamp);
UE->rx_offset=0;
UE->time_sync_cell=0;
//printf("first stream frame rx %d\n",UE->proc.proc_rxtx[0].frame_rx);
// read in first symbol
AssertFatal (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0 ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
......@@ -596,12 +588,21 @@ void *UE_thread(void *arg) {
(void **)UE->common_vars.rxdata,
UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0,
UE->frame_parms.nb_antennas_rx),"");
// we have the decoded frame index in the return of the synch process
// and we shifted above to the first slot of next frame
// the synch thread proc context is hard linked to regular processing thread context, thread id = 0
UE_nr_rxtx_proc_t *proc=&(((processingData_t *)NotifiedFifoData(processingMsg[0]))->proc);
// shift the frame index with all the frames we trashed meanwhile we perform the synch search
proc->decoded_frame_rx=(proc->decoded_frame_rx + trashed_frames) % MAX_FRAME_NUMBER;
decoded_frame_rx=proc->decoded_frame_rx;
// we do ++ first in the regular processing, so it will be 0;
absolute_slot=decoded_frame_rx*nb_slot_frame + nb_slot_frame -1;
continue;
}
absolute_slot++;
thread_idx = absolute_slot % RX_NB_TH;
int slot_nr=absolute_slot % nb_slot_frame;
int slot_nr = absolute_slot % nb_slot_frame;
UE_nr_rxtx_proc_t *proc=&(((processingData_t *)NotifiedFifoData(processingMsg[thread_idx]))->proc);
// update thread index for received subframe
proc->nr_tti_rx= slot_nr;
......@@ -611,6 +612,7 @@ void *UE_thread(void *arg) {
proc->subframe_tx=proc->nr_tti_rx;
proc->frame_rx = ( absolute_slot/nb_slot_frame ) % MAX_FRAME_NUMBER;
proc->frame_tx = ( (absolute_slot + DURATION_RX_TO_TX) /nb_slot_frame ) % MAX_FRAME_NUMBER;
proc->decoded_frame_rx=-1;
LOG_D(PHY,"Process slot %d thread Idx %d \n", slot_nr, thread_idx);
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
......@@ -671,21 +673,37 @@ void *UE_thread(void *arg) {
proc->timestamp_tx = timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_slot)-
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
notifiedFIFO_elt_t *res;
if (getenv("RFSIMULATOR")) {
// FixMe: Wait previous thread is done, because race conditions seems too bad
// in case of actual RF board, the overlap between threads mitigate the issue
while (!tryPullTpool(&nf, Tpool)) {
nbSlotProcessing--;
// We must receive one message, that proves the slot processing is done
while ((res=tryPullTpool(&nf, Tpool)) == NULL)
usleep(200);
}
nbSlotProcessing--;
processingData_t *tmp=(processingData_t *)res->msgData;
if (tmp->proc.decoded_frame_rx != -1)
decoded_frame_rx=tmp->proc.decoded_frame_rx;
}
while (nbSlotProcessing >= RX_NB_TH && !tryPullTpool(&nf, Tpool)) {
while (nbSlotProcessing >= RX_NB_TH && (res=tryPullTpool(&nf, Tpool)) != NULL ) {
nbSlotProcessing--;
processingData_t *tmp=(processingData_t *)res->msgData;
if (tmp->proc.decoded_frame_rx != -1)
decoded_frame_rx=tmp->proc.decoded_frame_rx;
usleep(200);
}
if ( decoded_frame_rx != proc->frame_rx &&
((decoded_frame_rx+1) % MAX_FRAME_NUMBER) != proc->frame_rx )
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
decoded_frame_rx, proc->frame_rx);
pushTpool(Tpool, processingMsg[thread_idx]);
} // while !oai_exit
......@@ -709,7 +727,6 @@ void init_UE(int nb_inst) {
// UE->rfdevice.type = NONE_DEV;
//PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
LOG_I(PHY,"Initializing memory for UE instance %d (%p)\n",inst,PHY_vars_UE_g[inst]);
PHY_vars_UE_g[inst][0] = init_nr_ue_vars(NULL,inst,0);
PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
AssertFatal((UE->if_inst = nr_ue_if_module_init(inst)) != NULL, "can not initial IF module\n");
nr_l3_init_ue();
......
......@@ -28,6 +28,7 @@
#include "PHY/defs_nr_UE.h"
#include "SIMULATION/ETH_TRANSPORT/proto.h"
#include <threadPool/thread-pool.h>
#include <openair2/LAYER2/NR_MAC_gNB/mac_proto.h>
#if defined(ENABLE_ITTI)
......
......@@ -46,7 +46,7 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
uint8_t bsize = pdcch_params->reg_bundle_size;
uint8_t R = pdcch_params->interleaver_size;
uint16_t N_reg = pdcch_params->n_rb * pdcch_params->n_symb;
uint16_t Y, N_cce, M_s_max, n_CI=0, tmp, C;
uint16_t Y, N_cce, M_s_max, n_CI=0, tmp, C=0;
uint16_t n_RNTI = (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params->rnti:0;
uint32_t A[3]={39827,39829,39839};
......@@ -64,7 +64,7 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
}
if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
AssertFatal((N_reg%(bsize*R))==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %d, bsize %d R %d)\n",
AssertFatal((N_reg%(bsize*R))==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %us, bsize %d R %d)\n",
N_reg, bsize, R);
C = N_reg/(bsize*R);
}
......
......@@ -215,7 +215,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
nr_dlsch_encoding(harq->pdu, slot, &dlsch, &frame_parms);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<TBS>>7; i++) {
for (int i=0; i<harq->B>>7; i++) {
for (int j=0; j<16; j++)
printf("0x%02x\t", harq->pdu[(i<<4)+j]);
printf("\n");
......@@ -308,16 +308,13 @@ for (int i=0; i<n_dmrs>>4; i++) {
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms.first_carrier_offset + frame_parms.ssb_start_subcarrier;
uint16_t start_sc = frame_parms.first_carrier_offset + rel15->start_prb*NR_NB_SC_PER_RB;
if (start_sc >= frame_parms.ofdm_symbol_size)
start_sc -= frame_parms.ofdm_symbol_size;
/*rel15->start_prb*NR_NB_SC_PER_RB +
((pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_COMMON) && (pdcch_params.dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0))?\
((frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB + pdcch_params.rb_offset)*NR_NB_SC_PER_RB) : 0;*/
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->start_symbol, rel15->n_prb, rel15->nb_symbols);
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->start_symbol, rel15->n_prb, rel15->nb_symbols);
#endif
for (int ap=0; ap<rel15->nb_layers; ap++) {
......
......@@ -126,7 +126,7 @@ void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
uint16_t N_RE, Ninfo, Ninfo_prime, C, TBS=0, R;
uint8_t table_idx, Qm, n, scale;
table_idx = get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
table_idx = 1; //get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
scale = ((table_idx==2)&&((Imcs==20)||(Imcs==26)))?11:10;
N_RE = min(156, N_RE_prime)*dlsch_rel15->n_prb;
......
......@@ -1990,7 +1990,7 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
int **dl_ch_estimates_ext,
unsigned short pmi,
unsigned char *pmi_ext,
unsigned int *rb_alloc,
unsigned int *rb_alloc, //unused in NR
unsigned char symbol,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
......@@ -2008,20 +2008,8 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
unsigned char pilots=0,j=0;
//symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
pilots = (symbol==2) ? 1 : 0; //to updated from config
//l=symbol;
//nsymb = (frame_parms->Ncp==NORMAL) ? 14:12;
k = frame_parms->first_carrier_offset + 516; //0
/* if (frame_parms->frame_type == TDD) { // TDD
sss_symb = nsymb-1;
pss_symb = 2;
} else {
sss_symb = (nsymb>>1)-2;
pss_symb = (nsymb>>1)-1;
}*/
pilots = (symbol==2) ? 1 : 0; //to updated from config!!!
k = frame_parms->first_carrier_offset + 12*start_rb;
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
......
......@@ -102,7 +102,7 @@ void free_list(NR_UE_SSB *node) {
}
int nr_pbch_detection(PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mode)
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mode)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
......@@ -160,7 +160,7 @@ int nr_pbch_detection(PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mod
#endif
ret = nr_rx_pbch(ue,
0,
proc,
ue->pbch_vars[0],
frame_parms,
0,
......@@ -201,7 +201,7 @@ int nr_pbch_detection(PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mod
char duplex_string[2][4] = {"FDD","TDD"};
char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
......@@ -276,7 +276,6 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
}
}
/* check that SSS/PBCH block is continuous inside the received buffer */
if (sync_pos < (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*fp->samples_per_subframe - (NB_SYMBOLS_PBCH * fp->ofdm_symbol_size))) {
......@@ -307,7 +306,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
//nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,n_ssb_crb,0);
nr_gold_pbch(ue);
ret = nr_pbch_detection(ue,1,mode); // start pbch detection at first symbol after pss
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
if (ret == 0) {
// sync at symbol ue->symbol_offset
......
......@@ -410,13 +410,15 @@ unsigned char sign(int8_t x) {
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,7,29,25,27,5,8,24,9,10,11,12,13,1,4,3,14,15,16,17,2,26,18,19,20,21,22,6,23};
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int Ns,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag) {
int Ns = proc->nr_tti_rx;
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
int max_h=0;
int symbol;
......@@ -592,6 +594,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#endif
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
ue->dl_indication.proc=proc;
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0];
......
......@@ -1137,7 +1137,7 @@ int rx_sss(PHY_VARS_NR_UE *phy_vars_ue,int32_t *tot_metric,uint8_t *flip_max,uin
\returns number of tx antennas or -1 if error
*/
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int subframe_rx,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
......@@ -1145,7 +1145,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag);
int nr_pbch_detection(PHY_VARS_NR_UE *ue,
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
runmode_t mode);
......@@ -1433,7 +1434,8 @@ void generate_RIV_tables(void);
@param phy_vars_ue Pointer to UE variables
@param mode current running mode
*/
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
/*!
......
......@@ -277,7 +277,7 @@ typedef struct {
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t w[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// for abstraction soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
//double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// LDPC processing buffers
......
......@@ -402,7 +402,7 @@ void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
assert(0);
}
size = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int64_t)*frame_parms_ue->samples_per_subframe;
size = sizeof(int64_t)*(frame_parms_ue->samples_per_frame + (2*ofdm_symbol_size));
q = (int64_t*)malloc16(size);
if (q != NULL) {
pss_corr_ue[i] = q;
......
......@@ -158,122 +158,6 @@ int32_t dot_product(int16_t *x,
#endif
}
int64_t dot_product64(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift)
{
uint32_t n;
#if defined(__x86_64__) || defined(__i386__)
__m128i *x128,*y128,mmtmp1,mmtmp2,mmtmp3,mmcumul,mmcumul_re,mmcumul_im;
__m128i minus_i = _mm_set_epi16(-1,1,-1,1,-1,1,-1,1);
int64_t result;
x128 = (__m128i*) x;
y128 = (__m128i*) y;
mmcumul_re = _mm_setzero_si128();
mmcumul_im = _mm_setzero_si128();
for (n=0; n<(N>>2); n++) {
// printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// print_shorts("y",&y128[0]);
// this computes Re(z) = Re(x)*Re(y) + Im(x)*Im(y)
mmtmp1 = _mm_madd_epi16(x128[0],y128[0]);
// print_ints("retmp",&mmtmp1);
// mmtmp1 contains real part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp1 = _mm_srai_epi32(mmtmp1,output_shift);
mmcumul_re = _mm_add_epi32(mmcumul_re,mmtmp1);
//print_ints("re",&mmcumul_re);
// this computes Im(z) = Re(x)*Im(y) - Re(y)*Im(x)
mmtmp2 = _mm_shufflelo_epi16(y128[0],_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_shufflehi_epi16(mmtmp2,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_sign_epi16(mmtmp2,minus_i);
// print_shorts("y",&mmtmp2);
mmtmp3 = _mm_madd_epi16(x128[0],mmtmp2);
//print_ints("imtmp",&mmtmp3);
// mmtmp3 contains imag part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp3 = _mm_srai_epi32(mmtmp3,output_shift);
mmcumul_im = _mm_add_epi32(mmcumul_im,mmtmp3);
//print_ints("im",&mmcumul_im);
x128++;
y128++;
}
// this gives Re Re Im Im
mmcumul = _mm_hadd_epi32(mmcumul_re,mmcumul_im);
//print_ints("cumul1",&mmcumul);
// this gives Re Im Re Im
mmcumul = _mm_hadd_epi32(mmcumul,mmcumul);
//print_ints("cumul2",&mmcumul);
//mmcumul = _mm_srai_epi32(mmcumul,output_shift);
// extract the lower half
result = _mm_extract_epi64(mmcumul,0);
//printf("result: (%d,%d)\n",((int32_t*)&result)[0],((int32_t*)&result)[1]);
_mm_empty();
_m_empty();
return(result);
#elif defined(__arm__)
int16x4_t *x_128=(int16x4_t*)x;
int16x4_t *y_128=(int16x4_t*)y;
int32x4_t tmp_re,tmp_im;
int32x4_t tmp_re1,tmp_im1;
int32x4_t re_cumul,im_cumul;
int32x2_t re_cumul2,im_cumul2;
int32x4_t shift = vdupq_n_s32(-output_shift);
int32x2x2_t result2;
int16_t conjug[4]__attribute__((aligned(16))) = {-1,1,-1,1} ;
re_cumul = vdupq_n_s32(0);
im_cumul = vdupq_n_s32(0);
for (n=0; n<(N>>2); n++) {
tmp_re = vmull_s16(*x_128++, *y_128++);
//tmp_re = [Re(x[0])Re(y[0]) Im(x[0])Im(y[0]) Re(x[1])Re(y[1]) Im(x[1])Im(y[1])]
tmp_re1 = vmull_s16(*x_128++, *y_128++);
//tmp_re1 = [Re(x1[1])Re(x2[1]) Im(x1[1])Im(x2[1]) Re(x1[1])Re(x2[2]) Im(x1[1])Im(x2[2])]
tmp_re = vcombine_s32(vpadd_s32(vget_low_s32(tmp_re),vget_high_s32(tmp_re)),
vpadd_s32(vget_low_s32(tmp_re1),vget_high_s32(tmp_re1)));
//tmp_re = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2]) Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
tmp_im = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
tmp_im1 = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im1 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
tmp_im = vcombine_s32(vpadd_s32(vget_low_s32(tmp_im),vget_high_s32(tmp_im)),
vpadd_s32(vget_low_s32(tmp_im1),vget_high_s32(tmp_im1)));
//tmp_im = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
re_cumul = vqaddq_s32(re_cumul,vqshlq_s32(tmp_re,shift));
im_cumul = vqaddq_s32(im_cumul,vqshlq_s32(tmp_im,shift));
}
re_cumul2 = vpadd_s32(vget_low_s32(re_cumul),vget_high_s32(re_cumul));
im_cumul2 = vpadd_s32(vget_low_s32(im_cumul),vget_high_s32(im_cumul));
re_cumul2 = vpadd_s32(re_cumul2,re_cumul2);
im_cumul2 = vpadd_s32(im_cumul2,im_cumul2);
result2 = vzip_s32(re_cumul2,im_cumul2);
return(vget_lane_s32(result2.val[0],0));
#endif
}
#ifdef MAIN
......
......@@ -354,10 +354,116 @@ int32_t dot_product(int16_t *x,
uint32_t N, //must be a multiple of 8
uint8_t output_shift);
int64_t dot_product64(int16_t *x,
static inline int64_t dot_product64(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift);
uint8_t output_shift)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *x128,*y128,mmtmp1,mmtmp2,mmtmp3,mmcumul,mmcumul_re,mmcumul_im;
__m128i minus_i = _mm_set_epi16(-1,1,-1,1,-1,1,-1,1);
int64_t result;
x128 = (__m128i*) x;
y128 = (__m128i*) y;
mmcumul_re = _mm_setzero_si128();
mmcumul_im = _mm_setzero_si128();
__m128i*end=x128+(N>>2);
for (__m128i* inPtr=x128; inPtr < end ; inPtr++) {
// printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// print_shorts("y",&y128[0]);
// this computes Re(z) = Re(x)*Re(y) + Im(x)*Im(y)
mmtmp1 = _mm_madd_epi16(*inPtr,*y128);
// print_ints("retmp",&mmtmp1);
// mmtmp1 contains real part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp1 = _mm_srai_epi32(mmtmp1,output_shift);
mmcumul_re = _mm_add_epi32(mmcumul_re,mmtmp1);
//print_ints("re",&mmcumul_re);
// this computes Im(z) = Re(x)*Im(y) - Re(y)*Im(x)
mmtmp2 = _mm_shufflelo_epi16(*y128,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_shufflehi_epi16(mmtmp2,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_sign_epi16(mmtmp2,minus_i);
// print_shorts("y",&mmtmp2);
mmtmp3 = _mm_madd_epi16(*inPtr,mmtmp2);
//print_ints("imtmp",&mmtmp3);
// mmtmp3 contains imag part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp3 = _mm_srai_epi32(mmtmp3,output_shift);
mmcumul_im = _mm_add_epi32(mmcumul_im,mmtmp3);
//print_ints("im",&mmcumul_im);
y128++;
}
// this gives Re Re Im Im
mmcumul = _mm_hadd_epi32(mmcumul_re,mmcumul_im);
//print_ints("cumul1",&mmcumul);
// this gives Re Im Re Im
mmcumul = _mm_hadd_epi32(mmcumul,mmcumul);
//print_ints("cumul2",&mmcumul);
//mmcumul = _mm_srai_epi32(mmcumul,output_shift);
// extract the lower half
result = _mm_extract_epi64(mmcumul,0);
//printf("result: (%d,%d)\n",((int32_t*)&result)[0],((int32_t*)&result)[1]);
return(result);
#elif defined(__arm__)
int16x4_t *x_128=(int16x4_t*)x;
int16x4_t *y_128=(int16x4_t*)y;
int32x4_t tmp_re,tmp_im;
int32x4_t tmp_re1,tmp_im1;
int32x4_t re_cumul,im_cumul;
int32x2_t re_cumul2,im_cumul2;
int32x4_t shift = vdupq_n_s32(-output_shift);
int32x2x2_t result2;
int16_t conjug[4]__attribute__((aligned(16))) = {-1,1,-1,1} ;
re_cumul = vdupq_n_s32(0);
im_cumul = vdupq_n_s32(0);
for (n=0; n<(N>>2); n++) {
tmp_re = vmull_s16(*x_128++, *y_128++);
//tmp_re = [Re(x[0])Re(y[0]) Im(x[0])Im(y[0]) Re(x[1])Re(y[1]) Im(x[1])Im(y[1])]
tmp_re1 = vmull_s16(*x_128++, *y_128++);
//tmp_re1 = [Re(x1[1])Re(x2[1]) Im(x1[1])Im(x2[1]) Re(x1[1])Re(x2[2]) Im(x1[1])Im(x2[2])]
tmp_re = vcombine_s32(vpadd_s32(vget_low_s32(tmp_re),vget_high_s32(tmp_re)),
vpadd_s32(vget_low_s32(tmp_re1),vget_high_s32(tmp_re1)));
//tmp_re = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2]) Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
tmp_im = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
tmp_im1 = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im1 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
tmp_im = vcombine_s32(vpadd_s32(vget_low_s32(tmp_im),vget_high_s32(tmp_im)),
vpadd_s32(vget_low_s32(tmp_im1),vget_high_s32(tmp_im1)));
//tmp_im = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
re_cumul = vqaddq_s32(re_cumul,vqshlq_s32(tmp_re,shift));
im_cumul = vqaddq_s32(im_cumul,vqshlq_s32(tmp_im,shift));
}
re_cumul2 = vpadd_s32(vget_low_s32(re_cumul),vget_high_s32(re_cumul));
im_cumul2 = vpadd_s32(vget_low_s32(im_cumul),vget_high_s32(im_cumul));
re_cumul2 = vpadd_s32(re_cumul2,re_cumul2);
im_cumul2 = vpadd_s32(im_cumul2,im_cumul2);
result2 = vzip_s32(re_cumul2,im_cumul2);
return(vget_lane_s32(result2.val[0],0));
#endif
}
void dft12(int16_t *x,int16_t *y);
void dft24(int16_t *x,int16_t *y,uint8_t scale_flag);
......
......@@ -157,109 +157,6 @@
#include "targets/ARCH/COMMON/common_lib.h"
#include "NR_IF_Module.h"
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. ttis_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. ttis_per_subframe - 1] to act upon for reception
int nr_tti_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
/// \brief Instance count for RXn-TXnp4 processing thread.
/// \internal This variable is protected by \ref mutex_rxtx.
int instance_cnt_rxtx;
/// pthread structure for RXn-TXnp4 processing thread
pthread_t pthread_rxtx;
/// pthread attributes for RXn-TXnp4 processing thread
pthread_attr_t attr_rxtx;
/// condition variable for tx processing thread
pthread_cond_t cond_rxtx;
/// mutex for RXn-TXnp4 processing thread
pthread_mutex_t mutex_rxtx;
/// scheduling parameters for RXn-TXnp4 thread
struct sched_param sched_param_rxtx;
/// internal This variable is protected by ref mutex_fep_slot1.
//int instance_cnt_slot0_dl_processing;
int instance_cnt_slot1_dl_processing;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_slot1_dl_processing;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_slot1_dl_processing;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_slot1_dl_processing;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_slot1_dl_processing;
//int instance_cnt_slot0_dl_processing;
int instance_cnt_dlsch_td;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_dlsch_td;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_dlsch_td;
//
uint8_t chan_est_pilot0_slot1_available;
uint8_t chan_est_slot1_available;
uint8_t llr_slot1_available;
uint8_t dci_slot0_available;
uint8_t first_symbol_available;
uint8_t decoder_thread_available;
uint8_t decoder_main_available;
uint8_t decoder_switch;
int counter_decoder;
uint8_t channel_level;
int eNB_id;
int harq_pid;
int llr8_flag;
/// scheduling parameters for fep_slot1 thread
struct sched_param sched_param_fep_slot1;
int sub_frame_start;
int sub_frame_step;
unsigned long long gotIQs;
uint8_t decoder_thread_available1;
int instance_cnt_dlsch_td1;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td1;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_dlsch_td1;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td1;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_dlsch_td1;
int dci_err_cnt;
} UE_nr_rxtx_proc_t;
/// Context data structure for eNB subframe processing
typedef struct {
......@@ -961,6 +858,9 @@ typedef struct UE_NR_SCAN_INFO_s {
int32_t freq_offset_Hz[3][10];
} UE_NR_SCAN_INFO_t;
#include "NR_IF_Module.h"
/// Top-level PHY Data Structure for UE
typedef struct {
/// \brief Module ID indicator for this instance
......
#ifndef __thread_NR_UE__
#define __thread_NR_UE__
#include <pthread.h>
#include <targets/ARCH/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. ttis_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. ttis_per_subframe - 1] to act upon for reception
int nr_tti_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
int decoded_frame_rx;
/// internal This variable is protected by ref mutex_fep_slot1.
//int instance_cnt_slot0_dl_processing;
int instance_cnt_slot1_dl_processing;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_slot1_dl_processing;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_slot1_dl_processing;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_slot1_dl_processing;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_slot1_dl_processing;
//int instance_cnt_slot0_dl_processing;
int instance_cnt_dlsch_td;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_dlsch_td;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td;
/// mutex for UE synch thread
uint8_t chan_est_pilot0_slot1_available;
uint8_t chan_est_slot1_available;
uint8_t llr_slot1_available;
uint8_t dci_slot0_available;
uint8_t first_symbol_available;
uint8_t decoder_thread_available;
uint8_t decoder_main_available;
uint8_t decoder_switch;
int counter_decoder;
uint8_t channel_level;
int eNB_id;
int harq_pid;
int llr8_flag;
/// scheduling parameters for fep_slot1 thread
struct sched_param sched_param_fep_slot1;
int sub_frame_start;
int sub_frame_step;
unsigned long long gotIQs;
uint8_t decoder_thread_available1;
int dci_err_cnt;
} UE_nr_rxtx_proc_t;
#endif
......@@ -1264,37 +1264,6 @@ uint16_t nr_get_n1_pucch(PHY_VARS_NR_UE *ue,
}
#ifdef EMOS
void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
uint8_t harq_pid;
if (next_slot%2==0) {
// get harq_pid from nr_tti_tx relationship
harq_pid = nr_subframe2harq_pid(&ue->frame_parms,ue->frame,(next_slot>>1));
if (harq_pid==255) {
LOG_E(PHY,"[UE%d] Frame %d : FATAL ERROR: illegal harq_pid, returning\n",
0,ue->frame);
return;
}
if (ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
emos_dump_UE.uci_cnt[next_slot>>1] = 1;
memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o,ulsch[eNB_id]->o,MAX_CQI_BITS*sizeof(char));
emos_dump_UE.UCI_data[0][next_slot>>1].O = ulsch[eNB_id]->O;
memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_RI,ulsch[eNB_id]->o_RI,2*sizeof(char));
emos_dump_UE.UCI_data[0][next_slot>>1].O_RI = ulsch[eNB_id]->O_RI;
memcpy(emos_dump_UE.UCI_data[0][next_slot>>1].o_ACK,ulsch[eNB_id]->o_ACK,4*sizeof(char));
emos_dump_UE.UCI_data[0][next_slot>>1].O_ACK = ulsch[eNB_id]->harq_processes[harq_pid]->O_ACK;
}
else {
emos_dump_UE.uci_cnt[next_slot>>1] = 0;
}
}
}
#endif
void ulsch_common_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t empty_subframe) {
......@@ -1602,10 +1571,10 @@ void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_ULSCH_UESPEC,VCD_FUNCTION_IN);
/* reset harq for tx of current rx slot because it is sure that transmission has already been achieved for this slot */
set_tx_harq_id(ue->ulsch[eNB_id], NR_MAX_HARQ_PROCESSES, proc->nr_tti_rx);
set_tx_harq_id(ue->ulsch[ue->current_thread_id[nr_tti_tx]][eNB_id][0], NR_MAX_HARQ_PROCESSES, proc->nr_tti_rx);
/* get harq pid related to this next tx slot */
harq_pid = get_tx_harq_id(ue->ulsch[eNB_id], nr_tti_tx);
harq_pid = get_tx_harq_id(ue->ulsch[ue->current_thread_id[nr_tti_tx]][eNB_id][0], nr_tti_tx);
#if 0
......@@ -2500,8 +2469,10 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
unsigned int aa;
uint8_t isSubframeSRS;
/*
uint8_t next1_thread_id = ue->current_thread_id[proc->nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[proc->nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
......@@ -2637,6 +2608,7 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
ue->ulsch[eNB_id]->o_ACK,
&N_bundled,
0);
/*
nr_reset_ack(&ue->frame_parms,
ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack,
nr_tti_tx,
......@@ -2651,6 +2623,7 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
ue->ulsch[eNB_id]->o_ACK,
&N_bundled,
0);
*/
}
if (ue->dlsch_SI[eNB_id] != NULL)
......@@ -2765,93 +2738,6 @@ void nr_ue_measurement_procedures(
}
#ifdef EMOS
void phy_procedures_emos_UE_RX(PHY_VARS_NR_UE *ue,uint8_t last_slot,uint8_t eNB_id)
{
uint8_t i,j;
//uint16_t last_slot_emos;
uint32_t bytes;
int Mod_id = ue->Mod_id;
/*
if (last_slot<2)
last_slot_emos = last_slot;
else if (last_slot>9)
last_slot_emos = last_slot - 8;
else {
LOG_E(PHY,"emos rx last_slot_emos %d, last_slot %d\n", last_slot_emos,last_slot);
//mac_xface->macphy_exit("should never happen");
}
*/
#ifdef EMOS_CHANNEL
if ((last_slot==10) || (last_slot==11)) {
for (i=0; i<ue->frame_parms.nb_antennas_rx; i++)
for (j=0; j<ue->frame_parms.nb_antennas_tx; j++) {
// first OFDM symbol with pilots
memcpy(&emos_dump_UE.channel[i][j][(last_slot%2)*2*ue->frame_parms.ofdm_symbol_size],
&ue->common_vars.dl_ch_estimates[eNB_id][(j<<1) + i][0],
ue->frame_parms.ofdm_symbol_size*sizeof(int));
// second OFDM symbol with pilots
memcpy(&emos_dump_UE.channel[i][j][((last_slot%2)*2+1)*ue->frame_parms.ofdm_symbol_size],
&ue->common_vars.dl_ch_estimates[eNB_id][(j<<1) + i][(ue->frame_parms.Ncp == 0 ? 4 : 3)*ue->frame_parms.ofdm_symbol_size],
ue->frame_parms.ofdm_symbol_size*sizeof(int));
}
}
#endif
if (last_slot==0) {
emos_dump_UE.timestamp = rt_get_time_ns();
emos_dump_UE.frame_rx = proc->frame_rx;
emos_dump_UE.UE_mode = ue->UE_mode[eNB_id];
emos_dump_UE.mimo_mode = ue->transmission_mode[eNB_id];
emos_dump_UE.freq_offset = ue->common_vars.freq_offset;
emos_dump_UE.timing_advance = ue->timing_advance;
emos_dump_UE.timing_offset = ue->rx_offset;
emos_dump_UE.rx_total_gain_dB = ue->rx_total_gain_dB;
emos_dump_UE.eNb_id = eNB_id;
memcpy(&emos_dump_UE.PHY_measurements,&measurements,sizeof(PHY_MEASUREMENTS));
}
if (last_slot==1) {
emos_dump_UE.pbch_errors = ue->pbch_vars[eNB_id]->pdu_errors;
emos_dump_UE.pbch_errors_last = ue->pbch_vars[eNB_id]->pdu_errors_last;
emos_dump_UE.pbch_errors_conseq = ue->pbch_vars[eNB_id]->pdu_errors_conseq;
emos_dump_UE.pbch_fer = ue->pbch_vars[eNB_id]->pdu_fer;
}
if (last_slot==19) {
emos_dump_UE.dlsch_errors = ue->dlsch_errors[eNB_id];
emos_dump_UE.dlsch_errors_last = ue->dlsch_errors_last[eNB_id];
emos_dump_UE.dlsch_received = ue->dlsch_received[eNB_id];
emos_dump_UE.dlsch_received_last = ue->dlsch_received_last[eNB_id];
emos_dump_UE.dlsch_fer = ue->dlsch_fer[eNB_id];
emos_dump_UE.dlsch_cntl_errors = ue->dlsch_SI_errors[eNB_id];
emos_dump_UE.dlsch_ra_errors = ue->dlsch_ra_errors[eNB_id];
emos_dump_UE.total_TBS = ue->total_TBS[eNB_id];
emos_dump_UE.total_TBS_last = ue->total_TBS_last[eNB_id];
emos_dump_UE.bitrate = ue->bitrate[eNB_id];
emos_dump_UE.total_received_bits = ue->total_received_bits[eNB_id];
emos_dump_UE.pmi_saved = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->pmi_alloc;
emos_dump_UE.mcs = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid]->mcs;
emos_dump_UE.use_ia_receiver = openair_daq_vars.use_ia_receiver;
bytes = rtf_put(CHANSOUNDER_FIFO_MINOR, &emos_dump_UE, sizeof(fifo_dump_emos_UE));
if (bytes!=sizeof(fifo_dump_emos_UE)) {
LOG_W(PHY,"[UE %d] frame %d, slot %d, Problem writing EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot);
} else {
if (proc->frame_rx%100==0) {
LOG_I(PHY,"[UE %d] frame %d, slot %d, Writing %d bytes EMOS data to FIFO\n",Mod_id,proc->frame_rx, last_slot, bytes);
}
}
}
}
#endif
#if 0
void restart_phy(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc, uint8_t eNB_id,uint8_t abstraction_flag)
......@@ -2938,7 +2824,8 @@ void nr_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PBCH_PROCEDURES, VCD_FUNCTION_IN);
//LOG_I(PHY,"[UE %d] Frame %d, Trying PBCH %d (NidCell %d, eNB_id %d)\n",ue->Mod_id,frame_rx,pbch_phase,ue->frame_parms.Nid_cell,eNB_id);
ret = nr_rx_pbch(ue, nr_tti_rx,
ret = nr_rx_pbch(ue, proc,
ue->pbch_vars[eNB_id],
&ue->frame_parms,
eNB_id,
......@@ -3034,8 +2921,10 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
NR_DCI_ALLOC_t dci_alloc_rx[8];
/*
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
*/
// table dci_fields_sizes_cnt contains dci_fields_sizes for each time a dci is decoded in the slot
// each element represents the size in bits for each dci field, for each decoded dci -> [dci_cnt-1]
......@@ -3242,12 +3131,14 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
uint8_t *nCCE_current = &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->nCCE[nr_tti_rx];
/*
uint8_t *nCCE_dest = &ue->pdcch_vars[next1_thread_id][eNB_id]->nCCE[nr_tti_rx];
uint8_t *nCCE_dest1 = &ue->pdcch_vars[next2_thread_id][eNB_id]->nCCE[nr_tti_rx];
memcpy(nCCE_dest, nCCE_current, sizeof(uint8_t));
memcpy(nCCE_dest1, nCCE_current, sizeof(uint8_t));
LOG_D(PHY,"current_thread %d next1_thread %d next2_thread %d \n", ue->current_thread_id[nr_tti_rx], next1_thread_id, next2_thread_id);
*/
LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d, Mode %s: DCI found %i --> rnti %x / crnti %x : format %d\n",
ue->Mod_id,frame_rx%1024,nr_tti_rx,mode_string[ue->UE_mode[eNB_id]],
......@@ -3307,7 +3198,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->ulsch[eNB_id],
ue->ulsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
&ue->frame_parms,
ue->pdsch_config_dedicated,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
......@@ -3755,7 +3646,6 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
#endif
#endif
if(first_symbol_flag)
{
proc->first_symbol_available = 1;
......@@ -3772,8 +3662,10 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod
NR_UE_DLSCH_t *dlsch0 = ue->dlsch_ra[eNB_id];
int harq_pid = 0;
uint8_t *rar;
/*
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
*/
LOG_D(PHY,"[UE %d][RAPROC] Frame %d nr_tti_rx %d Received RAR mode %d\n",
ue->Mod_id,
......@@ -3798,8 +3690,10 @@ void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmod
ue->prach_resources[eNB_id]->ra_PreambleIndex,
dlsch0->harq_processes[0]->b); // alter the 'b' buffer so it contains only the selected RAR header and RAR payload
*/
/*
ue->pdcch_vars[next1_thread_id][eNB_id]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti;
ue->pdcch_vars[next2_thread_id][eNB_id]->crnti = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti;
*/
if (timing_advance!=0xffff) {
......@@ -3877,7 +3771,7 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
// to be updated by higher layer
uint8_t nb_re_dmrs = 6;
uint16_t length_dmrs = 1;
uint16_t nb_symb_sch = 8;
uint16_t nb_symb_sch = 9;
if (dlsch0==NULL)
AssertFatal(0,"dlsch0 should be defined at this level \n");
......@@ -4405,527 +4299,6 @@ void *UE_thread_slot1_dl_processing(void *arg) {
}
#endif
#ifdef UE_SLOT_PARALLELISATION
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type) {
int l,l2;
int pmch_flag=0;
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
uint8_t pilot0;
uint8_t pilot1;
uint8_t slot0;
uint8_t slot1;
uint8_t first_ofdm_sym;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
#if T_TRACER
T(T_UE_PHY_DL_TICK, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx));
T(T_UE_PHY_INPUT_SIGNAL, T_INT(ue->Mod_id), T_INT(frame_rx%1024), T_INT(nr_tti_rx), T_INT(0),
T_BUFFER(&ue->common_vars.rxdata[0][nr_tti_rx*ue->frame_parms.samples_per_subframe],
ue->frame_parms.samples_per_subframe * 4));
#endif
// start timers
#ifdef UE_DEBUG_TRACE
LOG_I(PHY," ****** start RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
start_meas(&ue->ue_front_end_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
pmch_flag = is_pmch_subframe(frame_rx,nr_tti_rx,&ue->frame_parms) ? 1 : 0;
if (do_pdcch_flag) {
// deactivate reception until we scan pdcch
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0])
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1])
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1]->active = 0;
if (ue->dlsch_SI[eNB_id])
ue->dlsch_SI[eNB_id]->active = 0;
if (ue->dlsch_p[eNB_id])
ue->dlsch_p[eNB_id]->active = 0;
if (ue->dlsch_ra[eNB_id])
ue->dlsch_ra[eNB_id]->active = 0;
}
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[%s %d] Frame %d nr_tti_rx %d: Doing phy_procedures_UE_RX\n",
(r_type == multicast_relay) ? "RN/UE" : "UE",
ue->Mod_id,frame_rx, nr_tti_rx);
#endif
if (nr_subframe_select(&ue->frame_parms,nr_tti_rx) == SF_S) { // S-subframe, do first 5 symbols only
l2 = 5;
} else if (pmch_flag == 1) { // do first 2 symbols only
l2 = 1;
} else { // normal nr_tti_rx, last symbol to be processed is the first of the second slot
l2 = (ue->frame_parms.symbols_per_tti/2)-1;
}
int prev_nr_tti_rx = (nr_tti_rx - 1)<0? 9: (nr_tti_rx - 1);
if (nr_subframe_select(&ue->frame_parms,prev_nr_tti_rx) != SF_DL) {
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// RX processing of symbols l=0...l2
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
first_ofdm_sym = 0;
} else {
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// RX processing of symbols l=1...l2 (l=0 is done in last scheduling epoch)
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
first_ofdm_sym = 1;
}
slot0 = (nr_tti_rx<<1);
slot1 = (nr_tti_rx<<1) + 1;
pilot0 = 0;
if (ue->frame_parms.Ncp == 0) { // normal prefix
pilot1 = 4;
} else { // extended prefix
pilot1 = 3;
}
//LOG_I(PHY,"Set available channelEst to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
//LOG_I(PHY,"Set available llrs slot1 to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
//LOG_I(PHY,"Set available dci info slot0 to 0 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
proc->chan_est_pilot0_slot1_available=0;
proc->llr_slot1_available=0;
proc->dci_slot0_available=0;
proc->first_symbol_available=0;
proc->chan_est_slot1_available=0;
//proc->channel_level=0;
if (pthread_mutex_lock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE %d][Slot0] error locking mutex for UE slot1 dl processing\n",ue->Mod_id );
exit_fun("nothing to add");
}
proc->instance_cnt_slot1_dl_processing++;
if (proc->instance_cnt_slot1_dl_processing == 0)
{
LOG_D(PHY,"unblock slot1 dl processing thread blocked on instance_cnt_slot1_dl_processing : %d \n", proc->instance_cnt_slot1_dl_processing );
if (pthread_cond_signal(&proc->cond_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE %d][Slot0] ERROR pthread_cond_signal for UE slot1 processing thread\n", ue->Mod_id);
exit_fun("nothing to add");
}
if (pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) != 0) {
LOG_E( PHY, "[SCHED][UE %d][Slot0] error unlocking mutex for UE slot1 dl processing \n",ue->Mod_id );
exit_fun("nothing to add");
}
} else
{
LOG_E( PHY, "[SCHED][UE %d] UE RX thread busy (IC %d)!!\n", ue->Mod_id, proc->instance_cnt_slot1_dl_processing);
if (proc->instance_cnt_slot1_dl_processing > 2)
exit_fun("instance_cnt_slot1_dl_processing > 2");
}
//AssertFatal(pthread_cond_signal(&proc->cond_slot1_dl_processing) ==0 ,"");
AssertFatal(pthread_mutex_unlock(&proc->mutex_slot1_dl_processing) ==0,"");
/**** Slot0 FE Processing ****/
// I- start main thread for FFT/ChanEst symbol: 0/1 --> 7
#if UE_TIMING_TRACE
start_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#endif
// 1- perform FFT for pilot ofdm symbols first (ofdmSym7 ofdmSym4 or (ofdmSym6 ofdmSym3))
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,pilot0);
front_end_fft(ue,
pilot0,
slot1,
0,
0);
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,pilot1);
front_end_fft(ue,
pilot1,
slot0,
0,
0);
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,pilot1);
front_end_chanEst(ue,
pilot1,
slot0,
0);
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot1,pilot0);
front_end_chanEst(ue,
pilot0,
slot1,
0);
proc->chan_est_pilot0_slot1_available = 1;
//printf("Set available channelEst to 1 AbsSubframe %d.%d \n",frame_rx,nr_tti_rx);
// 2- perform FFT for other ofdm symbols other than pilots
for (l=first_ofdm_sym; l<=l2; l++)
{
if( (l != pilot0) && (l != pilot1))
{
//printf("AbsSubframe %d.%d FFT slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,l);
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
front_end_fft(ue,
l,
slot0,
0,
0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
}
} // for l=1..l2
// 3- perform Channel Estimation for slot0
for (l=first_ofdm_sym; l<=l2; l++)
{
if( (l != pilot0) && (l != pilot1))
{
//printf("AbsSubframe %d.%d ChanEst slot %d, symbol %d\n", frame_rx,nr_tti_rx,slot0,l);
front_end_chanEst(ue,
l,
slot0,
0);
}
ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
}
if (do_pdcch_flag) {
#if UE_TIMING_TRACE
start_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
if (ue_pdcch_procedures(eNB_id,ue,proc,abstraction_flag) == -1) {
LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Error in pdcch procedures\n",ue->Mod_id,frame_rx,nr_tti_rx);
#if UE_TIMING_TRACE
stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
//proc->dci_slot0_available = 1;
return(-1);
}
//proc->dci_slot0_available=1;
#if UE_TIMING_TRACE
stop_meas(&ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->pdcch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
}
//printf("num_pdcch_symbols %d\n",ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols);
// first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
#if UE_TIMING_TRACE
stop_meas(&ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: FFT + Channel Estimate + PCFICH/PHICH/PDCCH %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#endif
#endif
//wait until slot1 FE is done
uint32_t wait = 0;
while(proc->chan_est_slot1_available == 0)
{
usleep(1);
wait++;
}
#if UE_TIMING_TRACE
stop_meas(&ue->ue_front_end_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] FULL FE Processing %5.2f \n",frame_rx,nr_tti_rx,ue->ue_front_end_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#endif
#endif
/**** End nr_tti_rx FE Processing ****/
#if 0
//Trigger LLR parallelized for Slot 1
proc->dci_slot0_available=1;
printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,nr_tti_rx);
#endif
/**** Pdsch Procedure Slot0 ****/
// start main thread for Pdsch Procedure (slot0)
// do procedures for C-RNTI
//printf("AbsSubframe %d.%d Pdsch Procedure (slot0)\n",frame_rx%1024,nr_tti_rx);
//printf("AbsSubframe %d.%d Pdsch Procedure PDSCH Active %d \n",frame_rx%1024,nr_tti_rx, ue->dlsch[ue->current_thread_id[nr_tti_rx]][0][0]->active);
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#endif
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
PDSCH,
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
}
// do procedures for SI-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_IN);
ue_pdsch_procedures(ue,
proc,
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
(ue->frame_parms.symbols_per_tti>>1)-1,
abstraction_flag);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
}
#if 1
// LLR linear
proc->dci_slot0_available=1;
//printf("Set available dci slot0 to 1 AbsSubframe %d.%d \n",frame_rx%1024,nr_tti_rx);
#endif
#if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Slot0: LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_per_slot_stat[ue->current_thread_id[nr_tti_rx]][0].p_time/(cpuf*1000.0));
#endif
#endif
//wait until LLR Slot1 is done
wait = 0;
while(proc->llr_slot1_available == 0)
{
usleep(1);
wait++;
}
#if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Full LLR Computation %5.2f \n",frame_rx,nr_tti_rx,ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
//printf("[slot0 dl processing] AbsSubframe %d.%d Channel Decoder Start wait %d\n",frame_rx,nr_tti_rx,wait);
//=====================================================================//
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
LOG_D(PHY,"==> Start Turbo Decoder active dlsch %d SI %d RA %d \n",ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active,
ue->dlsch_SI[eNB_id]->active,
//ue->dlsch_p[eNB_id]->active,
ue->dlsch_ra[eNB_id]->active);
// Start Turbo decoder
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
ue_dlsch_procedures(ue,
proc,
eNB_id,
PDSCH,
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1],
&ue->dlsch_errors[eNB_id],
mode,
abstraction_flag);
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
}
// do procedures for SI-RNTI
if ((ue->dlsch_SI[eNB_id]) && (ue->dlsch_SI[eNB_id]->active == 1)) {
ue_dlsch_procedures(ue,
proc,
eNB_id,
SI_PDSCH,
ue->dlsch_SI[eNB_id],
NULL,
&ue->dlsch_SI_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_SI[eNB_id]->active = 0;
}
// do procedures for P-RNTI
if ((ue->dlsch_p[eNB_id]) && (ue->dlsch_p[eNB_id]->active == 1)) {
ue_dlsch_procedures(ue,
proc,
eNB_id,
P_PDSCH,
ue->dlsch_p[eNB_id],
NULL,
&ue->dlsch_p_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_p[eNB_id]->active = 0;
}
// do procedures for RA-RNTI
if ((ue->dlsch_ra[eNB_id]) && (ue->dlsch_ra[eNB_id]->active == 1)) {
ue_dlsch_procedures(ue,
proc,
eNB_id,
RA_PDSCH,
ue->dlsch_ra[eNB_id],
NULL,
&ue->dlsch_ra_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_ra[eNB_id]->active = 0;
}
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "[AbsSFN %d.%d] Channel Decoder: %5.2f \n",frame_rx,nr_tti_rx,ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
// duplicate harq structure
uint8_t current_harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid;
NR_DL_UE_HARQ_t *current_harq_processes = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[current_harq_pid];
nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
// For Debug parallelisation
//if (current_harq_ack->ack == 0) {
//printf("[slot0 dl processing][End of Channel Decoding] AbsSubframe %d.%d Decode Fail for HarqId%d Round%d\n",frame_rx,nr_tti_rx,current_harq_pid,current_harq_processes->round);
//}
for(uint8_t rx_th_idx=1; rx_th_idx<RX_NB_TH; rx_th_idx++)
{
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[ue->current_thread_id[(nr_tti_rx+rx_th_idx)%10]][eNB_id][0]->harq_processes[current_harq_pid];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[ue->current_thread_id[(nr_tti_rx+rx_th_idx)%10]][eNB_id][0]->harq_ack[nr_tti_rx];
copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
copy_ack_struct(harq_ack_dest, current_harq_ack);
}
/*
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[(nr_tti_rx+1)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[(nr_tti_rx+2)%RX_NB_TH][eNB_id][0]->harq_processes[current_harq_pid];
nr_harq_status_t *current_harq_ack = &ue->dlsch[nr_tti_rx%RX_NB_TH][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[(nr_tti_rx+1)%RX_NB_TH][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[(nr_tti_rx+2)%RX_NB_TH][eNB_id][0]->harq_ack[nr_tti_rx];
copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
copy_ack_struct(harq_ack_dest, current_harq_ack);
copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
copy_ack_struct(harq_ack_dest1, current_harq_ack);
*/
if (nr_tti_rx==9) {
if (frame_rx % 10 == 0) {
if ((ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]) != 0)
ue->dlsch_fer[eNB_id] = (100*(ue->dlsch_errors[eNB_id] - ue->dlsch_errors_last[eNB_id]))/(ue->dlsch_received[eNB_id] - ue->dlsch_received_last[eNB_id]);
ue->dlsch_errors_last[eNB_id] = ue->dlsch_errors[eNB_id];
ue->dlsch_received_last[eNB_id] = ue->dlsch_received[eNB_id];
}
ue->bitrate[eNB_id] = (ue->total_TBS[eNB_id] - ue->total_TBS_last[eNB_id])*100;
ue->total_TBS_last[eNB_id] = ue->total_TBS[eNB_id];
LOG_D(PHY,"[UE %d] Calculating bitrate Frame %d: total_TBS = %d, total_TBS_last = %d, bitrate %f kbits\n",
ue->Mod_id,frame_rx,ue->total_TBS[eNB_id],
ue->total_TBS_last[eNB_id],(float) ue->bitrate[eNB_id]/1000.0);
#if UE_AUTOTEST_TRACE
if ((frame_rx % 100 == 0)) {
LOG_I(PHY,"[UE %d] AUTOTEST Metric : UE_DLSCH_BITRATE = %5.2f kbps (frame = %d) \n", ue->Mod_id, (float) ue->bitrate[eNB_id]/1000.0, frame_rx);
}
#endif
}
#ifdef EMOS
phy_procedures_emos_UE_RX(ue,slot,eNB_id);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
printf("------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#else
LOG_D(PHY, "------FULL RX PROC [AbsSFN %d.%d]: %5.2f ------\n",frame_rx,nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
return (0);
}
#endif
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
......@@ -4939,7 +4312,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
uint16_t nb_symb_sch = 8; // to be updated by higher layer
uint16_t nb_symb_sch = 9; // to be updated by higher layer
uint8_t nb_symb_pdcch = pdcch_vars->coreset[0].duration;
uint8_t ssb_periodicity = ue->ssb_periodicity; // initialized to 20ms in nr_init_ue and never changed for now
uint8_t ssb_frame_periodicity;
......@@ -4947,8 +4320,10 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
/*
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
*/
#ifdef NR_PDCCH_SCHED
nr_gold_pdcch(ue,0, 2);
......@@ -4999,7 +4374,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
#endif //NR_PDCCH_SCHED
if (nr_tti_rx==1){
if (dci_cnt > 0){
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
//to update from pdsch config
nr_gold_pdsch(ue,nb_symb_pdcch,0, 1);
......@@ -5017,7 +4392,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
}
//set active for testing, to be removed
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 1;
}
else
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active = 0;
......@@ -5037,6 +4412,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
nb_symb_pdcch, //ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
(nb_symb_sch+nb_symb_pdcch-1)); //ue->frame_parms.symbols_per_tti>>1,
/*
write_output("rxF_ext.m","rxFe",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_ext[0][0],ue->frame_parms.N_RB_DL*12*14,1,1);
write_output("rxF_comp.m","rxFc",&ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->rxdataF_comp0[0][0],ue->frame_parms.N_RB_DL*12*14,1,1);
write_output("rxF_llr.m","rxFllr",ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr[0],(nb_symb_sch-1)*50*12+50*6,1,0);
*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_OUT);
}
......@@ -5118,28 +4499,11 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
/*nr_ue_pdsch_procedures(ue,
proc,
eNB_id,
PDSCH,
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
NULL,
1+(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
LOG_D(PHY," ------ end PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
LOG_D(PHY," ------ --> PDSCH Turbo Decoder slot 0/1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);*/
#if UE_TIMING_TRACE
stop_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
//#endif //slot 1
nr_ue_dlsch_procedures(ue,
proc,
eNB_id,
......@@ -5260,21 +4624,21 @@ start_meas(&ue->generic_stat);
}
// duplicate harq structure
/*
uint8_t current_harq_pid = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid;
NR_DL_UE_HARQ_t *current_harq_processes = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[next1_thread_id][eNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[next2_thread_id][eNB_id][0]->harq_processes[current_harq_pid];
*/
/*nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[next2_thread_id][eNB_id][0]->harq_ack[nr_tti_rx];
*/
copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
//copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
//copy_ack_struct(harq_ack_dest, current_harq_ack);
copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
//copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
//copy_ack_struct(harq_ack_dest1, current_harq_ack);
if (nr_tti_rx==9) {
......@@ -5329,185 +4693,6 @@ return (0);
}
#if 0
#if defined(Rel10) || defined(Rel14)
int phy_procedures_RN_UE_RX(uint8_t slot_rx, uint8_t next_slot, relaying_type_t r_type)
{
int do_proc =0; // do nothing by default
switch(r_type) {
case no_relay:
do_proc=no_relay; // perform the normal UE operation
break;
case multicast_relay:
if (slot_rx > 12)
do_proc = 0; // do nothing
else // SF#1, SF#2, SF3, SF#3, SF#4, SF#5, SF#6(do rx slot 12)
do_proc = multicast_relay ; // do PHY procedures UE RX
break;
default: // should'not be here
LOG_W(PHY,"Not supported relay type %d, do nothing \n", r_type);
do_proc= 0;
break;
}
return do_proc;
}
#endif
void phy_procedures_UE_lte(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type)
{
#if defined(ENABLE_ITTI)
MessageDef *msg_p;
const char *msg_name;
instance_t instance;
unsigned int Mod_id;
int result;
#endif
int frame_rx = proc->frame_rx;
int frame_tx = proc->frame_tx;
int nr_tti_rx = proc->nr_tti_rx;
int nr_tti_tx = proc->nr_tti_tx;
//#ifdef UE_NR_PHY_DEMO
// int nr_tti_rx = proc->nr_tti_rx;
// int nr_tti_tx = proc->nr_tti_tx;
//#endif
#undef DEBUG_PHY_PROC
UE_L2_STATE_t ret;
int slot;
if (ue->mac_enabled == 0) {
ue->UE_mode[eNB_id]=PUSCH;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,1);
#if UE_TIMING_TRACE
start_meas(&ue->phy_proc[ue->current_thread_id[nr_tti_rx]]);
#endif
#if defined(ENABLE_ITTI)
do {
// Checks if a message has been sent to PHY sub-task
itti_poll_msg (TASK_PHY_UE, &msg_p);
if (msg_p != NULL) {
msg_name = ITTI_MSG_NAME (msg_p);
instance = ITTI_MSG_INSTANCE (msg_p);
Mod_id = instance - NB_eNB_INST;
switch (ITTI_MSG_ID(msg_p)) {
case PHY_FIND_CELL_REQ:
LOG_I(PHY, "[UE %d] Received %s\n", Mod_id, msg_name);
/* TODO process the message */
break;
default:
LOG_E(PHY, "[UE %d] Received unexpected message %s\n", Mod_id, msg_name);
break;
}
result = itti_free (ITTI_MSG_ORIGIN_ID(msg_p), msg_p);
AssertFatal (result == EXIT_SUCCESS, "Failed to free memory (%d)!\n", result);
}
} while(msg_p != NULL);
#endif
for (slot=0;slot<2;slot++) {
if ((nr_subframe_select(&ue->frame_parms,nr_tti_tx)==SF_UL)||
(ue->frame_parms.frame_type == FDD)) {
phy_procedures_UE_TX(ue,proc,eNB_id,abstraction_flag,mode,r_type);
}
if ((nr_subframe_select(&ue->frame_parms,nr_tti_rx)==SF_DL) ||
(ue->frame_parms.frame_type == FDD)) {
#if defined(Rel10) || defined(Rel14)
if (phy_procedures_RN_UE_RX(nr_tti_rx, nr_tti_tx, r_type) != 0 )
#endif
phy_procedures_UE_RX(ue,proc,eNB_id,abstraction_flag,do_pdcch_flag,mode,r_type);
}
if ((nr_subframe_select(&ue->frame_parms,nr_tti_tx)==SF_S) &&
(slot==1)) {
phy_procedures_UE_S_TX(ue,eNB_id,abstraction_flag,r_type);
}
if ((nr_subframe_select(&ue->frame_parms,nr_tti_rx)==SF_S) &&
(slot==0)) {
#if defined(Rel10) || defined(Rel14)
if (phy_procedures_RN_UE_RX(nr_tti_rx, nr_tti_tx, r_type) != 0 )
#endif
phy_procedures_UE_RX(ue,proc,eNB_id,abstraction_flag,do_pdcch_flag,mode,r_type);
}
if (ue->mac_enabled==1) {
if (slot==0) {
//#ifdef UE_NR_PHY_DEMO
ret = mac_xface->ue_scheduler(ue->Mod_id,
frame_rx,
proc->subframe_rx,
nr_tti_rx%(ue->frame_parms.ttis_per_subframe),
frame_tx,
proc->subframe_tx,
nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
nr_subframe_select(&ue->frame_parms,nr_tti_tx),
eNB_id,
0/*FIXME CC_id*/);
//#else
/* ret = mac_xface->ue_scheduler(ue->Mod_id,
frame_rx,
nr_tti_rx,
frame_tx,
nr_tti_tx,
nr_subframe_select(&ue->frame_parms,nr_tti_tx),
eNB_id,*/
// 0/*FIXME CC_id*/);
//#endif
if (ret == CONNECTION_LOST) {
LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d RRC Connection lost, returning to PRACH\n",ue->Mod_id,
frame_rx,nr_tti_tx);
ue->UE_mode[eNB_id] = PRACH;
// mac_xface->macphy_exit("Connection lost");
} else if (ret == PHY_RESYNCH) {
LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d RRC Connection lost, trying to resynch\n",
ue->Mod_id,
frame_rx,nr_tti_tx);
ue->UE_mode[eNB_id] = RESYNCH;
// mac_xface->macphy_exit("Connection lost");
} else if (ret == PHY_HO_PRACH) {
LOG_I(PHY,"[UE %d] Frame %d, nr_tti_rx %d, return to PRACH and perform a contention-free access\n",
ue->Mod_id,frame_rx,nr_tti_tx);
ue->UE_mode[eNB_id] = PRACH;
}
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,0);
#if UE_TIMING_TRACE
stop_meas(&ue->phy_proc[ue->current_thread_id[nr_tti_rx]]);
#endif
} // slot
}
#endif
uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id)
......
......@@ -174,7 +174,7 @@ int main(int argc, char **argv) {
//logInit();
randominit(0);
while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:")) != -1) {
while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:")) != -1) {
switch (c) {
case 'f':
write_output_file = 1;
......@@ -315,6 +315,10 @@ int main(int argc, char **argv) {
break;
case 'L':
loglvl = atoi(optarg);
break;
case 'm':
Imcs = atoi(optarg);
break;
......
......@@ -684,7 +684,8 @@ int main(int argc, char **argv)
LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1],frame_length_complex_samples,1,1);
}
if (UE->is_synchronized == 0) {
ret = nr_initial_sync(UE, normal_txrx);
UE_nr_rxtx_proc_t proc={0};
ret = nr_initial_sync(&proc, UE, normal_txrx);
printf("nr_initial_sync1 returns %d\n",ret);
if (ret<0) n_errors++;
}
......
......@@ -600,7 +600,8 @@ int main(int argc, char **argv)
}
if (UE->is_synchronized == 0) {
ret = nr_initial_sync(UE, normal_txrx);
UE_nr_rxtx_proc_t proc={0};
ret = nr_initial_sync(&proc, UE, normal_txrx);
printf("nr_initial_sync1 returns %d\n",ret);
if (ret<0) n_errors++;
}
......@@ -621,9 +622,10 @@ int main(int argc, char **argv)
nr_pbch_channel_estimation(UE,0,0,i,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
}
UE_nr_rxtx_proc_t proc={0};
ret = nr_rx_pbch(UE,
0,
&proc,
UE->pbch_vars[0],
frame_parms,
0,
......
......@@ -35,6 +35,7 @@
#include "mac_defs.h"
#include "mac.h"
#include <openair1/PHY/defs_nr_UE.h>
/**\brief decode mib pdu in NR_UE, from if_module ul_ind with P7 tx_ind message
\param module_id module id
......@@ -46,6 +47,7 @@
\param pdu_length length of pdu
\param cell_id cell id */
int8_t nr_ue_decode_mib(
UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
......
......@@ -193,6 +193,7 @@ int8_t nr_ue_process_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index,
}
int8_t nr_ue_decode_mib(
UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
......@@ -594,6 +595,7 @@ int8_t nr_ue_decode_mib(
if(mac->if_module != NULL && mac->if_module->phy_config_request != NULL){
mac->if_module->phy_config_request(&mac->phy_config);
}
proc->decoded_frame_rx=frame;
//}
return 0;
}
......
......@@ -42,9 +42,10 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
return nr_ue_decode_mib( module_id,
return nr_ue_decode_mib( proc,
module_id,
cc_id,
gNB_index,
additional_bits,
......@@ -197,7 +198,8 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
ret_mask |= (handle_bcch_bch( dl_info->proc,
dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
......
......@@ -34,6 +34,7 @@
#define __NR_IF_MODULE_H__
#include "platform_types.h"
#include <openair1/PHY/thread_NR_UE.h>
#include "fapi_nr_ue_interface.h"
......@@ -64,6 +65,7 @@ typedef struct {
frame_t frame;
/// slot
int slot;
UE_nr_rxtx_proc_t * proc;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
......@@ -209,7 +211,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq);
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file lte-ue.c
* \brief threads and support functions for real-time LTE UE target
* \author R. Knopp, F. Kaltenberger, Navid Nikaein
* \date 2015
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr, navid.nikaein@eurecom.fr
* \note
* \warning
*/
#include "nr-uesoftmodem.h"
#include "rt_wrapper.h"
#include "LAYER2/NR_MAC_UE/mac.h"
//#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface_extern.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include "fapi_nr_ue_l1.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h"
//#ifndef NO_RAT_NR
#include "SCHED_NR/phy_frame_config_nr.h"
//#endif
#include "SCHED_NR_UE/defs.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "T.h"
#ifdef XFORMS
#include "PHY/TOOLS/nr_phy_scope.h"
extern char do_forms;
#endif
extern double cpuf;
//static nfapi_nr_config_request_t config_t;
//static nfapi_nr_config_request_t* config =&config_t;
/*
* NR SLOT PROCESSING SEQUENCE
*
* Processing occurs with following steps for connected mode:
*
* - Rx samples for a slot are received,
* - PDCCH processing (including DCI extraction for downlink and uplink),
* - PDSCH processing (including transport blocks decoding),
* - PUCCH/PUSCH (transmission of acknowledgements, CSI, ... or data).
*
* Time between reception of the slot and related transmission depends on UE processing performance.
* It is defined by the value NR_UE_CAPABILITY_SLOT_RX_TO_TX.
*
* In NR, network gives the duration between Rx slot and Tx slot in the DCI:
* - for reception of a PDSCH and its associated acknowledgment slot (with a PUCCH or a PUSCH),
* - for reception of an uplink grant and its associated PUSCH slot.
*
* So duration between reception and it associated transmission depends on its transmission slot given in the DCI.
* NR_UE_CAPABILITY_SLOT_RX_TO_TX means the minimum duration but higher duration can be given by the network because UE can support it.
*
* Slot k
* -------+------------+--------
* Frame | Tx samples |
* Subframe | buffer |
* Slot n -------+------------+--------
* ------ +------------+-------- |
* | Rx samples | |
* | buffer | |
* -------+------------+-------- |
* | |
* V |
* +------------+ |
* | PDCCH | |
* | processing | |
* +------------+ |
* | | |
* | v |
* | +------------+ |
* | | PDSCH | |
* | | processing | decoding result |
* | +------------+ -> ACK/NACK of PDSCH |
* | | |
* | v |
* | +-------------+------------+ |
* | | PUCCH/PUSCH | Tx samples | |
* | | processing | transfer | |
* | +-------------+------------+ |
* | |
* |/___________________________________________________________\|
* \ duration between reception and associated transmission /
*
* Remark: processing is done slot by slot, it can be distribute on different threads which are executed in parallel.
* This is an architecture optimization in order to cope with real time constraints.
* By example, for LTE, subframe processing is spread over 4 different threads.
*
*/
#ifndef NO_RAT_NR
#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
#else
#define DURATION_RX_TO_TX (4) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define FRAME_PERIOD 100000000ULL
#define DAQ_PERIOD 66667ULL
#define FIFO_PRIORITY 40
typedef enum {
pss=0,
pbch=1,
si=2
} sync_mode_t;
void init_UE_threads(PHY_VARS_NR_UE *UE);
void *UE_thread(void *arg);
void init_UE(int nb_inst);
int32_t **rxdata;
int32_t **txdata;
#define SAIF_ENABLED
#ifdef SAIF_ENABLED
uint64_t g_ue_rx_thread_busy = 0;
#endif
PHY_VARS_NR_UE *init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms,
uint8_t UE_id,
uint8_t abstraction_flag)
{
PHY_VARS_NR_UE *ue;
if (frame_parms!=(NR_DL_FRAME_PARMS *)NULL) { // if we want to give initial frame parms, allocate the PHY_VARS_UE structure and put them in
ue = (PHY_VARS_NR_UE *)malloc(sizeof(PHY_VARS_NR_UE));
memset(ue,0,sizeof(PHY_VARS_NR_UE));
memcpy(&(ue->frame_parms), frame_parms, sizeof(NR_DL_FRAME_PARMS));
} else ue = PHY_vars_UE_g[UE_id][0];
ue->Mod_id = UE_id;
ue->mac_enabled = 1;
// initialize all signal buffers
init_nr_ue_signal(ue,1,abstraction_flag);
// intialize transport
init_nr_ue_transport(ue,abstraction_flag);
return(ue);
}
void init_thread(int sched_runtime, int sched_deadline, int sched_fifo, cpu_set_t *cpuset, char *name) {
#ifdef DEADLINE_SCHEDULER
if (sched_runtime!=0) {
struct sched_attr attr= {0};
attr.size = sizeof(attr);
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = sched_runtime;
attr.sched_deadline = sched_deadline;
attr.sched_period = 0;
AssertFatal(sched_setattr(0, &attr, 0) == 0,
"[SCHED] %s thread: sched_setattr failed %s \n", name, strerror(errno));
LOG_I(HW,"[SCHED][eNB] %s deadline thread %lu started on CPU %d\n",
name, (unsigned long)gettid(), sched_getcpu());
}
#else
if (CPU_COUNT(cpuset) > 0)
AssertFatal( 0 == pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), cpuset), "");
struct sched_param sp;
sp.sched_priority = sched_fifo;
AssertFatal(pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp)==0,
"Can't set thread priority, Are you root?\n");
/* Check the actual affinity mask assigned to the thread */
cpu_set_t *cset=CPU_ALLOC(CPU_SETSIZE);
if (0 == pthread_getaffinity_np(pthread_self(), CPU_ALLOC_SIZE(CPU_SETSIZE), cset)) {
char txt[512]= {0};
for (int j = 0; j < CPU_SETSIZE; j++)
if (CPU_ISSET(j, cset))
sprintf(txt+strlen(txt), " %d ", j);
printf("CPU Affinity of thread %s is %s\n", name, txt);
}
CPU_FREE(cset);
#endif
// Lock memory from swapping. This is a process wide call (not constraint to this thread).
mlockall(MCL_CURRENT | MCL_FUTURE);
pthread_setname_np( pthread_self(), name );
// LTS: this sync stuff should be wrong
printf("waiting for sync (%s)\n",name);
pthread_mutex_lock(&sync_mutex);
printf("Locked sync_mutex, waiting (%s)\n",name);
while (sync_var<0)
pthread_cond_wait(&sync_cond, &sync_mutex);
pthread_mutex_unlock(&sync_mutex);
printf("started %s as PID: %ld\n",name, gettid());
}
void init_UE(int nb_inst) {
int inst;
NR_UE_MAC_INST_t *mac_inst;
for (inst=0; inst < nb_inst; inst++) {
// UE->rfdevice.type = NONE_DEV;
//PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
LOG_I(PHY,"Initializing memory for UE instance %d (%p)\n",inst,PHY_vars_UE_g[inst]);
PHY_vars_UE_g[inst][0] = init_nr_ue_vars(NULL,inst,0);
PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
AssertFatal((UE->if_inst = nr_ue_if_module_init(inst)) != NULL, "can not initial IF module\n");
nr_l3_init_ue();
nr_l2_init_ue();
mac_inst = get_mac_inst(0);
mac_inst->if_module = UE->if_inst;
UE->if_inst->scheduled_response = nr_ue_scheduled_response;
UE->if_inst->phy_config_request = nr_ue_phy_config_request;
LOG_I(PHY,"Intializing UE Threads for instance %d (%p,%p)...\n",inst,PHY_vars_UE_g[inst],PHY_vars_UE_g[inst][0]);
//init_UE_threads(inst);
//UE = PHY_vars_UE_g[inst][0];
AssertFatal(0 == pthread_create(&UE->proc.pthread_ue,
&UE->proc.attr_ue,
UE_thread,
(void *)UE), "");
}
printf("UE threads created by %ld\n", gettid());
#if 0
#if defined(ENABLE_USE_MME)
extern volatile int start_UE;
while (start_UE == 0) {
sleep(1);
}
#endif
#endif
}
/*!
* \brief This is the UE synchronize thread.
* It performs band scanning and synchonization.
* \param arg is a pointer to a \ref PHY_VARS_NR_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
static void *UE_thread_synch(void *arg) {
static int __thread UE_thread_synch_retval;
int i, hw_slot_offset;
PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
int current_band = 0;
int current_offset = 0;
lte_frame_type_t current_type;
sync_mode_t sync_mode = pbch;
int CC_id = UE->CC_id;
int freq_offset=0;
char threadname[128];
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( threads.sync != -1 )
CPU_SET(threads.sync, &cpuset);
// this thread priority must be lower that the main acquisition thread
sprintf(threadname, "sync UE %d", UE->Mod_id);
init_thread(100000, 500000, FIFO_PRIORITY-1, &cpuset, threadname);
UE->is_synchronized = 0;
printf("UE_scan %d\n",UE->UE_scan);
if (UE->UE_scan == 0) {
get_band(downlink_frequency[CC_id][0], &UE->frame_parms.eutra_band, &uplink_frequency_offset[CC_id][0], &UE->frame_parms.frame_type);
LOG_I( PHY, "[SCHED][UE] Check absolute frequency DL %"PRIu32", UL %"PRIu32" (oai_exit %d, rx_num_channels %d)\n",
downlink_frequency[0][0], downlink_frequency[0][0]+uplink_frequency_offset[0][0],
oai_exit, openair0_cfg[0].rx_num_channels);
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
openair0_cfg[UE->rf_map.card].autocal[UE->rf_map.chain+i] = 1;
if (uplink_frequency_offset[CC_id][i] != 0) //
openair0_cfg[UE->rf_map.card].duplex_mode = duplex_mode_FDD;
else //FDD
openair0_cfg[UE->rf_map.card].duplex_mode = duplex_mode_TDD;
}
sync_mode = pbch;
} else {
current_band=0;
LOG_E(PHY,"Fixme!\n");
/*
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
downlink_frequency[UE->rf_map.card][UE->rf_map.chain+i] = bands_to_scan.band_info[CC_id].dl_min;
uplink_frequency_offset[UE->rf_map.card][UE->rf_map.chain+i] =
bands_to_scan.band_info[CC_id].ul_min-bands_to_scan.band_info[CC_id].dl_min;
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;
}
*/
}
// AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
while (oai_exit==0) {
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
while (UE->proc.instance_cnt_synch < 0)
// the thread waits here most of the time
pthread_cond_wait( &UE->proc.cond_synch, &UE->proc.mutex_synch );
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
switch (sync_mode) {
/*
case pss:
LOG_I(PHY,"[SCHED][UE] Scanning band %d (%d), freq %u\n",bands_to_scan.band_info[current_band].band, current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
//lte_sync_timefreq(UE,current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
current_offset += 20000000; // increase by 20 MHz
if (current_offset > bands_to_scan.band_info[current_band].dl_max-bands_to_scan.band_info[current_band].dl_min) {
current_band++;
current_offset=0;
}
if (current_band==bands_to_scan.nbands) {
current_band=0;
oai_exit=1;
}
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
downlink_frequency[UE->rf_map.card][UE->rf_map.chain+i] = bands_to_scan.band_info[current_band].dl_min+current_offset;
uplink_frequency_offset[UE->rf_map.card][UE->rf_map.chain+i] = bands_to_scan.band_info[current_band].ul_min-bands_to_scan.band_info[0].dl_min + current_offset;
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i];
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i];
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;
if (UE->UE_scan_carrier) {
openair0_cfg[UE->rf_map.card].autocal[UE->rf_map.chain+i] = 1;
}
}
break;
*/
case pbch:
#if DISABLE_LOG_X
printf("[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode);
#else
LOG_I(PHY, "[UE thread Synch] Running Initial Synch (mode %d)\n",UE->mode);
#endif
UE->trashed_frames = 0;
if (nr_initial_sync( UE, UE->mode ) == 0) {
//write_output("txdata_sym.m", "txdata_sym", UE->common_vars.rxdata[0], (10*UE->frame_parms.samples_per_slot), 1, 1);
freq_offset = UE->common_vars.freq_offset; // frequency offset computed with pss in initial sync
hw_slot_offset = (UE->rx_offset<<1) / UE->frame_parms.samples_per_slot;
printf("Got synch: hw_slot_offset %d, carrier off %d Hz, rxgain %d (DL %u, UL %u), UE_scan_carrier %d\n",
hw_slot_offset,
freq_offset,
UE->rx_total_gain_dB,
downlink_frequency[0][0]+freq_offset,
downlink_frequency[0][0]+uplink_frequency_offset[0][0]+freq_offset,
UE->UE_scan_carrier );
// rerun with new cell parameters and frequency-offset
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
if (freq_offset >= 0)
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] += abs(freq_offset);
else
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] -= abs(freq_offset);
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] =
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i]+uplink_frequency_offset[CC_id][i];
downlink_frequency[CC_id][i] = openair0_cfg[CC_id].rx_freq[i];
}
// reconfigure for potentially different bandwidth
switch(UE->frame_parms.N_RB_DL) {
case 6:
openair0_cfg[UE->rf_map.card].sample_rate =1.92e6;
openair0_cfg[UE->rf_map.card].rx_bw =.96e6;
openair0_cfg[UE->rf_map.card].tx_bw =.96e6;
// openair0_cfg[0].rx_gain[0] -= 12;
break;
case 25:
openair0_cfg[UE->rf_map.card].sample_rate =7.68e6;
openair0_cfg[UE->rf_map.card].rx_bw =2.5e6;
openair0_cfg[UE->rf_map.card].tx_bw =2.5e6;
// openair0_cfg[0].rx_gain[0] -= 6;
break;
case 50:
openair0_cfg[UE->rf_map.card].sample_rate =15.36e6;
openair0_cfg[UE->rf_map.card].rx_bw =5.0e6;
openair0_cfg[UE->rf_map.card].tx_bw =5.0e6;
// openair0_cfg[0].rx_gain[0] -= 3;
break;
case 100:
openair0_cfg[UE->rf_map.card].sample_rate=30.72e6;
openair0_cfg[UE->rf_map.card].rx_bw=10.0e6;
openair0_cfg[UE->rf_map.card].tx_bw=10.0e6;
// openair0_cfg[0].rx_gain[0] -= 0;
break;
}
if (UE->mode != loop_through_memory) {
UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
//UE->rfdevice.trx_set_gains_func(&openair0,&openair0_cfg[0]);
//UE->rfdevice.trx_stop_func(&UE->rfdevice);
// sleep(1);
//nr_init_frame_parms_ue(&UE->frame_parms);
/*if (UE->rfdevice.trx_start_func(&UE->rfdevice) != 0 ) {
LOG_E(HW,"Could not start the device\n");
oai_exit=1;
}*/
}
if (UE->UE_scan_carrier == 1) {
UE->UE_scan_carrier = 0;
} else {
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
UE->is_synchronized = 1;
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
if( UE->mode == rx_dump_frame ) {
FILE *fd;
if ((UE->proc.proc_rxtx[0].frame_rx&1) == 0) { // this guarantees SIB1 is present
if ((fd = fopen("rxsig_frame0.dat","w")) != NULL) {
fwrite((void *)&UE->common_vars.rxdata[0][0],
sizeof(int32_t),
10*UE->frame_parms.samples_per_subframe,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
} else {
LOG_E(PHY,"Cannot open file for writing\n");
exit(0);
}
} else {
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
UE->is_synchronized = 0;
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
}
}
}
} else {
// initial sync failed
// calculate new offset and try again
if (UE->UE_scan_carrier == 1) {
if (freq_offset >= 0)
freq_offset += 100;
freq_offset *= -1;
if (abs(freq_offset) > 7500) {
LOG_I( PHY, "[initial_sync] No cell synchronization found, abandoning\n" );
FILE *fd;
if ((fd = fopen("rxsig_frame0.dat","w"))!=NULL) {
fwrite((void *)&UE->common_vars.rxdata[0][0],
sizeof(int32_t),
10*UE->frame_parms.samples_per_subframe,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
}
//mac_xface->macphy_exit("No cell synchronization found, abandoning"); new mac
return &UE_thread_synch_retval; // not reached
}
}
#if DISABLE_LOG_X
printf("[initial_sync] trying carrier off %d Hz, rxgain %d (DL %u, UL %u)\n",
freq_offset,
UE->rx_total_gain_dB,
downlink_frequency[0][0]+freq_offset,
downlink_frequency[0][0]+uplink_frequency_offset[0][0]+freq_offset );
#else
LOG_I(PHY, "[initial_sync] trying carrier off %d Hz, rxgain %d (DL %u, UL %u)\n",
freq_offset,
UE->rx_total_gain_dB,
downlink_frequency[0][0]+freq_offset,
downlink_frequency[0][0]+uplink_frequency_offset[0][0]+freq_offset );
#endif
for (i=0; i<openair0_cfg[UE->rf_map.card].rx_num_channels; i++) {
openair0_cfg[UE->rf_map.card].rx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i]+freq_offset;
openair0_cfg[UE->rf_map.card].tx_freq[UE->rf_map.chain+i] = downlink_frequency[CC_id][i]+uplink_frequency_offset[CC_id][i]+freq_offset;
openair0_cfg[UE->rf_map.card].rx_gain[UE->rf_map.chain+i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
if (UE->UE_scan_carrier==1)
openair0_cfg[UE->rf_map.card].autocal[UE->rf_map.chain+i] = 1;
}
if (UE->mode != loop_through_memory)
UE->rfdevice.trx_set_freq_func(&UE->rfdevice,&openair0_cfg[0],0);
}// initial_sync=0
break;
case si:
default:
break;
}
#if 0 //defined XFORMS
if (do_forms) {
extern FD_lte_phy_scope_ue *form_ue[NUMBER_OF_UE_MAX];
phy_scope_UE(form_ue[0],
PHY_vars_UE_g[0][0],
0,0,1);
}
#endif
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
// indicate readiness
UE->proc.instance_cnt_synch--;
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_SYNCH, 0 );
} // while !oai_exit
return &UE_thread_synch_retval;
}
void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
// Process Rx data for one sub-frame
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
// call L2 for DL_CONFIG (DCI)
UE->dcireq.module_id = UE->Mod_id;
UE->dcireq.gNB_index = 0;
UE->dcireq.cc_id = 0;
UE->dcireq.frame = proc->frame_rx;
UE->dcireq.slot = proc->nr_tti_rx;
nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
UE_mac->scheduled_response.slot = proc->nr_tti_rx;
nr_ue_scheduled_response(&UE_mac->scheduled_response);
//write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
printf("Processing slot %d\n",proc->nr_tti_rx);
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
phy_procedures_nrUE_RX( UE, proc, 0, 1, UE->mode, UE_mac->phy_config.config_req.pbch_config);
// printf(">>> nr_ue_pdcch_procedures ended\n");
#endif
}
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
}
/*!
* \brief This is the UE thread for RX subframe n and TX subframe n+4.
* This thread performs the phy_procedures_UE_RX() on every received slot.
* then, if TX is enabled it performs TX for n+4.
* \param arg is a pointer to a \ref PHY_VARS_NR_UE structure.
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
static void *UE_thread_rxn_txnp4(void *arg) {
struct nr_rxtx_thread_data *rtd = arg;
UE_nr_rxtx_proc_t *proc = rtd->proc;
PHY_VARS_NR_UE *UE = rtd->UE;
//proc->counter_decoder = 0;
proc->instance_cnt_rxtx=-1;
proc->subframe_rx=proc->sub_frame_start;
proc->dci_err_cnt=0;
char threadname[256];
sprintf(threadname,"UE_%d_proc_%d", UE->Mod_id, proc->sub_frame_start);
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
char timing_proc_name[256];
sprintf(timing_proc_name,"Delay to process sub-frame proc %d",proc->sub_frame_start);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 0 && threads.one != -1 )
CPU_SET(threads.one, &cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 1 && threads.two != -1 )
CPU_SET(threads.two, &cpuset);
if ( (proc->sub_frame_start+1)%RX_NB_TH == 2 && threads.three != -1 )
CPU_SET(threads.three, &cpuset);
//CPU_SET(threads.three, &cpuset);
init_thread(900000,1000000, FIFO_PRIORITY-1, &cpuset,
threadname);
while (!oai_exit) {
AssertFatal( 0 == pthread_mutex_lock(&proc->mutex_rxtx), "[SCHED][UE] error locking mutex for UE RXTX\n" );
while (proc->instance_cnt_rxtx < 0) {
// most of the time, the thread is waiting here
pthread_cond_wait( &proc->cond_rxtx, &proc->mutex_rxtx );
}
AssertFatal ( 0== pthread_mutex_unlock(&proc->mutex_rxtx), "[SCHED][UE] error unlocking mutex for UE RXn_TXnp4\n" );
processSlotRX(UE, proc);
//printf(">>> mac ended\n");
// Prepare the future Tx data
#if 0
#ifndef NO_RAT_NR
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT)
#else
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
(UE->frame_parms.frame_type == FDD) )
#endif
if (UE->mode != loop_through_memory)
phy_procedures_nrUE_TX(UE,proc,0,0,UE->mode,no_relay);
//phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
#endif
#if 0
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_S) &&
(UE->frame_parms.frame_type == TDD))
if (UE->mode != loop_through_memory)
//phy_procedures_UE_S_TX(UE,0,0,no_relay);
updateTimes(current, &t3, 10000, timing_proc_name);
#endif
AssertFatal( 0 == pthread_mutex_lock(&proc->mutex_rxtx), "[SCHED][UE] error locking mutex for UE RXTX\n" );
proc->instance_cnt_rxtx--;
#if BASIC_SIMULATOR
if (pthread_cond_signal(&proc->cond_rxtx) != 0) abort();
#endif
AssertFatal (0 == pthread_mutex_unlock(&proc->mutex_rxtx), "[SCHED][UE] error unlocking mutex for UE RXTX\n" );
}
// thread finished
free(arg);
return NULL;
}
void readFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
void *rxp[NB_ANTENNAS_RX];
for(int x=0; x<10; x++) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = ((void *)&UE->common_vars.rxdata[i][0]) + 4*x*UE->frame_parms.samples_per_subframe;
AssertFatal( UE->frame_parms.samples_per_subframe ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
timestamp,
rxp,
UE->frame_parms.samples_per_subframe,
UE->frame_parms.nb_antennas_rx), "readFrame error");
}
}
void trashFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
void *dummy_rx[UE->frame_parms.nb_antennas_rx];
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
dummy_rx[i]=malloc16(UE->frame_parms.samples_per_subframe*4);
for (int sf=0; sf<NR_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++) {
//printf("Reading dummy sf %d\n",sf);
AssertFatal( UE->frame_parms.samples_per_subframe ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
timestamp,
dummy_rx,
UE->frame_parms.samples_per_subframe,
UE->frame_parms.nb_antennas_rx), "trashFrame error");
//usleep(500); // this sleep improves in the case of simulated RF and doesn't harm with true radio
}
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
free(dummy_rx[i]);
}
void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
if (UE->no_timing_correction==0) {
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
for ( int size=UE->rx_offset ; size > 0 ; size -= UE->frame_parms.samples_per_subframe ) {
int unitTransfer=size>UE->frame_parms.samples_per_subframe ? UE->frame_parms.samples_per_subframe : size ;
AssertFatal(unitTransfer ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
timestamp,
(void **)UE->common_vars.rxdata,
unitTransfer,
UE->frame_parms.nb_antennas_rx),"syncInFrame error");
}
}
}
int computeSamplesShift(PHY_VARS_NR_UE *UE) {
if ( getenv("RFSIMULATOR") != 0) {
LOG_E(PHY,"SET rx_offset %d \n",UE->rx_offset);
//UE->rx_offset_diff=0;
return 0;
}
// compute TO compensation that should be applied for this frame
if ( UE->rx_offset < 5*UE->frame_parms.samples_per_slot &&
UE->rx_offset > 0 )
return -1 ;
if ( UE->rx_offset > 5*UE->frame_parms.samples_per_slot &&
UE->rx_offset < 10*UE->frame_parms.samples_per_slot )
return 1;
return 0;
}
/*!
* \brief This is the main UE thread.
* This thread controls the other three UE threads:
* - UE_thread_rxn_txnp4 (even subframes)
* - UE_thread_rxn_txnp4 (odd subframes)
* - UE_thread_synch
* \param arg unused
* \returns a pointer to an int. The storage is not on the heap and must not be freed.
*/
void *UE_thread(void *arg) {
PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
// int tx_enabled = 0;
openair0_timestamp timestamp;
void *rxp[NB_ANTENNAS_RX], *txp[NB_ANTENNAS_TX];
int start_rx_stream = 0;
int i;
char threadname[128];
int th_id;
const uint16_t table_sf_slot[20] = {0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9};
for (int i=0; i< RX_NB_TH_MAX; i++ )
UE->proc.proc_rxtx[i].counter_decoder = 0;
static uint8_t thread_idx = 0;
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
if ( threads.main != -1 )
CPU_SET(threads.main, &cpuset);
sprintf(threadname, "Main UE %d", UE->Mod_id);
init_thread(100000, 500000, FIFO_PRIORITY, &cpuset,threadname);
if ((oaisim_flag == 0) && (UE->mode !=loop_through_memory))
AssertFatal(0== openair0_device_load(&(UE->rfdevice), &openair0_cfg[0]), "");
UE->rfdevice.host_type = RAU_HOST;
init_UE_threads(UE);
#ifdef NAS_UE
//MessageDef *message_p;
//message_p = itti_alloc_new_message(TASK_NAS_UE, INITIALIZE_MESSAGE);
//itti_send_msg_to_task (TASK_NAS_UE, UE->Mod_id + NB_eNB_INST, message_p);
#endif
int nb_slot_frame = 10*UE->frame_parms.slots_per_subframe;
int slot_nr=-1;
//int cumulated_shift=0;
if ((oaisim_flag == 0) && (UE->mode != loop_through_memory))
AssertFatal(UE->rfdevice.trx_start_func(&UE->rfdevice) == 0, "Could not start the device\n");
while (!oai_exit) {
AssertFatal ( 0== pthread_mutex_lock(&UE->proc.mutex_synch), "");
int instance_cnt_synch = UE->proc.instance_cnt_synch;
int is_synchronized = UE->is_synchronized;
AssertFatal ( 0== pthread_mutex_unlock(&UE->proc.mutex_synch), "");
if (is_synchronized == 0) {
#if BASIC_SIMULATOR
while (!((instance_cnt_synch = UE->proc.instance_cnt_synch) < 0)) {
printf("ue sync not ready\n");
usleep(500*1000);
}
#endif
if (UE->mode != loop_through_memory) {
if (instance_cnt_synch < 0) { // we can invoke the synch
// grab 10 ms of signal and wakeup synch thread
readFrame(UE, &timestamp);
AssertFatal( 0 == pthread_mutex_lock(&UE->proc.mutex_synch), "");
AssertFatal( 0 == ++UE->proc.instance_cnt_synch, "[SCHED][UE] UE sync thread busy!!\n" );
AssertFatal( 0 == pthread_cond_signal(&UE->proc.cond_synch), "");
AssertFatal( 0 == pthread_mutex_unlock(&UE->proc.mutex_synch), "");
} else {
// grab 10 ms of signal into dummy buffer to wait result of sync detection
trashFrame(UE, &timestamp);
UE->trashed_frames++;
}
}
continue;
}
if (start_rx_stream==0) {
start_rx_stream=1;
if (UE->mode != loop_through_memory) {
syncInFrame(UE, &timestamp);
UE->rx_offset=0;
UE->time_sync_cell=0;
/*UE->proc.proc_rxtx[0].frame_rx++;
//UE->proc.proc_rxtx[1].frame_rx++;
for (th_id=1; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].frame_rx = UE->proc.proc_rxtx[0].frame_rx;
}*/
//printf("first stream frame rx %d\n",UE->proc.proc_rxtx[0].frame_rx);
// read in first symbol
AssertFatal (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0 ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void **)UE->common_vars.rxdata,
UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0,
UE->frame_parms.nb_antennas_rx),"first symbol read error");
//write_output("txdata_sym.m", "txdata_sym", UE->common_vars.rxdata[0], (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0), 1, 1);
//nr_slot_fep(UE,0, 0, 0, 1, NR_PDCCH_EST);
} //UE->mode != loop_through_memory
else
rt_sleep_ns(1000*1000);
continue;
}
thread_idx++;
thread_idx%=RX_NB_TH;
//printf("slot_nr %d nb slot frame %d\n",slot_nr, nb_slot_frame);
slot_nr++;
slot_nr %= nb_slot_frame;
UE_nr_rxtx_proc_t *proc = &UE->proc.proc_rxtx[thread_idx];
// update thread index for received subframe
UE->current_thread_id[slot_nr] = thread_idx;
#if BASIC_SIMULATOR
for (int t = 0; t < RX_NB_TH; t++) {
UE_rxtx_proc_t *proc = &UE->proc.proc_rxtx[t];
pthread_mutex_lock(&proc->mutex_rxtx);
while (proc->instance_cnt_rxtx >= 0) pthread_cond_wait( &proc->cond_rxtx, &proc->mutex_rxtx );
pthread_mutex_unlock(&proc->mutex_rxtx);
}
#endif
LOG_D(PHY,"Process slot %d thread Idx %d \n", slot_nr, UE->current_thread_id[slot_nr]);
proc->nr_tti_rx=slot_nr;
proc->subframe_rx=table_sf_slot[slot_nr];
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= slot_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > nb_slot_frame) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= nb_slot_frame;
}
if(slot_nr == 0) {
UE->proc.proc_rxtx[0].frame_rx++;
//UE->proc.proc_rxtx[1].frame_rx++;
for (th_id=1; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].frame_rx = UE->proc.proc_rxtx[0].frame_rx;
}
}
if (UE->mode != loop_through_memory) {
for (i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void *)&UE->common_vars.rxdata[i][UE->frame_parms.ofdm_symbol_size+
UE->frame_parms.nb_prefix_samples0+
slot_nr*UE->frame_parms.samples_per_slot];
for (i=0; i<UE->frame_parms.nb_antennas_tx; i++)
txp[i] = (void *)&UE->common_vars.txdata[i][((slot_nr+2)%NR_NUMBER_OF_SUBFRAMES_PER_FRAME)*UE->frame_parms.samples_per_slot];
int readBlockSize, writeBlockSize;
if (slot_nr<(nb_slot_frame - 1)) {
readBlockSize=UE->frame_parms.samples_per_slot;
writeBlockSize=UE->frame_parms.samples_per_slot;
} else {
UE->rx_offset_diff = computeSamplesShift(UE);
readBlockSize=UE->frame_parms.samples_per_slot -
UE->frame_parms.ofdm_symbol_size -
UE->frame_parms.nb_prefix_samples0 -
UE->rx_offset_diff;
writeBlockSize=UE->frame_parms.samples_per_slot -
UE->rx_offset_diff;
}
AssertFatal(readBlockSize ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
readBlockSize,
UE->frame_parms.nb_antennas_rx),"read error");
AssertFatal( writeBlockSize ==
UE->rfdevice.trx_write_func(&UE->rfdevice,
timestamp+
(2*UE->frame_parms.samples_per_slot) -
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0 -
openair0_cfg[0].tx_sample_advance,
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"write error");
if( slot_nr==(nb_slot_frame-1)) {
// read in first symbol of next frame and adjust for timing drift
int first_symbols=writeBlockSize-readBlockSize;
if ( first_symbols > 0 )
AssertFatal(first_symbols ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void **)UE->common_vars.rxdata,
first_symbols,
UE->frame_parms.nb_antennas_rx),"first symbols read error");
else
LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
}
pickTime(gotIQs);
// operate on thread sf mod 2
AssertFatal(pthread_mutex_lock(&proc->mutex_rxtx) ==0,"");
#ifdef SAIF_ENABLED
if (!(proc->frame_rx%4000)) {
printf("frame_rx=%d rx_thread_busy=%ld - rate %8.3f\n",
proc->frame_rx, g_ue_rx_thread_busy,
(float)g_ue_rx_thread_busy/(proc->frame_rx*10+1)*100.0);
fflush(stdout);
}
#endif
//UE->proc.proc_rxtx[0].gotIQs=readTime(gotIQs);
//UE->proc.proc_rxtx[1].gotIQs=readTime(gotIQs);
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].gotIQs=readTime(gotIQs);
}
proc->subframe_tx=proc->nr_tti_rx;
proc->timestamp_tx = timestamp+
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_slot)-
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
proc->instance_cnt_rxtx++;
LOG_D( PHY, "[SCHED][UE %d] UE RX instance_cnt_rxtx %d subframe %d !!\n", UE->Mod_id, proc->instance_cnt_rxtx,proc->subframe_rx);
if (proc->instance_cnt_rxtx != 0) {
#ifdef SAIF_ENABLED
g_ue_rx_thread_busy++;
#endif
if ( getenv("RFSIMULATOR") != NULL ) {
do {
AssertFatal (pthread_mutex_unlock(&proc->mutex_rxtx) == 0, "");
usleep(100);
AssertFatal (pthread_mutex_lock(&proc->mutex_rxtx) == 0, "");
} while ( proc->instance_cnt_rxtx >= 0);
} else
LOG_E( PHY, "[SCHED][UE %d] !! UE RX thread busy (IC %d)!!\n", UE->Mod_id, proc->instance_cnt_rxtx);
AssertFatal( proc->instance_cnt_rxtx <= 4, "[SCHED][UE %d] !!! UE instance_cnt_rxtx > 2 (IC %d) (Proc %d)!!",
UE->Mod_id, proc->instance_cnt_rxtx,
UE->current_thread_id[slot_nr]);
}
AssertFatal (pthread_cond_signal(&proc->cond_rxtx) ==0,"");
AssertFatal (pthread_mutex_unlock(&proc->mutex_rxtx) ==0,"");
// initRefTimes(t1);
// initStaticTime(lastTime);
// updateTimes(lastTime, &t1, 20000, "Delay between two IQ acquisitions (case 1)");
// pickStaticTime(lastTime);
} //UE->mode != loop_through_memory
else {
processSlotRX(UE,proc);
getchar();
} // else loop_through_memory
} // while !oai_exit
return NULL;
}
/*!
* \brief Initialize the UE theads.
* Creates the UE threads:
* - UE_thread_rxtx0
* - UE_thread_rxtx1
* - UE_thread_synch
* - UE_thread_fep_slot0
* - UE_thread_fep_slot1
* - UE_thread_dlsch_proc_slot0
* - UE_thread_dlsch_proc_slot1
* and the locking between them.
*/
void init_UE_threads(PHY_VARS_NR_UE *UE) {
struct nr_rxtx_thread_data *rtd;
pthread_attr_init (&UE->proc.attr_ue);
pthread_attr_setstacksize(&UE->proc.attr_ue,8192);//5*PTHREAD_STACK_MIN);
pthread_mutex_init(&UE->proc.mutex_synch,NULL);
pthread_cond_init(&UE->proc.cond_synch,NULL);
UE->proc.instance_cnt_synch = -1;
// the threads are not yet active, therefore access is allowed without locking
for (int i=0; i<RX_NB_TH; i++) {
rtd = calloc(1, sizeof(struct nr_rxtx_thread_data));
if (rtd == NULL) abort();
rtd->UE = UE;
rtd->proc = &UE->proc.proc_rxtx[i];
pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_rxtx,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[i].cond_rxtx,NULL);
UE->proc.proc_rxtx[i].sub_frame_start=i;
UE->proc.proc_rxtx[i].sub_frame_step=RX_NB_TH;
printf("Init_UE_threads rtd %d proc %d nb_threads %d i %d\n",rtd->proc->sub_frame_start, UE->proc.proc_rxtx[i].sub_frame_start,RX_NB_TH, i);
pthread_create(&UE->proc.proc_rxtx[i].pthread_rxtx, NULL, UE_thread_rxn_txnp4, rtd);
#ifdef UE_DLSCH_PARALLELISATION
pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_dlsch_td,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[i].cond_dlsch_td,NULL);
pthread_create(&UE->proc.proc_rxtx[i].pthread_dlsch_td,NULL,nr_dlsch_decoding_2thread0, rtd);
//thread 2
pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_dlsch_td1,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[i].cond_dlsch_td1,NULL);
pthread_create(&UE->proc.proc_rxtx[i].pthread_dlsch_td1,NULL,nr_dlsch_decoding_2thread1, rtd);
#endif
#ifdef UE_SLOT_PARALLELISATION
//pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_slot0_dl_processing,NULL);
//pthread_cond_init(&UE->proc.proc_rxtx[i].cond_slot0_dl_processing,NULL);
//pthread_create(&UE->proc.proc_rxtx[i].pthread_slot0_dl_processing,NULL,UE_thread_slot0_dl_processing, rtd);
pthread_mutex_init(&UE->proc.proc_rxtx[i].mutex_slot1_dl_processing,NULL);
pthread_cond_init(&UE->proc.proc_rxtx[i].cond_slot1_dl_processing,NULL);
pthread_create(&UE->proc.proc_rxtx[i].pthread_slot1_dl_processing,NULL,UE_thread_slot1_dl_processing, rtd);
#endif
}
pthread_create(&UE->proc.pthread_synch,NULL,UE_thread_synch,(void *)UE);
}
#ifdef OPENAIR2
/*
void fill_ue_band_info(void) {
UE_EUTRA_Capability_t *UE_EUTRA_Capability = UE_rrc_inst[0].UECap->UE_EUTRA_Capability;
int i,j;
bands_to_scan.nbands = UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.count;
for (i=0; i<bands_to_scan.nbands; i++) {
for (j=0; j<sizeof (eutra_bands) / sizeof (eutra_bands[0]); j++)
if (eutra_bands[j].band == UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.array[i]->bandEUTRA) {
memcpy(&bands_to_scan.band_info[i],
&eutra_bands[j],
sizeof(eutra_band_t));
printf("Band %d (%lu) : DL %u..%u Hz, UL %u..%u Hz, Duplex %s \n",
bands_to_scan.band_info[i].band,
UE_EUTRA_Capability->rf_Parameters.supportedBandListEUTRA.list.array[i]->bandEUTRA,
bands_to_scan.band_info[i].dl_min,
bands_to_scan.band_info[i].dl_max,
bands_to_scan.band_info[i].ul_min,
bands_to_scan.band_info[i].ul_max,
(bands_to_scan.band_info[i].frame_type==FDD) ? "FDD" : "TDD");
break;
}
}
}*/
#endif
/*
int setup_ue_buffers(PHY_VARS_NR_UE **phy_vars_ue, openair0_config_t *openair0_cfg) {
int i, CC_id;
NR_DL_FRAME_PARMS *frame_parms;
openair0_rf_map *rf_map;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
rf_map = &phy_vars_ue[CC_id]->rf_map;
AssertFatal( phy_vars_ue[CC_id] !=0, "");
frame_parms = &(phy_vars_ue[CC_id]->frame_parms);
// replace RX signal buffers with mmaped HW versions
rxdata = (int32_t**)malloc16( frame_parms->nb_antennas_rx*sizeof(int32_t*) );
txdata = (int32_t**)malloc16( frame_parms->nb_antennas_tx*sizeof(int32_t*) );
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
LOG_I(PHY, "Mapping UE CC_id %d, rx_ant %d, freq %u on card %d, chain %d\n",
CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
free( phy_vars_ue[CC_id]->common_vars.rxdata[i] );
rxdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
phy_vars_ue[CC_id]->common_vars.rxdata[i] = rxdata[i]; // what about the "-N_TA_offset" ? // N_TA offset for TDD
}
for (i=0; i<frame_parms->nb_antennas_tx; i++) {
LOG_I(PHY, "Mapping UE CC_id %d, tx_ant %d, freq %u on card %d, chain %d\n",
CC_id, i, downlink_frequency[CC_id][i], rf_map->card, rf_map->chain+i );
free( phy_vars_ue[CC_id]->common_vars.txdata[i] );
txdata[i] = (int32_t*)malloc16_clear( 307200*sizeof(int32_t) );
phy_vars_ue[CC_id]->common_vars.txdata[i] = txdata[i];
}
// rxdata[x] points now to the same memory region as phy_vars_ue[CC_id]->common_vars.rxdata[x]
// txdata[x] points now to the same memory region as phy_vars_ue[CC_id]->common_vars.txdata[x]
// be careful when releasing memory!
// because no "release_ue_buffers"-function is available, at least rxdata and txdata memory will leak (only some bytes)
}
return 0;
}
*/
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#define _GNU_SOURCE /* See feature_test_macros(7) */
#include <sched.h>
#include "T.h"
#include "rt_wrapper.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
#include "assertions.h"
#include "msc.h"
#include "PHY/types.h"
#include "PHY/defs_nr_UE.h"
#include "common/ran_context.h"
#include "common/config/config_userapi.h"
#include "common/utils/load_module_shlib.h"
#undef MALLOC //there are two conflicting definitions, so we better make sure we don't use it at all
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include "../../ARCH/COMMON/common_lib.h"
#include "../../ARCH/ETHERNET/USERSPACE/LIB/if_defs.h"
//#undef FRAME_LENGTH_COMPLEX_SAMPLES //there are two conflicting definitions, so we better make sure we don't use it at all
#include "PHY/phy_vars_nr_ue.h"
#include "PHY/LTE_TRANSPORT/transport_vars.h"
#include "SCHED/sched_common_vars.h"
#include "PHY/MODULATION/modulation_vars.h"
//#include "../../SIMU/USER/init_lte.h"
#include "LAYER2/MAC/mac.h"
#include "LAYER2/MAC/mac_vars.h"
#include "LAYER2/MAC/mac_proto.h"
#include "RRC/LTE/rrc_vars.h"
#include "PHY_INTERFACE/phy_interface_vars.h"
#ifdef SMBV
#include "PHY/TOOLS/smbv.h"
unsigned short config_frames[4] = {2,9,11,13};
#endif
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "enb_config.h"
//#include "PHY/TOOLS/time_meas.h"
#ifndef OPENAIR2
#include "UTIL/OTG/otg_vars.h"
#endif
#if defined(ENABLE_ITTI)
#include "intertask_interface.h"
#include "create_tasks.h"
#endif
#include "PHY/INIT/phy_init.h"
#include "system.h"
#include "stats.h"
#ifdef XFORMS
#include "PHY/TOOLS/nr_phy_scope.h"
//#include "stats.h"
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
// at eNB 0, an UL scope for every UE
FD_lte_phy_scope_ue *form_ue[NUMBER_OF_UE_MAX];
//FD_lte_phy_scope_enb *form_enb[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
//FD_stats_form *form_stats=NULL,*form_stats_l2=NULL;
char title[255];
//unsigned char scope_enb_num_ue = 2;
static pthread_t forms_thread; //xforms
#endif //XFORMS
#include "nr-uesoftmodem.h"
RAN_CONTEXT_t RC;
pthread_cond_t sync_cond;
pthread_mutex_t sync_mutex;
int sync_var=-1; //!< protected by mutex \ref sync_mutex.
uint16_t runtime_phy_rx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75, 100]
uint16_t runtime_phy_tx[29][6]; // SISO [MCS 0-28][RBs 0-5 : 6, 15, 25, 50, 75, 100]
#if defined(ENABLE_ITTI)
volatile int start_eNB = 0;
volatile int start_UE = 0;
#endif
volatile int oai_exit = 0;
static clock_source_t clock_source = internal;
static int wait_for_sync = 0;
unsigned int mmapped_dma=0;
int single_thread_flag=1;
int threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int16_t nr_dlsch_demod_shift;
//static char *conf_config_file_name = NULL;
#if defined(ENABLE_ITTI)
static char *itti_dump_file = NULL;
#endif
int UE_scan = 0;
int UE_scan_carrier = 0;
int UE_fo_compensation = 0;
runmode_t mode = normal_txrx;
FILE *input_fd=NULL;
#if MAX_NUM_CCs == 1
rx_gain_t rx_gain_mode[MAX_NUM_CCs][4] = {{max_gain,max_gain,max_gain,max_gain}};
double tx_gain[MAX_NUM_CCs][4] = {{20,0,0,0}};
double rx_gain[MAX_NUM_CCs][4] = {{110,0,0,0}};
#else
rx_gain_t rx_gain_mode[MAX_NUM_CCs][4] = {{max_gain,max_gain,max_gain,max_gain},{max_gain,max_gain,max_gain,max_gain}};
double tx_gain[MAX_NUM_CCs][4] = {{20,0,0,0},{20,0,0,0}};
double rx_gain[MAX_NUM_CCs][4] = {{110,0,0,0},{20,0,0,0}};
#endif
double rx_gain_off = 0.0;
double sample_rate=30.72e6;
double bw = 10.0e6;
static int tx_max_power[MAX_NUM_CCs] = {0};
char rf_config_file[1024];
int chain_offset=0;
int phy_test = 0;
uint8_t usim_test = 0;
uint8_t dci_Format = 0;
uint8_t agregation_Level =0xFF;
uint8_t nb_antenna_tx = 1;
uint8_t nb_antenna_rx = 1;
char ref[128] = "internal";
char channels[128] = "0";
char *parallel_config = NULL;
char *worker_config = NULL;
static THREAD_STRUCT thread_struct;
void set_parallel_conf(char *parallel_conf)
{
if(strcmp(parallel_conf,"PARALLEL_SINGLE_THREAD")==0) thread_struct.parallel_conf = PARALLEL_SINGLE_THREAD;
else if(strcmp(parallel_conf,"PARALLEL_RU_L1_SPLIT")==0) thread_struct.parallel_conf = PARALLEL_RU_L1_SPLIT;
else if(strcmp(parallel_conf,"PARALLEL_RU_L1_TRX_SPLIT")==0) thread_struct.parallel_conf = PARALLEL_RU_L1_TRX_SPLIT;
printf("[CONFIG] parallel conf is set to %d\n",thread_struct.parallel_conf);
}
void set_worker_conf(char *worker_conf)
{
if(strcmp(worker_conf,"WORKER_DISABLE")==0) thread_struct.worker_conf = WORKER_DISABLE;
else if(strcmp(worker_conf,"WORKER_ENABLE")==0) thread_struct.worker_conf = WORKER_ENABLE;
printf("[CONFIG] worker conf is set to %d\n",thread_struct.worker_conf);
}
PARALLEL_CONF_t get_thread_parallel_conf(void)
{
return thread_struct.parallel_conf;
}
WORKER_CONF_t get_thread_worker_conf(void)
{
return thread_struct.worker_conf;
}
int rx_input_level_dBm;
//static int online_log_messages=0;
#ifdef XFORMS
extern int otg_enabled;
int do_forms=0;
#else
int otg_enabled;
#endif
//int number_of_cards = 1;
static NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
int16_t node_synch_ref[MAX_NUM_CCs];
uint32_t target_dl_mcs = 28; //maximum allowed mcs
uint32_t target_ul_mcs = 20;
uint32_t timing_advance = 0;
uint8_t exit_missed_slots=1;
uint64_t num_missed_slots=0; // counter for the number of missed slots
extern PHY_VARS_NR_UE* init_nr_ue_vars(NR_DL_FRAME_PARMS *frame_parms,
uint8_t UE_id,
uint8_t abstraction_flag);
int transmission_mode=1;
int numerology = 0;
/*
int16_t glog_level = LOG_INFO;
int16_t glog_verbosity = LOG_MED;
int16_t hw_log_level = LOG_INFO;
int16_t hw_log_verbosity = LOG_MED;
int16_t phy_log_level = LOG_INFO;
int16_t phy_log_verbosity = LOG_MED;
int16_t mac_log_level = LOG_INFO;
int16_t mac_log_verbosity = LOG_MED;
int16_t rlc_log_level = LOG_INFO;
int16_t rlc_log_verbosity = LOG_MED;
int16_t pdcp_log_level = LOG_INFO;
int16_t pdcp_log_verbosity = LOG_MED;
int16_t rrc_log_level = LOG_INFO;
int16_t rrc_log_verbosity = LOG_MED;
int16_t opt_log_level = LOG_INFO;
int16_t opt_log_verbosity = LOG_MED;
# if defined(ENABLE_USE_MME)
int16_t gtpu_log_level = LOG_DEBUG;
int16_t gtpu_log_verbosity = LOG_MED;
int16_t udp_log_level = LOG_DEBUG;
int16_t udp_log_verbosity = LOG_MED;
#endif
#if defined (ENABLE_SECURITY)
int16_t osa_log_level = LOG_INFO;
int16_t osa_log_verbosity = LOG_MED;
#endif
*/
char *rrh_UE_ip = "127.0.0.1";
int rrh_UE_port = 51000;
/* flag set by eNB conf file to specify if the radio head is local or remote (default option is local) */
//uint8_t local_remote_radio = BBU_LOCAL_RADIO_HEAD;
/* struct for ethernet specific parameters given in eNB conf file */
//eth_params_t *eth_params;
openair0_config_t openair0_cfg[MAX_CARDS];
double cpuf;
char uecap_xer[1024],uecap_xer_in=0;
int oaisim_flag=0;
int emulate_rf = 0;
threads_t threads = {-1,-1,-1,-1,-1,-1,-1,-1};
int threads_offset = 0;
char* usrp_args=NULL;
char* usrp_clksrc=NULL;
/* forward declarations */
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
* this is very hackish - find a proper solution
*/
uint8_t abstraction_flag=0;
/*---------------------BMC: timespec helpers -----------------------------*/
struct timespec min_diff_time = { .tv_sec = 0, .tv_nsec = 0 };
struct timespec max_diff_time = { .tv_sec = 0, .tv_nsec = 0 };
struct timespec clock_difftime(struct timespec start, struct timespec end) {
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
}
void print_difftimes(void) {
#ifdef DEBUG
printf("difftimes min = %lu ns ; max = %lu ns\n", min_diff_time.tv_nsec, max_diff_time.tv_nsec);
#else
LOG_I(HW,"difftimes min = %lu ns ; max = %lu ns\n", min_diff_time.tv_nsec, max_diff_time.tv_nsec);
#endif
}
void update_difftimes(struct timespec start, struct timespec end) {
struct timespec diff_time = { .tv_sec = 0, .tv_nsec = 0 };
int changed = 0;
diff_time = clock_difftime(start, end);
if ((min_diff_time.tv_nsec == 0) || (diff_time.tv_nsec < min_diff_time.tv_nsec)) {
min_diff_time.tv_nsec = diff_time.tv_nsec;
changed = 1;
}
if ((max_diff_time.tv_nsec == 0) || (diff_time.tv_nsec > max_diff_time.tv_nsec)) {
max_diff_time.tv_nsec = diff_time.tv_nsec;
changed = 1;
}
#if 1
if (changed) print_difftimes();
#endif
}
/*------------------------------------------------------------------------*/
unsigned int build_rflocal(int txi, int txq, int rxi, int rxq) {
return (txi + (txq<<6) + (rxi<<12) + (rxq<<18));
}
unsigned int build_rfdc(int dcoff_i_rxfe, int dcoff_q_rxfe) {
return (dcoff_i_rxfe + (dcoff_q_rxfe<<8));
}
#if !defined(ENABLE_ITTI)
void signal_handler(int sig) {
void *array[10];
size_t size;
if (sig==SIGSEGV) {
// get void*'s for all entries on the stack
size = backtrace(array, 10);
// print out all the frames to stderr
fprintf(stderr, "Error: signal %d:\n", sig);
backtrace_symbols_fd(array, size, 2);
exit(-1);
} else {
printf("trying to exit gracefully...\n");
oai_exit = 1;
}
}
#endif
#define KNRM "\x1B[0m"
#define KRED "\x1B[31m"
#define KGRN "\x1B[32m"
#define KBLU "\x1B[34m"
#define RESET "\033[0m"
void exit_function(const char* file, const char* function, const int line, const char* s)
{
int CC_id;
if (s != NULL) {
printf("%s:%d %s() Exiting OAI softmodem: %s\n",file,line, function, s);
}
oai_exit = 1;
if (PHY_vars_UE_g && PHY_vars_UE_g[0]) {
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if (PHY_vars_UE_g[0][CC_id] && PHY_vars_UE_g[0][CC_id]->rfdevice.trx_end_func)
PHY_vars_UE_g[0][CC_id]->rfdevice.trx_end_func(&PHY_vars_UE_g[0][CC_id]->rfdevice);
}
}
#if defined(ENABLE_ITTI)
sleep(1); //allow lte-softmodem threads to exit first
itti_terminate_tasks (TASK_UNKNOWN);
#endif
}
#ifdef XFORMS
void reset_stats(FL_OBJECT *button, long arg) {
//int i,j,k;
/*PHY_VARS_eNB *phy_vars_eNB = PHY_vars_eNB_g[0][0];
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
for (k=0; k<8; k++) { //harq_processes
for (j=0; j<phy_vars_eNB->dlsch[i][0]->Mlimit; j++) {
phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0;
}
phy_vars_eNB->UE_stats[i].dlsch_l2_errors[k]=0;
phy_vars_eNB->UE_stats[i].ulsch_errors[k]=0;
phy_vars_eNB->UE_stats[i].ulsch_consecutive_errors=0;
for (j=0; j<phy_vars_eNB->ulsch[i]->Mlimit; j++) {
phy_vars_eNB->UE_stats[i].ulsch_decoding_attempts[k][j]=0;
phy_vars_eNB->UE_stats[i].ulsch_decoding_attempts_last[k][j]=0;
phy_vars_eNB->UE_stats[i].ulsch_round_errors[k][j]=0;
phy_vars_eNB->UE_stats[i].ulsch_round_fer[k][j]=0;
}
}
phy_vars_eNB->UE_stats[i].dlsch_sliding_cnt=0;
phy_vars_eNB->UE_stats[i].dlsch_NAK_round0=0;
phy_vars_eNB->UE_stats[i].dlsch_mcs_offset=0;
}*/
}
static void *scope_thread(void *arg) {
char stats_buffer[16384];
# ifdef ENABLE_XFORMS_WRITE_STATS
FILE *UE_stats, *eNB_stats;
# endif
//int len = 0;
struct sched_param sched_param;
//int UE_id, CC_id;
//int ue_cnt=0;
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO)+1;
sched_setscheduler(0, SCHED_FIFO,&sched_param);
printf("Scope thread has priority %d\n",sched_param.sched_priority);
# ifdef ENABLE_XFORMS_WRITE_STATS
UE_stats = fopen("UE_stats.txt", "w");
#endif
while (!oai_exit) {
//len = dump_ue_stats (PHY_vars_UE_g[0][0], &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0],stats_buffer, 0, mode,rx_input_level_dBm);
//fl_set_object_label(form_stats->stats_text, stats_buffer);
//fl_clear_browser(form_stats->stats_text);
//fl_add_browser_line(form_stats->stats_text, stats_buffer);
//if (PHY_vars_UE_g[0][0]->is_synchronized == 1)
phy_scope_UE(form_ue[0],
PHY_vars_UE_g[0][0],
0,0,1);
//else it is done in the synch thread
//printf("doing forms\n");
//usleep(100000); // 100 ms
sleep(0.1);
}
// printf("%s",stats_buffer);
# ifdef ENABLE_XFORMS_WRITE_STATS
if (UE_stats) {
rewind (UE_stats);
fwrite (stats_buffer, 1, len, UE_stats);
fclose (UE_stats);
}
# endif
pthread_exit((void*)arg);
}
#endif
#if defined(ENABLE_ITTI)
void *l2l1_task(void *arg) {
MessageDef *message_p = NULL;
int result;
itti_set_task_real_time(TASK_L2L1);
itti_mark_task_ready(TASK_L2L1);
do {
// Wait for a message
itti_receive_msg (TASK_L2L1, &message_p);
switch (ITTI_MSG_ID(message_p)) {
case TERMINATE_MESSAGE:
oai_exit=1;
itti_exit_task ();
break;
case ACTIVATE_MESSAGE:
start_UE = 1;
break;
case DEACTIVATE_MESSAGE:
start_UE = 0;
break;
case MESSAGE_TEST:
LOG_I(EMU, "Received %s\n", ITTI_MSG_NAME(message_p));
break;
default:
LOG_E(EMU, "Received unexpected message %s\n", ITTI_MSG_NAME(message_p));
break;
}
result = itti_free (ITTI_MSG_ORIGIN_ID(message_p), message_p);
AssertFatal (result == EXIT_SUCCESS, "Failed to free memory (%d)!\n", result);
} while(!oai_exit);
return NULL;
}
#endif
int16_t dlsch_demod_shift;
static void get_options(void) {
int CC_id;
int tddflag, nonbiotflag;
char *loopfile=NULL;
int dumpframe=0;
uint32_t online_log_messages;
uint32_t glog_level, glog_verbosity;
uint32_t start_telnetsrv;
paramdef_t cmdline_params[] =CMDLINE_PARAMS_DESC ;
paramdef_t cmdline_logparams[] =CMDLINE_LOGPARAMS_DESC ;
config_process_cmdline( cmdline_params,sizeof(cmdline_params)/sizeof(paramdef_t),NULL);
if (strlen(in_path) > 0) {
opt_type = OPT_PCAP;
opt_enabled=1;
printf("Enabling OPT for PCAP with the following file %s \n",in_path);
}
if (strlen(in_ip) > 0) {
opt_enabled=1;
opt_type = OPT_WIRESHARK;
printf("Enabling OPT for wireshark for local interface");
}
config_process_cmdline( cmdline_logparams,sizeof(cmdline_logparams)/sizeof(paramdef_t),NULL);
if(config_isparamset(cmdline_logparams,CMDLINE_ONLINELOG_IDX)) {
set_glog_onlinelog(online_log_messages);
}
if(config_isparamset(cmdline_logparams,CMDLINE_GLOGLEVEL_IDX)) {
set_glog(glog_level);
}
if (start_telnetsrv) {
load_module_shlib("telnetsrv",NULL,0,NULL);
}
paramdef_t cmdline_uemodeparams[] =CMDLINE_UEMODEPARAMS_DESC;
paramdef_t cmdline_ueparams[] =CMDLINE_UEPARAMS_DESC;
config_process_cmdline( cmdline_uemodeparams,sizeof(cmdline_uemodeparams)/sizeof(paramdef_t),NULL);
config_process_cmdline( cmdline_ueparams,sizeof(cmdline_ueparams)/sizeof(paramdef_t),NULL);
if (loopfile != NULL) {
printf("Input file for hardware emulation: %s\n",loopfile);
mode=loop_through_memory;
input_fd = fopen(loopfile,"r");
AssertFatal(input_fd != NULL,"Please provide a valid input file\n");
}
if ( (cmdline_uemodeparams[CMDLINE_CALIBUERX_IDX].paramflags & PARAMFLAG_PARAMSET) != 0) mode = rx_calib_ue;
if ( (cmdline_uemodeparams[CMDLINE_CALIBUERXMED_IDX].paramflags & PARAMFLAG_PARAMSET) != 0) mode = rx_calib_ue_med;
if ( (cmdline_uemodeparams[CMDLINE_CALIBUERXBYP_IDX].paramflags & PARAMFLAG_PARAMSET) != 0) mode = rx_calib_ue_byp;
if (cmdline_uemodeparams[CMDLINE_DEBUGUEPRACH_IDX].uptr)
if ( *(cmdline_uemodeparams[CMDLINE_DEBUGUEPRACH_IDX].uptr) > 0) mode = debug_prach;
if (cmdline_uemodeparams[CMDLINE_NOL2CONNECT_IDX].uptr)
if ( *(cmdline_uemodeparams[CMDLINE_NOL2CONNECT_IDX].uptr) > 0) mode = no_L2_connect;
if (cmdline_uemodeparams[CMDLINE_CALIBPRACHTX_IDX].uptr)
if ( *(cmdline_uemodeparams[CMDLINE_CALIBPRACHTX_IDX].uptr) > 0) mode = calib_prach_tx;
if (dumpframe > 0) mode = rx_dump_frame;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id]->dl_CarrierFreq = downlink_frequency[0][0];
}
UE_scan=0;
if (tddflag > 0) {
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
frame_parms[CC_id]->frame_type = TDD;
}
/*if (frame_parms[0]->N_RB_DL !=0) {
if ( frame_parms[0]->N_RB_DL < 6 ) {
frame_parms[0]->N_RB_DL = 6;
printf ( "%i: Invalid number of ressource blocks, adjusted to 6\n",frame_parms[0]->N_RB_DL);
}
if ( frame_parms[0]->N_RB_DL > 100 ) {
frame_parms[0]->N_RB_DL = 100;
printf ( "%i: Invalid number of ressource blocks, adjusted to 100\n",frame_parms[0]->N_RB_DL);
}
if ( frame_parms[0]->N_RB_DL > 50 && frame_parms[0]->N_RB_DL < 100 ) {
frame_parms[0]->N_RB_DL = 50;
printf ( "%i: Invalid number of ressource blocks, adjusted to 50\n",frame_parms[0]->N_RB_DL);
}
if ( frame_parms[0]->N_RB_DL > 25 && frame_parms[0]->N_RB_DL < 50 ) {
frame_parms[0]->N_RB_DL = 25;
printf ( "%i: Invalid number of ressource blocks, adjusted to 25\n",frame_parms[0]->N_RB_DL);
}
UE_scan = 0;
frame_parms[0]->N_RB_UL=frame_parms[0]->N_RB_DL;
for (CC_id=1; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id]->N_RB_DL=frame_parms[0]->N_RB_DL;
frame_parms[CC_id]->N_RB_UL=frame_parms[0]->N_RB_UL;
}
}*/
for (CC_id=1;CC_id<MAX_NUM_CCs;CC_id++) {
tx_max_power[CC_id]=tx_max_power[0];
rx_gain[0][CC_id] = rx_gain[0][0];
tx_gain[0][CC_id] = tx_gain[0][0];
}
#if T_TRACER
paramdef_t cmdline_ttraceparams[] =CMDLINE_TTRACEPARAMS_DESC ;
config_process_cmdline( cmdline_ttraceparams,sizeof(cmdline_ttraceparams)/sizeof(paramdef_t),NULL);
#endif
if ( !(CONFIG_ISFLAGSET(CONFIG_ABORT)) && (!(CONFIG_ISFLAGSET(CONFIG_NOOOPT))) ) {
// Here the configuration file is the XER encoded UE capabilities
// Read it in and store in asn1c data structures
sprintf(uecap_xer,"%stargets/PROJECTS/GENERIC-LTE-EPC/CONF/UE_config.xml",getenv("OPENAIR_HOME"));
printf("%s\n",uecap_xer);
uecap_xer_in=1;
} /* UE with config file */
}
#if T_TRACER
int T_nowait = 0; /* by default we wait for the tracer */
int T_port = 2021; /* default port to listen to to wait for the tracer */
int T_dont_fork = 0; /* default is to fork, see 'T_init' to understand */
#endif
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
int CC_id;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id] = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms[CC_id] = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
config[CC_id] = (nfapi_nr_config_request_t*) malloc(sizeof(nfapi_nr_config_request_t));
config[CC_id]->subframe_config.numerology_index_mu.value =1;
config[CC_id]->subframe_config.duplex_mode.value = 1; //FDD
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
config[CC_id]->sch_config.physical_cell_id.value = 0;
frame_parms[CC_id]->eutra_band = 78;
frame_parms[CC_id]->frame_type = FDD;
frame_parms[CC_id]->tdd_config = 3;
//frame_parms[CC_id]->tdd_config_S = 0;
frame_parms[CC_id]->N_RB_DL = 106;
frame_parms[CC_id]->N_RB_UL = 106;
frame_parms[CC_id]->Ncp = NORMAL;
//frame_parms[CC_id]->Ncp_UL = NORMAL;
frame_parms[CC_id]->Nid_cell = 0;
//frame_parms[CC_id]->num_MBSFN_config = 0;
frame_parms[CC_id]->nb_antenna_ports_eNB = 1;
frame_parms[CC_id]->nb_antennas_tx = 1;
frame_parms[CC_id]->nb_antennas_rx = 1;
//frame_parms[CC_id]->nushift = 0;
///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
//frame_parms[CC_id]->phich_config_common.phich_duration = normal;
// UL RS Config
/*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
frame_parms[CC_id]->pusch_config_common.n_SB = 1;
frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms[CC_id]->numerology_index = 0;
frame_parms[CC_id]->ttis_per_subframe = 1;
frame_parms[CC_id]->slots_per_tti = 2;
}
}
void init_openair0(void);
void init_openair0() {
int card;
int i;
for (card=0; card<MAX_CARDS; card++) {
openair0_cfg[card].mmapped_dma=mmapped_dma;
openair0_cfg[card].configFilename = NULL;
if(frame_parms[0]->N_RB_DL == 106) {
if (numerology==0) {
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=23.04e6;
openair0_cfg[card].samples_per_frame = 230400;
openair0_cfg[card].tx_bw = 10e6;
openair0_cfg[card].rx_bw = 10e6;
} else {
openair0_cfg[card].sample_rate=30.72e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 10e6;
openair0_cfg[card].rx_bw = 10e6;
}
} else if (numerology==1) {
openair0_cfg[card].sample_rate=61.44e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 20e6;
openair0_cfg[card].rx_bw = 20e6;
} else if (numerology==2) {
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 40e6;
openair0_cfg[card].rx_bw = 40e6;
} else {
LOG_E(PHY,"Unsupported numerology!\n");
exit(-1);
}
} else if(frame_parms[0]->N_RB_DL == 50) {
openair0_cfg[card].sample_rate=15.36e6;
openair0_cfg[card].samples_per_frame = 153600;
openair0_cfg[card].tx_bw = 5e6;
openair0_cfg[card].rx_bw = 5e6;
} else if (frame_parms[0]->N_RB_DL == 25) {
openair0_cfg[card].sample_rate=7.68e6;
openair0_cfg[card].samples_per_frame = 76800;
openair0_cfg[card].tx_bw = 2.5e6;
openair0_cfg[card].rx_bw = 2.5e6;
} else if (frame_parms[0]->N_RB_DL == 6) {
openair0_cfg[card].sample_rate=1.92e6;
openair0_cfg[card].samples_per_frame = 19200;
openair0_cfg[card].tx_bw = 1.5e6;
openair0_cfg[card].rx_bw = 1.5e6;
}
if (frame_parms[0]->frame_type==TDD)
openair0_cfg[card].duplex_mode = duplex_mode_TDD;
else //FDD
openair0_cfg[card].duplex_mode = duplex_mode_FDD;
printf("HW: Configuring card %d, nb_antennas_tx/rx %d/%d\n",card,
PHY_vars_UE_g[0][0]->frame_parms.nb_antennas_tx,
PHY_vars_UE_g[0][0]->frame_parms.nb_antennas_rx);
openair0_cfg[card].Mod_id = 0;
openair0_cfg[card].num_rb_dl=frame_parms[0]->N_RB_DL;
openair0_cfg[card].clock_source = clock_source;
openair0_cfg[card].tx_num_channels=min(2,PHY_vars_UE_g[0][0]->frame_parms.nb_antennas_tx);
openair0_cfg[card].rx_num_channels=min(2,PHY_vars_UE_g[0][0]->frame_parms.nb_antennas_rx);
for (i=0; i<4; i++) {
if (i<openair0_cfg[card].tx_num_channels)
openair0_cfg[card].tx_freq[i] = downlink_frequency[0][i]+uplink_frequency_offset[0][i];
else
openair0_cfg[card].tx_freq[i]=0.0;
if (i<openair0_cfg[card].rx_num_channels)
openair0_cfg[card].rx_freq[i] = downlink_frequency[0][i];
else
openair0_cfg[card].rx_freq[i]=0.0;
openair0_cfg[card].autocal[i] = 1;
openair0_cfg[card].tx_gain[i] = tx_gain[0][i];
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB - rx_gain_off;
openair0_cfg[card].configFilename = rf_config_file;
printf("Card %d, channel %d, Setting tx_gain %f, rx_gain %f, tx_freq %f, rx_freq %f\n",
card,i, openair0_cfg[card].tx_gain[i],
openair0_cfg[card].rx_gain[i],
openair0_cfg[card].tx_freq[i],
openair0_cfg[card].rx_freq[i]);
}
if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args;
if (usrp_clksrc) {
if (strcmp(usrp_clksrc, "internal") == 0) {
openair0_cfg[card].clock_source = internal;
LOG_D(PHY, "USRP clock source set as internal\n");
} else if (strcmp(usrp_clksrc, "external") == 0) {
openair0_cfg[card].clock_source = external;
LOG_D(PHY, "USRP clock source set as external\n");
} else if (strcmp(usrp_clksrc, "gpsdo") == 0) {
openair0_cfg[card].clock_source = gpsdo;
LOG_D(PHY, "USRP clock source set as gpsdo\n");
} else {
openair0_cfg[card].clock_source = internal;
LOG_I(PHY, "USRP clock source unknown ('%s'). defaulting to internal\n", usrp_clksrc);
}
} else {
openair0_cfg[card].clock_source = internal;
LOG_I(PHY, "USRP clock source not specified. defaulting to internal\n");
}
}
}
int main( int argc, char **argv ) {
int i;//j,k,aa,re;
#if defined (XFORMS)
void *status;
#endif
int CC_id;
uint8_t abstraction_flag=0;
//uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
#if defined (XFORMS)
int ret;
#endif
PHY_VARS_NR_UE *UE[MAX_NUM_CCs];
start_background_system();
if ( load_configmodule(argc,argv) == NULL) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
}
CONFIG_SETRTFLAG(CONFIG_NOEXITONHELP);
#ifdef DEBUG_CONSOLE
setvbuf(stdout, NULL, _IONBF, 0);
setvbuf(stderr, NULL, _IONBF, 0);
#endif
set_default_frame_parms(frame_parms);
mode = normal_txrx;
memset(&openair0_cfg[0],0,sizeof(openair0_config_t)*MAX_CARDS);
memset(tx_max_power,0,sizeof(int)*MAX_NUM_CCs);
set_latency_target();
// initialize logging
logInit();
// get options and fill parameters from configuration file
get_options (); //Command-line options, enb_properties
#if T_TRACER
T_Config_Init();
#endif
//randominit (0);
set_taus_seed (0);
printf("configuring for UE\n");
//if (ouput_vcd)
// VCD_SIGNAL_DUMPER_INIT("/tmp/openair_dump_UE.vcd");
//if (opp_enabled ==1) {
// reset_opp_meas();
//}
cpuf=get_cpu_freq_GHz();
#if defined(ENABLE_ITTI)
//log_set_instance_type (LOG_INSTANCE_UE);
itti_init(TASK_MAX, THREAD_MAX, MESSAGES_ID_MAX, tasks_info, messages_info);
// initialize mscgen log after ITTI
MSC_INIT(MSC_E_UTRAN, THREAD_MAX+TASK_MAX);
#endif
if (opt_type != OPT_NONE) {
if (init_opt(in_path, in_ip) == -1)
LOG_E(OPT,"failed to run OPT \n");
}
#ifdef PDCP_USE_NETLINK
netlink_init();
#if defined(PDCP_USE_NETLINK_QUEUES)
pdcp_netlink_init();
#endif
#endif
#if !defined(ENABLE_ITTI)
// to make a graceful exit when ctrl-c is pressed
signal(SIGSEGV, signal_handler);
signal(SIGINT, signal_handler);
#endif
check_clock();
#ifndef PACKAGE_VERSION
# define PACKAGE_VERSION "UNKNOWN-EXPERIMENTAL"
#endif
LOG_I(HW, "Version: %s\n", PACKAGE_VERSION);
// init the parameters
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id]->nb_antennas_tx = nb_antenna_tx;
frame_parms[CC_id]->nb_antennas_rx = nb_antenna_rx;
frame_parms[CC_id]->nb_antenna_ports_eNB = 1; //initial value overwritten by initial sync later
LOG_I(PHY,"Set nb_rx_antenna %d , nb_tx_antenna %d \n",frame_parms[CC_id]->nb_antennas_rx, frame_parms[CC_id]->nb_antennas_tx);
get_band(downlink_frequency[CC_id][0], &frame_parms[CC_id]->eutra_band, &uplink_frequency_offset[CC_id][0], &frame_parms[CC_id]->frame_type);
//init_ul_hopping(frame_parms[CC_id]);
//phy_init_nr_top(frame_parms[CC_id]);
//init prach for openair1 test
// prach_fmt = get_prach_fmt(frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex, frame_parms->frame_type);
// N_ZC = (prach_fmt <4)?839:139;
}
NB_UE_INST=1;
NB_INST=1;
PHY_vars_UE_g = malloc(sizeof(PHY_VARS_NR_UE**));
PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_NR_UE*)*MAX_NUM_CCs);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
printf("PHY_vars_UE_g[0][%d] = %p\n",CC_id,UE[CC_id]);
printf("frame_parms %d\n",frame_parms[CC_id]->ofdm_symbol_size);
nr_init_frame_parms_ue(frame_parms[CC_id],numerology,NORMAL,frame_parms[CC_id]->N_RB_DL,(frame_parms[CC_id]->N_RB_DL-20)>>1,0);
PHY_vars_UE_g[0][CC_id] = init_nr_ue_vars(frame_parms[CC_id], 0,abstraction_flag);
UE[CC_id] = PHY_vars_UE_g[0][CC_id];
if (phy_test==1)
UE[CC_id]->mac_enabled = 0;
else
UE[CC_id]->mac_enabled = 1;
if (UE[CC_id]->mac_enabled == 0) { //set default UL parameters for testing mode
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
//UE[CC_id]->pusch_config_dedicated[i] = malloc(sizeof(PUSCH_CONFIG_DEDICATED));
//UE[CC_id]->scheduling_request_config[i] = malloc(sizeof(SCHEDULING_REQUEST_CONFIG));
/*UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
UE[CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = 0;
UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;*/
}
}
UE[CC_id]->UE_scan = UE_scan;
UE[CC_id]->UE_scan_carrier = UE_scan_carrier;
UE[CC_id]->UE_fo_compensation = UE_fo_compensation;
UE[CC_id]->mode = mode;
printf("UE[%d]->mode = %d\n",CC_id,mode);
for (uint8_t i=0; i<RX_NB_TH_MAX; i++) {
//UE[CC_id]->pdcch_vars[i][0]->agregationLevel = agregation_Level;
//UE[CC_id]->pdcch_vars[i][0]->dciFormat = dci_Format;
/*compute_prach_seq(&UE[CC_id]->frame_parms.prach_config_common,
UE[CC_id]->frame_parms.frame_type,
UE[CC_id]->X_u);*/
if (UE[CC_id]->mac_enabled == 1)
UE[CC_id]->pdcch_vars[i][0]->crnti = 0x1234;
else
UE[CC_id]->pdcch_vars[i][0]->crnti = 0x1235;
}
UE[CC_id]->rx_total_gain_dB = (int)rx_gain[CC_id][0] + rx_gain_off;
UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
if (frame_parms[CC_id]->frame_type==FDD) {
UE[CC_id]->N_TA_offset = 0;
} else {
if (frame_parms[CC_id]->N_RB_DL == 100)
UE[CC_id]->N_TA_offset = 624;
else if (frame_parms[CC_id]->N_RB_DL == 50)
UE[CC_id]->N_TA_offset = 624/2;
else if (frame_parms[CC_id]->N_RB_DL == 25)
UE[CC_id]->N_TA_offset = 624/4;
}
}
// printf("tx_max_power = %d -> amp %d\n",tx_max_power[0],get_tx_amp(tx_max_poHwer,tx_max_power));
fill_modeled_runtime_table(runtime_phy_rx,runtime_phy_tx);
cpuf=get_cpu_freq_GHz();
//dump_frame_parms(frame_parms[0]);
init_openair0();
// default threads.main = 2
// if there are enough processors, all others on subsequent CPUs
if (threads_offset>0) {
if (threads_offset+8<=get_nprocs()) {
if (threads.main<0) threads.main=threads_offset+1;
if (threads.sync<0) threads.sync=threads_offset+2;
if (threads.one<0) threads.one=threads_offset+3;
if (threads.two<0) threads.two=threads_offset+4;
if (threads.three<0) threads.three=threads_offset+5;
if (threads.slot1_proc_one<0) threads.slot1_proc_one=threads_offset+6;
if (threads.slot1_proc_two<0) threads.slot1_proc_two=threads_offset+7;
if (threads.slot1_proc_three<0) threads.slot1_proc_three=threads_offset+8;
}
else {
LOG_E(HW,"Not enough CPUs available (nprocs (=%d) >= threadmain (=%d) + 10)\n",get_nprocs(),threads_offset);
exit_fun("Error setting thread affinity\n");
}
}
#ifndef DEADLINE_SCHEDULER
/* Currently we set affinity for UHD to CPU 0 for eNB/UE and only if number of CPUS >2 */
cpu_set_t cpuset;
int s;
char cpu_affinity[1024];
CPU_ZERO(&cpuset);
#ifdef CPU_AFFINITY
int j;
if (get_nprocs()>=2) {
for (j = 2; j < get_nprocs(); j++)
CPU_SET(j, &cpuset);
s = pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_setaffinity_np");
exit_fun("Error setting processor affinity");
}
LOG_I(HW, "Setting the affinity of main function to all CPUs, for device library to use CPU 0 only!\n");
}
#endif
/* Check the actual affinity mask assigned to the thread */
s = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
if (s != 0) {
perror( "pthread_getaffinity_np");
exit_fun("Error getting processor affinity ");
}
memset(cpu_affinity, 0 , sizeof(cpu_affinity));
for (int j = 0; j < CPU_SETSIZE; j++) {
if (CPU_ISSET(j, &cpuset)) {
char temp[1024];
sprintf(temp, " CPU_%d ", j);
strcat(cpu_affinity, temp);
}
}
LOG_I(HW, "CPU Affinity of main() function is... %s\n", cpu_affinity);
#endif
//openair0_cfg[0].log_level = glog_level;
/*int eMBMS_active=0;
if (node_function[0] <= NGFI_RAU_IF4p5) { // don't initialize L2 for RRU
LOG_I(PHY,"Intializing L2\n");
mac_xface = malloc(sizeof(MAC_xface));
l2_init(frame_parms[0],eMBMS_active,(uecap_xer_in==1)?uecap_xer:NULL,
0,// cba_group_active
0); // HO flag
mac_xface->macphy_exit = &exit_fun;
} else if (node_function[0] == NGFI_RRU_IF4p5) { // Initialize PRACH in this case
}*/
#if defined(ENABLE_ITTI)
// don't create if node doesn't connect to RRC/S1/GTP
/*if (create_tasks(1) < 0) {
printf("cannot create ITTI tasks\n");
exit(-1); // need a softer mode
}*/
printf("ITTI tasks created\n");
#endif
/*if (phy_test==0) {
if (UE_flag==1) {
printf("Filling UE band info\n");
fill_ue_band_info();
mac_xface->dl_phy_sync_success (0, 0, 0, 1);
} else if (node_function[0]>NGFI_RRU_IF4p5)
mac_xface->mrbch_phy_sync_failure (0, 0, 0);
}*/
// init UE_PF_PO and mutex lock
pthread_mutex_init(&ue_pf_po_mutex, NULL);
memset (&UE_PF_PO[0][0], 0, sizeof(UE_PF_PO_t)*NUMBER_OF_UE_MAX*MAX_NUM_CCs);
mlockall(MCL_CURRENT | MCL_FUTURE);
pthread_cond_init(&sync_cond,NULL);
pthread_mutex_init(&sync_mutex, NULL);
init_UE(1);
#ifdef XFORMS
int UE_id;
int fl_argc=1;
if (do_forms==1) {
// fl_initialize messes with argv and argc, so pretend to not pass any options
fl_initialize (&fl_argc, argv, NULL, 0, 0);
// restore the original command line args
// argv = fl_get_cmdline_args( &argc );
//form_stats = create_form_stats_form();
//fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
UE_id = 0;
form_ue[UE_id] = create_lte_phy_scope_ue();
sprintf (title, "NR DL SCOPE UE");
fl_show_form (form_ue[UE_id]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
/*
if (openair_daq_vars.use_ia_receiver) {
fl_set_button(form_ue[UE_id]->button_0,1);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver ON");
} else {
fl_set_button(form_ue[UE_id]->button_0,0);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver OFF");
}*/
fl_set_button(form_ue[UE_id]->button_0,0);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver OFF");
ret = pthread_create(&forms_thread, NULL, scope_thread, NULL);
if (ret == 0)
pthread_setname_np( forms_thread, "xforms" );
printf("Scope thread created, ret=%d\n",ret);
}
#endif
rt_sleep_ns(10*100000000ULL);
number_of_cards = 1;
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_UE_g[0][CC_id]->rf_map.card=0;
PHY_vars_UE_g[0][CC_id]->rf_map.chain=CC_id+chain_offset;
}
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
#if defined(OAI_USRP) || defined(OAI_ADRV9371_ZC706)
UE[CC_id]->hw_timing_advance = timing_advance;
#else
UE[CC_id]->hw_timing_advance = 160;
#endif
}
if (input_fd) {
printf("Reading in from file to antenna buffer %d\n",0);
if (fread(UE[0]->common_vars.rxdata[0],
sizeof(int32_t),
frame_parms[0]->samples_per_subframe*10,
input_fd) != frame_parms[0]->samples_per_subframe*10)
printf("error reading from file\n");
}
sleep(3);
printf("Sending sync to all threads\n");
pthread_mutex_lock(&sync_mutex);
sync_var=0;
pthread_cond_broadcast(&sync_cond);
pthread_mutex_unlock(&sync_mutex);
// wait for end of program
printf("TYPE <CTRL-C> TO TERMINATE\n");
//getchar();
/*
#if defined(ENABLE_ITTI)
printf("Entering ITTI signals handler\n");
itti_wait_tasks_end();
oai_exit=1;
#else
*/
while (oai_exit==0)
rt_sleep_ns(100000000ULL);
//#endif
// stop threads
#ifdef XFORMS
printf("waiting for XFORMS thread\n");
if (do_forms==1) {
pthread_join(forms_thread,&status);
//fl_hide_form(form_stats->stats_form);
//fl_free_form(form_stats->stats_form);
fl_hide_form(form_ue[0]->lte_phy_scope_ue);
fl_free_form(form_ue[0]->lte_phy_scope_ue);
}
#endif
printf("stopping MODEM threads\n");
pthread_cond_destroy(&sync_cond);
pthread_mutex_destroy(&sync_mutex);
// *** Handle per CC_id openair0
if (PHY_vars_UE_g[0][0]->rfdevice.trx_end_func)
PHY_vars_UE_g[0][0]->rfdevice.trx_end_func(&PHY_vars_UE_g[0][0]->rfdevice);
//if (ouput_vcd)
//VCD_SIGNAL_DUMPER_CLOSE();
if (opt_enabled == 1)
terminate_opt();
logClean();
return 0;
}
#ifndef NR_UESOFTMODEM_H
#define NR_UESOFTMODEM_H
#define _GNU_SOURCE
#include <execinfo.h>
#include <fcntl.h>
#include <getopt.h>
#include <linux/sched.h>
#include "rt_wrapper.h"
#include <sched.h>
#include <signal.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <syscall.h>
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <sys/stat.h>
#include <sys/sysinfo.h>
#include <sys/types.h>
#include <unistd.h>
#include <sys/sysinfo.h>
#include "rt_wrapper.h"
#include "../../ARCH/COMMON/common_lib.h"
#undef MALLOC
#include "assertions.h"
#include "msc.h"
#include "PHY/types.h"
#include "PHY/defs_nr_UE.h"
#include "SIMULATION/ETH_TRANSPORT/proto.h"
#if defined(ENABLE_ITTI)
#if defined(ENABLE_USE_MME)
#include "s1ap_eNB.h"
#ifdef PDCP_USE_NETLINK
#include "SIMULATION/ETH_TRANSPORT/proto.h"
#endif
#endif
#endif
/* help strings definition for command line options, used in CMDLINE_XXX_DESC macros and printed when -h option is used */
#define CONFIG_HLP_RFCFGF "Configuration file for front-end (e.g. LMS7002M)\n"
#define CONFIG_HLP_ULMAXE "set the eNodeB max ULSCH erros\n"
#define CONFIG_HLP_CALUER "set UE RX calibration\n"
#define CONFIG_HLP_CALUERM ""
#define CONFIG_HLP_CALUERB ""
#define CONFIG_HLP_DBGUEPR "UE run normal prach power ramping, but don't continue random-access\n"
#define CONFIG_HLP_CALPRACH "UE run normal prach with maximum power, but don't continue random-access\n"
#define CONFIG_HLP_NOL2CN "bypass L2 and upper layers\n"
#define CONFIG_HLP_UERXG "set UE RX gain\n"
#define CONFIG_HLP_UERXGOFF "external UE amplifier offset\n"
#define CONFIG_HLP_UETXG "set UE TX gain\n"
#define CONFIG_HLP_UENANTR "set UE number of rx antennas\n"
#define CONFIG_HLP_UENANTT "set UE number of tx antennas\n"
#define CONFIG_HLP_UESCAN "set UE to scan around carrier\n"
#define CONFIG_HLP_UEFO "set UE to enable estimation and compensation of frequency offset\n"
#define CONFIG_HLP_DUMPFRAME "dump UE received frame to rxsig_frame0.dat and exit\n"
#define CONFIG_HLP_DLSHIFT "dynamic shift for LLR compuation for TM3/4 (default 0)\n"
#define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n"
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
#define CONFIG_HLP_EXCCLK "tells hardware to use an external clock reference\n"
#define CONFIG_HLP_USIM "use XOR autentication algo in case of test usim mode\n"
#define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n"
#define CONFIG_HLP_TADV "Set timing_advance\n"
#define CONFIG_HLP_DLF "Set the downlink frequency for all component carriers\n"
#define CONFIG_HLP_CHOFF "Channel id offset\n"
#define CONFIG_HLP_SOFTS "Enable soft scope and L1 and L2 stats (Xforms)\n"
#define CONFIG_HLP_EXMCAL "Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n"
#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
#define CONFIG_HLP_DLMCS "Set the maximum downlink MCS\n"
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
#define CONFIG_HLP_ULMCS "Set the maximum uplink MCS\n"
#define CONFIG_HLP_TDD "Set hardware to TDD mode (default: FDD). Used only with -U (otherwise set in config file).\n"
#define CONFIG_HLP_UE "Set the lte softmodem as a UE\n"
#define CONFIG_HLP_L2MONW "Enable L2 wireshark messages on localhost \n"
#define CONFIG_HLP_L2MONP "Enable L2 pcap messages on localhost \n"
#define CONFIG_HLP_VCD "Enable VCD (generated file will is named openair_dump_eNB.vcd, read it with target/RT/USER/eNB.gtkw\n"
#define CONFIG_HLP_TQFS "Apply three-quarter of sampling frequency, 23.04 Msps to reduce the data rate on USB/PCIe transfers (only valid for 20 MHz)\n"
#define CONFIG_HLP_TPORT "tracer port\n"
#define CONFIG_HLP_NOTWAIT "don't wait for tracer, start immediately\n"
#define CONFIG_HLP_TNOFORK "to ease debugging with gdb\n"
#define CONFIG_HLP_NUMEROLOGY "adding numerology for 5G\n"
#define CONFIG_HLP_EMULATE_RF "Emulated RF enabled(disable by defult)\n"
#define CONFIG_HLP_PARALLEL_CMD "three config for level of parallelism 'PARALLEL_SINGLE_THREAD', 'PARALLEL_RU_L1_SPLIT', or 'PARALLEL_RU_L1_TRX_SPLIT'\n"
#define CONFIG_HLP_WORKER_CMD "two option for worker 'WORKER_DISABLE' or 'WORKER_ENABLE'\n"
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_USRP_CLK_SRC "USRP clock source: 'internal' or 'external'\n"
/***************************************************************************************************************************************/
/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
when calling config_get or config_getlist functions */
/*------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters defining UE running mode */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_UEMODEPARAMS_DESC { \
{"calib-ue-rx", CONFIG_HLP_CALUER, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
{"calib-ue-rx-med", CONFIG_HLP_CALUERM, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
{"calib-ue-rx-byp", CONFIG_HLP_CALUERB, 0, iptr:&rx_input_level_dBm, defintval:0, TYPE_INT, 0}, \
{"debug-ue-prach", CONFIG_HLP_DBGUEPR, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
{"no-L2-connect", CONFIG_HLP_NOL2CN, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
{"calib-prach-tx", CONFIG_HLP_CALPRACH, PARAMFLAG_BOOL, uptr:NULL, defuintval:1, TYPE_INT, 0}, \
{"loop-memory", CONFIG_HLP_UELOOP, 0, strptr:&loopfile, defstrval:"iqs.in", TYPE_STRING,0}, \
{"ue-dump-frame", CONFIG_HLP_DUMPFRAME, PARAMFLAG_BOOL, iptr:&dumpframe, defintval:0, TYPE_INT, 0}, \
}
#define CMDLINE_CALIBUERX_IDX 0
#define CMDLINE_CALIBUERXMED_IDX 1
#define CMDLINE_CALIBUERXBYP_IDX 2
#define CMDLINE_DEBUGUEPRACH_IDX 3
#define CMDLINE_NOL2CONNECT_IDX 4
#define CMDLINE_CALIBPRACHTX_IDX 5
#define CMDLINE_MEMLOOP_IDX 6
#define CMDLINE_DUMPMEMORY_IDX 7
/*------------------------------------------------------------------------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters specific to UE */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*--------------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_UEPARAMS_DESC { \
{"ue-rxgain", CONFIG_HLP_UERXG, 0, dblptr:&(rx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-rxgain-off", CONFIG_HLP_UERXGOFF, 0, dblptr:&rx_gain_off, defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-txgain", CONFIG_HLP_UETXG, 0, dblptr:&(tx_gain[0][0]), defdblval:0, TYPE_DOUBLE, 0}, \
{"ue-nb-ant-rx", CONFIG_HLP_UENANTR, 0, u8ptr:&nb_antenna_rx, defuintval:1, TYPE_UINT8, 0}, \
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&nb_antenna_tx, defuintval:1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&UE_scan_carrier, defintval:0, TYPE_INT, 0}, \
{"ue-fo-compensation", CONFIG_HLP_UEFO, PARAMFLAG_BOOL, iptr:&UE_fo_compensation, defintval:0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"r" , CONFIG_HLP_PRB, 0, iptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \
{"usrp-clksrc", CONFIG_HLP_USRP_CLK_SRC,0, strptr:(char **)&usrp_clksrc, defstrval:"internal", TYPE_STRING, 0} \
}
#define DEFAULT_DLF 2680000000
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters common to eNodeB and UE */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_PARAMS_DESC { \
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr:(char **)&rf_config_file, defstrval:NULL, TYPE_STRING, sizeof(rf_config_file)}, \
{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"threadoffset", NULL, 0, iptr:&(threads_offset), defintval:0, TYPE_INT, 0}, \
{"threadMain", NULL, 0, iptr:&(threads.main), defintval:-1, TYPE_INT, 0}, \
{"threadSync", NULL, 0, iptr:&(threads.sync), defintval:-1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:-1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:-1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:-1, TYPE_INT, 0}, \
{"threadSlot1ProcThree", NULL, 0, iptr:&(threads.slot1_proc_three), defintval:-1, TYPE_INT, 0}, \
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&nr_dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, iptr:&do_forms, defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \
{"K" , CONFIG_HLP_ITTIL, PARAMFLAG_NOFREE, strptr:&itti_dump_file, defstrval:"/tmp/itti.dump", TYPE_STRING, 0}, \
{"m" , CONFIG_HLP_DLMCS, 0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS, 0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"W" , CONFIG_HLP_L2MONW, 0, strptr:(char **)&in_ip, defstrval:"127.0.0.1", TYPE_STRING, sizeof(in_ip)}, \
{"P" , CONFIG_HLP_L2MONP, 0, strptr:(char **)&in_path, defstrval:"/tmp/oai_opt.pcap", TYPE_STRING, sizeof(in_path)}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"parallel-config", CONFIG_HLP_PARALLEL_CMD,0, strptr:(char **)&parallel_config, defstrval:NULL, TYPE_STRING, 0}, \
{"worker-config", CONFIG_HLP_WORKER_CMD, 0, strptr:(char **)&worker_config, defstrval:NULL, TYPE_STRING, 0}, \
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT, PARAMFLAG_BOOL, iptr:&nonbiotflag, defintval:0, TYPE_INT, 0} \
}
#define CONFIG_HLP_FLOG "Enable online log \n"
#define CONFIG_HLP_LOGL "Set the global log level, valide options: (9:trace, 8/7:debug, 6:info, 4:warn, 3:error)\n"
#define CONFIG_HLP_LOGV "Set the global log verbosity \n"
#define CONFIG_HLP_TELN "Start embedded telnet server \n"
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters for LOG utility */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_LOGPARAMS_DESC { \
{"R" , CONFIG_HLP_FLOG, 0, uptr:&online_log_messages, defintval:1, TYPE_INT, 0}, \
{"g" , CONFIG_HLP_LOGL, 0, uptr:&glog_level, defintval:0, TYPE_UINT, 0}, \
{"G" , CONFIG_HLP_LOGV, 0, uptr:&glog_verbosity, defintval:0, TYPE_UINT16, 0}, \
{"telnetsrv", CONFIG_HLP_TELN, PARAMFLAG_BOOL, uptr:&start_telnetsrv, defintval:0, TYPE_UINT, 0}, \
}
#define CMDLINE_ONLINELOG_IDX 0
#define CMDLINE_GLOGLEVEL_IDX 1
#define CMDLINE_GLOGVERBO_IDX 2
#define CMDLINE_STARTTELN_IDX 3
extern int T_port;
extern int T_nowait;
extern int T_dont_fork;
/***************************************************************************************************************************************/
extern pthread_cond_t sync_cond;
extern pthread_mutex_t sync_mutex;
extern int sync_var;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
extern int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
extern int rx_input_level_dBm;
extern uint8_t exit_missed_slots;
extern uint64_t num_missed_slots; // counter for the number of missed slots
extern int oaisim_flag;
extern volatile int oai_exit;
extern openair0_config_t openair0_cfg[MAX_CARDS];
extern pthread_cond_t sync_cond;
extern pthread_mutex_t sync_mutex;
extern int sync_var;
extern int transmission_mode;
extern double cpuf;
#if defined(ENABLE_ITTI)
extern volatile int start_eNB;
extern volatile int start_UE;
#endif
#include "threads_t.h"
extern threads_t threads;
// In nr-ue.c
extern int setup_ue_buffers(PHY_VARS_NR_UE **phy_vars_ue, openair0_config_t *openair0_cfg);
extern void fill_ue_band_info(void);
extern void init_UE(int);
extern void init_thread(int sched_runtime, int sched_deadline, int sched_fifo, cpu_set_t *cpuset, char * name);
extern void reset_opp_meas(void);
extern void print_opp_meas(void);
#endif
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment